Schottky diode and manufacturing method thereof
By adding a second dot-shaped trench structure in the unpinched area of the Schottky diode to form an additional electric field shielding, the problem of leakage failure of the existing Schottky diode is solved, and its performance and reliability are improved.
Patent Information
- Application Number
- CN202510394121.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-03-31
- Publication Date
- 2025-05-30
AI Technical Summary
The existing trench type Schottky diodes have leakage failure problems, which affects their performance and reliability.
By adding a slightly smaller second point-shaped groove structure in the unpinched area of the Schottky diode, the second pinched area formed on the peripheral side covers at least the unpinched area, thereby forming an additional electric field shielding to enhance the pinched effect of the electric field.
Effectively reduce the leakage current of the device, solve the leakage failure problem, and improve the performance and reliability of Schottky diodes.
Smart Images
Figure CN120076357A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of semiconductor technology, and more particularly, to a Schottky diode and a manufacturing method thereof. Background Art
[0002] The trench Schottky diode has the advantages of low forward voltage drop and high operating frequency, and is widely used in the field of photovoltaic cells. However, the existing trench Schottky diodes still have the problem of leakage failure. Summary of the Invention
[0003] In order to at least overcome the above deficiencies in the prior art, the purpose of the present application is to provide a Schottky diode and a manufacturing method thereof.
[0004] In a first aspect, an embodiment of the present application provides a Schottky diode, which includes:
[0005] A substrate;
[0006] An epitaxial layer disposed on one side of the substrate;
[0007] A first dot-shaped trench structure located on the side of the epitaxial layer away from the substrate, with a first pinch-off region formed on the periphery of the first dot-shaped trench structure. Among them, the first pinch-off regions formed by multiple adjacent first dot-shaped trench structures enclose an unpinched region;
[0008] A second dot-shaped trench structure also located on the side of the epitaxial layer away from the substrate. Multiple second dot-shaped trench structures are distributed on the periphery of the first dot-shaped trench structure. A second pinch-off region is formed on the periphery of the second dot-shaped trench structure, and the second pinch-off region at least covers the unpinched region. The size of the first dot-shaped trench structure is larger than the size of the first dot-shaped trench structure.
[0009] In a possible implementation, the orthographic projection shapes of the first dot-shaped trench structure and the second dot-shaped trench structure on the substrate include a circle;
[0010] The diameter of the first dot-shaped trench structure is 0.4um to 1um, and the diameter of the second dot-shaped trench structure is 0.2um to 0.4um.
[0011] In a possible implementation, the pattern shape formed by the connection lines between the centers of the orthographic projections of three adjacent first dot-shaped trench structures on the substrate includes an equilateral triangle, an isosceles triangle, or a right triangle.
[0012] In a possible implementation, when the pattern formed by the connecting lines between the centers of the positive projections of the three first dot-shaped trench structures on the substrate is an equilateral triangle, the center of the positive projection of the second dot-shaped trench structure on the substrate is located at the center of the equilateral triangle;
[0013] When the pattern formed by the connecting lines between the centers of the positive projections of the three first dot-shaped trench structures on the substrate is an isosceles triangle, the center of the positive projection of the second dot-shaped trench structure on the substrate is located at the center of the base of the isosceles triangle;
[0014] When the pattern formed by the connecting lines between the centers of the positive projections of the three first dot-shaped trench structures on the substrate is a right triangle, the center of the positive projection of the second dot-shaped trench structure on the substrate is located at the center of the hypotenuse of the right triangle.
[0015] In a possible implementation, the spacing between adjacent first dot-shaped trench structures is 0.9 um to 3 um;
[0016] The spacing between adjacent second dot-shaped trench structures is 0.5 um to 1.5 um.
[0017] In a possible implementation, the first dot-shaped trench structure further includes a first trench, a first gate oxide layer, and a first polycrystalline layer, and the second dot-shaped trench structure further includes a second trench, a second gate oxide layer, and a second polycrystalline layer;
[0018] The first trench is located on the side of the epitaxial layer away from the substrate, the first gate oxide layer is located on the surface of the first trench, the first polycrystalline layer is filled in the first trench, and the surfaces of the first gate oxide layer and the first polycrystalline layer are flush with the surface of the epitaxial layer on the side away from the substrate;
[0019] The second trench is located on the side of the epitaxial layer away from the substrate, the second gate oxide layer is located on the surface of the second trench, the second polycrystalline layer is filled in the second trench, and the surfaces of the second gate oxide layer and the second polycrystalline layer are flush with the surface of the epitaxial layer on the side away from the substrate.
[0020] In a possible implementation, the Schottky diode further includes a barrier layer, a first metal layer, and a second metal layer;
[0021] The barrier layer is located on the side of the epitaxial layer away from the substrate, and the barrier layer is in contact with the first dot-shaped trench structure and the second dot-shaped trench structure respectively;
[0022] The first metal layer is located on a side of the barrier layer away from the substrate, and the second metal layer is located on a side of the substrate away from the epitaxial layer.
[0023] In a second aspect, an embodiment of the present application further provides a method for manufacturing a Schottky diode, the method including:
[0024] Providing a substrate;
[0025] Fabricating an epitaxial layer on one side of the substrate;
[0026] Fabricating a first dot-shaped trench structure and a second dot-shaped trench structure on a side of the epitaxial layer away from the substrate, the second dot-shaped trench structure being distributed on the periphery of the first dot-shaped trench structure, and the size of the first dot-shaped trench structure being greater than the size of the first dot-shaped trench structure;
[0027] Wherein, a first pinch-off region is formed on the periphery of the first dot-shaped trench structure, and an unpinched-off region is enclosed by the first pinch-off regions formed by a plurality of adjacent first dot-shaped trench structures, a second pinch-off region is formed on the periphery of the second dot-shaped trench structure, and the second pinch-off region at least covers the unpinched-off region.
[0028] In a possible implementation manner, the step of fabricating a first dot-shaped trench structure and a second dot-shaped trench structure located on the periphery of the first dot-shaped trench structure on one side of the epitaxial layer includes:
[0029] Performing a patterning process on a side of the epitaxial layer away from the substrate to form a first trench and a second trench distributed on the periphery of the first trench;
[0030] Fabricating a gate oxide layer on the surfaces of the first trench and the second trench, and on the surface of the epitaxial layer away from the substrate;
[0031] Performing a polycrystalline deposition on the epitaxial layer with the gate oxide layer fabricated thereon to form a polysilicon layer located on a side of the gate oxide layer away from the substrate and filling the first trench and the second trench;
[0032] Performing an etching process on the gate oxide layer and the polysilicon layer to obtain a first dot-shaped trench structure including the first trench, a first gate oxide layer, and a first polysilicon layer, and a second dot-shaped trench structure including the second trench, a second gate oxide layer, and a second polysilicon layer, wherein the surfaces of the first gate oxide layer and the first polysilicon layer are flush with the surface of the epitaxial layer away from the substrate, and the surfaces of the second gate oxide layer and the second polysilicon layer are flush with the surface of the epitaxial layer away from the substrate.
[0033] In a possible implementation, after the step of fabricating a first dot-shaped trench structure and a second dot-shaped trench structure located on the periphery of the first dot-shaped trench structure on one side of the epitaxial layer, the method further includes:
[0034] Fabricating a barrier layer on the side of the epitaxial layer away from the substrate;
[0035] Fabricating a first metal layer on the side of the barrier layer away from the substrate, and fabricating a second metal layer on the side of the substrate away from the epitaxial layer.
[0036] Based on any of the above aspects, the Schottky diode and its manufacturing method provided by the embodiments of the present application include a first dot-shaped trench structure and a second dot-shaped trench structure. A first pinch-off region is formed on the periphery of the first dot-shaped trench structure, and the first pinch-off regions formed by a plurality of adjacent first dot-shaped trench structures enclose an unpinched region. A second pinch-off region is formed on the periphery of the second dot-shaped trench structure, and the second pinch-off region at least covers the unpinched region. In this way, an additional electric field shielding can be formed in the unpinched region, so that the electric field strength in the unpinched region is enhanced or redistributed, the pinch-off effect of the electric field is enhanced, the carrier tunneling or diffusion caused by the unpinched electric field is reduced, the device leakage current is effectively reduced, the leakage failure problem is solved, and its performance and reliability are improved. Description of the Drawings
[0037] To more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required to be referred to in the embodiments will be briefly introduced below. It should be understood that the following drawings only show some embodiments of the present application, and therefore should not be regarded as limiting the scope. For those of ordinary skill in the art, other related drawings can be obtained based on these drawings without creative efforts.
[0038] Figure 1 It is a top view of a trench Schottky diode in the related art;
[0039] Figure 2 It is a structural schematic diagram of the Schottky diode provided by the embodiments of the present application Figure 1 ;
[0040] Figure 3 It is a top view of the Schottky diode provided by the embodiments of the present application;
[0041] Figure 4 It is a structural schematic diagram of the Schottky diode provided by the embodiments of the present application Figure 2 ;
[0042] Figure 5 It is a flow schematic diagram of the manufacturing method of the Schottky diode provided by the embodiments of the present application Figure 1 ;
[0043] Figure 6 is Figure 5 the corresponding process flow chart;
[0044] Figure 7 is Figure 6 the schematic diagram of the sub - step process of step S130 in
[0045] Figure 8 is Figure 7 the corresponding process flow chart;
[0046] Figure 9 is the flow schematic diagram of the manufacturing method of the Schottky diode provided by the embodiment of the present application Figure 2 ;
[0047] Figure 10 is Figure 9 the corresponding process flow chart. Detailed implementation manners
[0048] To make the objectives, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are some, but not all, of the embodiments of the present application. Usually, the components of the embodiments of the present application described and illustrated in the accompanying drawings here can be arranged and designed in various different configurations.
[0049] Therefore, the following detailed description of the embodiments of the present application provided in the accompanying drawings is not intended to limit the scope of the present application claimed, but merely represents the selected embodiments of the present application. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present application without creative efforts fall within the scope of protection of the present application.
[0050] It should be noted that: similar reference numerals and letters denote similar items in the following drawings. Therefore, once an item is defined in one drawing, it does not need to be further defined and explained in subsequent drawings.
[0051] In the description of the present application, it should be noted that the orientation or positional relationship indicated by the terms "upper", "lower", etc. is based on the orientation or positional relationship shown in the accompanying drawings, or the orientation or positional relationship in which the product of the present application is usually placed during use. It is only for the convenience of describing the present application and simplifying the description, and does not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of the present application. In addition, the terms "first", "second", etc. are only used for descriptive distinction and cannot be construed as indicating or implying relative importance.
[0052] In the description of the present application, it should also be noted that unless otherwise clearly specified and defined, the terms "arranged", "connected", "linked", and "connected" should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be directly connected or indirectly connected through an intermediate medium, and it can be the communication inside two components. For those of ordinary skill in the art, the specific meanings of the above terms in the present application can be understood according to specific circumstances.
[0053] The inventor found that the trench Schottky diodes in the related art mainly adopt a dot-shaped trench structure, which has advantages such as a large Schottky contact area and strong surge capacity. However, in the dot-shaped trench structure, there is usually a certain distance between adjacent dot-shaped trenches 201, and an unclamped region A' of the electric field as shown in Figure 1 is likely to appear between the dot-shaped trenches 201. This unclamped region A' may cause the problem of device leakage failure, affecting the performance and reliability of the device.
[0054] It should be noted that without conflict, different features in the embodiments of the present application can be combined with each other.
[0055] To solve the problems in the prior art, please refer to Figure 2 and Figure 3 . An embodiment of the present application provides a Schottky diode 10, which includes a substrate 110, an epitaxial layer 120, a first dot-shaped trench structure 130, and a second dot-shaped trench structure 140. Among them, the epitaxial layer 120 is located on one side of the substrate 110. The substrate 110 can be formed of an N-type heavily doped material, and the epitaxial layer 120 can be formed of an N-type lightly doped material.
[0056] The first dot-shaped trench structure 130 is located on the side of the epitaxial layer 120 away from the substrate 110. A first clamped region A is formed on the periphery of the first dot-shaped trench structure 130, and the first clamped regions A formed by a plurality of adjacent first dot-shaped trench structures 130 enclose an unclamped region A'. The second dot-shaped trench structure 140 is also located on the side of the epitaxial layer 120 away from the substrate 110. A plurality of second dot-shaped trench structures 140 are distributed on the periphery of the first dot-shaped trench structure 130. A second clamped region B is formed on the periphery of the second dot-shaped trench structure 140, and the second clamped region B at least covers the unclamped region A'. Among them, the size of the first dot-shaped trench structure 130 is larger than the size of the first dot-shaped trench structure 130.
[0057] In the above embodiments, by adding a second dot-shaped groove structure 140 with a slightly smaller size in the unpinched region A', the second pinched region B formed on the periphery of the second dot-shaped groove structure 140 at least covers the unpinched region A'. In this way, an additional electric field shielding can be formed in the unpinched region A', so that the electric field strength in the unpinched region A' is enhanced or redistributed, enhancing the pinch effect of the electric field, reducing carrier tunneling or diffusion caused by unpinched electric fields, effectively reducing the device leakage current, solving the leakage failure problem, and improving its performance and reliability.
[0058] Further, the orthographic projection shapes of the first dot-shaped groove structure 130 and the second dot-shaped groove structure 140 on the substrate 110 include circles. Among them, the diameter of the first dot-shaped groove structure 130 can be 0.4um to 1um, and the diameter of the second dot-shaped groove structure 140 can be 0.2um to 0.4um. Exemplarily, the diameter of the first dot-shaped groove structure 130 can include 0.4um, 0.42um, 0.45um, 0.5um, 0.6um, 0.7um, 0.8um, 0.9um, 0.95um, 0.98um, 1um, etc., and the diameter of the second dot-shaped groove structure 140 can include 0.2um, 0.21um, 0.22um, 0.25um, 0.3um, 0.35um, 0.38um, 0.39um, 0.4um, etc. The spacing between adjacent first dot-shaped groove structures 130 is 0.9um to 3um, and the spacing between adjacent second dot-shaped groove structures 140 is 0.5um to 1.5um. Exemplarily, the spacing between adjacent first dot-shaped groove structures 130 includes 0.9um, 0.95um, 1um, 1.25um, 1.5um, 1.75um, 2um, 2.5um, 2.75um, 2.9um, 3um, etc., and the spacing between adjacent second dot-shaped groove structures 140 includes 0.5um, 0.55um, 0.6um, 0.7um, 0.8um, 0.9um, 1um, 1.1um, 1.2um, 1.3um, 1.4um, 1.5um, etc.
[0059] Furthermore, the pattern shape formed by the connection lines between the centers of the orthographic projections of three adjacent first dot-shaped groove structures 130 on the substrate 110 includes an equilateral triangle, an isosceles triangle, or a right triangle.
[0060] When the pattern shape formed by the connection lines between the centers of the orthographic projections of three first dot-shaped groove structures 130 on the substrate 110 is an equilateral triangle, the center of the orthographic projection of the second dot-shaped groove structure 140 on the substrate 110 is located at the center of the equilateral triangle. In this way, it can be ensured that the second dot-shaped groove structure 140 optimally covers the unpinched region A' geometrically, further enhancing the pinch effect of the electric field.
[0061] When the pattern shape formed by the connecting lines between the centers of the orthographic projections of the three first dot-shaped trench structures 130 on the substrate 110 is an isosceles triangle, the center of the orthographic projection of the second dot-shaped trench structure 140 on the substrate 110 is located at the center of the base of the isosceles triangle. In this way, it can be ensured that the second dot-shaped trench structure 140 geometrically optimally covers the unpinched region A', further enhancing the pinch-off effect of the electric field.
[0062] When the pattern shape formed by the connecting lines between the centers of the orthographic projections of the three first dot-shaped trench structures 130 on the substrate 110 is a right triangle, the center of the orthographic projection of the second dot-shaped trench structure 140 on the substrate 110 is located at the center of the hypotenuse of the right triangle. In this way, it can be ensured that the second dot-shaped trench structure 140 geometrically optimally covers the unpinched region A', further enhancing the pinch-off effect of the electric field.
[0063] In some possible embodiments, please refer to Figure 4 , the first dot-shaped trench structure 130 further includes a first trench, a first gate oxide layer 131 and a first polycrystalline layer 132, and the second dot-shaped trench structure 140 further includes a second trench, a second gate oxide layer 141 and a second polycrystalline layer 142.
[0064] The first trench is located on the side of the epitaxial layer 120 away from the substrate 110. The first gate oxide layer 131 is located on the surface of the first trench. The first polycrystalline layer 132 is filled in the first trench, and the surfaces of the first gate oxide layer 131 and the first polycrystalline layer 132 are flush with the surface of the epitaxial layer 120 on the side away from the substrate 110. The first gate oxide layer 131 can isolate the first polycrystalline layer 132 and the epitaxial layer 120 to prevent current leakage caused by their direct contact. The first polycrystalline layer 132 can contact the barrier layer 150 described below to form a Schottky barrier.
[0065] The second trench is located on the side of the epitaxial layer 120 away from the substrate 110. The second gate oxide layer 141 is located on the surface of the second trench. The second polycrystalline layer 142 is filled in the second trench, and the surfaces of the second gate oxide layer 141 and the second polycrystalline layer 142 are flush with the surface of the epitaxial layer 120 on the side away from the substrate 110. The second gate oxide layer 141 can isolate the second polycrystalline layer 142 and the epitaxial layer 120 to prevent current leakage caused by their direct contact. The second polycrystalline layer 142 can contact the barrier layer 150 described below to form a Schottky barrier.
[0066] Furthermore, please refer to again Figure 4, the Schottky diode 10 further includes a barrier layer 150, a first metal layer 160, and a second metal layer 170. Exemplarily, the first metal layer 160 may be the anode, and the second metal layer 170 may be the cathode. The barrier layer 150 is located on the side of the epitaxial layer 120 away from the substrate 110, and the barrier layer 150 is in contact with the first dot-shaped trench structure 130 and the second dot-shaped trench structure 140 respectively. The first metal layer 160 is located on the side of the barrier layer 150 away from the substrate 110, and the second metal layer 170 is located on the side of the substrate 110 away from the epitaxial layer 120.
[0067] Based on the same inventive concept, the present application also provides a manufacturing method of the Schottky diode 10. For details, please refer to Figure 5 and Figure 6 , Figure 5 is a schematic flow chart of the manufacturing method of the Schottky diode 10, Figure 6 is Figure 5 the corresponding process chart. The following combines Figure 5 and Figure 6 to describe each step of the manufacturing method of the Schottky diode 10 in detail.
[0068] Step S110: Provide a substrate.
[0069] In this step, the substrate 110 may be an N-type heavily doped substrate.
[0070] Step S120: Fabricate an epitaxial layer on one side of the substrate.
[0071] In this step, an N-type lightly doped epitaxial layer 120 may be fabricated on one side of the substrate 110 by thermal oxidation or chemical vapor deposition. The thickness of the epitaxial layer 120 may be 4000 Å to 6000 Å.
[0072] Step S130: Fabricate a first dot-shaped trench structure and a second dot-shaped trench structure on the side of the epitaxial layer away from the substrate.
[0073] In this step, the second dot-shaped trench structure 140 is distributed on the periphery of the first dot-shaped trench structure 130, and the size of the first dot-shaped trench structure 130 is larger than the size of the first dot-shaped trench structure 130. Among them, a first pinch-off region A is formed on the periphery of the first dot-shaped trench structure 130, and the first pinch-off regions A formed by a plurality of adjacent first dot-shaped trench structures 130 enclose an unpinched region A'. A second pinch-off region B is formed on the periphery of the second dot-shaped trench structure 140, and the second pinch-off region B at least covers the unpinched region A'.
[0074] In this embodiment, by adding a second dot-shaped trench structure 140 with a slightly smaller size in the unpinched region A', the second pinched region B formed on the periphery of the second dot-shaped trench structure 140 covers at least the unpinched region A', so that an additional electric field shielding can be formed in the unpinched region A', enabling the electric field strength in the unpinched region A' to be enhanced or redistributed, enhancing the pinch-off effect of the electric field, reducing carrier tunneling or diffusion caused by the unpinched electric field, effectively reducing the device leakage current, solving the leakage failure problem, and improving its performance and reliability.
[0075] Further, please refer to Figure 7 and Figure 8 , step S130 can be implemented by the following method.
[0076] Step S131: Pattern the side of the epitaxial layer away from the substrate to form a first trench and a second trench distributed on the periphery of the first trench.
[0077] In this step, a photoresist layer can be first fabricated on the side of the epitaxial layer 120 away from the substrate 110, and then a pre-fabricated mask plate is used to form a first photoresist opening and a second photoresist opening distributed on the periphery of the first photoresist opening, wherein the size of the second photoresist opening is smaller than that of the first photoresist opening. Then, based on the first photoresist opening and the second photoresist opening, the epitaxial layer 120 is etched to form a first trench 101 and a second trench 102 distributed on the periphery of the first trench 101.
[0078] Step S132: Fabricate a gate oxide layer on the surfaces of the first trench and the second trench, and on the surface of the epitaxial layer away from the substrate.
[0079] In this step, a chemical solvent (NH 4 OH:H 2 O 2 :H 2 0) can be first used to clean the surfaces of the first trench 101 and the second trench 102 to remove surface impurity particles. Then, a 1:1000 HF solution (i.e., hydrofluoric acid) is used to remove the naturally grown oxide layer on the surface, and then a gate oxide layer 103 is grown on the surfaces of the first trench 101 and the second trench 102, and on the surface of the epitaxial layer 120 away from the substrate 110 through thermal oxidation. The thickness of the gate oxide layer 103 can be 500 angstroms to 4000 angstroms.
[0080] Step S133: Perform polycrystalline deposition on the epitaxial layer with the gate oxide layer fabricated thereon to form a polysilicon layer located on the side of the gate oxide layer away from the substrate and filling the first trench and the second trench.
[0081] Step S134: Etch the gate oxide layer and the polysilicon layer to obtain a first dot-shaped trench structure including a first trench, a first gate oxide layer, and a first polysilicon layer, and a second dot-shaped trench structure including a second trench, a second gate oxide layer, and a second polysilicon layer.
[0082] In this step, the gate oxide layer 103 and the polysilicon layer 104 on the surface of the epitaxial layer 120 away from the substrate 110 can be removed by dry etching to obtain a first dot-shaped trench structure 130 and a second dot-shaped trench structure 140. The surfaces of the first gate oxide layer 131 and the first polysilicon layer 132 are flush with the surface of the epitaxial layer 120 away from the substrate 110, and the surfaces of the second gate oxide layer 141 and the second polysilicon layer 142 are flush with the surface of the epitaxial layer 120 away from the substrate 110.
[0083] Furthermore, please refer to Figure 9 and Figure 10 , after step S130, the manufacturing method provided by the present application may further include the following steps.
[0084] Step S140: Fabricate a barrier layer on the side of the epitaxial layer away from the substrate.
[0085] In this step, the surface of the epitaxial layer 120 can be first cleaned with a 1:1000 HF solution (i.e., hydrofluoric acid), and then metal deposition is performed on the epitaxial layer 120. After annealing at 400 °C to 800 °C, a barrier layer 150 is formed. Among them, the barrier layer 150 may include metals such as titanium (Ti), chromium (Cr), nickel (Ni), platinum (Pt), nickel-platinum (NiPt), and molybdenum (Mo).
[0086] Step S150: Fabricate a first metal layer on the side of the barrier layer away from the substrate, and fabricate a second metal layer on the side of the substrate away from the epitaxial layer.
[0087] In this step, the first metal layer 160 can be the anode, and the second metal layer 170 can be the cathode.
[0088] In summary, the embodiment of the present application provides a Schottky diode and a manufacturing method thereof. The first dot-shaped trench structure is located on the side of the epitaxial layer away from the substrate. A first pinch-off region is formed on the periphery of the first dot-shaped trench structure, and an unpinched region is enclosed by the first pinch-off regions formed by a plurality of adjacent first dot-shaped trench structures. The second dot-shaped trench structure is also located on the side of the epitaxial layer away from the substrate. The plurality of second dot-shaped trench structures are distributed on the periphery of the first dot-shaped trench structure. A second pinch-off region is formed on the periphery of the second dot-shaped trench structure, and the second pinch-off region at least covers the unpinched region. Among them, the size of the first dot-shaped trench structure is larger than that of the first dot-shaped trench structure. By adding a second dot-shaped trench structure with a slightly smaller size in the unpinched region, the second pinch-off region formed on the periphery of the second dot-shaped trench structure at least covers the unpinched region. In this way, an additional electric field shielding can be formed in the unpinched region, so that the electric field strength in the unpinched region is enhanced or redistributed, the pinch-off effect of the electric field is enhanced, the carrier tunneling or diffusion caused by the unpinched electric field is reduced, the device leakage current is effectively reduced, the leakage failure problem is solved, and its performance and reliability are improved.
[0089] The foregoing is only a preferred embodiment of the present application and is not intended to limit the present application. For those skilled in the art, various modifications and changes can be made to the present application. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application shall be included in the protection scope of the present application.
Claims
1. A Schottky diode, characterized in that: include: substrate; an epitaxial layer, wherein the epitaxial layer is disposed on one side of the substrate; A first dot-shaped groove structure, wherein the first dot-shaped groove structure is located on a side of the epitaxial layer away from the substrate, and a first pinch-off region is formed on a peripheral side of the first dot-shaped groove structure, wherein the first pinch-off regions formed by a plurality of adjacent first dot-shaped groove structures enclose a non-pinch-off region; A second point-shaped groove structure, the second point-shaped groove structure is also located on the side of the epitaxial layer away from the substrate, a plurality of the second point-shaped groove structures are distributed on the peripheral side of the first point-shaped groove structure, a second pinch-off area is formed on the peripheral side of the second point-shaped groove structure, the second pinch-off area at least covers the un-pinch-off area, and the size of the first point-shaped groove structure is larger than the size of the first point-shaped groove structure.
2. The Schottky diode according to claim 1, characterized in that: The orthographic projection shapes of the first dot-shaped groove structure and the second dot-shaped groove structure on the substrate include a circle; The diameter of the first dot-shaped groove structure is 0.4 um to 1 um, and the diameter of the second dot-shaped groove structure is 0.2 um to 0.4 um.
3. The Schottky diode according to claim 2, characterized in that: The pattern shape formed by the lines connecting the centers of the orthographic projections of three adjacent first dot-shaped groove structures on the substrate includes an equilateral triangle, an isosceles triangle or a right triangle.
4. The Schottky diode according to claim 3, characterized in that: When the pattern shape formed by the lines connecting the centers of the orthographic projections of the three first dot-shaped groove structures on the substrate is an equilateral triangle, the center of the orthographic projection of the second dot-shaped groove structure on the substrate is located at the center of the equilateral triangle; When the pattern shape formed by the lines connecting the centers of the orthographic projections of the three first dot-shaped groove structures on the substrate is an isosceles triangle, the center of the orthographic projection of the second dot-shaped groove structure on the substrate is located at the center of the base of the isosceles triangle; When the pattern shape formed by the lines connecting the centers of the orthographic projections of the three first dot-shaped groove structures on the substrate is a right triangle, the center of the orthographic projection of the second dot-shaped groove structure on the substrate is located at the center of the hypotenuse of the right triangle.
5. The Schottky diode according to claim 1, characterized in that: The spacing between adjacent first dot-shaped groove structures is 0.9um to 3um; The distance between adjacent second dot-shaped groove structures is 0.5um to 1.5um.
6. The Schottky diode according to claim 1, characterized in that: The first dot-shaped groove structure further includes a first groove, a first gate oxide layer and a first polycrystalline layer, and the second dot-shaped groove structure further includes a second groove, a second gate oxide layer and a second polycrystalline layer; The first trench is located at a side of the epitaxial layer away from the substrate, the first gate oxide layer is located on a surface of the first trench, the first polycrystalline layer is filled in the first trench, and the surfaces of the first gate oxide layer and the first polycrystalline layer are flush with a surface of the epitaxial layer away from the substrate; The second trench is located on a side of the epitaxial layer away from the substrate, the second gate oxide layer is located on a surface of the second trench, the second polycrystalline layer is filled in the second trench, and the surfaces of the second gate oxide layer and the second polycrystalline layer are flush with a surface of the epitaxial layer away from the substrate.
7. The Schottky diode according to claim 6, characterized in that: The Schottky diode further includes a barrier layer, a first metal layer and a second metal layer; The barrier layer is located at a side of the epitaxial layer away from the substrate, and the barrier layer is in contact with the first dot-shaped trench structure and the second dot-shaped trench structure respectively; The first metal layer is located on a side of the barrier layer away from the substrate, and the second metal layer is located on a side of the substrate away from the epitaxial layer.
8. A method for manufacturing a Schottky diode, characterized in that: The method comprises: providing a substrate; forming an epitaxial layer on one side of the substrate; A first dot-shaped groove structure and a second dot-shaped groove structure are formed on a side of the epitaxial layer away from the substrate, wherein the second dot-shaped groove structure is distributed around the first dot-shaped groove structure, and the size of the first dot-shaped groove structure is larger than the size of the first dot-shaped groove structure; Among them, a first pinch-off area is formed on the surrounding side of the first dot-shaped groove structure, and the first pinch-off areas formed by multiple adjacent first dot-shaped groove structures enclose an un-pinch-off area, and a second pinch-off area is formed on the surrounding side of the second dot-shaped groove structure, and the second pinch-off area at least covers the un-pinch-off area.
9. The method for manufacturing a Schottky diode according to claim 8, characterized in that: The step of forming a first dot-shaped trench structure and a second dot-shaped trench structure located around the first dot-shaped trench structure on one side of the epitaxial layer comprises: Performing patterning on a side of the epitaxial layer away from the substrate to form a first trench and second trenches distributed around the first trench; Forming a gate oxide layer on the surfaces of the first trench and the second trench, and on the surface of the epitaxial layer away from the substrate; Performing polycrystalline deposition on the epitaxial layer of the gate oxide layer to form a polycrystalline silicon layer located on a side of the gate oxide layer away from the substrate and filling the first trench and the second trench; The gate oxide layer and the polysilicon layer are etched to obtain a first dot-shaped groove structure including the first groove, the first gate oxide layer and the first polycrystalline layer, and a second dot-shaped groove structure including the second groove, the second gate oxide layer and the second polycrystalline layer, wherein the surfaces of the first gate oxide layer and the first polycrystalline layer are flush with the surface of the epitaxial layer away from the substrate, and the surfaces of the second gate oxide layer and the second polycrystalline layer are flush with the surface of the epitaxial layer away from the substrate.
10. The method for manufacturing a Schottky diode according to claim 8, characterized in that: After the step of forming a first dot-shaped trench structure and a second dot-shaped trench structure located around the first dot-shaped trench structure on one side of the epitaxial layer, the method further comprises: Fabricating a barrier layer on a side of the epitaxial layer away from the substrate; A first metal layer is formed on a side of the barrier layer away from the substrate, and a second metal layer is formed on a side of the substrate away from the epitaxial layer.