Field effect transistor and preparation method thereof

Abstract

The invention belongs to the technical field of semiconductor device manufacturing, discloses a field effect transistor and a manufacturing method thereof, and aims to solve the problems of damage to the surface of a two-dimensional material and polymer residue on an interface in the manufacturing process of the two-dimensional material field effect transistor. The invention provides a field effect transistor. The field effect transistor comprises a substrate, an electrode, a gate dielectric layer and a channel layer which are arranged from bottom to top. Wherein the gate dielectric layer and the channel layer are respectively a ZrSe2 thin film and a MoS2 thin film, and are respectively prepared by transferring ZrSe2 and MoS2 two-dimensional materials through a dry method. The two-dimensional material ZrSe2 is positioned in the middle (grid electrode) of the interdigital electrode and is not in contact with the two electrodes beside the two-dimensional material ZrSe2; the two-dimensional material MoS2 is in contact with the electrodes (the source electrode and the drain electrode) on the two sides, in contact with the ZrSe2 in the middle and not in contact with the grid electrode, and the MoS2 serves as a channel for carrier transmission. The invention provides a method for transferring a gate oxide layer two-dimensional material and a carrier transport layer two-dimensional material on a source electrode, a drain electrode and a grid electrode which are manufactured in advance, and compared with a traditional method, the problems of damage to the surfaces of the two-dimensional materials, interface polymer residues and the like are avoided.

Description

Technical Field

[0001] The present invention belongs to the technical field of semiconductor device manufacturing, and particularly relates to a field effect transistor. Background Art

[0002] Due to the characteristics of two-dimensional materials such as the lack of surface dangling bonds, semiconductor devices based on two-dimensional materials have shown excellent performance in multiple fields and have been continuously studied.

[0003] Currently, one of the technologies faced in the manufacturing of two-dimensional semiconductor transistors is how to neither damage the surface dangling bond-free structure of two-dimensional materials nor introduce residues on their surfaces. Currently, there are two ways to manufacture two-dimensional semiconductor transistors. One is to use a back-gate structure, which directly transfers two-dimensional materials to a SiO 2 / Si substrate, uses SiO 2 as the gate oxide layer, and then uses traditional metal deposition processes to fabricate the source and drain for FET (field effect transistor) devices. However, this method has three disadvantages. First, the gate oxide layer is relatively thick, resulting in a generally large turn-off voltage V GS of the field effect transistor, and its absolute value generally exceeds 5V. Second, the high-energy metal deposition process usually involves atomic or cluster bombardment and strong local heating of the contact area, which may damage the crystal structure phase change at or near the two-dimensional interface, resulting in the "pinning" phenomenon of the Fermi level. Third, multiple spin coatings of photoresist are required, and the resist development process may also leave polymer residues within the interface, resulting in a deviation of the overall measured barrier height from the predicted value.

[0004] Another approach is to use a top-gate structure, which is a traditional MOSFET (metal oxide field effect transistor) structure. During the manufacturing process, a gate oxide layer needs to be deposited on top of the two-dimensional material transferred to the SiO 2 / Si substrate, and this process will have an adverse impact on the device performance. One is the relatively high thermal energy or impact energy, and its interaction with the interface of the two-dimensional semiconductor is sufficient to break the van der Waals gap and surface covalent bonds, which will lead to chemical interactions, thus generating many intermediate energy gap states at the interface, which is adverse to the device. In addition, this process is also prone to leaving polymer residues within the interface during the development process. Summary of the Invention

[0005] To solve the above technical problems, the present invention proposes a field effect transistor and a preparation method thereof.

[0006] To achieve the above object, the technical solution of the present invention is realized as follows:

[0007] A field effect transistor includes a substrate, an electrode, a gate dielectric layer, and a channel layer arranged from bottom to top; the gate dielectric layer and the channel layer are ZrSe2 Thin film and MoS 2 Thin film. The electrode is above the substrate, and the electrode fabrication is completed before the transfer gate dielectric, so as to avoid the bombardment of the two-dimensional gate dielectric layer by high-energy particles during electrode fabrication and the polymer residues introduced by the lithography process in the two-dimensional gate dielectric layer.

[0008] The above-mentioned electrode includes a source electrode, a gate electrode and a drain electrode. Among them, the gate electrode is the middle electrode, and the source electrode and the drain electrode are the two side electrodes.

[0009] The above-mentioned gate dielectric layer is to transfer ZrSe 2 onto the gate electrode by dry transfer and not in contact with the source electrode and the drain electrode; the channel layer is to transfer MoS 2 onto the surface of the gate dielectric layer by dry transfer, in contact with the source electrode, the drain electrode and the middle ZrSe 2 thin film, and not in contact with the gate electrode.

[0010] The preparation method of the above-mentioned field effect transistor is as follows:

[0011] (1) Prepare the gate electrode, source electrode and drain electrode on the cleaned substrate by using lithography and electron beam evaporation processes;

[0012] (2) Transfer ZrSe 2 onto the surface of the gate electrode by dry transfer to form a ZrSe 2 thin film, which is used as the gate dielectric layer of the field effect transistor;

[0013] (3) Transfer MoS 2 onto the surface of the gate dielectric layer by dry transfer to form a MoS 2 thin film, which is used as the channel layer of the field effect transistor.

[0014] Furthermore, in the above step (1), the substrate is a Si substrate with a SiO 2 layer on its surface; the lithography and electron beam evaporation process steps are: spin-coat photoresist on the cleaned substrate and lithograph the pattern; then, deposit metals Cr and Au on the pattern by electron beam evaporation successively.

[0015] Furthermore, in the above step (2), the thickness of the ZrSe 2 thin film is 10 - 60 nm.

[0016] Furthermore, in the above step (3), the thickness of the MoS 2 thin film is 2 - 30 nm.

[0017] The dry transfer steps in the above steps (2) and (3) are as follows:

[0018] (S1) Transfer ZrSe 2 or MoS 2Transfer to 3M blue film tape, and symmetrically peel off ZrSe 2 or MoS 2 by mechanical peeling method;

[0019] (S2) Transfer ZrSe 2 or MoS 2 on the 3M blue film tape to the silicone film. After maintaining for 2 - 10 minutes, separate the 3M blue film tape from the silicone film;

[0020] (S3) Separate the silicone film from ZrSe 2 or MoS 2 , and transfer ZrSe 2 to the gate surface or transfer MoS 2 to the gate dielectric layer surface.

[0021] Furthermore, the mechanical peeling method in the above (S1) is: achieving symmetric peeling by folding the 3M blue film tape 5 - 25 times.

[0022] Furthermore, the size of the transferred ZrSe 2 or the transferred MoS 2 in the above step (S3) is 15 - 20μm × 50 - 60μm.

[0023] The beneficial effects of the present invention are:

[0024] (1) For the preparation method of the field - effect transistor provided by the present invention, the electrodes, gate dielectric materials, and channel layers are stacked by transfer or direct deposition to obtain the field - effect transistor. Compared with the traditional field - effect transistor preparation technologies that use selective etching, atomic layer deposition of the gate dielectric layer, isolation layer deposition, etc. as key processes, the transistor preparation method proposed by the present invention simplifies the process steps and flow, and has higher cost - effectiveness; and this preparation method can significantly shorten the production time, and it only takes 20 - 30 minutes to complete the preparation.

[0025] (2) A field - effect transistor of the present invention includes a substrate, electrodes, a gate dielectric layer, and a channel layer arranged from bottom to top; the gate dielectric layer and the channel layer are ZrSe 2 thin film and MoS 2 thin film respectively. Through this structural setting, it can be achieved that the metal / gate dielectric interface and the gate dielectric layer / channel layer interface are not damaged to the maximum extent.

[0026] (3) In the preparation method of the field - effect transistor described in the present invention, two - dimensional semiconductor materials ZrSe 2 and MoS 2, instead of traditional semiconductor materials, due to the structural and physical properties of two-dimensional van der Waals layered materials such as atomic-level thickness, flat surface without dangling bonds, and no surface states, it exhibits a switching ratio exceeding 10 5 . And the turn-off voltage of the fabricated device is -2V, and the turn-off gate voltage is significantly less than the -5V voltage when using SiO 2 as the back gate of MoS 2 field-effect transistors. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] In order to more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the following will briefly introduce the drawings required for the description of the embodiments or the prior art. Obviously, the drawings in the following description are only some embodiments of the present invention. For those of ordinary skill in the art, without creative efforts, other drawings can also be obtained based on these drawings.

[0028] Figure 1 It is the overall structure diagram of the field-effect transistor of the present invention.

[0029] Figure 2 It is the preparation process of the field-effect transistor of this application.

[0030] Figure 3 It is the optical microscope photo of the field-effect transistor prepared by the present invention.

[0031] Figure 4 It is the atomic force scanning photo of the field-effect transistor prepared by the present invention; among them, (a) is the atomic force microscope photo; (b) is the cross-sectional height with the white straight line in the gate as the selected cross-sectional position.

[0032] Figure 5 It is the three-dimensional photo of the atomic force scanning of the field-effect transistor prepared by the present invention.

[0033] Figure 6 It is the output characteristic test result of the field-effect transistor prepared by the present invention.

[0034] Figure 7 It is the transfer characteristic test result of the field-effect transistor prepared by the present invention.

[0035] Figure 8 It is the display of the transfer characteristic test result of the field-effect transistor prepared by the present invention in semi-logarithmic coordinates. DETAILED DESCRIPTION OF THE INVENTION

[0036] Next, in combination with the embodiments of the present invention, the technical solutions of the present invention will be clearly and completely described. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention.

[0037] The specific preparation method of the field effect transistor of the present invention is as follows:

[0038] S1. Substrate cleaning: First, the silicon dioxide substrate is preliminarily cleaned to remove surface particles and organic substances. The substrate can be ultrasonically cleaned in deionized water for about 5 - 10 minutes, and then dried with nitrogen. Next, the substrate usually undergoes RCA cleaning, which is divided into two steps: SC-1 and SC-2. SC-1 cleaning uses a mixed solution of ammonia water (NH 4 OH), hydrogen peroxide (H 2 O 2 ) and deionized water in a ratio of 5:1:1, and is treated at 75 - 80 °C for 10 minutes, mainly for removing organic pollutants and particles. Subsequently, the substrate is immersed in a dilute hydrofluoric acid (HF) solution (1 - 2%) for a short time to remove the natural oxide layer on the surface while retaining the SiO 2 layer. The SC-2 cleaning step is to put the substrate into a mixed solution of hydrochloric acid (HCl), hydrogen peroxide (H 2 O 2 ) and deionized water in a ratio of 6:1:1, and is treated at 75 - 80 °C for 10 minutes, mainly for removing metal ions and residual inorganic pollutants. After each cleaning step, the substrate needs to be rinsed with high-purity deionized water for at least 5 minutes to ensure complete removal of the residue of the chemical cleaning agent. The cleaned substrate needs to be dried with nitrogen or a spin dryer to avoid leaving water marks or other contaminants on the surface. Finally, the clean silicon dioxide substrate should be stored in a clean environment, usually placed in a clean container to prevent secondary contamination.

[0039] S2. Prepare electrodes on the substrate using photolithography and electron beam evaporation processes, serving as the gate, source, and drain of the field effect transistor. Use a spin coater to coat the photoresist on the substrate cleaned in step S1. Use positive photoresist, such as S1813 or AZ 5214. The spin coating parameters are set to rotate at 3000 rpm for 60 seconds to obtain a photoresist layer about 1.3 microns thick. Subsequently, the substrate is soft baked at 90 °C for 2 minutes to ensure the stability of the photoresist. In the exposure stage of the photolithography pattern, align the substrate covered with the photoresist with the mask, and use an alignment exposure machine (such as MA6 / BA6) to ensure that the alignment error is controlled within 1 micron. The exposure energy is usually set to 70 - 100 mJ / cm 2, the exposure time is 2 - 3 seconds. After exposure, the substrate is post-baked at 115 °C for 1 minute to further stabilize the pattern. In the development step, the substrate is immersed in AZ 400K developer solution (mixed with DI water at a ratio of 1:4), and the development time is about 60 seconds. After development is completed, it is rinsed with DI water for 30 seconds, and then dried with nitrogen or air-dried naturally.

[0040] During the deposition of the gold / chromium electrode, first, a 5 - 10 nm thick chromium (Cr) layer is deposited as an adhesion layer by electron beam evaporation (e-beam evaporation). Then, a 50 - 200 nm thick gold (Au) layer is deposited on top of it. The deposition rate is usually to ensure film thickness uniformity and good electrical properties. After the electrode deposition is completed, a lift-off process is carried out. The substrate is immersed in acetone, usually for 20 - 30 minutes to remove the excess photoresist. Ultrasonic treatment in the stripping solution for 1 - 2 minutes can be used to help accelerate the stripping process. After stripping is completed, it is rinsed with deionized water for 30 seconds and the substrate is dried with nitrogen. Finally, the gold / chromium electrode pattern is inspected using an optical microscope to ensure there are no residues or pattern defects. If necessary, annealing can also be carried out in a protective atmosphere (such as nitrogen) at 300 - 400 °C for 30 minutes to improve the electrical properties of the electrode.

[0041] S3. Transfer the two-dimensional material (ZrSe 2 ) thin film onto the surface of the electrode (gate), which is used as the gate dielectric layer of the field-effect transistor, and its formed thickness is 10 - 50 nm.

[0042] Transfer the two-dimensional material ZrSe 2 onto the 3M blue film tape, and peel it off by mechanical exfoliation method. Specifically, by folding the 3M blue film tape 5 - 25 times, the two-dimensional material ZrSe 2 is symmetrically peeled off. Subsequently, the two-dimensional material ZrSe 2 on the 3M blue film tape is transferred onto the silicone film (such as polydimethylsiloxane (PDMS) film). Fix the silicone film (PDMS) with the two-dimensional material ZrSe 2 on the three-dimensional micro-displacement platform 1. Operate the two micro-displacement platforms under the microscope to transfer ZrSe 2 onto the electrode. The two-dimensional ZrSe 2 is located on any one of the four strip-shaped electrodes and does not contact the two adjacent electrodes.

[0043] S4. Repeat step S3 to transfer the two-dimensional material MoS 2 onto the structure in step S3, so that the two-dimensional material MoS 2 and ZrSe 2The metal electrodes on both sides are in contact, and at the same time, it is ensured that they are in contact with ZrSe 2 above, and not in contact with ZrSe 2 The electrode below is in contact to form MoS 2 The thickness of the thin film is 2 nm - 30 nm.

[0044] Example 1

[0045] A field effect transistor (as shown in Figure 1 ) includes a substrate, an electrode, a gate dielectric layer, and a channel layer sequentially arranged from bottom to top. The substrate is a Si substrate (SiO 2 layer on the surface (SiO 2 / Si). The electrode is three interdigital Au / Cr electrodes. Among them, the middle electrode is used as the gate, and the two electrodes on both sides are used as the source and drain. Using the ZrSe 2 thin film as the gate dielectric layer, which is located on the gate and not in contact with the two adjacent electrodes. The MoS 2 thin film is used as the channel layer, which is in contact with the two electrodes (source and drain) on both sides and in contact with the middle ZrSe 2 thin film, and not in contact with the middle electrode (gate).

[0046] The preparation method of the field effect transistor in this embodiment is as shown in Figure 2 below, and the steps are as follows:

[0047] S1. Substrate cleaning: First, the silicon dioxide substrate is preliminarily cleaned to remove surface particles and organic substances. The substrate can be ultrasonically cleaned in deionized water for about 7 minutes, and then dried with nitrogen. Next, the substrate usually undergoes RCA cleaning, which is divided into two steps: SC-1 and SC-2. SC-1 cleaning uses a mixed solution of ammonia water (NH 4 OH), hydrogen peroxide (H 2 O 2 ) and deionized water in a ratio of 5:1:1, and is treated at 80 °C for 10 minutes, mainly used to remove organic pollutants and particles. Subsequently, the substrate is soaked in a dilute hydrofluoric acid (HF) solution (1 - 2%) for a short time to remove the natural oxide layer on the surface while retaining the SiO 2 layer. The SC-2 cleaning step is to put the substrate into a mixed solution of hydrochloric acid (HCl), hydrogen peroxide (H 2 O 2) and in deionized aqueous solution, treated at 80 °C for 10 minutes, mainly used to remove metal ions and residual inorganic pollutants. After each cleaning step, the substrate needs to be rinsed with high-purity deionized water for at least 5 minutes to ensure complete removal of the residue of the chemical cleaning agent. The cleaned substrate needs to be dried with nitrogen or a spin dryer to avoid leaving water marks or other contaminants on the surface. Finally, the clean silica substrate should be stored in a clean environment, usually placed in a clean container to prevent secondary contamination.

[0048] S2. Prepare electrodes on the substrate by photolithography and electron beam evaporation processes, serving as the gate, source, and drain of the field-effect transistor. Use a spin coater to coat the photoresist on the substrate cleaned in step S1. Use positive photoresist, such as S1813. The spin coating parameters are set to rotate at 3000 rpm for 60 seconds to obtain a photoresist layer about 1.3 microns thick. Subsequently, the substrate is soft baked at 90 °C for 2 minutes to ensure the stability of the photoresist. In the exposure stage of the photolithographic pattern, align the substrate covered with photoresist with the mask, using an alignment exposure machine (such as MA6 / BA6), ensuring that the alignment error is controlled within 1 micron. The exposure energy is usually set to 80 mJ / cm 2 , and the exposure time is 2 - 3 seconds. After exposure, the substrate is post-baked at 115 °C for 1 minute to further stabilize the pattern. In the development step, immerse the substrate in AZ 400K developer (mixed with DI water in a ratio of 1:4), and the development time is about 60 seconds. After development, rinse with DI water for 30 seconds, and then dry with nitrogen or air dry naturally.

[0049] During the deposition of the gold / chromium electrode, first deposit a 7-nm-thick chromium (Cr) layer as an adhesion layer by electron beam evaporation (e-beam evaporation). Then, deposit a 120-nm-thick gold (Au) layer on it. The deposition rate is usually to ensure film thickness uniformity and good electrical performance. After the electrode deposition is completed, perform a lift-off process. Immerse the substrate in acetone, usually for 25 minutes to remove the excess photoresist. Ultrasonic treatment in the stripping solution for 1 - 2 minutes can be used to help accelerate the stripping process. After stripping, rinse with deionized water for 30 seconds and dry the substrate with nitrogen. Finally, use an optical microscope to check the gold / chromium electrode pattern to ensure there are no residues or pattern defects. The obtained electrode pattern is as Figure 2 (a) shown.

[0050] S3. Transfer the two-dimensional material (ZrSe 2 ) thin film to the surface of the electrode (gate), serving as the gate dielectric layer of the field-effect transistor.

[0051] Transfer the two-dimensional material ZrSe 2Transfer to a 3M blue film tape and peel it off by mechanical peeling method. Specifically, fold the 3M blue film tape 20 times to symmetrically peel off the two-dimensional material ZrSe 2 Subsequently, transfer the two-dimensional material ZrSe on the 3M blue film tape 2 to a silicone film (such as polydimethylsiloxane (PDMS) film). Fix the silicone film (PDMS) with the two-dimensional material ZrSe 2 on the three-dimensional micro-displacement platform 1. Operate the two micro-displacement platforms under the microscope to transfer ZrSe 2 onto the electrode. The two-dimensional ZrSe 2 is located on any one of the four strip-shaped electrodes and does not contact the two adjacent electrodes.

[0052] Among them, the process of transferring the two-dimensional material ZrSe 2 onto the electrode is as follows: Use experimental tweezers to transfer the two-dimensional material ZrSe prepared by solid-phase synthesis method 2 to the 3M blue film tape. Symmetrically peel off the two-dimensional material by mechanical peeling method. Subsequently, transfer the two-dimensional material ZrSe on the 3M blue film tape 2 to the silicone film (PDMS). After maintaining for 10 minutes, separate the blue film tape and PDMS. Finally, fix the PDMS film on a glass slide, and then fix the glass slide on the three-dimensional micro-displacement platform 1. At the same time, since the substrate and the electrode are fixed on the three-dimensional displacement platform 2 by a hot plate (adjust and maintain the hot plate temperature at 120 °C), operate the three-dimensional displacement platform 1 and the three-dimensional displacement platform 2 under the microscope. Select a two-dimensional material ZrSe with a size of about 20 μm × 50 μm 2 as the transfer object. Slowly adjust the three-dimensional displacement platform 1 and the three-dimensional displacement platform 2 to make the electrode and the two-dimensional material ZrSe 2 appear in the field of view of the microscope at the same time. Then slowly adjust the three-dimensional displacement platform 1 to keep the length direction of the two-dimensional material ZrSe 2 consistent with the electrode direction and maintain for 3 minutes. Slowly raise the three-dimensional displacement platform 1 to separate the two-dimensional material ZrSe 2 from the PDMS and transfer it onto the electrode. Thus, the transfer of the two-dimensional material ZrSe 2 onto the electrode is realized. The schematic diagram of the transfer of ZrSe 2 onto the electrode is shown in Figure 2 (c). The thickness of the formed ZrSe 2 film is 50 nm.

[0053] S4. Repeat step S3 to transfer the two-dimensional material MoS 2 onto the structure in step S3, so that the two-dimensional material MoS 2 and ZrSe 2The metal electrodes on both sides are in contact with ZrSe 2 Above, and not with ZrSe 2 The electrodes below are in contact.

[0054] The specific steps are as follows: Use experimental tweezers to place the two-dimensional material MoS 2 The crystal was placed on 3M blue film tape and the two-dimensional material MoS was mechanically peeled off. 2 Symmetrically peel off, that is, fold the 3M blue film tape 10 times to separate the two-dimensional material MoS 2 Then the two-dimensional material MoS on the 3M blue film tape was peeled off symmetrically. 2 Transfer to the organosilicon film (PDMS), keep it for 10 minutes and then separate the 3M blue film tape and the organosilicon film, stick the separated PDMS to the glass slide, and then fix the glass slide on the three-dimensional displacement platform 1. At this time, there is a two-dimensional material MoS 2 The electrodes are fixed on a hot plate, the hot plate is fixed on a three-dimensional displacement platform 2, the three-dimensional displacement platform 1 and the three-dimensional displacement platform 2 are operated under a microscope, and the two-dimensional material MoS on the PDMS is observed through an optical microscope. 2 , select the two-dimensional material MoS with a size of about 15μm×60μm 2 As the transfer object (in the selection process, the thickness is determined according to the preparation requirements and experience), slowly adjust the three-dimensional displacement platform 1 and the three-dimensional displacement platform 2 to allow the two-dimensional material ZrSe 2 and two-dimensional material MoS 2 At the same time, the two-dimensional material MoS 2 With ZrSe 2 The metal electrodes on both sides are in contact with ZrSe 2 Above, and not with ZrSe 2 The electrodes below are in contact and kept for 3 minutes. The three-dimensional moving platform 1 is slowly raised to make the two-dimensional material MoS 2 With two-dimensional material ZrSe 2 contact with PDMS, and separated from PDMS. Thus, the two-dimensional material MoS 2 Transfer to electrode with 2D material ZrSe 2 On, MoS 2 The schematic diagram of the field effect transistor as the channel layer is as follows Figure 2 (d) shows the prepared MoS 2 The thickness is 20nm.

[0055] Example 2

[0056] The method for preparing the field effect transistor of this embodiment comprises the following steps:

[0057] S1. Substrate Cleaning: First, the silicon dioxide substrate is preliminarily cleaned to remove surface particles and organic substances. The substrate can be ultrasonically cleaned in deionized water for about 5 minutes and then dried with nitrogen. Next, the substrate usually undergoes RCA cleaning, which is divided into two steps: SC-1 and SC-2. SC-1 cleaning uses a mixed solution of ammonia water (NH 4 OH), hydrogen peroxide (H 2 O 2 ) and deionized water in a ratio of 5:1:1 and is treated at 75 °C for 10 minutes, mainly to remove organic pollutants and particles. Subsequently, the substrate is briefly immersed in a dilute hydrofluoric acid (HF) solution (1-2%) to remove the natural oxide layer on the surface while retaining the SiO 2 layer. The SC-2 cleaning step involves placing the substrate in a solution of hydrochloric acid (HCl), hydrogen peroxide (H 2 O 2 ) and deionized water in a ratio of 6:1:1 and treating it at 75 °C for 10 minutes, mainly to remove metal ions and residual inorganic pollutants. After each cleaning step, the substrate needs to be rinsed with high-purity deionized water for at least 5 minutes to ensure complete removal of the residual chemical cleaning agent. The cleaned substrate is dried using nitrogen or a spin dryer to avoid water marks or other contaminants on the surface. Finally, the clean silicon dioxide substrate should be stored in a clean environment, usually placed in a clean container to prevent secondary contamination.

[0058] S2. Electrodes are fabricated on the substrate using photolithography and electron beam evaporation processes and are used as the gate, source, and drain of the field-effect transistor. A photoresist is coated on the substrate cleaned in step S1 using a spin coater. A positive photoresist, AZ 5214, is used. The spin coating parameters are set to rotate at 3000 rpm for 60 seconds to obtain a photoresist layer approximately 1.3 microns thick. Subsequently, the substrate is soft baked at 90 °C for 2 minutes to ensure the stability of the photoresist. During the exposure stage of the photolithographic pattern, the substrate covered with the photoresist is aligned with the mask using an alignment exposure machine (such as MA6 / BA6) to ensure that the alignment error is controlled within 1 micron. The exposure energy is usually set to 100 mJ / cm 2 , and the exposure time is 2-3 seconds. After exposure, the substrate is post-baked at 115 °C for 1 minute to further stabilize the pattern. In the development step, the substrate is immersed in an AZ 400K developer solution (mixed with DI water in a ratio of 1:4), and the development time is approximately 60 seconds. After development, it is rinsed with DI water for 30 seconds and then dried with nitrogen or air-dried naturally.

[0059] During the deposition of the gold / chromium electrode, first, a 5-nm-thick chromium (Cr) layer is deposited as an adhesion layer by electron beam evaporation (e-beam evaporation). Then, a 50-nm-thick gold (Au) layer is deposited on top. The deposition rate is usually To ensure film thickness uniformity and good electrical properties. After the electrode deposition is completed, a lift-off process is carried out. The substrate is immersed in acetone, usually for 30 minutes to remove the excess photoresist. Ultrasonic treatment in the lift-off solution for 1 - 2 minutes can be used to help accelerate the lift-off process. After lift-off, rinse with deionized water for 30 seconds and dry the substrate with nitrogen. Finally, use an optical microscope to check the gold / chromium electrode pattern to ensure there are no residues or pattern defects. Anneal in a protective atmosphere (such as nitrogen) at 300 °C for 30 minutes to improve the electrical properties of the electrode.

[0060] S3. Transfer the two-dimensional material (ZrSe 2 ) thin film onto the surface of the electrode (gate) to be used as the gate dielectric layer of the field-effect transistor.

[0061] Transfer the two-dimensional material ZrSe 2 onto the 3M blue film tape, and peel it off by mechanical exfoliation method. Specifically, fold the 3M blue film tape in half 5 times to symmetrically exfoliate the two-dimensional material ZrSe 2 . Subsequently, transfer the two-dimensional material ZrSe 2 on the 3M blue film tape onto the silicone film (such as polydimethylsiloxane (PDMS) film). Fix the silicone film (PDMS) with the two-dimensional material ZrSe 2 on the three-dimensional micro-displacement platform 1. Operate the two micro-displacement platforms under the microscope to transfer ZrSe 2 onto the electrode. The two-dimensional ZrSe 2 is located on any one of the four strip-shaped electrodes and does not contact the two adjacent electrodes.

[0062] Among them, the process of transferring the two-dimensional material ZrSe 2 onto the electrode is as follows: Use experimental tweezers to transfer the two-dimensional material ZrSe 2 prepared by the solid-phase synthesis method onto the 3M blue film tape, and symmetrically exfoliate the two-dimensional material by mechanical exfoliation method. Subsequently, transfer the two-dimensional material ZrSe 2 on the 3M blue film tape onto the silicone film (PDMS). Separate the blue film tape and PDMS after holding for 2 minutes. Finally, fix the PDMS film onto the glass slide, and then fix the glass slide on the three-dimensional micro-displacement platform 1. At the same time, since the substrate and the electrode are fixed on the three-dimensional displacement platform 2 by a hot plate (adjust and maintain the hot plate temperature at 120 °C), operate the three-dimensional displacement platform 1 and the three-dimensional displacement platform 2 under the microscope, select a two-dimensional material ZrSe 2 with a size of about 20 μm × 50 μm as the transfer object, and slowly adjust the three-dimensional displacement platform 1 and the three-dimensional displacement platform 2 to make the electrode and the two-dimensional material ZrSe 2At the same time, the three-dimensional displacement platform 1 is slowly adjusted to keep the two-dimensional material ZrSe 2 The length direction is consistent with the electrode direction, and the three-dimensional displacement platform 1 is slowly raised for 3 minutes to make the two-dimensional material ZrSe 2 Separated from PDMS and transferred to the electrode, thus achieving the two-dimensional material ZrSe 2 Transferred to the electrode. Forming ZrSe 2 The thickness of the film is 10 nm.

[0063] S4. Repeat step S3 to make the two-dimensional material MoS 2 Transfer to the structure in step S3 to make the two-dimensional material MoS 2 With ZrSe 2 The metal electrodes on both sides are in contact with ZrSe 2 Above, and not with ZrSe 2 The electrodes below are in contact.

[0064] The specific steps are as follows: Use experimental tweezers to place the two-dimensional material MoS 2 The crystal was placed on 3M blue film tape and the two-dimensional material MoS was mechanically peeled off. 2 Symmetrically peel off, that is, fold the 3M blue film tape five times to separate the two-dimensional material MoS 2 Then the two-dimensional material MoS on the 3M blue film tape was peeled off symmetrically. 2 Transfer to the organosilicon film (PDMS), keep it for 2 minutes and then separate the 3M blue film tape and the organosilicon film, stick the separated PDMS to the glass slide, and then fix the glass slide on the three-dimensional displacement platform 1. At this time, there is a two-dimensional material MoS 2 The electrodes are fixed on a hot plate, the hot plate is fixed on a three-dimensional displacement platform 2, the three-dimensional displacement platform 1 and the three-dimensional displacement platform 2 are operated under a microscope, and the two-dimensional material MoS on the PDMS is observed through an optical microscope. 2 , select the two-dimensional material MoS with a size of about 15μm×60μm 2 As the transfer object (in the selection process, the thickness is determined according to the preparation requirements and experience), slowly adjust the three-dimensional displacement platform 1 and the three-dimensional displacement platform 2 to allow the two-dimensional material ZrSe 2 and two-dimensional material MoS 2 At the same time, the two-dimensional material MoS 2 With ZrSe 2 The metal electrodes on both sides are in contact with ZrSe 2 Above, and not with ZrSe 2 The electrodes below are in contact and kept for 3 minutes. The three-dimensional moving platform 1 is slowly raised to make the two-dimensional material MoS2 Contact with the two-dimensional material ZrSe 2 and separate from PDMS. Thus, the two-dimensional material MoS 2 is transferred to the electrode and the two-dimensional material ZrSe 2 . The prepared MoS 2 has a thickness of 30 nm.

[0065] Example 3

[0066] The preparation method of the field-effect transistor in this example is as follows:

[0067] S1. Substrate cleaning: First, the silicon dioxide substrate is preliminarily cleaned to remove surface particles and organic substances. The substrate can be ultrasonically cleaned in deionized water for about 10 minutes and then dried with nitrogen. Next, the substrate usually undergoes RCA cleaning, which is divided into two steps: SC-1 and SC-2. SC-1 cleaning uses a mixed solution of ammonia water (NH 4 OH), hydrogen peroxide (H 2 O 2 ) and deionized water in a ratio of 5:1:1 and is treated at 80 °C for 10 minutes, mainly to remove organic pollutants and particles. Subsequently, the substrate is soaked in a dilute hydrofluoric acid (HF) solution (1-2%) for a short time to remove the natural oxide layer on the surface while retaining the SiO 2 layer. The SC-2 cleaning step is to put the substrate into a hydrochloric acid (HCl), hydrogen peroxide (H 2 O 2 ) and deionized water solution in a ratio of 6:1:1 and treat it at 75 °C for 10 minutes, mainly to remove metal ions and residual inorganic pollutants. After each cleaning step, the substrate needs to be rinsed with high-purity deionized water for at least 5 minutes to ensure complete removal of the residue of the chemical cleaning agent. The cleaned substrate needs to be dried with nitrogen or a spin dryer to avoid leaving water marks or other contaminants on the surface. Finally, the clean silicon dioxide substrate should be stored in a clean environment, usually placed in a clean container, to prevent secondary pollution.

[0068] S2. Use photolithography and electron beam evaporation processes to prepare electrodes on the substrate, which are used as the gate, source, and drain of the field-effect transistor. Use a spin coater to coat the photoresist on the substrate cleaned in step S1. Use positive photoresist S1813. The spin coating parameters are set to rotate at 3000 rpm for 60 seconds to obtain a photoresist layer with a thickness of about 1.3 microns. Subsequently, the substrate is soft baked at 90 °C for 2 minutes to ensure the stability of the photoresist. In the exposure stage of the photolithography pattern, align the substrate covered with the photoresist with the mask using an alignment exposure machine (such as MA6 / BA6) to ensure that the alignment error is controlled within 1 micron. The exposure energy is usually set to 70 mJ / cm 2, the exposure time is 2 - 3 seconds. After exposure, the substrate is post-baked at 115 °C for 1 minute to further stabilize the pattern. In the development step, the substrate is immersed in AZ 400K developer (mixed with DI water at a ratio of 1:4), and the development time is about 60 seconds. After development, it is rinsed with DI water for 30 seconds, and then dried with nitrogen or air-dried naturally.

[0069] During the deposition of the gold / chromium electrodes, first, a 10-nm-thick chromium (Cr) layer is deposited as an adhesion layer by electron beam evaporation (e-beam evaporation). Then, a 200-nm-thick gold (Au) layer is deposited on top of it. The deposition rate is usually to ensure film thickness uniformity and good electrical properties. After the electrode deposition is completed, a lift-off process is carried out. The substrate is immersed in acetone, and it usually takes 20 minutes to remove the excess photoresist. Ultrasonic treatment in the stripping solution for 1 - 2 minutes can be used to help accelerate the stripping process. After stripping is completed, it is rinsed with deionized water for 30 seconds, and the substrate is dried with nitrogen. Finally, the gold / chromium electrode pattern is inspected using an optical microscope to ensure there are no residues or pattern defects.

[0070] S3. Transfer the two-dimensional material (ZrSe 2 ) thin film onto the surface of the electrode (gate), which is used as the gate dielectric layer of the field-effect transistor.

[0071] Transfer the two-dimensional material ZrSe 2 to a 3M blue film tape, and peel it off by mechanical exfoliation method. Specifically, by folding the 3M blue film tape in half 25 times, the two-dimensional material ZrSe 2 is symmetrically peeled off. Subsequently, the two-dimensional material ZrSe 2 on the 3M blue film tape is transferred onto a silicone film (such as a polydimethylsiloxane (PDMS) film). Fix the silicone film (PDMS) with the two-dimensional material ZrSe 2 on the three-dimensional micro-displacement platform 1. Operate the two micro-displacement platforms under a microscope to transfer ZrSe 2 onto the electrode. The two-dimensional ZrSe 2 is located on any one of the four strip-shaped electrodes and does not contact the two adjacent electrodes.

[0072] Among them, the process of transferring the two-dimensional material ZrSe 2 onto the electrode is as follows: Use experimental tweezers to transfer the two-dimensional material ZrSe 2 prepared by the solid-phase synthesis method onto the 3M blue film tape. By mechanical exfoliation method, the two-dimensional material is symmetrically peeled off. Subsequently, the two-dimensional material ZrSe 2Transfer it onto the polydimethylsiloxane (PDMS) film, separate the blue film tape and PDMS after keeping it for 6 min, finally fix the PDMS film onto a glass slide, and then fix the glass slide on the three-dimensional micro-displacement platform 1. At the same time, since the substrate and the electrode are fixed on the three-dimensional displacement platform 2 by a hot plate (adjust and keep the temperature of the hot plate at 120 °C), operate the three-dimensional displacement platform 1 and the three-dimensional displacement platform 2 under a microscope, and select a two-dimensional material ZrSe with a size of about 20 μm × 50 μm 2 as the transfer object, slowly adjust the three-dimensional displacement platform 1 and the three-dimensional displacement platform 2 to make the electrode and the two-dimensional material ZrSe 2 appear in the field of view of the microscope at the same time, and then slowly adjust the three-dimensional displacement platform 1 to keep the length direction of the two-dimensional material ZrSe 2 consistent with the electrode direction, keep it for 3 minutes, slowly raise the three-dimensional displacement platform 1 to separate the two-dimensional material ZrSe 2 from the PDMS and transfer it onto the electrode. Thus, the transfer of the two-dimensional material ZrSe 2 onto the electrode is achieved. The formed ZrSe 2 film has a thickness of 60 nm.

[0073] S4. Repeat step S3 to transfer the two-dimensional material MoS 2 onto the structure in step S3, making the two-dimensional material MoS 2 contact the metal electrodes on both sides of ZrSe 2 and at the same time ensure that it is above ZrSe 2 and does not contact the electrode below ZrSe 2 Specific steps are as follows: Use experimental tweezers to place the two-dimensional material MoS

[0074] crystal onto the 3M blue film tape, symmetrically peel off the two-dimensional material MoS 2 by mechanical exfoliation method, that is, fold the 3M blue film tape 15 times in half to symmetrically peel off the two-dimensional material MoS 2 Subsequently, transfer the two-dimensional material MoS 2 on the 3M blue film tape onto the polydimethylsiloxane (PDMS) film, separate the 3M blue film tape and the polydimethylsiloxane film after keeping it for 6 min, paste the separated PDMS onto a glass slide, and then fix the glass slide on the three-dimensional displacement platform 1. At this time, the electrode with the two-dimensional material MoS 2 is fixed on the hot plate, and the hot plate is fixed on the three-dimensional displacement platform 2. Operate the three-dimensional displacement platform 1 and the three-dimensional displacement platform 2 under a microscope, and observe the two-dimensional material MoS 2 on the PDMS through an optical microscope 2 and select a two-dimensional material MoS with a size of about 15 μm × 60 μm 2As the transfer object (in the selection process, the thickness is determined according to the preparation requirements and experience), slowly adjust the three-dimensional displacement platform 1 and the three-dimensional displacement platform 2 to allow the two-dimensional material ZrSe 2 and two-dimensional material MoS 2 At the same time, the two-dimensional material MoS 2 With ZrSe 2 The metal electrodes on both sides are in contact with ZrSe 2 Above, and not with ZrSe 2 The electrodes below are in contact and kept for 3 minutes. The three-dimensional moving platform 1 is slowly raised to make the two-dimensional material MoS 2 With two-dimensional material ZrSe 2 contact with PDMS, and separated from PDMS. Thus, the two-dimensional material MoS 2 Transfer to electrode with 2D material ZrSe 2 Above. Prepared MoS 2 The thickness is 2nm.

[0075] Implementation effect example

[0076] The field effect transistor prepared in Example 1 was subjected to atomic force microscopy, output characteristics and transfer characteristics tests, and the specific test results are as follows.

[0077] Figure 3 This is an optical microscope photo of the prepared field effect transistor. The width of the metal electrode in the picture is 5μm. 2 Covered in ZrSe 2 and contacts with the strip electrodes 1 and 3. 2 There is no direct connection with ZrSe 2 The electrodes on the substrate are in direct contact, but separated by a two-dimensional material ZrSe 2 From the figure and combined with the MOS transistor structure, ZrSe 2 Can be used as gate dielectric layer, MoS 2 Can serve as a channel layer.

[0078] To more clearly show the ZrSe 2 , MoS 2 The contact with the electrode was tested by atomic force microscopy. Figure 4 As shown. Figure 4 As can be seen in (a), MoS 2 It is in contact with the electrodes at both ends and has a layer of two-dimensional material in the middle electrode. In order to observe the thickness of the two-dimensional material, we Figure 4 (a) A cross section is selected, and the height results at the cross section can be observed through this interface, which is displayed inFigure 4 In (b), through Figure 4 (b), we can see that MoS 2 has a thickness of 20 nm, a width of 5 - 6 μm, and ZrSe 2 has a thickness of 50 nm. It can also be obtained from the figure that the height of the metal electrode is 160 nm.

[0079] To more vividly display the structure of the transistor, the Figure 4 atomic force microscope test results in Figure 5 are presented in three - dimensional form in Figure 5 . Through 2 , it can be clearly seen that MoS 2 is in good contact with the metal electrodes on both sides and does not directly contact the middle electrode, and the contact with ZrSe

[0080] Figure 6 is also relatively good. is the output characteristic test result of the field - effect transistor provided in Embodiment 1 of the present invention. The output characteristics are completed by two single - channel digital source meters, Keithley 2400 and Keithley 2450. During the test, the voltage between the source and the drain is scanned from 0 - 3 V with a scanning step of 0.05 V. The gate voltage V GS is scanned from - 2 V to 4 V with a scanning step of 0.5 V. It can be seen from the figure that IDS, VDS, and VGS are all positive values, that is, the fabricated device is an n - channel enhancement type.

[0081] The professional characteristics of the fabricated field - effect transistor are tested using digital source meters 2400 and 2450. The specific test process is as follows: One of the source meters is responsible for applying the source - drain voltage and measuring the source - drain current; at the same time, the other source meter applies the gate - source voltage and measures the gate - source current. Figure 7 is the transfer characteristic test result of the field - effect transistor provided in Embodiment 1 of the present invention. Figure 8 For presenting the Figure 7 results in a semi - logarithmic coordinate system. Figure 8 It can be seen that the turn - off voltage of the device is - 2 V, and the turn - off gate voltage is significantly less than the - 5 V voltage when using SiO 2 as the back - gate of MoS 2 field - effect transistor. The on - off ratio of this device is 1.51×10 5 , and this data is comparable to that of the MoS 2 channel field - effect transistor prepared by the current lithography method, which can meet the requirements of integrated circuits.

[0082] As can be seen from the above embodiments, the method for fabricating a field - effect transistor device based on two - dimensional materials provided by the present invention uses mechanical exfoliation and transfer methods to obtain ZrSe 2 as the gate dielectric layer, and MoS 2It is the channel layer, and the source electrode, gate electrode, and drain electrode are pre-prepared electrodes, without the damage to the surface of two-dimensional materials by high-energy ions in the traditional method, nor problems such as residues of polymers, etc.

[0083] The above are only the preferred embodiments of the present invention and are not intended to limit the present invention. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principles of the present invention shall be included within the protection scope of the present invention.

Claims

1. A field effect transistor, characterized in that: The field effect transistor comprises a substrate, an electrode, a gate dielectric layer and a channel layer arranged from bottom to top; the gate dielectric layer and the channel layer are a ZrSe2 film and a MoS2 film respectively.

2. The field effect transistor according to claim 1, characterized in that The electrodes include a source electrode, a gate electrode and a drain electrode.

3. The field effect transistor according to claim 2, characterized in that: The gate dielectric layer is formed by transferring ZrSe2 onto the gate by a dry method, and does not contact the source and drain; the channel layer is formed by transferring MoS2 onto the surface of the gate dielectric layer by a dry method, and contacts the source, drain and the ZrSe2 film in the middle, and does not contact the gate.

4. The method for preparing a field effect transistor according to any one of claims 1 to 3, characterized in that: Here are the steps: (1) Using photolithography and electron beam evaporation processes to prepare the gate, source, and drain on the cleaned substrate; (2) ZrSe2 is transferred to the gate surface by dry method to form a ZrSe2 thin film, which is used as the gate dielectric layer of the field effect transistor; (3) MoS2 is transferred to the surface of the gate dielectric layer by a dry method to form a MoS2 thin film, which is used as the channel layer of the field effect transistor.

5. The method for preparing a field effect transistor according to claim 4, characterized in that: In step (1), the substrate is a Si substrate with a SiO2 layer on the surface; the photolithography and electron beam evaporation process steps are: spin coating photoresist on the cleaned substrate, photolithography patterning; then, depositing metal Cr and Au on the pattern in sequence by electron beam evaporation.

6. The method for preparing a field effect transistor according to claim 5, characterized in that: The thickness of the ZrSe2 film in step (2) is 10-60 nm.

7. The method for preparing a field effect transistor according to claim 6, characterized in that: The thickness of the MoS2 film in step (3) is 2-30 nm.

8. The method for preparing a field effect transistor according to claim 7, characterized in that: The dry transfer steps in steps (2) and (3) are as follows: (S1) Transferring ZrSe2 or MoS2 to 3M blue film tape, and symmetrically peeling off ZrSe2 or MoS2 by mechanical peeling method; (S2) transferring ZrSe2 or MoS2 on the 3M blue film tape to the organic silicon film, keeping it for 2-10 minutes, and then separating the 3M blue film tape from the organic silicon film; (S3) Separating the organic silicon film from ZrSe2 or MoS2, and transferring ZrSe2 to the surface of the gate or transferring MoS2 to the surface of the gate dielectric layer.

9. The method for preparing a field effect transistor according to claim 8, characterized in that: The mechanical peeling method in (S1) is: folding the 3M blue film tape 5-25 times to achieve symmetrical peeling.

10. The method for preparing a field effect transistor according to claim 9, characterized in that: The size of the transferred ZrSe2 or the transferred MoS2 in the step (S3) is 15-20um×50-60um.

Images