Imaging array with storage function, preparation method thereof and electronic device

Abstract

The invention discloses an imaging array with a storage function, a preparation method thereof and an electronic device. The array comprises a plurality of photoelectric storage components which are arranged in an array; wherein the photoelectric storage component comprises a substrate, a source electrode, a drain electrode, a channel layer, an insulating dielectric layer, a floating gate layer, a photosensitive dielectric layer and a grid electrode, the photosensitive dielectric layer has an insulator attribute in a dark state, and the photosensitive dielectric layer has a semiconductor attribute under light irradiation matched with a band gap; a plurality of control lines, wherein one control line is connected with one row or one column of the photoelectric storage components; the voltage on the control line is a write-in voltage, an erase voltage, a read voltage, a complete turn-on voltage or a complete turn-off voltage, and is matched with the light irradiation matched with the band gap to control the photoelectric storage component, so that the sensing and storage integrated function is realized. According to the embodiment of the invention, sensing and storage integration of the array and practical application of the array are realized.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and particularly to an imaging array with a storage function, a preparation method thereof, and an electronic device. Background Art

[0002] With the development of semiconductor technology, the applications of semiconductor devices are becoming more and more extensive. For example, they are applied to the fields of solar-blind ultraviolet imaging, imaging systems, and storage, etc.

[0003] Among them, in the field of solar-blind ultraviolet imaging, the prior art provides semiconductor components capable of sensing solar-blind ultraviolet light. However, the prior art does not disclose an imaging array for actual use. The prior art only discloses a non-crossing array composed of independent components or a crossing array without suppressing crosstalk, and neither of these two arrays can be actually applied.

[0004] In the field of imaging systems, the existing imaging systems are still based on the traditional von Neumann architecture, where sensing, storage, and computing are separated from each other. Specifically, the existing sensing arrays only have the function of sensing, and have problems of high energy consumption and low efficiency, and cannot meet the requirements of artificial intelligence and big data processing. Summary of the Invention

[0005] The present invention provides an imaging array with a storage function, a preparation method thereof, and an electronic device to achieve the integration of sensing and storage of the array and the actual application of the array.

[0006] According to an aspect of the present invention, there is provided an imaging array with a storage function, including:

[0007] A plurality of optoelectronic storage components, which are arranged in an array; wherein, the optoelectronic storage component includes a substrate, a source electrode, a drain electrode, a channel layer, an insulating dielectric layer, a floating gate layer, a photosensitive dielectric layer, and a gate electrode. The photosensitive dielectric layer has an insulator property in the dark state and a semiconductor property under the irradiation of light with a bandgap match.

[0008] A plurality of control lines, one of the control lines is connected to one row or one column of the optoelectronic storage components; the voltage on the control line is a write voltage, an erase voltage, a read voltage, a fully on voltage, or a fully off voltage, and cooperates with the irradiation of light with a bandgap match to control the optoelectronic storage components to achieve the integrated function of sensing and storage.

[0009] Optionally, the plurality of control lines include a plurality of gate lines and a plurality of drain lines;

[0010] The optoelectronic storage components in a row are connected in series, and the source and drain of two adjacent optoelectronic storage components are connected; one drain line is electrically connected to the drain at the end of a row of optoelectronic storage components; one gate line is electrically connected to all the gates of a column of optoelectronic storage components; the source at the end of a row of optoelectronic storage components is grounded.

[0011] Optionally, the multiple control lines include multiple gate lines and multiple drain lines;

[0012] The optoelectronic storage component includes a first optoelectronic storage component and a second optoelectronic storage component; the first optoelectronic storage component and the second optoelectronic storage component in a row are alternately connected, one side of the first optoelectronic storage component is the drain, and the other side is the source;

[0013] The drain of the first optoelectronic storage component is electrically connected to the drain of the second optoelectronic storage component on one side of the first optoelectronic storage component, and the source of the first optoelectronic storage component is electrically connected to the source of the second optoelectronic storage component on the other side of the first optoelectronic storage component;

[0014] One drain line is electrically connected to all the drains of a row of optoelectronic storage components, all the sources of the optoelectronic storage components are grounded, and one gate line is electrically connected to all the gates of a column of optoelectronic storage components.

[0015] Optionally, the multiple control lines include multiple gate lines, multiple drain lines and multiple source lines;

[0016] One drain line is electrically connected to all the drains of a row of optoelectronic storage components; one gate line is electrically connected to all the gates of a column of optoelectronic storage components; one source line is electrically connected to all the sources of a column of optoelectronic storage components.

[0017] Optionally, the control method of the array includes photosensitive writing imaging storage and / or photosensitive erasing imaging storage.

[0018] Optionally, the photosensitive writing imaging storage includes:

[0019] By applying a first writing voltage to all the gate lines, the array enters the standby state; wherein, the array in the standby state can sense the pattern of the light irradiation with bandgap matching to write data and store it; each optoelectronic storage component is a pixel of the pattern.

[0020] Optionally, the photosensitive erasing imaging storage includes:

[0021] By applying a first write voltage to all of the gate lines and irradiating all of the photoelectric storage components with the light irradiation having a bandgap match, setting all of the photoelectric storage components to a write state; then, by applying a first erase voltage to all of the gate lines, putting the array into a standby state; wherein, the array in the standby state can sense the pattern of the light irradiation having a bandgap match to erase data and perform storage; each of the photoelectric storage components is a pixel of the pattern.

[0022] Optionally, the control method of the array includes data reading, and the data reading includes:

[0023] By applying a second read voltage to the drain line corresponding to the set pixel, applying a first read voltage to the gate line corresponding to the set pixel, and applying a first fully on voltage to other gate lines, reading the data stored in the set pixel.

[0024] Optionally, the control method of the array includes data reading, and the data reading includes:

[0025] By applying a second read voltage to the drain line corresponding to the set pixel, applying a first read voltage to the gate line corresponding to the set pixel, and applying a first fully off voltage to other gate lines, reading the data stored in the set pixel.

[0026] Optionally, the control method of the array includes data reading, and the data reading includes:

[0027] By applying a second read voltage to the drain line corresponding to the set pixel, applying a third read voltage to the source line corresponding to the set pixel, applying a first read voltage to the gate line corresponding to the set pixel, and applying a first fully off voltage to other gate lines, reading the data stored in the set pixel.

[0028] Optionally, the control method of the array includes data refreshing, and the data refreshing includes:

[0029] By applying a first erase voltage to all of the gate lines and irradiating all of the photoelectric storage components with the light irradiation having a bandgap match, refreshing the array.

[0030] According to another aspect of the present invention, there is provided a preparation method of an imaging array having a storage function as described in any embodiment of the present invention, including:

[0031] Forming a plurality of the photoelectric storage components and a plurality of the control lines on a substrate.

[0032] According to another aspect of the present invention, there is provided an electronic device, including: an imaging array having a storage function as described in any embodiment of the present invention.

[0033] An embodiment of the present invention provides an imaging array with a storage function. The array has a cross-array architecture and is provided with a plurality of optoelectronic storage components and a plurality of control lines. Among them, the plurality of optoelectronic storage components are arranged in an array, and one control line is connected to one row or one column of optoelectronic storage components; the optoelectronic storage component includes a substrate, a source electrode, a drain electrode, a channel layer, an insulating dielectric layer, a floating gate layer, a photosensitive dielectric layer, and a gate electrode. The photosensitive dielectric layer has an insulator property in the dark state and a semiconductor property under light irradiation with a bandgap match. With such a setting in the embodiment of the present invention, the function of integrating sensing and storage of the array is realized, the data processing efficiency is improved, the energy consumption is reduced, which is beneficial to meeting the requirements of artificial intelligence and big data processing and is conducive to practical applications.

[0034] It should be understood that the content described in this part is not intended to identify the key or important features of the embodiments of the present invention, nor is it used to limit the scope of the present invention. Other features of the present invention will become easily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0035] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following will briefly introduce the drawings required for the description of the embodiments. Obviously, the following drawings are only some embodiments of the present invention. For those of ordinary skill in the art, without creative efforts, other drawings can be obtained based on these drawings.

[0036] Figure 1 It is a schematic structural diagram of an imaging array with a storage function provided by an embodiment of the present invention;

[0037] Figure 2 It is a schematic structural diagram of an optoelectronic storage component provided by an embodiment of the present invention;

[0038] Figure 3 It is a comparative schematic diagram of the transfer characteristic curves of an optoelectronic storage component provided by an embodiment of the present invention after writing and erasing;

[0039] Figure 4 It is a comparative schematic diagram of the transfer characteristic curves of an optoelectronic storage component provided by an embodiment of the present invention read at different times after writing and the transfer curve before writing;

[0040] Figure 5 It is a comparative schematic diagram of the transfer characteristic curves of an optoelectronic storage component provided by an embodiment of the present invention after writing under light irradiation with different light power densities;

[0041] Figure 6 It is a waveform schematic diagram of the offset of the threshold voltage under writing with light of different wavelengths provided by an embodiment of the present invention;

[0042] Figure 7 Schematic diagram of another imaging array with storage function provided by an embodiment of the present invention;

[0043] Figure 8 Schematic diagram of the voltage application states of the gate line and drain line during data reading of an imaging array with storage function provided by an embodiment of the present invention;

[0044] Figure 9 Schematic diagram of yet another imaging array with storage function provided by an embodiment of the present invention;

[0045] Figure 10 Schematic diagram of yet another imaging array with storage function provided by an embodiment of the present invention;

[0046] Figure 11 Schematic diagram of the sensing and imaging results formed in each step of a sensing and imaging method provided by an embodiment of the present invention;

[0047] Figure 12 Schematic diagram of the sensing and imaging results formed in each step of another sensing and imaging method provided by an embodiment of the present invention;

[0048] Figure 13 Flow schematic diagram of a preparation method of an imaging array with storage function provided by an embodiment of the present invention. Detailed implementation manners

[0049] In order to enable those skilled in the art to better understand the solution of the present invention, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention.

[0050] It should be noted that the terms "first", "second", etc. in the specification and claims of the present invention and the above accompanying drawings are used to distinguish similar objects, and do not necessarily need to describe a specific order or sequence. It should be understood that such used data can be interchanged under appropriate circumstances so that the embodiments of the present invention described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "comprising" and "having" and any variations thereof are intended to cover non-exclusive inclusion. For example, a process, method, system, product or device comprising a series of steps or units does not necessarily have to be limited to those steps or units clearly listed, but may include other steps or units not clearly listed or inherent to these process, method, product or device.

[0051] An embodiment of the present invention provides an imaging array with a storage function. Figure 1 FIG. is a schematic structural diagram of an imaging array with a storage function provided by an embodiment of the present invention. Refer to Figure 1 , the imaging array with a storage function is a crossbar array architecture. The imaging array with a storage function includes:

[0052] A plurality of optoelectronic storage components 100, and the plurality of optoelectronic storage components 100 are arranged in an array; the optoelectronic storage component 100 can sense light irradiation with a bandgap match.

[0053] A plurality of control lines 200, and one control line 200 is connected to one row or one column of optoelectronic storage components 100; the voltage on the control line 200 is a write voltage, an erase voltage, a read voltage, a fully-on voltage, or a fully-off voltage, and cooperates with the light irradiation with a bandgap match to control the optoelectronic storage component 100 to achieve the integrated function of sensing and storage. Among them, the write voltage refers to the gate voltage that enables the optoelectronic storage component 100 to perform data writing, the erase voltage refers to the gate voltage that enables the optoelectronic storage component 100 to perform data erasure, the read voltage refers to the gate voltage that enables the optoelectronic storage component 100 to perform data reading, the fully-on voltage is the gate voltage that enables the optoelectronic storage component to be in a fully-on state, and the fully-off voltage is the gate voltage that enables the optoelectronic storage component to be in a fully-off state. In some embodiments, during the process of data reading, the gate voltage of the selected optoelectronic storage component 100 is different from the gate voltage of the unselected optoelectronic storage component 100, and the drain voltage of the selected optoelectronic storage component 100 is different from the drain voltage of the unselected optoelectronic storage component 100.

[0054] To illustrate the working principle of the embodiment of the present invention, the structure and function of the optoelectronic storage component 100 will be described first. Figure 2 FIG. is a schematic structural diagram of an optoelectronic storage component provided by an embodiment of the present invention. Refer to Figure 2 , the optoelectronic storage component 100 includes a substrate 110, a source electrode 120, a drain electrode 130, a channel layer 140, an insulating dielectric layer 150, a floating gate layer 160, a photosensitive dielectric layer 170, and a gate electrode 180. The photosensitive dielectric layer 170 has an insulator property in the dark state and a semiconductor property under light irradiation with a bandgap match.

[0055] Among them, the light irradiation with bandgap matching means that the energy of photons is equal to or greater than the bandgap width of the semiconductor layer, that is, the photosensitive dielectric layer 170 can generate photo-generated carriers under the light irradiation with bandgap matching. Potential barriers are formed between the floating gate layer 160 and the insulating dielectric layer 150 and between the floating gate layer 160 and the photosensitive dielectric layer 170. Then, there are certain band offsets between the floating gate layer 160 and the insulating dielectric layer 150 and between the floating gate layer 160 and the photosensitive dielectric layer 170, so that the electrons written into the floating gate layer 160 from the photosensitive dielectric layer 170 side can be stably stored in the floating gate layer 160. Exemplarily, in data storage, the gate injection method is adopted. When using the optoelectronic storage component 100 for data storage, by utilizing the insulating characteristics of the photosensitive dielectric layer 170 in the dark state and the semiconductor characteristics under a certain light irradiation, electrons can be written into the floating gate layer 160 by applying a set gate voltage and light pulses; and, by only applying a set gate voltage and light pulses, the electrons in the floating gate layer 160 can be erased. In addition, potential barriers are formed between the floating gate layer 160 and the insulating dielectric layer 150 and between the floating gate layer 160 and the photosensitive dielectric layer 170, which can enable the electrons to be stably stored in the floating gate layer 160 after being written.

[0056] It should be noted that the optoelectronic storage component is a symmetric structure, and the source electrode 120 and the drain electrode 130 can be interchanged. That is to say, in some embodiments, the left side is the source electrode 120 and the right side is the drain electrode 130; in other embodiments, the right side is the source electrode 120 and the left side is the drain electrode 130.

[0057] Except for special limitations, the positions of the substrate 110, the source electrode 120, the drain electrode 130, the channel layer 140, the insulating dielectric layer 150, the floating gate layer 160, the photosensitive dielectric layer 170, and the gate electrode 180 can be set as needed as long as normal operation can be achieved.

[0058] In the above embodiments, the material of the photosensitive dielectric layer 170 is not limited as long as it has insulating characteristics in the dark state and semiconductor characteristics under a certain light irradiation. Optionally, the material of the photosensitive dielectric layer 170 includes at least one of inorganic metal oxides, inorganic metal nitrides, inorganic non-metal nitrides, and organic polymers. Preferably, the material of the photosensitive dielectric layer 170 includes at least one of gallium oxide, boron nitride, aluminum nitride, and zinc oxide. More preferably, the material of the photosensitive dielectric layer 170 includes gallium oxide. Such a setting is beneficial to meeting the different state characteristics of the photosensitive dielectric layer 170 in the dark state and under light irradiation.

[0059] In the above embodiments, optionally, the material of the floating gate layer 160 includes at least one of Au, Si, Pt, and Pd. Preferably, the material of the floating gate layer 160 includes Au.

[0060] In the above embodiments, optionally, the material of the gate 180 includes at least one of Au, Pt, and Pd. Preferably, the material of the gate 180 includes Au.

[0061] In the above embodiments, the substrate 110 is a rigid substrate or a flexible substrate. Optionally, the substrate 110 is a rigid substrate, and its material includes at least one of silicon, sapphire, and quartz glass. Optionally, the substrate 110 is a flexible substrate, and its material includes at least one of polyethylene naphthalate, polyethylene terephthalate, polyimide, polymethyl methacrylate, polydimethylsiloxane, polyvinyl chloride, polycarbonate, polystyrene, and plexiglass. Preferably, the material of the substrate 110 includes quartz glass.

[0062] In the above embodiments, optionally, the material of the source electrode 120 includes at least one of ITO, Mo, Ti, Au, Ti / Au alloy, FTO, Cr, Cu, Ag, Pd, and graphene. Preferably, the material of the source electrode 120 includes ITO.

[0063] In the above embodiments, optionally, the material of the drain electrode 130 includes at least one of ITO, Mo, Ti, Au, Ti / Au alloy, FTO, Cr, Cu, Ag, Pd, and graphene. Preferably, the material of the source electrode 120 includes ITO. More preferably, the materials of the source electrode 130 and the drain electrode 120 are the same.

[0064] In the above embodiments, optionally, the material of the channel layer 140 is one of a silicon semiconductor, an oxide semiconductor, an organic semiconductor, and a two-dimensional semiconductor. Preferably, the material of the channel layer 140 includes at least one of Si, IGZO, GaN, AlGaN, GaAs, and AlGaAs.

[0065] In the above embodiments, optionally, the material of the insulating dielectric layer 150 includes at least one of aluminum oxide, hafnium oxide, silicon oxide, aluminum nitride, boron nitride, and an insulating polymer. Preferably, the material of the insulating dielectric layer 150 includes aluminum oxide.

[0066] On the basis of the above embodiments, optionally, the material selection of the optoelectronic storage component is as follows: the material of the substrate 110 is glass; the materials of the source electrode 120 and the drain electrode 130 are ITO; the material of the channel layer 140 is IGZO; the material of the insulating dielectric layer 150 is Al 2 O 3 ; the material of the floating gate layer 160 is Au; the material of the photosensitive dielectric layer 170 is Ga 2 O 3 ; the material of the gate 180 is Au. Characteristic verification is performed on this optoelectronic storage component.

[0067] Figure 3It is a comparative schematic diagram of the transfer characteristic curves of an optoelectronic storage component after writing and erasing provided by an embodiment of the present invention. Specifically, the optoelectronic storage component provided by the above embodiment is used for writing and erasing operations. The writing method is a gate voltage pulse of -5V combined with a 254nm optical pulse with an optical power density of 150 μW / cm -2 and a pulse width of 1s. The erasing method is a gate voltage pulse of 5V combined with a 254nm optical pulse with an optical power density of 150 μW / cm -2 and a pulse width of 1s. As Figure 3 shown, the abscissa is the gate voltage of the optoelectronic storage component, and the ordinate is its source-drain current. After writing, the threshold voltage shifted to the right by about 10V; after erasing, the threshold voltage shifted to the left by about 10V and returned to the initial position.

[0068] Figure 4 It is a comparative schematic diagram of the transfer characteristic curves read at different times after writing of an optoelectronic storage component provided by an embodiment of the present invention and the transfer curve before writing. Specifically, the optoelectronic storage component provided by the above embodiment is still used for the writing operation. The writing method is a gate voltage pulse of -5V combined with a 254nm optical pulse with an optical power density of 150 μW / cm -2 and a pulse width of 1s. As Figure 4 shown, the abscissa is the gate voltage of the optoelectronic storage component, and the ordinate is its source-drain current. After writing, the threshold voltage shifted to the right by about 10V; after 5 hours and 10 hours, the transfer curve remained at the position just after writing. It shows that the optoelectronic storage component has a large storage window after writing, and this storage window is basically maintained after 10 hours. The optoelectronic storage component provided by the embodiment of the present invention has good storage characteristics.

[0069] Figure 5 It is a comparative schematic diagram of the transfer characteristic curves of an optoelectronic storage component after irradiation writing with light of different optical power densities provided by an embodiment of the present invention. Specifically, the optoelectronic storage component provided by the above embodiment is still used for the writing operation. When writing, the gate voltage pulse is fixed at -5V, the optical pulse width is fixed at 1s, and the wavelength is 254nm. As Figure 5 shown, the abscissa is the gate voltage of the optoelectronic storage component, and the ordinate is its source-drain current. The range of the optical power density is 1.17 μW / cm -2 to 150 μW / cm -2. The greater the optical power density during writing, the more the threshold voltage of the optoelectronic storage component shifts to the right. This indicates that, on the one hand, the optoelectronic storage component can be used as a dosimeter; on the other hand, the optoelectronic storage component can be used as a multi-state storage device. Thus, compared with a flash memory device with 2-bit storage capacity, the embodiments of the present invention utilize the orthogonal characteristics of optical writing and electrical reading to achieve multi-state storage of the optoelectronic storage component, which is more conducive to alleviating the pressure of data storage in the big data era.

[0070] Figure 6 is a waveform schematic diagram of the offset amount of the threshold voltage under writing with light of different wavelengths provided by the embodiments of the present invention. Specifically, the optoelectronic storage component provided in the above embodiment is still used for the writing operation. As Figure 6 shown, the abscissa is the wavelength of light irradiation, and the ordinate is the offset amount of the threshold voltage of the optoelectronic storage component after writing. This indicates that after the optoelectronic storage component is written with light having a wavelength of 250 nm, the offset amount of its threshold voltage reaches the response peak. Moreover, after the optoelectronic storage component is written with light having a wavelength exceeding 280 nm, the offset amount of its threshold voltage approaches 0, that is, there is almost no drift of the threshold voltage for the optoelectronic storage component written with light having a wavelength exceeding 280 nm, that is, there is no light response. Therefore, the optoelectronic storage component is an excellent solar-blind detection device, and it is not necessary to additionally increase a filter when applying the optoelectronic storage component to solar-blind detection.

[0071] Based on the optoelectronic storage components provided in the above embodiments, the structure of an imaging array with a storage function formed by using the optoelectronic storage components will be described below.

[0072] Continue to refer to Figure 1 , exemplarily, the control line 200 connecting a column of optoelectronic storage components 100 is used to control the gates of the optoelectronic storage components 100, and the control line 200 connecting a row of optoelectronic storage components 100 is used to control the source electrodes 120 or drain electrodes 130 of the optoelectronic storage components 100.

[0073] This array can achieve integration of sensing and storage. Optionally, the control method of the array includes photosensitive writing imaging storage and / or photosensitive erasing imaging storage. That is, the array can achieve photosensitive writing imaging storage or photosensitive erasing imaging storage.

[0074] Exemplarily, the working principle of the array for realizing photosensitive writing imaging storage is as follows. When the array is in the standby state, that is, ready for imaging, the voltage on the control line 200 connecting each column of optoelectronic storage components 100 is set to the writing voltage corresponding to the optoelectronic storage component 100. In the standby state, when each optoelectronic storage component 100 senses light irradiation with a bandgap match, data writing can be performed, and the pattern corresponding to the light irradiation is sensed. Since the optoelectronic storage component 100 in this array also has a storage function, the pattern can be stored. Among them, one optoelectronic storage component 100 is a pixel of the pattern. When it is necessary to read the array data, a read gate voltage is applied to the control line 200 corresponding to the gate of the pixel to be read, and a read drain voltage is applied to the control line 200 corresponding to its drain. When it is necessary to refresh the array, an erase voltage pulse is applied to the control line 200 corresponding to the gate of all pixels while all pixels are irradiated with light pulses.

[0075] Exemplarily, the working principle of the array for realizing photosensitive erasing imaging storage is as follows. Before the array is ready for imaging, the voltage on the control line 200 connecting each column of optoelectronic storage components 100 is set to the writing voltage corresponding to the optoelectronic storage component 100, and all optoelectronic storage components 100 are set to the writing state, and all pixels are irradiated with light pulses at the same time, that is, all pixels write data. When the array is in the standby state, that is, ready for imaging, the voltage on the control line 200 connecting each column of optoelectronic storage components 100 is set to the erase voltage corresponding to the optoelectronic storage component 100. In the standby state, when each optoelectronic storage component 100 senses light irradiation with a bandgap match, data erasing can be performed, and the erasing pattern corresponding to the light irradiation is sensed. Since the optoelectronic storage component 100 in this array also has a storage function, the pattern can be stored. Among them, one optoelectronic storage component 100 is a pixel of the pattern. When it is necessary to read the array data, a read gate voltage is applied to the control line 200 corresponding to the gate of the pixel to be read, and a read drain voltage is applied to the control line 200 corresponding to its drain.

[0076] As can be seen, the embodiment of the present invention provides an imaging array with a storage function. The array is of a cross-array architecture, which is provided with a plurality of optoelectronic storage components 100 and a plurality of control lines 200. Among them, the plurality of optoelectronic storage components 100 are arranged in an array, and one control line 200 is connected to one row or one column of optoelectronic storage components 100; the optoelectronic storage component 100 includes a substrate 110, a source electrode 120, a drain electrode 130, a channel layer 140, an insulating dielectric layer 150, a floating gate layer 160, a photosensitive dielectric layer 170, and a gate electrode 180. The photosensitive dielectric layer 170 has an insulator property in the dark state and a semiconductor property under light irradiation with a bandgap match. With such a setting in the embodiment of the present invention, the function of integrating sensing and storage of the array is realized, the data processing efficiency is improved, the energy consumption is reduced, which is beneficial to meeting the requirements of artificial intelligence and big data processing and is conducive to practical applications.

[0077] Based on the above embodiments, there are various specific setting methods for the imaging array with a storage function. Several of them will be described below, but it is not a limitation to the present invention.

[0078] Figure 7 It is a schematic structural diagram of another imaging array with a storage function provided by the embodiment of the present invention. Refer to Figure 7 , in one embodiment, optionally, the plurality of control lines 200 include a plurality of gate lines 210 and a plurality of drain lines 220. In Figure 7 , the gate lines 210 extend along the column direction Y, and the plurality of gate lines 210 are arranged in sequence along the row direction X; the drain lines 220 extend along the row direction X, and the plurality of drain lines 220 are arranged in sequence along the column direction Y. The gate lines 210 can also be called column lines, and the drain lines 220 can also be called row lines.

[0079] Among them, one row of optoelectronic storage components 100 are connected in series, and the source electrodes 120 and drain electrodes 130 of adjacent two optoelectronic storage components 100 are connected, that is, adjacent optoelectronic storage components 100 share the source electrode 120 and the drain electrode 130. Specifically, the source electrode 120 of the optoelectronic storage component 100 located on the left is connected to the drain electrode 130 of the optoelectronic storage component 100 located on the right. One drain line 220 is electrically connected to the drain electrode 130 at the end of one row of optoelectronic storage components 100; one gate line 210 is electrically connected to all the gate electrodes 180 of one column of optoelectronic storage components 100; the source electrode 120 at the end of one row of optoelectronic storage components 100 is grounded.

[0080] Exemplarily, adopt as Figure 7The working principle of the shown array is as follows. When performing photosensitive writing for imaging storage, a first writing voltage is applied to all gate lines 210 to put the array into the standby state. Among them, the array in the standby state can sense the pattern of light irradiation with a bandgap match and write and store data. Each optoelectronic storage component 100 is a pixel of the pattern. When reading data, a second reading voltage is applied to the drain line 220 corresponding to the set pixel, a first reading voltage is applied to the gate line 210 corresponding to the set pixel, and a first fully - on voltage is applied to other gate lines 210, so that the data stored in the set pixel is read. When refreshing the array, a first erasing voltage is applied to all gate lines 210, and all optoelectronic storage components 100 are irradiated with light with a bandgap match, so that the array is refreshed.

[0081] Among them, when reading data, in the embodiment of the present invention, a second reading voltage is set to be applied to the drain line 220 corresponding to the set pixel, and a first fully - on voltage is applied to other gate lines 210, which can make the pixel to be read not be interfered by other pixels, playing a role in suppressing crosstalk. However, in the prior art, based on the existing photodetector elements, there is serious crosstalk between pixels. Each pixel in the cross - array needs to be composed of a detector element and a switching component (the switching component can be a diode or a transistor). The role of the switching component is to suppress crosstalk between pixels. The addition of the switching component increases the preparation difficulty and cost on the one hand, and reduces the pixel density on the other hand, so the imaging effect is extremely poor.

[0082] As can be seen from the above analysis, the embodiment of the present invention can, without adding a switching component for crosstalk suppression, control the array and the optoelectronic storage component 100 according to their own characteristics to achieve the effect of suppressing crosstalk. Therefore, the embodiment of the present invention is beneficial to reducing the preparation difficulty and cost of the array, thereby improving the pixel density of the array and the imaging effect.

[0083] Exemplarily, Figure 7 The writing gate voltage used by the shown array is - 5V, the erasing gate voltage is 5V, the reading gate voltage is - 4V, the reading drain voltage is 1V, the erasing light pulse is a 254nm light with a pulse width of 1s and a light intensity of 200 μW / cm², and the fully - on voltage is 15V. By applying a - 5V gate voltage to all gate lines 210 and a 0V drain voltage to all drain lines 220, the array is put into the standby state. Among them, the array in the standby state can sense a 254nm light pulse with a light power density of 150 μW / cm² and a pulse width of 1s to write and store data, and each optoelectronic storage component 100 is a pixel of the pattern. -2 The writing gate voltage used by the shown array is - 5V, the erasing gate voltage is 5V, the reading gate voltage is - 4V, the reading drain voltage is 1V, the erasing light pulse is a 254nm light with a pulse width of 1s and a light intensity of 200 μW / cm², and the fully - on voltage is 15V. By applying a - 5V gate voltage to all gate lines 210 and a 0V drain voltage to all drain lines 220, the array is put into the standby state. Among them, the array in the standby state can sense a 254nm light pulse with a light power density of 150 μW / cm² and a pulse width of 1s to write and store data, and each optoelectronic storage component 100 is a pixel of the pattern. -2 and a pulse width of 1s to write and store data, and each optoelectronic storage component 100 is a pixel of the pattern.

[0084] Figure 8Schematic diagram of the voltage application states of the gate line and drain line during data reading of an imaging array with storage function provided by an embodiment of the present invention. Refer to Figure 8 , when reading data from pixel 109, a drain voltage of 1V is applied to the drain line 220 corresponding to pixel 109, a gate voltage of -4V is applied to the gate line 210 corresponding to pixel 109, and a gate voltage of 15V is applied to other gate lines 210 to ensure that all pixels except pixel 109 in this row remain in a fully open state, so that the data stored in pixel 109 can be read.

[0085] During array refreshing, a gate voltage of 5V is applied to all gate lines 210, a drain voltage of 0V is applied to drain line 220, and all optoelectronic storage components 100 are irradiated with 254nm light pulses with an optical power density of 200 μW / cm -2 and a pulse width of 1s to refresh the array.

[0086] Figure 9 Schematic diagram of the structure of another imaging array with storage function provided by an embodiment of the present invention. Refer to Figure 9 , in another embodiment, optionally, multiple control lines 200 include multiple gate lines 210 and multiple drain lines 220. In Figure 7 , the gate lines 210 extend along the column direction Y, and multiple gate lines 210 are arranged in sequence along the row direction X; the drain lines 220 extend along the row direction X, and multiple drain lines 220 are arranged in sequence along the column direction Y. The gate lines 210 can also be called column lines, and the drain lines 220 can also be called row lines.

[0087] The optoelectronic storage components 100 include a first optoelectronic storage component 101 and a second optoelectronic storage component 102; the first optoelectronic storage component 101 and the second optoelectronic storage component 102 are alternately connected in a row. One side of the first optoelectronic storage component 101 is the drain electrode 130, and the other side is the source electrode 120; the drain electrode 130 of the first optoelectronic storage component 101 is electrically connected to the drain electrode 130 of the second optoelectronic storage component 102 located on one side of the first optoelectronic storage component 101, and the source electrode 120 of the first optoelectronic storage component 101 is electrically connected to the source electrode 120 of the second optoelectronic storage component 102 located on the other side of the first optoelectronic storage component 101. One drain line 220 is electrically connected to all drain electrodes 130 of the optoelectronic storage components 100 in a row, all source electrodes 120 of the optoelectronic storage components 100 are grounded, and one gate line 210 is electrically connected to all gate electrodes 180 of the optoelectronic storage components 100 in a column.

[0088] Exemplarily, adopt as Figure 9The working principle of the shown array is as follows. When performing photosensitive writing imaging storage, by applying a first writing voltage to all the gate lines 210, the array enters the standby state. Among them, the array in the standby state can sense the pattern of light irradiation with a bandgap match and write and store data. Each optoelectronic storage component 100 is a pixel of the pattern. When reading data, by applying a second reading voltage to the drain line 220 corresponding to the set pixel, applying a first reading voltage to the gate line 210 corresponding to the set pixel, and applying a first fully closed voltage to other gate lines 210, the data stored in the set pixel is read. When refreshing the array, by applying a first erasing voltage to all the gate lines 210 and irradiating all the optoelectronic storage components 100 with light irradiation with a bandgap match, the array is refreshed.

[0089] Among them, when reading data, in the embodiment of the present invention, by setting a second reading voltage to be applied to the drain line 220 corresponding to the set pixel and a first fully closed voltage to be applied to other gate lines 210, it can be ensured that the pixel to be read is not interfered by other pixels, playing a role in suppressing crosstalk. Therefore, the embodiment of the present invention can, on the basis of not adding switching components for crosstalk suppression, realize the function of suppressing crosstalk by controlling the array and the optoelectronic storage component 100 according to their own characteristics. Therefore, the embodiment of the present invention is beneficial to reducing the preparation difficulty and preparation cost of the array, thereby improving the pixel density of the array and the imaging effect.

[0090] Figure 10 This is a schematic structural diagram of another imaging array with a storage function provided by the embodiment of the present invention. Refer to Figure 10 , in another embodiment, optionally, the multiple control lines 200 include multiple gate lines 210, multiple drain lines 220, and multiple source lines 230. In Figure 9 , the gate lines 210 extend along the column direction Y, and the multiple gate lines 210 are arranged in sequence along the row direction X; the drain lines 220 extend along the row direction X, and the multiple drain lines 220 are arranged in sequence along the column direction Y; the source lines 230 extend along the column direction Y, and the multiple source lines 230 are arranged in sequence along the row direction X.

[0091] Among them, one drain line 220 is electrically connected to all the drain electrodes 130 of one row of optoelectronic storage components 100; one gate line 210 is electrically connected to all the gate electrodes 180 of one column of optoelectronic storage components 100; one source line 230 is electrically connected to all the source electrodes 120 of one column of optoelectronic storage components 100.

[0092] In other embodiments, it is also possible to set the source lines 230 to extend along the row direction X, and the multiple source lines 230 are arranged in sequence along the column direction Y.

[0093] Exemplarily, adopt as Figure 10The working principle of the shown array is as follows. When performing photosensitive writing imaging storage, by applying a first writing voltage to all the gate lines 210, the array enters the standby state. Among them, the array in the standby state can sense the pattern of light irradiation with a bandgap match and write and store data. Each optoelectronic storage component 100 is a pixel of the pattern. When reading data, by applying a second reading voltage to the drain line 220 corresponding to the set pixel, a third reading voltage to the source line 230 corresponding to the set pixel, and a first reading voltage to the gate line 210 corresponding to the set pixel, and a first fully off voltage to the other gate lines 210, the data stored in the set pixel is read. When refreshing the array, by applying a first erasing voltage to all the gate lines 210 and irradiating all the optoelectronic storage components 100 with light irradiation with a bandgap match, the array is refreshed.

[0094] Among them, when reading data, in the embodiment of the present invention, a first reading voltage is set to be applied to the gate line 210 corresponding to the set pixel, and a first fully off voltage is applied to the other gate lines 210, which can make the pixel to be read not interfered by other pixels, playing a role in suppressing crosstalk. Therefore, the embodiment of the present invention can, on the basis of not adding switching components for crosstalk suppression, control the array and the optoelectronic storage component 100 according to their own characteristics to achieve the effect of suppressing crosstalk. Therefore, the embodiment of the present invention is beneficial to reducing the preparation difficulty and preparation cost of the array, thereby improving the pixel density of the array and improving the imaging effect.

[0095] On the basis of the above embodiments, the embodiment of the present invention also provides Figure 7 The sense-storage integrated function of the imaging array with a storage function shown is verified. First, the verification of photosensitive writing imaging storage is carried out. Figure 11 It is a schematic diagram of the sense-storage imaging results formed in each step of a sense-storage imaging method provided by the embodiment of the present invention. Refer to Figure 11 , in S110, control the array to enter the standby state, place a metal mask with a light-transmitting shape of "E" above the array, and then irradiate it with a 254 nm hand-held ultraviolet lamp for 1 s, and the array performs imaging. Then read the data for the first time, and obtain the imaging of "E" with a very high contrast shown. Among them, each square represents a pixel corresponding to an optoelectronic storage component 100, black indicates written data, and white indicates unwritten data.

[0096] In S120, one hour after reading the data for the first time, read the data again, and the image of "E" is still clearly visible, proving the sense-storage integrated function.

[0097] In S130, erase and refresh the array. After refreshing, there is no data in the array. After reading the data again, the image of "E" no longer appears, and the current all returns to the initial state.

[0098] In S140, the imaging step of S110 is repeated, and then the data is read for the first time, obtaining the imaging of the "E" with ultra-high contrast as shown.

[0099] In S150 and S160, the data is read 1 hour and 2 hours after imaging respectively, and obvious images of the "E" are presented in both cases. Figure 11 It is proved that the array can not only image clearly, but also has the functions of integration of sensing and storage and continuous refreshed imaging.

[0100] Then, the verification of photosensitive erasure imaging storage is carried out. Figure 12 FIG. is a schematic diagram of the sensing and imaging results formed in each step of another sensing and imaging method provided by the embodiment of the present invention. Refer to Figure 12 , in S210, by applying a gate voltage of -5V to all gate lines 210 and irradiating all photo-electric storage components 100 with a 254nm light pulse having an optical power density of 150 μW / cm -2 and a pulse width of 1s, all photo-electric storage components are set to the write state, so that data is written to all pixels; then, by applying a gate voltage of 5V to all gate lines 210, the array enters the standby state. A metal mask with a light-transmitting shape of "E" is placed above the array, and then irradiated with a 254nm hand-held ultraviolet lamp for 1s, and the array performs imaging. Then the data is read for the first time, obtaining the imaging of the "E" with ultra-high contrast as shown. Different from Figure 11 , the imaging of the "E" is inverted, because when performing photosensitive erasure imaging, the light transmitted through the metal mask with a light-transmitting shape of "E" can erase and store the data in the corresponding pixels.

[0101] In S220, one hour after the first data reading, the data is read again, and the image of the "E" is still clearly visible, proving the function of integration of sensing and storage.

[0102] In S230, the array is erased and refreshed. After refreshing, all pixels of the array are rewritten with data. After reading the data again, the image of the "E" does not appear anymore, and the current all returns to the initial state.

[0103] In S240, the imaging step of S210 is repeated, and then the data is read for the first time, obtaining the imaging of the "E" with ultra-high contrast as shown.

[0104] In S250 and S260, the data is read 1 hour and 2 hours after imaging respectively, and obvious images of the "E" are presented in both cases. Figure 12It is proved that the array can not only image clearly, but also has the functions of integration of sensing and storage and continuous refreshed imaging. In addition, the diversification of the imaging method based on the array architecture of the optoelectronic storage component 100 is also proved.

[0105] In summary, the embodiment of the present invention provides an imaging array prepared based on an optoelectronic storage component with a photosensitive medium layer. The array has at least the following beneficial effects:

[0106] (1) The imaging array does not have the crosstalk problem existing in the existing imaging arrays, and there is no need to add additional switching components to suppress crosstalk. This is because the optoelectronic storage component 100 adopted in the embodiment of the present invention is a transistor structure and can be read after imaging is completed, avoiding the influence of crosstalk caused by illumination. Therefore, the embodiment of the present invention reduces the preparation difficulty and preparation cost of the cross array.

[0107] (2) The imaging array has a storage function and has good application prospects in the fields of sensing-in-memory and artificial vision chips, avoiding the high power consumption and high latency faced by the current von Neumann architecture.

[0108] The embodiment of the present invention can be applied to at least the following application scenarios:

[0109] (1) The embodiment of the present invention can be applied to the field of solar-blind ultraviolet imaging. For example, in practical application scenarios such as high-voltage corona monitoring, fire warning, and missile plume detection. Specifically, through the excellent imaging ability of the imaging array with a storage function provided by the embodiment of the present invention, the position of the corona or flame radiating solar-blind ultraviolet can be quickly judged.

[0110] (2) The embodiment of the present invention can be applied to the field of solar-blind ultraviolet communication. Based on the imaging array with a storage function provided by the embodiment of the present invention, simultaneous decoding and storage of multi-channel solar-blind ultraviolet light can be realized.

[0111] (3) The embodiment of the present invention can be applied to the field of optoelectronic storage. Based on the imaging array with a storage function provided by the embodiment of the present invention, excellent multi-state storage performance can be achieved by changing parameters such as the write voltage, light pulse width, and light power density. Moreover, by replacing the photosensitive medium layer material, the application wavelength is not limited to the field of solar-blind ultraviolet, and its response wavelength can be adjusted to bands such as shallow ultraviolet, visible, and infrared.

[0112] (4) Embodiments of the present invention can be applied to the field of integrated sensing, storage, and computing or artificial vision chips. The imaging array with storage function provided by the embodiments of the present invention can integrate sensing, storage, and computing simultaneously. The potential computing function therein stems from the fact that the resistance of the device can be continuously adjusted by continuous electrical pulses or optical pulses. The integration of sensing, storage, and computing breaks the limitation of the mutual separation of sensing, storage, and computing in the traditional von Neumann architecture, greatly improving the image processing efficiency and reducing the energy consumption. At the same time, the integration of sensing, storage, and computing is similar to the mechanism of the human brain's visual system, so this device will have great application prospects in the field of artificial vision chips.

[0113] Embodiments of the present invention also provide a preparation method of an imaging array with storage function as provided in any embodiment of the present invention. Its technical principle and the effects produced are similar and will not be elaborated here. Specifically, the preparation method includes: forming a plurality of optoelectronic storage components 100 and a plurality of control lines 200 on a substrate 110.

[0114] Figure 13 is a schematic flowchart of a preparation method of an imaging array with storage function provided by an embodiment of the present invention. Refer to Figure 13 , based on the above embodiments, optionally, the preparation method of the imaging array with storage function includes the following steps:

[0115] S310. Clean the substrate 110.

[0116] Exemplarily, the substrate 110 is a glass substrate, and the glass substrate is cleaned in acetone for 10 minutes, in alcohol for 10 minutes, and in deionized water for 10 minutes in sequence.

[0117] S320. Form the patterns of the source electrodes 120, drain electrodes 130 of all the optoelectronic storage components 100 and part of the control lines 200.

[0118] Exemplarily, define the patterns of the source electrodes 120, drain electrodes 130 and the partial control lines 200 (for example, drain lines 220, source lines 230) by photolithography. Then prepare ITO by magnetron sputtering, and then ultrasonically strip the photoresist to complete the patterning of the source electrodes 120, drain electrodes 130 and the partial control lines 200 (for example, drain lines 220, source lines 230).

[0119] S330. Form the pattern of the channel layer 140 of all the optoelectronic storage components 100.

[0120] Exemplarily, prepare IGZO by magnetron sputtering, and then complete the patterning of the channel layer 140 by photolithography-etching method.

[0121] S340. Form the pattern of the insulating dielectric layer 150 of all the optoelectronic storage components 100.

[0122] Exemplarily, an insulating material Al is deposited by an Atomic Layer Deposition (ALD) process 2 O 3 .

[0123] S350. Pattern the floating gate layer 160 of all the optoelectronic storage components 100.

[0124] Exemplarily, the floating gate Au is prepared by magnetron sputtering, and then the patterning of the floating gate layer 160 is completed by a photolithography-etching method.

[0125] S360. Pattern the photosensitive dielectric layer 170 of all the optoelectronic storage components 100.

[0126] Exemplarily, Ga is prepared by magnetron sputtering 2 O 3 to prepare the photosensitive dielectric layer 170.

[0127] S370. Pattern the gate 180 of all the optoelectronic storage components 100 and part of the control lines 200.

[0128] Exemplarily, the gate Au is prepared by magnetron sputtering, and then the patterning of the gate 180 and part of the control lines 200 (e.g., the gate line 210) is completed by a photolithography-etching method.

[0129] The preparation of the imaging array with storage function is completed through S310 - S370.

[0130] It should be noted that Figure 13 the specific preparation process shown is only an example. In practical applications, the execution steps and the specific process methods in each step can be adjusted according to needs, and the present invention is not limited thereto. For example, first pattern the gate 180 and part of the control lines 200, and finally pattern the source 120, drain 130 and part of the control lines 200.

[0131] The embodiment of the present invention also provides an electronic device, which includes: an imaging array with storage function as provided in any embodiment of the present invention. Its technical principle and the generated effects are similar and will not be elaborated here.

[0132] It should be understood that various forms of processes shown above can be used, reordering, adding or deleting steps. For example, the steps described in the present invention can be executed in parallel, sequentially or in a different order, as long as the desired results of the technical solution of the present invention can be achieved, and no limitation is imposed herein.

[0133] The above specific embodiments do not constitute a limitation on the protection scope of the present invention. Those skilled in the art should understand that various modifications, combinations, sub - combinations and substitutions can be made according to design requirements and other factors. Any modifications, equivalent substitutions and improvements made within the spirit and principle of the present invention shall be included within the protection scope of the present invention.

Claims

1. An imaging array with a storage function, characterized in that, it includes: A plurality of optoelectronic storage components, which are arranged in an array; wherein, the optoelectronic storage component includes a substrate, a source electrode, a drain electrode, a channel layer, an insulating dielectric layer, a floating gate layer, a photosensitive dielectric layer and a gate electrode. The photosensitive dielectric layer has an insulator property in the dark state and a semiconductor property under light irradiation with a bandgap match. Multiple control lines, one control line is connected to one row or one column of the optoelectronic storage components; the voltage on the control line is a write voltage, an erase voltage, a read voltage, a fully on voltage or a fully off voltage, and cooperates with the light irradiation with a bandgap match to control the optoelectronic storage components to realize the integrated function of sensing and storage.

2. The imaging array with a storage function according to claim 1, characterized in that, the multiple control lines include multiple gate lines and multiple drain lines; The optoelectronic storage components in one row are connected in series, and the source electrodes and drain electrodes of two adjacent optoelectronic storage components are connected; one drain line is electrically connected to the drain electrode at the end of one row of the optoelectronic storage components; one gate line is electrically connected to all the gate electrodes of one column of the optoelectronic storage components; the source electrode at the end of one row of the optoelectronic storage components is grounded.

3. The imaging array with a storage function according to claim 1, characterized in that, the multiple control lines include multiple gate lines and multiple drain lines; The optoelectronic storage component includes a first optoelectronic storage component and a second optoelectronic storage component; the first optoelectronic storage component and the second optoelectronic storage component in one row are alternately connected, one side of the first optoelectronic storage component is a drain electrode, and the other side is a source electrode; The drain electrode of the first optoelectronic storage component is electrically connected to the drain electrode of the second optoelectronic storage component on one side of the first optoelectronic storage component, and the source electrode of the first optoelectronic storage component is electrically connected to the source electrode of the second optoelectronic storage component on the other side of the first optoelectronic storage component; One drain line is electrically connected to all the drain electrodes of one row of the optoelectronic storage components, all the source electrodes of the optoelectronic storage components are grounded, and one gate line is electrically connected to all the gate electrodes of one column of the optoelectronic storage components.

4. The imaging array with a storage function according to claim 1, characterized in that, the multiple control lines include multiple gate lines, multiple drain lines and multiple source lines; One drain line is electrically connected to all the drain electrodes of one row of the optoelectronic storage components; one gate line is electrically connected to all the gate electrodes of one column of the optoelectronic storage components; one source line is electrically connected to all the source electrodes of one column of the optoelectronic storage components.

5. The imaging array with a storage function according to any one of claims 2-4, characterized in that, The control method of the array includes photosensitive write imaging storage and / or photosensitive erase imaging storage.

6. The imaging array with a storage function according to claim 5, characterized in that, The photosensitive write imaging storage includes: By applying a first write voltage to all of the gate lines, the array is put into a standby state; wherein, the array in the standby state can sense the pattern of the light irradiation with a bandgap match to write data and store it; each of the optoelectronic storage components is a pixel of the pattern.

7. The imaging array with a storage function according to claim 5, wherein, the photosensitive erasure imaging storage includes: By applying a first write voltage to all of the gate lines and irradiating all of the optoelectronic storage components with the light irradiation with a bandgap match, all of the optoelectronic storage components are set to the write state; then, by applying a first erase voltage to all of the gate lines, the array is put into a standby state; wherein, the array in the standby state can sense the pattern of the light irradiation with a bandgap match to erase data and store it; each of the optoelectronic storage components is a pixel of the pattern.

8. The imaging array with a storage function according to claim 2, wherein, the control method of the array includes data reading, and the data reading includes: By applying a second read voltage to the drain line corresponding to the set pixel, applying a first read voltage to the gate line corresponding to the set pixel, and applying a first fully open voltage to the other gate lines, the data stored in the set pixel is read.

9. The imaging array with a storage function according to claim 3, wherein, the control method of the array includes data reading, and the data reading includes: By applying a second read voltage to the drain line corresponding to the set pixel, applying a first read voltage to the gate line corresponding to the set pixel, and applying a first fully closed voltage to the other gate lines, the data stored in the set pixel is read.

10. The imaging array with a storage function according to claim 4, wherein, the control method of the array includes data reading, and the data reading includes: By applying a second read voltage to the drain line corresponding to the set pixel, applying a third read voltage to the source line corresponding to the set pixel, applying a first read voltage to the gate line corresponding to the set pixel, and applying a first fully closed voltage to the other gate lines, the data stored in the set pixel is read.

11. The imaging array with a storage function according to any one of claims 2-4, wherein, the control method of the array includes data refreshing, and the data refreshing includes: By applying a first erase voltage to all of the gate lines and irradiating all of the optoelectronic storage components with the light irradiation with a bandgap match, the array is refreshed.

12. A preparation method of an imaging array with a storage function according to any one of claims 1-11, wherein, it includes: Forming a plurality of the optoelectronic storage components and a plurality of the control lines on a substrate.

13. An electronic device, wherein, it includes: An imaging array with a storage function according to any one of claims 1-11.

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