Light-emitting element

Abstract

A light emitting device is disclosed in which a first light emitting unit includes a first lower semiconductor layer, a first upper semiconductor layer on the first lower semiconductor layer, and a first sidewall, the first lower semiconductor layer including a first upper surface uncovered by the first upper semiconductor layer; the second light emitting unit includes: a second lower semiconductor layer and a second upper semiconductor layer on the second lower semiconductor layer; the second lower semiconductor layer comprises a second upper surface which is not covered by the second upper semiconductor layer; the first side wall comprises a first inclined surface; a connection electrode on the first and second light emitting units, contacting the second upper surface, and electrically connecting the first and second light emitting units; a first electrode pad on the first upper surface and electrically connected to the first lower semiconductor layer; the first side wall comprises a side wall of the first lower semiconductor layer and a side wall of the first upper semiconductor layer, and the two side walls are directly connected to form a first inclined surface; in a plan view, the second upper surface surrounds the second upper semiconductor layer.

Description

Technical Field

[0001] The present invention relates to a light-emitting element, and more particularly, to a light-emitting element including a plurality of light-emitting units. Background Art

[0002] Light-emitting diodes (LEDs) in solid-state light-emitting elements have characteristics such as low power consumption, low heat generation, long lifespan, small size, fast response speed, and good optoelectronic properties, for example, having a stable emission wavelength, and thus have been widely used in household devices, lighting devices, indicator lights, and optoelectronic products, etc. With the development of optoelectronic technology, solid-state light-emitting elements have made considerable progress in terms of luminous efficiency, operating lifespan, and brightness.

[0003] Existing light-emitting diode chips include a substrate, an n-type semiconductor layer, an active region, and a p-type semiconductor layer formed on the substrate, and p and n-electrodes respectively formed on the p-type / n-type semiconductor layers. When an electric current is applied to the light-emitting diode chip through the electrodes and at a specific value of forward bias voltage, holes from the p-type semiconductor layer and electrons from the n-type semiconductor layer combine in the active region to emit light.

[0004] High-voltage light-emitting diode chips are formed by connecting in series after dividing the area of a light-emitting diode chip into a plurality of light-emitting units on a single substrate. Compared with traditional single light-emitting diode chips, under the same chip size, high-voltage light-emitting diode chips can operate at low current and high voltage, and have a larger output power. High-voltage light-emitting diode chips can determine the number and size of their light-emitting units according to different input voltage requirements, and can be optimized for each light-emitting unit, having advantages such as being able to operate at high voltage, small size, and excellent flexibility in packaging and optical design. Summary of the Invention

[0005] The present invention discloses a light-emitting element, including a first light-emitting unit and a second light-emitting unit, wherein: the first light-emitting unit includes: a first lower semiconductor layer, a first upper semiconductor layer located on the first lower semiconductor layer, and a first sidewall, and the first lower semiconductor layer includes a first upper surface not covered by the first upper semiconductor layer; the second light-emitting unit includes: a second lower semiconductor layer and a second upper semiconductor layer located on the second lower semiconductor layer; the second lower semiconductor layer includes a second upper surface not covered by the second upper semiconductor layer; wherein the first sidewall includes a first inclined surface; a connecting electrode, located on the first light-emitting unit and the second light-emitting unit, and in contact with the second upper surface, electrically connecting the first light-emitting unit and the second light-emitting unit; and a first electrode pad, located on the first upper surface and electrically connecting the first lower semiconductor layer; wherein, the first sidewall includes a sidewall of the first lower semiconductor layer and a sidewall of the first upper semiconductor layer, and the two sidewalls are directly connected to each other to form the first inclined surface; and in a top view, the second upper surface surrounds the second upper semiconductor layer. BRIEF DESCRIPTION OF THE DRAWINGS

[0006] Figure 1A Top view of the light-emitting element 1 according to an embodiment of the present invention;

[0007] Figure 1B Along Figure 1A Cross-sectional view taken along line A-A' in

[0008] Figure 1C Along Figure 1A Cross-sectional view taken along line B-B' in

[0009] Figure 2A Top view of the light-emitting element 2 according to another embodiment of the present invention;

[0010] Figure 2B Along Figure 2A Cross-sectional view taken along line A-A' in

[0011] Figure 2C Along Figure 2A Cross-sectional view taken along line B-B' in

[0012] Figure 3 Top view of the light-emitting element 3 according to another embodiment of the present invention;

[0013] Figures 4A to 4C Cross-sectional view of the first inclined surface S1 according to different embodiments of the present invention;

[0014] Figures 5A to 5C Schematic diagram of a method for forming the first inclined surface S1 according to an embodiment of the present invention;

[0015] Figure 6 Schematic diagram of the light-emitting element package 100 according to an embodiment of the present invention;

[0016] Figure 7 Schematic diagram of the light-emitting module 200 according to an embodiment of the present invention.

[0017] SYMBOL DESCRIPTION

[0018] 1, 2, 3 Light-emitting elements

[0019] 8a, 8b Circuit bonding pads

[0020] 10 Substrate

[0021] 10a Upper surface of the substrate

[0022] 10b Lower surface of the substrate

[0023] 12 Semiconductor stack

[0024] 12a Upper semiconductor layer

[0025] 12b Lower semiconductor layer

[0026] 121 First semiconductor layer

[0027] 121a Upper surface of the first semiconductor layer

[0028] 122 Second semiconductor layer

[0029] 123 Property region

[0030] 14 Gold wire

[0031] 16 Main body

[0032] 160 Chamber

[0033] 18 Transparent conductive layer

[0034] 20 First contact electrode

[0035] 201 First electrode pad

[0036] 202 First finger portion

[0037] 20A First pad electrode

[0038] 22, 22a - 22f Light emitting units

[0039] 23 Current blocking structure

[0040] 25 Encapsulation material

[0041] 30 Second contact electrode

[0042] 301 Second electrode pad

[0043] 302 Second finger portion

[0044] 30A Second pad electrode

[0045] 36 Groove

[0046] 50 Insulation structure

[0047] 501, 502 Opening

[0048] 60 Connecting electrode

[0049] 70 Metal solder ball

[0050] 80 Conductive bonding layer

[0051] 90a, 90b Lead terminal

[0052] 100 Light emitting element package

[0053] 200 Light emitting module

[0054] 1000 carrier board

[0055] d1, d2, d3, d4 spacing

[0056] E1 edge

[0057] e1, e2, e3 edges

[0058] S1, S2, S21, S22 side walls Detailed implementation manner

[0059] In order to make the description of the present invention more detailed and complete, please refer to the description of the following embodiments and cooperate with the relevant drawings. However, the following embodiments shown are used to illustrate the light-emitting elements of the present invention, and the present invention is not limited to the following embodiments. Also, the dimensions, materials, shapes, relative configurations, etc. of the constituent parts described in the embodiments of this specification are not limited without specific descriptions, and the scope of the present invention is not limited thereto, but is merely for illustration. Moreover, the sizes or positional relationships of the components shown in each drawing may be exaggerated for the purpose of clear illustration. In the following description, for the sake of appropriate omission of detailed descriptions, the same or similar components are denoted by the same names and symbols.

[0060] Figure 1A Show a top view of the light-emitting element 1 according to an embodiment of the present invention. Figure 1B Show along Figure 1A A cross-sectional view along the line A-A' in Figure 1C Show along Figure 1A A cross-sectional view along the line B-B' in Figures 1A to 1C As shown, the light-emitting element 1 includes a substrate 10 and a plurality of light-emitting units 22, such as a first light-emitting unit 22a, a second light-emitting unit 22b, and a third light-emitting unit 22c, disposed on the upper surface 10a of the substrate 10. Each light-emitting unit 22 includes a semiconductor stack 12, which is separately disposed on the substrate 10 and separated from each other by a trench 36. The following description takes the first light-emitting unit 22a, the second light-emitting unit 22b, and the third light-emitting unit 22c as examples of the plurality of light-emitting units 22, but the number of the plurality of light-emitting units 22 is not limited thereto, and the light-emitting element includes at least two light-emitting units 22. An electrode structure is formed between adjacent light-emitting units 22 and on each light-emitting unit 22, and electrically connects each light-emitting unit 22, for example, forming a series light-emitting unit array. In this embodiment, the starting light-emitting unit of the light-emitting unit array is the third light-emitting unit 22c, the ending light-emitting unit is the first light-emitting unit 22a, and the middle light-emitting unit is the second light-emitting unit 22a.

[0061] The substrate 10 can be a growth substrate, including substrates for growing aluminum gallium indium phosphide (AlGaInP) series compounds, such as gallium arsenide (GaAs) substrates or gallium phosphide (GaP) substrates, or substrates for growing indium gallium nitride (InGaN) or aluminum gallium nitride (AlGaN) series compounds, such as sapphire (Al 2 O 3 ) substrates, gallium nitride (GaN) substrates, silicon carbide (SiC) substrates, and aluminum nitride (AlN) substrates. In one embodiment, the substrate 10 can be a patterned substrate, that is, the upper surface 10a of the substrate has a patterned structure (not shown in the figure), and the patterned structure and the substrate 10 can include the same or different materials. In one embodiment, the light emitted from the semiconductor stack 12 can be refracted, reflected, or scattered by the patterned structure of the substrate 10, thereby improving the light extraction efficiency of the light-emitting element. In addition, the patterned structure slows down or suppresses the dislocation caused by lattice mismatch between the substrate 10 and the semiconductor stack 12, thereby improving the epitaxial quality of the semiconductor stack 12.

[0062] In one embodiment of the present invention, the method of forming the semiconductor stack 12 on the substrate 10 includes metalorganic chemical vapor deposition (MOCVD), molecular beam epitaxy (MBE), hydride vapor phase epitaxy (HVPE), or ion plating, such as sputtering or evaporation.

[0063] The semiconductor stack 12 includes a first semiconductor layer 121, an active region 123, and a second semiconductor layer 122 formed in sequence on the substrate 10. In one embodiment, the semiconductor stack 12 further includes a buffer structure (not shown in the figure) located between the substrate 10 and the first semiconductor layer 121. The buffer structure can reduce the lattice mismatch between the substrate 10 and the semiconductor stack 12 and suppress dislocation, thereby improving the epitaxial quality. The material of the buffer structure includes GaN, AlGaN, or AlN. In one embodiment, the buffer structure can include multiple sub-layers (not shown in the figure), and the sub-layers include the same material or different materials. In one embodiment, the first semiconductor layer 121 and the second semiconductor layer 122 are cladding layers or confinement layers. In one embodiment, the first semiconductor layer 121 and the second semiconductor layer 122 have different conduction types, electrical properties, polarities, or doping elements for providing electrons or holes. For example, the first semiconductor layer 121 includes an n-type semiconductor, and the second semiconductor layer 122 includes a p-type semiconductor. The active region 123 is formed between the first semiconductor layer 121 and the second semiconductor layer 122. Electrons and holes combine in the active region 123 under the drive of current to convert electrical energy into light energy to emit light. The wavelength of the light emitted by the light-emitting element 1 or the semiconductor stack 12 can be adjusted by changing the physical properties and chemical compositions of one or more layers in the semiconductor stack 12.

[0064] The material of the semiconductor stack 12 includes III-V semiconductor compound materials, such as Al x In y Ga (1-x-y) N (AlInGaN series) or Al x In y Ga (1-x-y) P (AlInGaP series), where 0 ≤ x, y ≤ 1; x + y ≤ 1. According to the material of the active region, when the material of the semiconductor stack 12 is the AlInGaP series or the AlInGaN series, red light with a wavelength between 610 nm and 650 nm or yellow light with a wavelength between 550 nm and 570 nm can be emitted. When the material of the semiconductor stack 12 is the AlInGaN series, blue light or deep blue light with a peak wavelength between 400 nm and 490 nm, green light with a peak wavelength between 490 nm and 550 nm, or UV light with a peak wavelength between 400 nm and 250 nm can be emitted. The active region 123 includes a single heterostructure (SH), a double heterostructure (DH), a double-side double heterostructure (DDH), and a multi-quantum well (MQW). The material of the active region 123 can be an i-type, p-type, or n-type semiconductor.

[0065] In this embodiment, the upper surface 121a of the first semiconductor layer 121 is not covered by the active region 123 and the second semiconductor layer 122. Therefore, the upper surface 121a can be regarded as an exposed area in the semiconductor stack 12. The semiconductor stack 12 above the upper surface 121a can be regarded as the upper semiconductor layer 12a, and the semiconductor stack 12 below the upper surface 121a can be regarded as the lower semiconductor layer 12b. The upper surface 121a is also the upper surface of the lower semiconductor layer 12b. The sidewalls of the semiconductor stack 12, including the sidewalls of the upper semiconductor layer 12a and the sidewalls of the lower semiconductor layer 12b, can be inclined with respect to the upper surface 10a of the substrate. In one embodiment, the inner angle between the sidewalls of the semiconductor stack 12 and a horizontal plane (such as the upper surface 10a of the substrate) is less than 90 degrees. In one embodiment, the above inner angle is between 20 degrees and 80 degrees.

[0066] The electrode structure is disposed on each light-emitting unit and includes: a first contact electrode 20 electrically connected to the first semiconductor layer 121, a second contact electrode 30 electrically connected to the second semiconductor layer 122, and a connection electrode 60 disposed between two adjacent light-emitting units 22. The contact electrode may include an electrode pad and / or a finger portion. For example, the first contact electrode 20 includes a first electrode pad 201 and / or a first finger portion 202, and the second contact electrode 30 includes a second electrode pad 301 and / or a first finger portion 302. The first semiconductor layer 121 of the first light-emitting unit 22a is provided with a first electrode pad 201, and the second semiconductor layer 122 of the third light-emitting unit 22c is provided with a second electrode pad 301 and a second finger portion 302. Two ends of the connection electrode 60 are respectively connected to the first finger portion 202 on one light-emitting unit 22 and the second finger portion 302 on another adjacent light-emitting unit 22. Thus, each light-emitting unit 22 can be electrically connected, for example, to form a series light-emitting unit array. In other embodiments, the connection electrode 60 can be connected to the first finger portions 202 on two adjacent light-emitting units 22, and / or the connection electrode 60 is connected to the second fingers 302 on two adjacent light-emitting units 22, so that the light-emitting units 22 form different light-emitting unit arrays such as parallel, series, or series-parallel. In this embodiment, the first electrode pad 201 on the first light-emitting unit 22a and the second electrode pad 301 on the third light-emitting unit 22c can be used for wire bonding in subsequent manufacturing processes, so that the light-emitting element 1 is electrically connected to an external electronic component or a power source. The electrode structure includes a metal material, such as metals like chromium (Cr), titanium (Ti), tungsten (W), gold (Au), aluminum (Al), rhodium (Rh), indium (In), tin (Sn), nickel (Ni), platinum (Pt), silver (Ag), etc., or a stack or alloy of the above materials. In one embodiment, the first contact electrode 20, the second contact electrode 30, and the connection electrode 60 can be formed in the same manufacturing process and include the same material, but this is not limited thereto.

[0067] The trench 36 is located between two adjacent light-emitting units 22. The bottom of the trench 36 exposes the upper surface 10a of the substrate, and the sidewalls of the trench 36 are defined by the inner sidewalls of two adjacent light-emitting units 22 facing each other. The light-emitting element 1 may include a current blocking structure 23 located below the electrode structure. In this embodiment, the current blocking structure 23 is located below the connection electrode 60 and covers the trench 36. More specifically, the current blocking structure 23 covers the upper surface 10a of the substrate in the trench 36 and the opposite inner sidewalls of the adjacent light-emitting units 22 close to the trench 36, and can further extend to the semiconductor stack 12 of the light-emitting unit 22. The current blocking structure 23 can also be disposed below the second finger portion 302. In one embodiment, the current blocking structure 23 disposed in the trench and extending to the semiconductor stack 12 of the light-emitting unit 22 can be connected to the current blocking structure 23 disposed below the second finger portion 302. In one embodiment, as Figure 1A andFigure 1B As shown, a current blocking structure 23 may also be disposed under the second finger portion 302 and the second electrode pad 301 on the third light emitting unit 22c. In other embodiments (not shown), a current blocking structure 23 may also be disposed under the first finger portion 202 and / or the first electrode pad 201 of each light emitting unit 22 according to electrical or optical requirements or the like.

[0068] The material of the current blocking structure 23 includes a transparent insulating material, such as silicon oxide, silicon nitride, silicon oxynitride, titanium oxide, niobium oxide, aluminum oxide, or a combination or stack of the above materials. The current blocking structure 23 may be a single layer or a stack formed by multiple layers. In one embodiment, the current blocking structure 23 includes a stack of one or more pairs of insulating layer pairs, and each insulating layer pair includes two sub-layers, and the two sub-layers are composed of two different refractive index insulating materials, such as a distributed Bragg reflector (DBR).

[0069] The light emitting element 1 may include a transparent conductive layer 18 disposed on and electrically connected to the second semiconductor layer 121 of each light emitting unit 22. The transparent conductive layer 18 is used to diffuse current and form a good electrical contact with the second semiconductor layer 122, such as an ohmic contact. The transparent conductive layer 18 covers a part of the current blocking structure 23. The current blocking structure 23 can block the current from being conducted through the electrode structure and directly flowing into the semiconductor stack 12, but diffuses horizontally through the transparent conductive layer 18 above the current blocking structure 23, thereby increasing the current distribution. The transparent conductive layer 18 is transparent to the light emitted by the active region 123, for example, having a transmittance of more than 80%. The material of the transparent conductive layer 18 may be a metal or a transparent conductive material, and the metal materials include gold (Au), nickel gold (NiAu), etc., and the transparent conductive materials include graphene, indium tin oxide (ITO), aluminum zinc oxide (AZO), gallium zinc oxide (GZO), zinc oxide (ZnO), indium zinc oxide (IZO), etc.

[0070] The configuration of the upper surface 121a of the first semiconductor layer of the light emitting unit at the starting end or the ending end of the above content is different from that of at least one of the first semiconductor layer upper surfaces 121a of the middle light emitting units. This will be described in detail later. In this embodiment, as Figures 1A to 1C shown in the second light emitting unit 22b, the upper surface 121a of the first semiconductor layer includes a contact area located under the first finger portion 202 and a surrounding area surrounding the upper semiconductor layer 12a thereof. Therefore, by Figure 1B and Figure 1CIn a cross-sectional view, the upper surface 121a of the first semiconductor layer of the second light-emitting unit 22b is located between the sidewall S22 of its lower semiconductor layer 12b and the sidewall S21 of its upper semiconductor layer 12a. The sidewall S21, the upper surface 121a of the first semiconductor layer, and the sidewall S22 constitute the sidewall S2 of the semiconductor stack 12 of the second light-emitting unit 22b. That is, the sidewall S2 of the semiconductor stack 12 of the second light-emitting unit 22b as a whole forms a stepped shape. Different from the second light-emitting unit 22b, in at least one of the first light-emitting unit 22a and the third light-emitting unit 22c, the upper surface 121a of its first semiconductor layer only includes a contact area located below the first finger portion 202 and / or the first electrode pad 201, and does not have a surrounding area surrounding its upper semiconductor layer 12a. Thus, a larger active area 122 area can be obtained in the first light-emitting unit 22a and / or the third light-emitting unit 22c, increasing the light-emitting area. Therefore, by Figure 1B , Figure 1C In a cross-sectional view, the sidewalls of the lower semiconductor layer 12b and the sidewalls of the upper semiconductor layer 12a of the first light-emitting unit 22a and the third light-emitting unit 22c are directly connected to each other to form a first inclined surface S1. The first inclined surface S1 extends from the upper surface of the upper semiconductor layer 12a downward to the bottom surface of the lower semiconductor layer 12b. Figures 4A to 4C Shows different embodiments of the first inclined surface S1. As Figure 4A shown, the first inclined surface S1 is a continuous inclined surface, and the connection between the sidewall of the lower semiconductor layer 12b and the sidewall of the upper semiconductor layer 12a is a continuous inclined surface without turning. That is, the slope of the sidewall of the lower semiconductor layer 12b is substantially equal to the slope of the sidewall of the upper semiconductor layer 12a. In other embodiments, as Figure 4B and Figure 4C shown, the first inclined surface S1 is a continuous inclined surface, and the connection between the sidewall of the lower semiconductor layer 12b and the sidewall of the upper semiconductor layer 12a is a continuous inclined surface with a turning. That is, the slope of the sidewall of the lower semiconductor layer 12b is different from the slope of the sidewall of the upper semiconductor layer 12a. In one embodiment, the difference between the slope of the sidewall of the lower semiconductor layer 12b and the slope of the sidewall of the upper semiconductor layer 12a does not exceed 10%, so that the first inclined surface S1 may present a convex arc surface or a concave arc surface. In one embodiment, the semiconductor stack 12 can be etched from the upper surface of the second semiconductor layer 122 downward to the upper surface 10a of the substrate to form a continuous first inclined surface S1. In another embodiment, multi-stage etching can be performed. As Figures 5A to 5C shown, first etch downward from the upper surface of the second semiconductor layer 122 until the upper surface 121a of the first semiconductor layer is formed, and then etch downward from the upper surface 121a of the first semiconductor layer to the upper surface 10a of the substrate to form a continuous first inclined surface S1. In the light-emitting units 22a, 22c having the first inclined surface S1, a part of the upper surface 121a of the first semiconductor layer is further reserved as a contact area for forming the first contact electrode 20.

[0071] The top-down appearance of the light-emitting element 1 and each of its light-emitting units 22 may be polygonal, for example, quadrilateral. In the present embodiment, as Figure 1A shown, the appearance of the light-emitting element 1 is quadrilateral, for example, rectangular. The substrate 10 includes four edges, and one of the edges, for example, the long side, is labeled E1. The appearance of each light-emitting unit 22 is quadrilateral, for example, rectangular, and has a first side, a second side, a third side, and a fourth side. E1 and its opposite long side are adjacent to one of the sides of each light-emitting unit 22 at the same time. The first inclined surface S1 is located on the first side, the second side, the third side, and / or the fourth side of the first light-emitting unit 22a and / or the third light-emitting unit 22c. That is, in any one of the first light-emitting unit 22a and the third light-emitting unit 22c, a structure in which the side wall of the upper semiconductor layer 12a and the side wall of the lower semiconductor layer 12b are directly connected can be provided on the first side, the second side, the third side, and / or the fourth side of the rectangle. In the first light-emitting unit 22a and / or the third light-emitting unit 22c, the edge of the upper semiconductor layer 12a includes a first portion e1 adjacent to and connected to its first upper surface 121a, and a second portion e2 connected to the first inclined surface S1 and substantially parallel to one of the edges of the substrate 10. In the second light-emitting unit 22b, the edge of the upper semiconductor layer 12a is labeled e3. The minimum distance d3 between e2 and E1 may not be equal to the minimum distance d4 between e3 and E1. In one embodiment, the minimum distance d3 between e2 and E1 is less than the minimum distance d4 between e3 and E1. The above description and illustration take E1 as an example. Although d3 and d4 are not labeled on the opposite long side of E1, those skilled in the art can understand that the same configuration can also be provided on the opposite long side of E1 according to the embodiments of the present case.

[0072] In a top-down view, in any light-emitting unit, there is a distance between the edge of the transparent conductive layer 18 and the edge of the upper semiconductor layer 12a, and this distance may be an equal distance or an unequal distance. In addition, between each light-emitting unit, the above distances may be equal or unequal. For example, in one embodiment, in Figure 1A the second light-emitting unit 22b shown, the edge of the transparent conductive layer 18 is retracted inward from the edge e3 of the upper semiconductor 12a at an equal distance. In the first light-emitting unit 22a and / or the third light-emitting unit 22c, the edge of the transparent conductive layer 18 may be retracted inward from the edge of the upper semiconductor layer 12a at an equal distance or an unequal distance. In one embodiment, in the transparent conductive layer 18 adjacent to the first inclined surface S1, the distance between the edge of the transparent conductive layer 18 and the edge of the upper semiconductor layer 12a can be widened. For example, the above distance near the first upper surface 121a of the first semiconductor is less than the above distance in other regions. That is, as Figure 1AAs shown, the distance d1 between the transparent conductive layer 18 and the first portion e1 is less than the distance d2 between the transparent conductive layer 18 and the second portion e2. In one embodiment, the distance d1 can be between 0 and 10 μm. Similarly, in the third light-emitting unit 22c, the distance d1 between the transparent conductive layer 18 and the first portion e1 is less than the distance d2 between the transparent conductive layer 18 and the second portion e2. In this way, during the formation of the first inclined surface S1, the semiconductor stack 12 can be prevented from being over-etched due to process variations, so that the edge of the transparent conductive layer 18 does not exceed or align with the edge of the upper semiconductor layer 12a, thus increasing the process tolerance. In one embodiment, in the second light-emitting unit 22b, the distance between the transparent conductive layer 18 and the edge e3 of its upper semiconductor layer 12a is less than d2 in the first light-emitting unit 22a or the third light-emitting unit 22c.

[0073] Generally, in a light-emitting unit array, electrode pads are provided on the starting-end light-emitting unit and the ending-end light-emitting unit, and a relatively large light-shielding area is formed on the starting-end light-emitting unit and the ending-end light-emitting unit. In the embodiment of the present invention, the upper surface 121a of the first semiconductor layer of the starting-end light-emitting unit or / and the ending-end light-emitting unit may not have a surrounding region surrounding its upper semiconductor layer 12a, so that the side wall of its lower semiconductor layer 12b and the side wall of the upper semiconductor layer 12a are directly connected to each other to form a first inclined surface S1. Thus, a relatively large active region 122 area can be obtained on the starting-end light-emitting unit and / or the ending-end light-emitting unit, increasing the light-emitting area and making the brightness and current density of each light-emitting unit in the light-emitting element 1 more uniform. In addition, in order to provide the first electrode pad 201 on the ending-end light-emitting unit, generally a relatively large area of the first upper surface 121a is required, so that the light-emitting area (the light-emitting area can be regarded as the area of the upper semiconductor layer) may be sacrificed. When the size of the light-emitting element is smaller, the influence of the loss of the light-emitting area on the brightness will be more significant. In the prior art, the loss of the light-emitting area can be compensated by enlarging the overall area of the ending-end light-emitting unit (the overall area can be regarded as the area of the lower semiconductor layer) to increase the overall light-emitting area. However, in a light-emitting element with a fixed size, if the overall area of one light-emitting unit is enlarged, the overall area of another light-emitting unit must be reduced, resulting in, for example, different current densities of each light-emitting unit, affecting the optoelectronic characteristics and even the lifespan of the element. In this embodiment, without adjusting the overall areas of other light-emitting units at the same time, the light-emitting areas of the ending-end light-emitting unit and other light-emitting units can be made more consistent. In one embodiment, the area difference between the upper semiconductor layer 12a of the first light-emitting unit 22a (and / or the third light-emitting unit 22c) and the upper semiconductor layer 12a of the second light-emitting unit 22b is less than or equal to 15%.

[0074] Figure 2A Shows a top view of a light-emitting element 2 according to another embodiment of the present invention. Figure 2B Shows alongFigure 2A Cross-sectional view along line A-A' in Figure 2C Show along Figure 2A Cross-sectional view along line B-B' in. The light-emitting element 2 is similar to the light-emitting element 1 and includes an array of light-emitting units formed by electrically connecting a plurality of light-emitting units 22 in series through an electrode structure. In this embodiment, the starting light-emitting unit of the light-emitting unit array is the third light-emitting unit 22c, and the terminal light-emitting unit is the first light-emitting unit 22a. For the specific structures of the components of the light-emitting element 2, such as materials, thicknesses, angles, spacings, etc., if not specifically described in this embodiment and having the same names and reference numerals as those of the light-emitting element 1, reference may be made to the description of the light-emitting element 1, and thus will not be elaborated. The differences between the light-emitting element 2 and the light-emitting element 1 are described in detail as follows.

[0075] The light-emitting element 2 includes an insulating structure 50 covering the light-emitting unit 22 and the trench 36. The insulating structure 50 has openings 501 and 502 respectively exposing the first electrode pad 201 on the first light-emitting unit 22a and the second electrode pad 301 on the third light-emitting unit 22c. The first pad electrode 20A is located on the insulating structure 50 and fills the opening 501 to be connected to the first contact electrode 20. The second pad electrode 30A is located on the insulating structure 50 and fills the opening 502 to be connected to the second contact electrode 30. In this embodiment, the electrode pads 201 and 301 are not used for wire bonding, but are respectively used as contact portions connected to the pad electrodes 20A and 30A. The insulating structure 50 includes an insulating material, including but not limited to silicon oxide, silicon nitride, silicon oxynitride, titanium oxide, niobium oxide, aluminum oxide, etc. The insulating structure 50 can be a multi-layer structure or a single-layer structure. When the insulating structure 50 is a multi-layer structure (not shown in the figure), the insulating structure 50 may include multiple pairs of insulating layers with different refractive indexes stacked alternately to provide a reflection function for light in a specific wavelength range and / or a specific incident angle range. That is, the insulating structure 50 can be used as a reflection structure, for example, including a distributed Bragg reflector, to extract the light emitted from the semiconductor stack by the substrate 10. The pad electrodes 20A and 30A can be used as current paths for supplying external power to the first semiconductor layer 121 and the second semiconductor layer 122. The light-emitting element 2 can be in a flip-chip manner, and the first pad 20A and the second pad electrode 30A are respectively bonded to a carrier (not shown in the figure) via a conductive bonding layer (not shown in the figure). The pad electrodes 20A and 30A include a metal material, such as metals such as chromium (Cr), titanium (Ti), tungsten (W), gold (Au), aluminum (Al), indium (In), tin (Sn), nickel (Ni), platinum (Pt), silver (Ag), or a stack or alloy of the above materials. In one embodiment, the bonding method includes but is not limited to soldering, and the conductive bonding layer includes a metal solder or a conductive adhesive.

[0076] In this embodiment, similar to the light-emitting element 1, such asFigures 2A to 2C In the second light-emitting unit 22b shown, the upper surface 121a of the first semiconductor layer includes a contact area located below the first finger portion 202 and a surrounding area surrounding the upper semiconductor layer 12a thereof. Accordingly, the sidewall S2 of the semiconductor stack 12 of the second light-emitting unit 22b is integrally formed in a stepped shape. In contrast, in at least one of the first light-emitting unit 22a and the third light-emitting unit 22c, the upper surface 121a of the first semiconductor layer only includes a contact area located below the first finger portion 202 and the first electrode pad 201, and does not have a surrounding area surrounding the upper semiconductor layer 12a thereof. Therefore, Figure 2B Figure 2C Viewed from the cross section of, the sidewalls of the lower semiconductor layer 12b and the upper semiconductor layer 12a of the first light-emitting unit 22a and the third light-emitting unit 22c are directly connected to each other to form a first inclined surface S1. The first inclined surface S1 extends from the upper surface of the upper semiconductor layer 12a to the bottom surface of the lower semiconductor layer 12b. Thus, a relatively large light-emitting area (the area of the upper semiconductor layer 12a) can be obtained in the starting-end light-emitting unit and / or the terminal light-emitting unit. In this embodiment, the pad electrodes 20A and / or 30A are disposed on the starting-end light-emitting unit and the terminal light-emitting unit having a relatively large area of the upper semiconductor layer 12a. Therefore, the pad electrodes can also have a relatively large area, improving the yield of the subsequent flip-chip bonding of the light-emitting elements.

[0077] In the foregoing embodiment, three light-emitting units 22 arranged in a single row (or a single column) are taken as an example. However, the present invention is not limited thereto, and light-emitting units 22 having different numbers and different arrangements can be designed according to the operating voltage and size of the light-emitting elements. Figure 3 A top view showing a light-emitting element 3 according to another embodiment of the present invention. As Figure 3 shown, the light-emitting element 3 includes a plurality of light-emitting units 22a to 22f connected in series in sequence. For simplicity, Figure 3Not all the components in the light-emitting element 3 that are the same as those in the foregoing embodiments are shown, such as the transparent conductive layer 18, the current blocking structure 23, etc. In the light-emitting units 22a, 22c, 22e, the upper surface 121a of the first semiconductor layer only includes the contact areas located below the first finger portion 202 and the first electrode pad 201, and does not have a surrounding area surrounding its upper semiconductor layer 12a. Therefore, similar to the foregoing embodiments, the side walls of the lower semiconductor layer and the upper semiconductor layer of the light-emitting units 22a, 22c, 22e are directly connected to each other to form a first inclined surface S1. In the light-emitting units 22b, 22d, 22f, the upper surface 121a of the first semiconductor layer includes the contact area located below the first finger portion 202 and the surrounding area surrounding its upper semiconductor layer. Therefore, the side walls of the semiconductor stack of the light-emitting units 22b, 22d, 22f as a whole form a stepped shape. Although a cross-sectional view of the light-emitting element 3 is not shown in the present specification, those skilled in the art can know the cross-sectional structure of the semiconductor stack 12 of the light-emitting element 3 from the foregoing disclosures. Similarly, the light-emitting element 3 may also include the insulating structure 50 and the pad electrodes 20A and 30A as in the foregoing light-emitting element 2.

[0078] Figure 6 Showing a light-emitting element package 100 according to an embodiment of the present invention. As Figure 6 shown, the light-emitting element package 100 includes a main body 16 having a chamber 160, a first lead terminal 90a and a second lead terminal 90b, a wire 14, a metal solder ball 70, a packaging material 25, and a light-emitting element according to any embodiment of the present invention, such as the light-emitting element 1. The chamber 160 may include an opening structure recessed from the top surface of the main body 16. In one embodiment, the side walls of the main body 16 forming the chamber 160 may include a reflective structure. The first lead terminal 90a and the second lead terminal 90b are spaced apart from each other. The light-emitting element 1 is disposed in the chamber 160 and on at least one of the first and second lead terminals 90a and 90b. For example, the light-emitting element 1 is disposed on the first lead terminal 90a, and the first electrode pad 201 and the second electrode pad 301 of the light-emitting element 1 are electrically connected to the first and second lead terminals 90a and 90b respectively by using the wire 14 and the metal solder ball 70. The packaging material 25 is disposed in the chamber 160 of the main body 16 and covers the light-emitting element. The packaging material 25 includes, for example, silicone resin or epoxy resin, and its structure may be single-layer or multi-layer. In one embodiment, the packaging material 25 may further include a wavelength conversion material for changing the wavelength of the light generated by the light-emitting element, such as a phosphor, and / or a scattering material, etc.

[0079] Figure 7FIG. 200 shows a light-emitting module according to an embodiment of the present invention. The light-emitting module 200 includes a carrier substrate 1000, and circuit bonding pads 8a and 8b are provided on the carrier substrate 1000. A light-emitting element according to any embodiment of the present invention, such as the light-emitting element 2, is flip-chip bonded such that the first pad electrode 20A and the second pad electrode 30A are respectively bonded to the circuit bonding pads 8a and 8b via a conductive bonding layer 80. In one embodiment, the bonding method includes, but is not limited to, soldering or adhesive bonding, and the conductive bonding layer 80 includes a metal solder or a conductive adhesive. In this way, the light emitted by the semiconductor stack 12 is mainly extracted outwards through the lower surface 10b and the side surface of the substrate 10. In one embodiment, the light-emitting module 200 may further include a transparent adhesive material (not shown in the figure) on the carrier substrate 1000 to cover the light-emitting element 2. The transparent adhesive material includes silicone, epoxy resin, acrylic, or a mixture thereof. In one embodiment, the light-emitting element 2 further includes a reflective structure (not shown in the figure) provided on the lower surface 10b of the substrate 10 for reflecting the light emitted by the semiconductor stack 12 so that the light is mainly extracted outwards through the side surface of the substrate 10. The specific details of the reflective structure may be the same as the insulating structure 50 in the foregoing embodiments.

[0080] However, the above embodiments are only illustrative of the principles and effects of the present invention and are not intended to limit the present invention. Any person of ordinary skill in the art to which the present invention pertains may make modifications and variations to the above embodiments without departing from the technical principles and spirit of the present invention. All equivalent changes and modifications made in accordance with the shape, structure, features, and spirit of the claims of the present invention shall be included within the scope of the claims of the present invention.

Claims

1. A light-emitting element, comprising: A first light emitting unit and a second light emitting unit, wherein: The first light emitting unit comprises: a first lower semiconductor layer, a first upper semiconductor layer located on the first lower semiconductor layer, and a first sidewall, wherein the first lower semiconductor layer comprises a first upper surface which is not covered by the first upper semiconductor layer; The second light emitting unit comprises: a second lower semiconductor layer and a second upper semiconductor layer located on the second lower semiconductor layer; the second lower semiconductor layer comprises a second upper surface which is not covered by the second upper semiconductor layer; The first side wall includes a first inclined surface; A connecting electrode, located on the first light emitting unit and the second light emitting unit, and contacting the second upper surface, electrically connecting the first light emitting unit and the second light emitting unit; as well as A first electrode pad, located on the first upper surface and electrically connected to the first lower semiconductor layer; The first side wall includes a side wall of the first lower semiconductor layer and a side wall of the first upper semiconductor layer, and the two side walls are directly connected to each other to form the first inclined surface; as well as In a top view, the second upper surface surrounds the second upper semiconductor layer. 2 . The light emitting element as claimed in claim 1 , further comprising a substrate, wherein the first light emitting unit and the second light emitting unit are separately disposed on the substrate, and the first side wall is adjacent to an edge of the substrate.

3. The light-emitting element as described in claim 2, wherein the first upper semiconductor layer includes a first edge, the second upper semiconductor layer includes a second edge, the first edge is parallel to the second edge and is adjacent to the edge of the substrate, and from the top view, the distance between the first edge and the edge of the substrate is smaller than the distance between the second edge and the edge of the substrate.

4. The light emitting element as claimed in claim 1, further comprising a transparent conductive layer located on the first upper semiconductor layer; Wherein, from the top view, the first upper semiconductor layer comprises a third edge adjacent to the first upper surface and a fourth edge connected to the first sidewall; The distance between the transparent conductive layer and the third edge is smaller than the distance between the transparent conductive layer and the fourth edge.

5. The light-emitting element according to claim 1, further comprising a third light-emitting unit electrically connected to the second light-emitting unit, the third light-emitting unit comprising: A third lower semiconductor layer and a third upper semiconductor layer are located on the third lower semiconductor layer and a third sidewall, and the third lower semiconductor layer includes a third upper surface that is not covered by the third upper semiconductor layer; in, The third side wall comprises a second inclined surface; The third sidewall includes a sidewall of the third lower semiconductor layer and a sidewall of the third upper semiconductor layer, and the two sidewalls are directly connected to each other to form the second inclined surface; as well as The second light emitting unit is located between the first light emitting unit and the third light emitting unit. 6 . The light emitting element as claimed in claim 5 , further comprising a second electrode pad located on the third light emitting unit and electrically connected to the third upper semiconductor layer.

7. The light emitting element as claimed in claim 5, further comprising a transparent conductive layer located on the third upper semiconductor layer; wherein the third upper semiconductor layer comprises a first edge adjacent to the third upper surface and a second edge connected to the third sidewall; The distance between the transparent conductive layer and the first edge is smaller than the distance between the transparent conductive layer and the second edge. 8 . The light emitting element as claimed in claim 1 , wherein an area difference between the first upper semiconductor layer and the second upper semiconductor layer is less than or equal to 15%.

9. The light emitting element according to claim 1, further comprising: an insulating structure, covering the first light emitting unit and the second light emitting unit, and comprising an opening located on the first electrode pad; and The first pad electrode is located on the insulating structure, fills the opening and is connected to the first electrode pad.

10. The light emitting element as claimed in claim 1, wherein the first light emitting unit is a quadrilateral in the top view, comprising a first side, a second side, a third side and a fourth side, and the first sidewall is located on the first side, the second side, the third side and the fourth side.

Images