Micro light emitting diode chip and micro light emitting diode display device
By introducing heterojunctions into Micro LED chips, the problem of poor display of existing Micro LEDs is solved, higher luminous intensity and efficiency are achieved, and internal resistance and voltage drop are reduced.
Patent Information
- Application Number
- CN202510127308.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-02-03
- Publication Date
- 2025-05-30
AI Technical Summary
The display effect of existing Micro LEDs needs to be further improved, especially in terms of luminous intensity and efficiency.
By introducing a heterojunction into the micro-light emitting diode chip, the heterojunction is located between adjacent light emitting layers, the electrical connection of adjacent light emitting layers is realized, ensuring that each light emitting layer is uniformly emits light and reducing internal resistance.
Independent uniform luminescence of each luminescent layer in constant current mode is achieved, reducing additional pressure drop and improving the luminescence intensity and efficiency of Micro LEDs.
Smart Images

Figure CN120076509A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of semiconductors, and particularly to a micro light emitting diode chip and a micro light emitting diode display device. Background Art
[0002] In recent years, with the continuous development of Micro LED (Micro Light Emitting Diode Display) technology, more and more electronic devices have started to use Micro LED technology, bringing great convenience to people's lives.
[0003] In Micro LED technology, quantum well LED epitaxial wafers have advantages such as high luminous efficiency, adjustable luminous wavelength, and low operating voltage. Therefore, the quantum well structure is widely used in Micro LED display devices.
[0004] However, the display effect of existing Micro LEDs needs to be further improved. Summary of the Invention
[0005] The problem solved by the present invention is how to improve the luminous intensity and efficiency of micro LEDs to improve the display effect of Micro LED chips.
[0006] To solve the above problems, the present invention provides a micro light emitting diode chip, which is characterized by including:
[0007] A first type semiconductor layer;
[0008] N stacked light emitting layers, located on the first type semiconductor layer; N is a positive integer greater than or equal to 2;
[0009] A second type semiconductor layer, located on the light emitting layer; wherein,
[0010] A heterojunction, located between two adjacent light emitting layers.
[0011] In some embodiments, the thickness of the heterojunction is greater than the thickness of the quantum well layer; the thickness of the quantum barrier layer is greater than the thickness of the quantum well layer; the thickness of the heterojunction is less than the thickness of a single light emitting layer.
[0012] In some embodiments, each light emitting layer includes multiple stacked quantum barrier layers and quantum well layers; the quantum well layers and the quantum barrier layers are alternately stacked.
[0013] In some embodiments, an insertion layer is further provided in the quantum well layer and the quantum barrier layer.
[0014] In some embodiments, under bright-field TEM scanning, the quantum well layers and the quantum barrier layers are arranged alternately with bright and dark regions, the brightness of the heterojunction is higher than that of the quantum well layers, and the brightness of the quantum barrier layers is higher than that of the quantum well layers.
[0015] In some embodiments, the material of the heterojunction is the same as that of the adjacent light-emitting layer; or, the bandgap width of the heterojunction is reduced by 10% compared to that of the adjacent light-emitting layer.
[0016] In some embodiments, the materials at the contact positions of the heterojunction with the two adjacent light-emitting layers are the same or close; when they are close, the error of a single element does not exceed ±0.02.
[0017] In some embodiments, the band offset between the materials at the contact positions of the heterojunction with the two adjacent light-emitting layers is gentle.
[0018] In some embodiments, the band offset between the materials at the contact positions of the heterojunction with the two adjacent light-emitting layers is less than or equal to 300 meV.
[0019] In some embodiments, the doping elements in the heterojunction include one or more of Si, Te, Mg, and Zn.
[0020] In some embodiments, the heterojunction includes a first-doped type material layer and a second-doped type material layer; the doping types of the first-doped type material layer and the second-doped type material layer are different; the first-doped type material layer is of N-type, and the second-doped type material layer is of P-type; or, the first-doped type material layer is of P-type, and the second-doped type material layer is of N-type.
[0021] In some embodiments, the doping concentration of the first-doped type material layer is higher than that of the first-type semiconductor layer or higher than that of the second-type semiconductor layer; or, the doping concentration of the second-doped type material layer is higher than that of the first-type semiconductor layer or higher than that of the second-type semiconductor layer; or, the doping concentration of the first-doped type material layer is higher than that of the quantum well layer; or, the doping concentration of the second-doped type material layer is higher than that of the quantum well layer.
[0022] In some embodiments, the doping concentration of the first-doped type material layer or the second-doped type material layer is 1E18 atom / cm 3 ; the thickness of the first-doped type material layer is 1 - 15 nm, and the thickness of the second-doped type material layer is 1 - 15 nm.
[0023] In some embodiments, the thickness of the heterojunction is between 1 nm and 16 nm; the width of the light-emitting mesa is between 1 μm and 10 μm.
[0024] In some embodiments, the quantum barrier layers and the quantum well layers exist in pairs; alternatively, the number of quantum barrier layers is at least one more than that of the quantum well layers.
[0025] In some embodiments, the bottommost layer and the topmost layer of the light-emitting layer are quantum barrier layers.
[0026] In some embodiments, the light-emitting layer emits one or a mixture of red light, blue light, and green light.
[0027] In some embodiments, the material of the quantum barrier layer is (AlGa) (1-x) In x P, where x is close to or equal to 0.5, the material of the quantum well layer is (AlGa) (1-y) In y P, where y is between 0.55 and 0.8, the material of the heterojunction is the same as or close to that of the quantum barrier layer; alternatively, the material of the quantum barrier layer is GaN, the material of the quantum well layer is In x Ga (1-x) N, where x is between 0.2 and 0.35, the material of the heterojunction is the same as or close to that of the quantum barrier layer; the term "close" means that the error of a single element does not exceed plus or minus 0.02.
[0028] In some embodiments, it further includes:
[0029] A top conductive layer electrically connected to the second-type semiconductor layer;
[0030] A bottom conductive layer electrically connected to the first-type semiconductor layer;
[0031] A driving chip electrically connected to the bottom conductive layer.
[0032] To achieve the above object, the present invention further provides a micro-light-emitting diode display device, including the above micro-light-emitting diode chip.
[0033] Compared with the prior art, the technical solution of the present invention has the following advantages:
[0034] In the technical solution of the present invention, a heterojunction is located between adjacent light-emitting layers, so that the valence band electrons of the light-emitting layer on one side of the heterojunction are transmitted through the heterojunction to become the conduction band electrons of the light-emitting layer on the other side of the heterojunction, thereby realizing independent and uniform light emission of each light-emitting layer under the constant current mode; the electrical connection of adjacent light-emitting layers is realized through the heterojunction, and no new ohmic contact is generated, and the material of the heterojunction is adapted to the material of the light-emitting layer to reduce the internal resistance; it can be seen that by connecting the light-emitting layers in series through the heterojunction, while doubling the light emission, since no additional resistor needs to be introduced, the additional voltage drop can be reduced, and the light emission intensity and efficiency of the Micro LED can be effectively improved. BRIEF DESCRIPTION OF THE DRAWINGS
[0035] The following will clearly and completely describe the technical solutions in the embodiments of the present application with reference to the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative efforts belong to the scope of protection of the present application.
[0036] Figure 1 is a schematic cross-sectional structure diagram of a micro light-emitting diode chip;
[0037] Figure 2 is a schematic cross-sectional structure diagram of a micro light-emitting diode chip provided by an embodiment of the present invention;
[0038] Figure 3 is a schematic cross-sectional structure diagram of a light-emitting layer and a heterojunction layer in an embodiment of the present invention;
[0039] Figure 4 is a schematic cross-sectional structure diagram of a micro light-emitting diode chip according to another embodiment of the present invention. DETAILED DESCRIPTION OF THE EMBODIMENTS
[0040] The following will clearly and completely describe the technical solutions in the embodiments of the present application with reference to the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative efforts belong to the scope of protection of the present application.
[0041] The disclosure of the present application provides many different embodiments or examples for implementing different structures of the present application. To simplify the disclosure of the present application, the components and settings of specific examples are described in the present application. Of course, they are only examples and are not intended to limit the present application. In addition, the present application may repeat reference numerals and / or reference letters in different examples. Such repetition is for the purpose of simplification and clarity, and does not itself indicate the relationship between the various embodiments and / or settings discussed. In addition, the present application provides examples of various specific processes and materials, but those of ordinary skill in the art can be aware of the application of other processes and / or the use of other materials.
[0042] Generally, terms can be understood at least in part based on their usage in the present application. For example, the term "one or more" as used in the present application can be understood at least in part based on the present application, and can be used to describe any component, structure, or feature in the singular form, or can be used to describe a combination of components, structures, or features in the plural form. Similarly, terms such as "a", "an", or "the" can also be understood to convey singular usage or convey plural usage at least in part based on the present application. Additionally, the term "based on..." can be understood to not necessarily be intended to convey a set of exclusive factors, but rather can alternatively allow for the existence of additional factors that do not necessarily have to be explicitly described, at least in part based on the present application.
[0043] It should be readily understood that the meanings of "on", "above", and "over" in the present application should be interpreted in the broadest sense, such that "on" not only means "directly on something", but also means "on something" including the presence of intermediate components or layers therebetween, and "above" or "over" something not only means the meaning of "above" or "over" something, but also includes the meaning of "above" or "over" something without the presence of intermediate components or layers therebetween.
[0044] In addition, for ease of description, spatial relative terms such as "below", "beneath", "lower", "above", "upper", etc. may be used in the present application to describe the relationship of one element or component to another element or component shown in the drawings. In addition to the orientations described in the figures, the spatial relative terms are also intended to cover different orientations of the device during use or operation. The device can be oriented in other ways, rotated 90° or in other orientations, and the spatial relative descriptive terms used in the present application can be interpreted accordingly in the same way.
[0045] The term "layer" as used in the present application refers to a portion of a material that includes a region having a certain thickness. The layer can extend over the entire underlying or overlying structure, or can have an extent that is less than the extent of the underlying or overlying structure. Additionally, the layer can be a region of a homogeneous or heterogeneous continuous structure, the thickness of which is less than the thickness of the continuous structure. For example, the layer can be located between the top and bottom surfaces of the continuous structure or between any pair of horizontal planes therebetween. The layer can extend horizontally, vertically, and / or along a tapered surface. The substrate can be a layer, can include one or more layers therein, and / or can have one or more layers thereon, above, and / or below. A layer can include multiple layers. For example, a semiconductor layer can include one or more doped or undoped semiconductor layers and can have the same or different materials.
[0046] Reference Figure 1, showing a schematic cross-sectional structure of a partial micro light-emitting diode chip. The micro light-emitting diode chip of this embodiment includes:
[0047] A first-type semiconductor layer 110; a light-emitting layer 120 is disposed on the first-type semiconductor layer 110; a second-type semiconductor layer 130 is disposed on a side of the light-emitting layer 120 away from the first-type semiconductor layer 110, forming a stacked first-type semiconductor layer 110, light-emitting layer 120, and second-type semiconductor layer 130 from bottom to top. Among them, the light-emitting layer 120 is disposed between the first-type semiconductor layer 110 and the second-type semiconductor layer 130, forming a typical sandwich structure. The light-emitting layer 120 may be composed of several pairs of alternately stacked quantum well layers and quantum barrier layers. Further, an insertion layer is further provided between the quantum well layer and the quantum barrier layer.
[0048] In order to improve the light-emitting intensity and efficiency, usually in the vertical direction, multiple stacked sandwich structures are connected in series to realize simultaneous light emission of multiple light-emitting layers. However, when connecting two light-emitting layers in series, the first-type semiconductor layer 110 and the second-type semiconductor layer 130 are introduced to form a new ohmic contact, and the internal resistance of the series-connected sandwich structure is relatively large, affecting the light-emitting intensity and efficiency of the micro light-emitting diode chip. To solve the above technical problems, a micro light-emitting diode chip of this embodiment at least includes: a first-type semiconductor layer; a light-emitting layer located on the first-type semiconductor layer; a second-type semiconductor layer located on the light-emitting layer; among them, N stacked light-emitting layers; N is a positive integer greater than or equal to 2; and, a heterojunction is further included between two adjacent light-emitting layers. It should be noted here that in the present invention, a heterojunction is defined as two material layers with different doping elements, but the materials of these two material layers may be the same or different.
[0049] Please refer to Figure 2 and 4 , the micro light-emitting diode chip of this embodiment includes:
[0050] A first-type semiconductor layer 210; a light-emitting layer 220, located on the first-type semiconductor layer 210; a second-type semiconductor layer 230, located on the light-emitting layer 220; a heterojunction 240, located between adjacent light-emitting layers 220.
[0051] Specifically, in this embodiment, the first-type semiconductor layer 210 and the second-type semiconductor layer 230 have different conduction types to provide different carriers respectively. For example, the first-type semiconductor layer 210 is an N-type doped semiconductor layer, and the second-type semiconductor layer 230 is a P-type doped semiconductor layer; in some other embodiments, the first-type semiconductor layer 210 can also be a P-type doped semiconductor layer, and the second-type semiconductor layer 230 can also be an N-type doped semiconductor layer. For example, the material of the first-type semiconductor layer 210 can be one or more of GaAs, GaP, AlInP, GaN, InGaN or AlGaN. The material of the second-type semiconductor layer 230 can be one or more of GaAs, AlInP, GaInP, AlGaAs, AlGaInP, GaN, InGaN or AlGaN. For example, the materials of the first-type semiconductor layer 210 and the second-type semiconductor layer 230 can be related to the wavelength of the emitted light. When the light-emitting layer 220 emits red light, at least one of the first-type semiconductor layer 210 and the second-type semiconductor layer 230 can be an AlGaInP layer; when the light-emitting layer 20 emits blue light or green light, the materials of the first-type semiconductor layer 10 and the second-type semiconductor layer 30 are at least one of GaN, InGaN and AlGaN. In this embodiment, the thickness of the first-type semiconductor layer 10 is the same as or different from the thickness of the second-type semiconductor layer 30. For example, the thickness of the first-type semiconductor layer 10 can be greater than, less than or equal to the thickness of the second-type semiconductor layer 30. Preferably, the thickness of at least one of the first-type semiconductor layer 10 and the second-type semiconductor layer 30 ranges from 100 nm to 1000 nm. In this embodiment, at least one of the first-type semiconductor layer 10 and the second-type semiconductor layer 30 is a III-V compound semiconductor. The appropriate thickness of the semiconductor layer can, on the one hand, form a good contact with the light-emitting layer 20, which is beneficial to ensuring the formation of a good ohmic contact, and on the other hand, can also effectively ensure the formation of a good epitaxial layer, which is beneficial to the subsequent process.
[0052] In this embodiment, the light-emitting layer 220 can emit light of any color, for example, one or more mixtures of red light, blue light and green light. The thickness of the light-emitting layer 20 is the same as or different from the thickness of the first-type semiconductor layer 10 and the thickness of the second-type semiconductor layer 30 respectively. For example, the thickness of the light-emitting layer 20 can be greater than, less than or equal to the thickness of the first-type semiconductor layer 10; the thickness of the light-emitting layer 20 can be greater than, less than or equal to the thickness of the second-type semiconductor layer 30. In some embodiments, the thickness of the light-emitting layer 20 is 10 nm - 1 μm.
[0053] Furthermore, the light-emitting layer 220 in this embodiment includes: N light-emitting layers 21. Here, N is a positive integer greater than or equal to 2. When N is 2, as Figure 2The structure shown Figure 2 shows a two - layer light - emitting layer 220 and a heterojunction 240 located between the two - layer light - emitting layer 220 in one embodiment. When N>2, as Figure 4 the structure shown Figure 4 shows a multi - layer light - emitting layer 220 in another embodiment, with a heterojunction 240 between each adjacent pair of light - emitting layers 220. The three dots represent the omission of multiple repeated stacked structures of the shown light - emitting layers 220 and heterojunctions 240.
[0054] Please refer to Figure 3 , which is a schematic cross - sectional structure diagram of a two - layer light - emitting layer 220 and a heterojunction 240 located between the two - layer light - emitting layer 220. Each light - emitting layer 220 includes multiple stacked quantum barrier layers 221 and quantum well layers 222. In this embodiment, the quantum well layers and quantum barrier layers are arranged alternately in a stacked manner. In other embodiments, there is also an insertion layer between the quantum well layer and the quantum barrier layer. The composition of the insertion layer is selected from group III - V. The quantum barrier layer 221 functions to confine electrons and holes so that they mainly recombine in the quantum well layer 222, thereby improving the light - emitting efficiency of the LED; the quantum well layer 222 is the main light - emitting part of the micro - light - emitting diode, where electrons and holes recombine to generate photons and emit light. It should be noted that Figure 3 the ellipsis in Figure 3Only a schematic diagram showing two light-emitting layers 220 and one heterojunction 240 is shown, but the relative positional relationship between the light-emitting layer 220 and the heterojunction 240 in the present invention can be equally explained when the light-emitting layer 220 is more than two layers. In this embodiment, a quantum well layer 222 is disposed between two quantum barrier layers 221 to form a light-emitting stack. According to actual needs, light-emitting stacks of the same or different types can be combined to form the light-emitting layer 220, which is not limited herein. In some other embodiments, the quantum barrier layer 221 and the quantum well layer 222 exist in pairs to form a light-emitting stack. For example, when the light-emitting layer 220 employs paired quantum barrier layers 221 and quantum well layers 222, the quantum barrier layer 221 has at least one more layer than the quantum well layer 222, that is, the quantum barrier layer 221 has one or more layers more than the quantum well layer 222, such that the topmost and bottommost layers of the light-emitting layer 220 are both quantum barrier layers 221. In this way, the bottommost quantum barrier layer 221 is adjacent to the first-type semiconductor layer 210, and the topmost quantum barrier layer 221 is adjacent to the second-type semiconductor layer 230. In this embodiment, the thickness of each quantum barrier layer 221 can be the same or different, and the thickness of each quantum well layer 222 can be the same or different. The thickness of the quantum barrier layer 211 can be less than, equal to, or greater than the thickness of the quantum well layer 212, which is not limited herein. The thickness of the quantum well layer 222 is less than the thickness of the quantum barrier layer 221; preferably, the thickness of the quantum barrier layer 221 is 5 nm - 25 nm. In one embodiment, the quantum well layer 222 and the quantum barrier layer 221 have different brightnesses under TEM (Transmission Electron Microscope), forming an alternating arrangement of bright and dark. Under dark-field TEM scanning, the brightness of the quantum well layer 222 is higher than that of the quantum barrier layer 221; under bright-field TEM scanning, the brightness of the quantum well layer 222 is lower than that of the quantum barrier layer 221. In this embodiment, the material of the quantum barrier layer 221 can be (AlGa) (1-x) In x P, where x is close to or equal to 0.5 to reduce lattice mismatch, and the material of the quantum well layer 222 is (AlGa) (1-y) In y P, where y is between 0.55 and 0.8; alternatively, the material of the quantum barrier layer 221 is GaN, and the material of the quantum well layer 222 is In x Ga (1-x) N, where x is between 0.2 and 0.35. It should be noted that "close" means that the error of a single element does not exceed plus or minus 0.02.
[0055] Please refer to again Figure 3, in this embodiment, the material of the heterojunction 240 is similar to or the same as the material of the adjacent light-emitting layer 220. Alternatively, the bandgap width of the heterojunction 240 is reduced by 10% compared to the bandgap width of the adjacent light-emitting layer 220. In this way, the material composition and energy band structure of the heterojunction 240 and the adjacent light-emitting layer 220 are basically close, which helps the band offset to transition smoothly and no large band offset difference will be generated; the materials at the contact positions of the heterojunction 240 with the two adjacent light-emitting layers 220 are the same or close. When they are close, the error of a single element does not exceed plus or minus 0.02. The close material composition can ensure that no obvious lattice defects will be generated during epitaxial growth, which is beneficial to improving the material quality. In addition, since the two materials are similar or the same, the internal resistance between the heterojunction 240 and the light-emitting layer 220 can be made smaller, effectively reducing the series internal resistance of the entire light-emitting layer 220, thereby effectively reducing the additional voltage drop. Further, the band offset between the materials at the contact positions of the heterojunction 240 with the two adjacent light-emitting layers 220 is smooth. Preferably, the band offset between the materials at the contact positions of the heterojunction 240 with the two adjacent light-emitting layers 220 (here it is the quantum barrier layer 221) is less than or equal to 300 meV. In this embodiment, please refer to Figure 3 , specifically, the heterojunction 240 is in contact with the quantum barrier layer 221 in the light-emitting layer 220. Therefore, the material composition and energy band structure of the heterojunction 240 and the adjacent quantum barrier layer 221 are basically close, which helps the band offset to transition smoothly and no large band offset difference will be generated; so that the band offset between the material of the heterojunction 240 and the material of the quantum barrier layer 221 is smooth.
[0056] In addition, the heterojunction 240 is in contact with the quantum barrier layer 221 in the light-emitting layer 220. If the material composition and energy band structure of the heterojunction 240 are basically close to or the same as those of the contacted quantum barrier layer 221, it should be noted that when they are close, the error of each component does not exceed plus or minus 0.02, which is more conducive to the smooth transition of the band offset and no large band offset difference will be generated. Therefore, in this embodiment, the material of the quantum barrier layer 221 can be (AlGa) (1-x) In x P, x is close to or equal to 0.5 to reduce the lattice mismatch, and the material of the heterojunction 240 is (AlGa) (1-x) In xP, where x is close to or equal to 0.5 to reduce lattice mismatch. It should be noted that being close means the error of a single element does not exceed plus or minus 0.02; alternatively, the material of the quantum barrier layer 221 is GaN, and the material of the heterojunction 240 is GaN. For example, when the light-emitting layer 220 emits red light, the material of the quantum barrier layer 221 is AlGaInP, and the material of the heterojunction 240 is AlGaInP; when the light-emitting layer 220 emits red, blue, or green light, the material of the quantum barrier layer 221 is GaN, and the material of the heterojunction 240 is also GaN; the material of the quantum barrier layer 221 is InGaN, and the material of the heterojunction 240 is InGaN; or the material of the quantum barrier layer 221 is AlGaN, and the material of the heterojunction 240 is AlGaN.
[0057] Therefore, with the heterojunction 240 located between adjacent light-emitting layers 220, the valence band electrons of the light-emitting layer 220 on one side of the heterojunction 240 are transmitted through the heterojunction 240 to become the conduction band electrons of the light-emitting layer 220 on the other side of the heterojunction 240, so that each light-emitting layer 220 can emit light independently and uniformly in the constant current mode; the electrical connection between adjacent light-emitting layers 220 is realized through the heterojunction 240, without the need to introduce a first-type semiconductor layer and a second-type semiconductor layer to form a new ohmic contact as in the prior art, effectively reducing the additional voltage drop, and the material of the heterojunction 240 is adapted to the material of the light-emitting layer 220 to reduce the internal resistance; in addition, by connecting the light-emitting layers 220 in series through the heterojunction 240, when driving the light emission with the same current, the applied voltage is smaller, the light emission intensity is doubled while the energy consumption is not doubled, effectively improving the light emission intensity and efficiency. Thus, it can be seen that by alternately stacking the light-emitting layer 220 and the heterojunction 240, while doubling the light emission, since no additional resistance needs to be introduced, the additional voltage drop can be reduced, and the light emission intensity and efficiency of the LED can be effectively improved. In terms of thickness, the thickness of the heterojunction 240 in this embodiment is greater than the thickness of the quantum well layer 222, can be close to or the same as the thickness of the quantum barrier layer 221, and the thickness of the heterojunction 240 is less than the thickness of a single light-emitting layer, so as to achieve the above effects. Preferably, the thickness of the heterojunction 40 is between 1 nm and 16 nm. In this embodiment, the quantum well layer 222 and the quantum barrier layer 221 have different brightnesses under TEM (Transmission Electron Microscope), forming an alternating arrangement of bright and dark. Under the dark field TEM scan, the brightness of the quantum well layer 222 is higher than that of the quantum barrier layer 221, and the brightness of the quantum well layer 222 is higher than that of the heterojunction 240; under the bright field TEM scan, the brightness of the quantum well layer 222 is lower than that of the quantum barrier layer 221, and the brightness of the heterojunction 240 is higher than that of the quantum well layer 222.
[0058] Please continue to refer to Figure 3, in this embodiment, the heterojunction 240 includes a first-doped type material layer 241 and a second-doped type material layer 242. The doping types of the first-doped type material layer 241 and the second-doped type material layer 242 are different. For example, the doping type of the first-doped type material layer 241 is N-type, and the doping type of the second-doped type material layer 242 is P-type, thus forming a PN junction doping layer; conversely, the doping type of the first-doped type material layer 241 is P-type, and the doping type of the second-doped type material layer 242 is N-type, thus forming a PN junction doping layer. Based on the above description, in a preferred case, the components of the material of the first-doped type material layer 241 and the quantum well layer 221 adjacent to it are the same or close, and the components of the material of the second-doped type material layer 242 and the quantum well layer 221 adjacent to it are the same or close. It should be noted that when they are close, the error of each component does not exceed plus or minus 0.02. On this basis, the materials of the first-doped type material layer 241 and the second-doped type material layer 242 are the same but the doping types are different or the doping elements are different; for example, the material of the quantum barrier layer 221 can be (AlGa) (1-x) In x P, x is close to or equal to 0.5 to reduce the lattice mismatch. The materials of the first-doped type material layer 241 and the second-doped type material layer 242 are both (AlGa) (1-x) In x P, x is close to or equal to 0.5 to reduce the lattice mismatch. It should be noted that when they are close, the error of a single element does not exceed plus or minus 0.02; or, the material of the quantum barrier layer 221 is GaN, and the materials of the first-doped type material layer 241 and the second-doped type material layer 242 are both GaN. For example, when the light-emitting layer 220 emits red light, the material of the quantum barrier layer 221 is AlGaInP, and the materials of the first-doped type material layer 241 and the second-doped type material layer 242 are both AlGaInP; when the light-emitting layer 220 emits red light, blue light or green light, the material of the quantum barrier layer 221 is GaN, and the materials of the first-doped type material layer 241 and the second-doped type material layer 242 are both GaN; the material of the quantum barrier layer 221 is InGaN, and the materials of the first-doped type material layer 241 and the second-doped type material layer 242 are both InGaN; or the material of the quantum barrier layer 221 is AlGaN, and the materials of the first-doped type material layer 241 and the second-doped type material layer 242 are both AlGaN. It should be noted that in some other embodiments, the materials of the first-doped type material layer 241 and the second-doped type material layer 242 may also be different, and the doping elements or doping types are different. It should be noted that being close means that the error of a single element does not exceed plus or minus 0.02.
[0059] Further, the doping element in the heterojunction 240 can be one or more of Si (silicon), Te (tellurium), Mg (magnesium), and Zn (zinc). Regarding the doping concentration, the doping concentrations of the first-doped type material layer 241 and the second-doped type material layer 242 vary according to different first-type semiconductor materials or second-type semiconductor materials. Preferably, the doping concentration of the first-doped type material layer 241 is higher than that of the first-type semiconductor layer 210 or the second-type semiconductor layer 230, and the doping concentration of the second-doped type material layer 242 is higher than that of the first-type semiconductor layer 210 or the second-type semiconductor layer 230. In addition, in some embodiments, the quantum well layer may or may not be doped. Then, the doping concentration of the first-doped type material layer 241 is higher than that of the quantum well layer 222; or, the doping concentration of the second-doped type material layer 242 is higher than that of the quantum well layer 222. In addition, the doping concentration of the first-doped type material layer 241 and the doping concentration of the second-doped type material layer 242 may be different. Of course, in other embodiments, the doping concentration of the first-doped type material layer 241 and the doping concentration of the second-type material layer 242 may also be the same. Preferably, the doping concentration of the first-doped type material layer 241 or the second-doped type material layer 242 is 1E18atom / cm 3 , thereby forming a tunneling effect between the light-emitting layers. To achieve a better tunneling effect, preferably, the thickness of the first-doped type material layer 241 is 1 - 15 nm, and the thickness of the second-doped type material layer 242 is 1 - 15 nm.
[0060] In some embodiments, the micro light-emitting diode chip of this embodiment has multiple micro light-emitting diode arrays. The arrangement of the micro light-emitting diode arrays can be one of 320×240, 640×480, 1600×1200, 1920×1080, 2560×1440. The size of a single micro light-emitting diode is between 100 nm and 100 μm. In some embodiments, the size of a single micro light-emitting diode is between 150 nm and 15 μm. In some embodiments, the size of a single micro light-emitting diode can also be less than 10 μm.
[0061] In some examples, each micro light-emitting diode has a light-emitting mesa. The shape of the light-emitting mesa can be a conical structure without a pointed top, or a mesa structure with a flat top surface, or other shapes, which are not limited herein. For example, the cross-section of the light-emitting mesa is a regular trapezoid or an inverted trapezoid. In some embodiments, the inclination angle of the sidewall of the light-emitting mesa is within a certain range, that is, the included angle between the sidewall of the light-emitting mesa and the first type semiconductor 210 or the second type semiconductor layer 230. The inclination angle of the sidewall of the light-emitting mesa can be less than 90°, or can be less than 90° and greater than 60°, which are not limited herein. In some embodiments, the width of the light-emitting mesa 100 is between 1 μm and 10 μm, and the thickness or height of the light-emitting mesa 100 is between 1 μm and 5 μm.
[0062] The micro light-emitting diode chips in some embodiments further include: a driving backplane (i.e., a driving chip), a bottom conductive layer, a first-type semiconductor layer 210, a light-emitting layer 220, a second-type semiconductor layer 230, and a top conductive layer, which are stacked in sequence from bottom to top. Specifically, the top conductive layer is electrically connected to the second-type semiconductor layer; the bottom conductive layer is electrically connected to the first-type semiconductor layer; and the driving backplane is electrically connected to the bottom conductive layer. Those skilled in the art can understand this and no further drawings are provided. In one embodiment, the top conductive layer is transparent. Specifically, the material of the top conductive layer can be a combination of one or more of TCO (Transparent Conductive Oxide) thin film, ITO (Indium Tin Oxide) thin film, AZO (Antimony doped Zinc Oxide) thin film, ATO (Antimony doped Tin Oxide, nano ATO) thin film, and FTO (Fluorine doped Tin Oxide) thin film. In some embodiments, the thickness of the top conductive layer is not greater than 1 micron, preferably 50 - 1000 nm. In some embodiments, the deposition of the top conductive layer can be performed by chemical vapor deposition methods known in the art, or other methods can also be used, which are not limited herein. In some embodiments, the bottom conductive layer can be an opaque conductive metal layer to the light emitted from the light-emitting mesa, or a transparent conductive layer that improves conductivity and light transmittance. Specifically, when the bottom conductive layer is a conductive metal layer, the material can be one or more conductive metals, including but not limited to one or a combination of titanium, gold, or aluminum. When the bottom conductive layer is a transparent conductive layer, the material can be a combination of one or more of TCO (Transparent Conductive Oxide) thin film, ITO (Indium Tin Oxide) thin film, AZO (Antimony doped Zinc Oxide) thin film, ATO (Antimony doped Tin Oxide, nano antimony-doped tin dioxide) thin film, and FTO (Fluorine doped Tin Oxide) thin film. In some embodiments, the thickness of the bottom conductive layer is not greater than 1 micron, preferably 50 - 1000 nm. In some embodiments, the deposition of the bottom conductive layer of the top conductive layer 300 can be performed by physical deposition methods such as physical vapor deposition, magnetron sputtering, etc., or other methods can also be used, which are not limited herein.In some embodiments, the driving chip may adopt one of a CMOS (Complementary Metal Oxide Semiconductor) driving circuit, a TFT (Thin Film Transistor) driving circuit, a circuit of III-V compound semiconductors, or an integrated circuit (IC) board, such as a silicon-based integrated circuit chip, which is not limited herein. Specifically, the driving chip is electrically connected to the light-emitting layer. The driving chip receives signals such as image data from the outside and controls the corresponding micro light-emitting diode chips. In some embodiments, a frame buffer, a column driving circuit, and a row driving circuit are integrated in the driving chip. The frame buffer includes a first pixel storage area, and the microdisplay panel includes a second pixel storage area. A complete frame of pixel gray-scale data from the outside can first enter the first pixel storage area of the frame buffer. The column driving circuit can load the pixel gray-scale data in the first pixel storage area of the frame buffer into the second pixel storage area of the microdisplay panel. The row driving circuit can scan the pixel gray-scale data in the second pixel storage area and generate a pulse modulation signal to achieve the purpose of displaying different gray scales. When driving the micro light-emitting diode chips, either a single-pixel independent driving method or a multi-pixel unit independent driving method can be adopted. The specific driving method should not constitute a limitation to the present invention.
[0063] In some embodiments, the size range of the length and width of the Micro LED chip is determined by the size of the driving backplane. Optionally, the length of the micro light-emitting diode chip is from 500 μm to 50,000 μm, and the width is from 500 μm to 50,000 μm. Preferably, the length of the micro light-emitting diode chip is not greater than 1 cm, and the width is not greater than 1 cm. The area of the light-emitting region of the micro light-emitting diode chip is very small, such as 1 mm × 1 mm, 2.64 mm × 2.02 mm, 3 mm × 5 mm, etc.
[0064] In an embodiment of the present invention, a micro light-emitting diode device is further provided, which includes the micro light-emitting diode chip in the above embodiment and a circuit board electrically connected to the micro light-emitting diode chip. The circuit board realizes signal transmission between the micro light-emitting diode chip and the outside. In some embodiments, the circuit board may adopt a flexible circuit board, a rigid circuit board, or a combination of the two, which is not limited herein. In some embodiments, the circuit board is electrically connected to the above driving chip. The driving chip can obtain signals such as image data from the outside through the circuit board, so as to control the light-emitting mesa to emit light or not emit light.
[0065] Although the present application is disclosed as above, the present application is not limited thereto. Any person skilled in the art can make various changes and modifications without departing from the spirit and scope of the present application. Therefore, the protection scope of the present application shall be subject to the scope defined by the claims.
Claims
1. A micro light emitting diode chip, characterized in that: include: a first type semiconductor layer; N stacked light-emitting layers are located on the first type semiconductor layer; N is a positive integer greater than or equal to 2; The second type semiconductor layer is located on the light emitting layer; wherein, The heterojunction is located between two adjacent light-emitting layers.
2. The micro light emitting diode chip according to claim 1, characterized in that: The thickness of the heterojunction is greater than the thickness of the quantum well layer; the thickness of the quantum barrier layer is greater than the thickness of the quantum well layer; the thickness of the heterojunction is less than the thickness of a single light-emitting layer.
3. The micro light emitting diode chip according to claim 1, characterized in that: Each light-emitting layer includes multiple stacked quantum barrier layers and quantum well layers; the quantum well layers and the quantum barrier layers are alternately stacked.
4. The micro light emitting diode chip according to claim 3, characterized in that: The quantum well layer and the quantum barrier layer further have an insertion layer therein.
5. The micro light emitting diode chip according to claim 3, characterized in that: Under bright field TEM scanning, the quantum well layer and the quantum barrier layer are arranged alternately in bright and dark states, the brightness of the heterojunction is higher than that of the quantum well layer, and the brightness of the quantum barrier layer is higher than that of the quantum well layer.
6. The micro light emitting diode chip according to claim 1, characterized in that: The material of the heterojunction is the same as that of the adjacent light-emitting layer; or the bandgap width of the heterojunction is 10% smaller than the bandgap width of the adjacent light-emitting layer.
7. The micro light emitting diode chip according to claim 6, characterized in that: The heterojunction is made of the same or similar material as the material at the contact position between the two adjacent light-emitting layers; when they are close, the error of a single element does not exceed plus or minus 0.
02.
8. The micro light emitting diode chip according to claim 1, characterized in that: The band gap between the materials at the contact position between the heterojunction and the two adjacent light-emitting layers is gentle.
9. The micro light emitting diode chip according to claim 8, characterized in that: The band gap between the materials at the contact position between the heterojunction and two adjacent light-emitting layers is less than or equal to 300 meV.
10. The micro light emitting diode chip according to claim 1, characterized in that: The doping elements in the heterojunction include one or more of Si, Te, Mg, and Zn.
11. The micro light emitting diode chip according to claim 1, characterized in that: The heterojunction includes a first doping type material layer and a second doping type material layer; the doping type of the first doping type material layer and the doping type of the second doping type material layer are different; the first doping type material layer is N-type and the second doping type material layer is P-type; or, the first doping type material layer is P-type and the second doping type material layer is N-type.
12. The micro light emitting diode chip according to claim 1, characterized in that: The doping concentration of the first doping type material layer is higher than the doping concentration of the first type semiconductor layer or higher than the doping concentration of the second type semiconductor layer; or, the doping concentration of the second doping type material layer is higher than the doping concentration of the first type semiconductor layer or higher than the doping concentration of the second type semiconductor layer; or, the doping concentration of the first doping type material layer is higher than the doping concentration of the quantum well layer; or, the doping concentration of the second doping type material layer is higher than the doping concentration of the quantum well layer.
13. The micro light emitting diode chip according to claim 1, characterized in that: The doping concentration of the first doping type material layer or the doping concentration of the second doping type material layer is 1E18 atom / cm 3 ; The thickness of the first doping type material layer is 1-15nm, and the thickness of the second doping type material layer is 1-15nm.
14. The micro light emitting diode chip according to claim 1, characterized in that: The thickness of the heterojunction is between 1 nm and 16 nm; the width of the light-emitting mesa is between 1 μm and 10 μm.
15. The micro light emitting diode chip according to claim 1, characterized in that: The quantum barrier layer and the quantum well layer exist in pairs; or, the quantum barrier layer has at least one more layer than the quantum well layer.
16. The micro light emitting diode chip according to claim 13, characterized in that: The bottommost layer and the topmost layer of the light-emitting layer are quantum barrier layers.
17. The micro light emitting diode chip according to claim 1, characterized in that: The light-emitting layer emits a mixture of red light, blue light, and green light.
18. The micro light emitting diode chip according to claim 1, characterized in that: The material of the quantum barrier layer is (AlGa) (1-x) In x P, x is close to or equal to 0.5, and the material of the quantum well layer is (AlGa) (1-y) In y P,y is between 0.55 and 0.8, the material of the heterojunction is the same as or close to the material of the quantum barrier layer; or the material of the quantum barrier layer is GaN, and the material of the quantum well layer is In x Ga (1-x) N, x is between 0.2 and 0.35, and the material of the heterojunction is the same as or close to the material of the quantum barrier layer; the close means that the error of a single element does not exceed plus or minus 0.
02.
19. The micro light emitting diode chip according to claim 1, characterized in that: Also includes: a top conductive layer electrically connected to the second type semiconductor layer; a bottom conductive layer, electrically connected to the first type semiconductor layer; A driving chip is electrically connected to the bottom conductive layer.
20. A micro light emitting diode display device, characterized in that: It comprises the micro light emitting diode chip as claimed in claim 1.