Light-emitting diode and light-emitting diode preparation method

Abstract

The invention provides a light emitting diode and a light emitting diode preparation method. The light-emitting diode comprises an epitaxial structure and a reflecting layer, the epitaxial structure comprises a first semiconductor layer, an active layer and a second semiconductor layer which are stacked in sequence, and the first semiconductor layer, the active layer and the second semiconductor layer are of a step structure; the step structure is provided with a step bottom surface and a step top surface, the step bottom surface is located on the first semiconductor layer, the step top surface is located on the second semiconductor layer, the reflecting layer covers the step structure, the surface, away from the active layer, of the first semiconductor layer is provided with a first roughened surface and a second roughened surface, and the first roughened surface corresponds to the step top surface; the second coarsening surface corresponds to the step bottom surface, and the coarsening depth of the first coarsening surface is larger than that of the second coarsening surface.

Description

Technical Field

[0001] The present disclosure relates to the field of light-emitting devices, and particularly to a light-emitting diode and a method for manufacturing the same. Background Art

[0002] Light-emitting diodes are widely used in fields such as display, decoration, and communication. By using different semiconductor materials and structures, light-emitting diodes can cover the full color range from ultraviolet to infrared.

[0003] Related technologies provide a light-emitting diode, including: an epitaxial structure and a reflective layer. The reflective layer covers the epitaxial structure, and the surface of the epitaxial structure away from the reflective layer is roughened to improve the light extraction efficiency.

[0004] The epitaxial structure needs to be provided with steps, and the thickness of the epitaxial structure at the location where the steps are provided is relatively thin. When the depth of roughening of the epitaxial structure is relatively deep, there may be a risk of etching through the epitaxy at the steps, resulting in a decrease in the reliability of the light-emitting diode. Summary of the Invention

[0005] Embodiments of the present disclosure provide a light-emitting diode and a method for manufacturing the same, which reduce the risk of etching through the epitaxial structure at the steps when the depth of roughening of the epitaxial structure is relatively deep, and improve the reliability. The technical solutions are as follows:

[0006] On the one hand, a light-emitting diode is provided, and the light-emitting diode includes:

[0007] an epitaxial structure and a reflective layer;

[0008] The epitaxial structure includes a first semiconductor layer, an active layer, and a second semiconductor layer stacked in sequence, and the first semiconductor layer, the active layer, and the second semiconductor layer have a stepped structure; the stepped structure has a step bottom surface and a step top surface, the step bottom surface is located on the first semiconductor layer, the step top surface is located on the second semiconductor layer, the reflective layer covers the stepped structure, one surface of the first semiconductor layer away from the active layer has a first roughened surface and a second roughened surface, the first roughened surface corresponds to the step top surface, the second roughened surface corresponds to the step bottom surface, and the roughening depth of the first roughened surface is greater than the roughening depth of the second roughened surface.

[0009] Optionally, the roughening depth of the first roughened surface is 0.4 to 0.6 μm, and the roughening depth of the second roughened surface is 0.2 to 0.4 μm.

[0010] Optionally, the particle diameter of the first roughened surface is 0.15 to 0.25 μm, and the particle diameter of the second roughened surface is 0.1 to 0.2 μm.

[0011] Optionally, the first semiconductor layer includes a stacked P-type AlInP carrier confinement layer and a P-type GaP window layer. The P-type AlInP carrier confinement layer is located between the P-type GaP window layer and the active layer. The P-type GaP window layer contains a high-temperature protection layer, and the high-temperature protection layer is located in the middle of the P-type GaP window layer.

[0012] Optionally, the thickness of the P-type GaP window layer is 2.8 - 3.2 μm, and the thickness of the high-temperature protection layer is 400 - 600 Å.

[0013] Optionally, the light-emitting diode further includes: a bonding layer and a substrate;

[0014] The substrate is bonded to the first semiconductor layer through the bonding layer.

[0015] On the other hand, a method for manufacturing a light-emitting diode, the method includes:

[0016] Fabricating an epitaxial structure, the epitaxial structure includes a first semiconductor layer, an active layer, and a second semiconductor layer stacked in sequence;

[0017] Roughening the side of the first semiconductor layer away from the active layer twice to form a first roughened surface and a second roughened surface, and the roughening depth of the first roughened surface is greater than that of the second roughened surface;

[0018] Performing patterning on the epitaxial structure to form a stepped structure. The stepped structure has a stepped bottom surface and a stepped top surface. The stepped bottom surface is located on the first semiconductor layer, the stepped top surface is located on the second semiconductor layer, the first roughened surface corresponds to the stepped top surface, and the second roughened surface corresponds to the stepped bottom surface.

[0019] Optionally, roughening the side of the first semiconductor layer away from the active layer twice to form a first roughened surface and a second roughened surface includes:

[0020] Using a first mask layer to shield the area of the side of the first semiconductor layer away from the active layer corresponding to the stepped bottom surface, and under normal temperature and pressure, using a first buffer solution to etch the side of the first semiconductor layer away from the active layer for 4 - 6 minutes to form the first roughened surface;

[0021] Using a second mask layer to shield the area of the side of the first semiconductor layer away from the active layer corresponding to the stepped top surface, and under normal temperature and pressure, using a second buffer solution to etch the side of the first semiconductor layer away from the active layer for 4 - 6 minutes to form the second roughened surface.

[0022] Optionally, the first buffer solution is a hydrofluoric acid solution;

[0023] The ratio of sulfuric acid, HF, and water in the hydrofluoric acid solution is 3:1:3.

[0024] Optionally, the epitaxial structure is coarsened a second time to form a second coarsened surface, and the second buffer solution is an ammonium fluoride solution;

[0025] The ratio of sulfuric acid, HF, ammonium fluoride, and water in the ammonium fluoride solution is 3:1:1:3.

[0026] The beneficial effects brought by the technical solutions provided by the embodiments of the present disclosure are:

[0027] In the embodiments of the present disclosure, one side of the first semiconductor layer away from the active layer is coarsened twice to form a first coarsened surface and a second coarsened surface. The coarsening degrees of the first coarsened surface and the second coarsened surface are different. The coarsening depth is relatively deep at the corresponding position of the step top surface, which can ensure the improvement of brightness; the depth is relatively shallow at the corresponding position of the step bottom surface, reducing the coarsening depth of the epitaxial structure at the corresponding step, avoiding the risk of the epitaxial structure at the step being corroded through, and ensuring the reliability of the light-emitting diode while improving the brightness of the light-emitting diode. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] In order to more clearly illustrate the technical solutions in the embodiments of the present disclosure, the following will briefly introduce the drawings required for the description of the embodiments. Obviously, the drawings in the following description are only some embodiments of the present disclosure. For those of ordinary skill in the art, without creative efforts, other drawings can be obtained based on these drawings.

[0029] Figure 1 is a schematic structural diagram of a light-emitting diode provided by an embodiment of the present disclosure;

[0030] Figure 2 is a schematic structural diagram of a light-emitting diode provided by an embodiment of the present disclosure;

[0031] Figure 3 is a top view of a light-emitting diode provided by an embodiment of the present disclosure;

[0032] Figure 4 is a top view of a step structure of a light-emitting diode provided by an embodiment of the present disclosure;

[0033] Figure 5 is a flowchart of a method for manufacturing a light-emitting diode provided by an embodiment of the present disclosure;

[0034] Figure 6 is a flowchart of another method for manufacturing a light-emitting diode provided by an embodiment of the present disclosure;

[0035] Figure 7 It is a contrast diagram of the undulation of roughened surfaces at different positions of a light-emitting diode provided by an embodiment of the present disclosure.

[0036] The reference signs are as follows:

[0037] 1000: epitaxial structure

[0038] 10: electrode structure; 20: step structure;

[0039] 100: substrate; 101: first semiconductor layer; 102: active layer; 103: second semiconductor layer; 104: bonding layer; 105: first electrode; 106: second electrode; 107: reflective layer; 108: first electrode pad; 109: second electrode pad; 110: passivation layer; 201: step bottom surface; 202: step top surface; 301: first roughened surface; 302: second roughened surface;

[0040] 1011: P-type AlInP carrier confinement layer; 1012: P-type GaP window layer; 1013: high-temperature protection layer; 1014: etch stop layer;

[0041] 1031: N-type AlGaInP current spreading layer; 1032: N-type AlInP carrier confinement layer. Detailed implementation manners

[0042] To make the objectives, technical solutions, and advantages of the present disclosure clearer, the following will further describe in detail the embodiments of the present disclosure with reference to the accompanying drawings.

[0043] Figure 1 It is a schematic structural diagram of a light-emitting diode provided by an embodiment of the present disclosure. Refer to Figure 1 , this light-emitting diode includes: an epitaxial structure 1000 and a reflective layer 107.

[0044] In the embodiment of the present disclosure, the epitaxial structure 1000 includes a first semiconductor layer 101, an active layer 102, and a second semiconductor layer 103 stacked in sequence. The first semiconductor layer 101, the active layer 102, and the second semiconductor layer 103 form a step structure 20; the step structure 20 has a step bottom surface 201 and a step top surface 202. The step bottom surface 201 is located on the first semiconductor layer 101, and the step top surface 202 is located on the second semiconductor layer 103. The reflective layer 107 covers the step structure 20. One side of the first semiconductor layer 101 away from the active layer 102 has a first roughened surface 301 and a second roughened surface 302. The first roughened surface 301 corresponds to the step top surface 202, and the second roughened surface 302 corresponds to the step bottom surface 201. The roughening depth of the first roughened surface 301 is greater than the roughening depth of the second roughened surface 302.

[0045] In the embodiments of the present disclosure, the surface of the first semiconductor layer away from the active layer is roughened twice to form a first roughened surface and a second roughened surface. The roughening degrees of the first roughened surface and the second roughened surface are different. The roughening depth is relatively deep at the position corresponding to the top of the step, which can ensure the improvement of brightness; the depth is relatively shallow at the position corresponding to the bottom of the step, reducing the roughening depth of the epitaxial structure at the step, avoiding the risk that the epitaxial structure at the step is corroded through, and ensuring the reliability of the light-emitting diode while improving the brightness of the light-emitting diode.

[0046] In the embodiments of the present disclosure, the correspondence between the first roughened surface 301 and the top surface 202 of the step means that the projection of the top surface 202 of the step on the surface of the first semiconductor layer 101 away from the active layer 102 coincides with the first roughened surface 301.

[0047] The correspondence between the second roughened surface 302 and the bottom surface 201 of the step means that the projection of the bottom surface 201 of the step on the surface of the first semiconductor layer 101 away from the active layer 102 coincides with the second roughened surface 302.

[0048] In the embodiments of the present disclosure, the roughening depth of the first roughened surface 301 is 0.4 - 0.6 μm. The first roughened surface corresponds to the top surface of the step. Adopting this depth can ensure the escape ratio of photons on the first roughened surface, improve the light extraction efficiency, and thus improve the brightness of the light-emitting diode.

[0049] Exemplarily, the roughening depth of the first roughened surface 301 is 0.5 μm.

[0050] In the embodiments of the present disclosure, the first roughened surface 301 and the second roughened surface 302 refer to the rough surfaces formed on the surface of the first semiconductor layer 101 away from the active layer 102, and the rough surfaces are formed by dense particles. The roughening depth here is also the height of the particles or the depth of the grooves between adjacent particles.

[0051] In the embodiments of the present disclosure, the roughening depth of the second roughened surface 302 is 0.2 - 0.4 μm. This depth will not be too deep to cause the epitaxial structure to be corroded through, and because it has a certain depth, it can effectively improve the brightness of the light-emitting diode in this area.

[0052] Exemplarily, the roughening depth of the second roughened surface 302 is 0.3 μm.

[0053] In the embodiments of the present disclosure, the particle diameter of the first roughened surface 301 is 0.15 - 0.25 μm. This particle diameter can ensure the escape ratio of photons on the first roughened surface, improve the light extraction efficiency, and thus improve the brightness of the light-emitting diode.

[0054] Exemplarily, the particle diameter of the first roughened surface 301 is 0.2 μm.

[0055] In the embodiments of the present disclosure, the particles on the roughened surface are usually in the shapes of a cone, a frustum of a cone, a cylinder, a hemisphere, etc.

[0056] In the embodiments of the present disclosure, the particle diameter of the second roughened surface 302 is 0.1 - 0.2 μm. The uniformity of the particle diameter is better, and the epitaxial structure can be prevented from being corroded through without sacrificing too much brightness.

[0057] Exemplarily, the particle diameter of the second roughened surface 302 is 0.15 μm.

[0058] See Figure 1 , the light-emitting diode further includes: a substrate 100 and a bonding layer 104.

[0059] Among them, the substrate 100 is bonded to the first semiconductor layer 101 through the bonding layer 104. Connecting the substrate through the bonding layer can protect the roughened surface and increase the light extraction rate.

[0060] In the embodiments of the present disclosure, the light-emitting diode further includes: an electrode structure 10 and a passivation layer 110.

[0061] Among them, the electrode structure 10 includes a first electrode structure and a second electrode structure. The first electrode structure penetrates through the reflective layer 107 and is connected to the first semiconductor layer 101, and the second electrode structure penetrates through the reflective layer 107 and is connected to the second semiconductor layer 103. The passivation layer 110 covers the reflective layer 107, the epitaxial structure 1000, and the bonding layer 104, and the electrode structure 10 penetrates through the passivation layer 110.

[0062] In the embodiments of the present disclosure, the substrate 100 can be any one of substrates such as a sapphire patterned substrate, an Si substrate, an SiC substrate, etc. The present disclosure does not limit the material of the substrate.

[0063] Exemplarily, the substrate 100 is a sapphire patterned substrate.

[0064] In the embodiments of the present disclosure, the first semiconductor layer 101 can be a P-type semiconductor layer, and the second semiconductor layer 103 can be an N-type semiconductor layer.

[0065] Figure 2 is a schematic structural diagram of a light-emitting diode provided by the embodiments of the present disclosure. See Figure 2 , the first semiconductor layer 101 can include a stacked P-type AlInP carrier confinement layer 1011 and a P-type GaP window layer 1012, and the second semiconductor layer 103 can include a stacked N-type AlGaInP current spreading layer 1031 and an N-type AlInP carrier confinement layer 1032.

[0066] Among them, the thickness of the P-type GaP window layer 1012 is 2.8 - 3.2 μm, for example, 3 μm.

[0067] In an embodiment of the present disclosure, the P-type AlInP carrier confinement layer 1011 is located between the P-type GaP window layer 1012 and the active layer 102, and the first roughened surface 301 and the second roughened surface 302 are located on the surface of the P-type GaP window layer 1012.

[0068] Optionally, the P-type GaP window layer 1012 may further include a high-temperature protection layer 1013, which is located in the middle of the P-type GaP window layer 1012. The thickness of the high-temperature protection layer 1013 may be 400 - 600 angstroms, for example, 500 angstroms. The setting of the high-temperature protection layer can improve the etching uniformity.

[0069] In another example, the first semiconductor layer 101 may be an N-type semiconductor layer, and the second semiconductor layer 103 may be a P-type semiconductor layer.

[0070] In an embodiment of the present disclosure, the active layer 102 may be a multi-quantum well layer. For example, the multi-quantum well layer may include a plurality of periodically alternating stacked AlGaInP quantum well layers and AlGaInP quantum barrier layers.

[0071] Optionally, an etch stop layer 1014 may be provided between the bonding layer 104 and the first semiconductor layer 101. The etch stop layer 1014 may be a GaInP layer to prevent the corrosion of the epitaxial structure by ammonia water during the transfer of the epitaxial structure.

[0072] In an embodiment of the present disclosure, the material of the bonding layer 104 may be any one of photoresist, benzocyclobutene, and silicone.

[0073] Exemplarily, the material of the bonding layer 104 is silicone.

[0074] In an embodiment of the present disclosure, the reflective layer 107 is a Distributed Bragg Reflector (DBR) layer.

[0075] In an embodiment of the present disclosure, the first electrode structure includes a first electrode 105 and a first electrode pad 108, and the second electrode structure includes a second electrode 106 and a second electrode pad 109.

[0076] Among them, the first electrode 105 is located on the bottom surface 201 of the step, the second electrode 106 is located on the top surface 202 of the step, the first electrode pad 108 penetrates through the reflective layer 107 and is connected to the first electrode 105, and the second electrode pad 109 penetrates through the reflective layer 107 and is connected to the second electrode 106.

[0077] In an embodiment of the present disclosure, both the first electrode pad 108 and the second electrode pad 109 may include a Cr layer, an Al layer, a Ti layer, a Ni layer, and an Au alloy layer stacked in sequence.

[0078] In one example, the thickness of the Cr layer is 80 - 120 nm, the thickness of the Al layer is 2500 - 3500 nm, the thickness of the Ti layer is 450 - 550 nm, the thickness of the Ni layer is 1800 - 2200 nm, and the thickness of the Au alloy layer is 18000 - 22000 nm.

[0079] Exemplarily, the thickness of the Cr layer is 100 nm, the thickness of the Al layer is 3000 nm, the thickness of the Ti layer is 500 nm, the thickness of the Ni layer is 2000 nm, and the thickness of the Au alloy layer is 20000 nm.

[0080] In one example, the first electrode 105 and the first electrode pad 108 are an N electrode and an N electrode pad respectively; the second electrode 106 and the second electrode pad 109 are a P electrode and a P electrode pad respectively.

[0081] In another example, the first electrode structure can be a P electrode structure, and the second electrode structure can be an N electrode structure.

[0082] In other examples, only the electrode pads may be included in the first electrode structure or the second electrode structure, without including the electrodes. For example, when the first electrode structure is an N electrode structure, only the N electrode pad may be included, and the present disclosure does not limit this. It should be noted that if only the N electrode pad is included in the first electrode structure, the material of the N electrode pad needs to be selectively set to ensure good ohmic contact between the first electrode structure and the first semiconductor layer.

[0083] In the embodiment of the present disclosure, the passivation layer 110 can be a film layer formed of materials such as SiO 2 layer, Al 2 O 3 layer, etc.

[0084] For example, the passivation layer 110 is a SiO 2 layer.

[0085] It should be noted that in the embodiment of the present disclosure, the structure can be selectively increased or decreased on the basis of the above-mentioned light-emitting diode structure, and the present disclosure does not limit this.

[0086] Figure 3 is a top view of a light-emitting diode provided by an embodiment of the present disclosure. Refer to Figure 3 The top view shapes of the first electrode pad 108 and the second electrode pad 109 are rectangles.

[0087] In other embodiments, the top view shapes of the first electrode pad 108 and the second electrode pad 109 can be any other arbitrary shapes, and the present disclosure does not limit this.

[0088] Figure 4 It is a top view of a step structure of a light-emitting diode provided by an embodiment of the present disclosure. Refer to Figure 4 , the shaded part is the first roughened surface 301, and the other part is the second roughened surface 302, and the top view shapes of the first roughened surface 301 and the second roughened surface 302 are rectangles.

[0089] In other embodiments, the top view shapes of the first roughened surface 301 and the second roughened surface 302 can be any other arbitrary shapes, and the present disclosure does not limit this.

[0090] Figure 5 It is a flowchart of a method for manufacturing a light-emitting diode provided by an embodiment of the present disclosure. Refer to Figure 5 , the method steps include:

[0091] S11. Fabricate an epitaxial structure, which includes a first semiconductor layer, an active layer, and a second semiconductor layer stacked in sequence.

[0092] S12. Roughen the surface of the first semiconductor layer away from the active layer twice to form a first roughened surface and a second roughened surface, and the roughening depth of the first roughened surface is greater than that of the second roughened surface.

[0093] S13. Pattern the epitaxial structure to form a step structure, which has a step bottom surface and a step top surface. The step bottom surface is located on the first semiconductor layer, the step top surface is located on the second semiconductor layer, the first roughened surface corresponds to the step top surface, and the second roughened surface corresponds to the step bottom surface.

[0094] In the embodiment of the present disclosure, the surface of the first semiconductor layer away from the active layer is roughened twice to form a first roughened surface and a second roughened surface. The roughening degrees of the first roughened surface and the second roughened surface are different. The roughening depth is relatively deep at the corresponding position of the step top surface, which can ensure the improvement of brightness; the depth is relatively shallow at the corresponding position of the step bottom surface, reducing the roughening depth of the epitaxial structure at the corresponding step, and avoiding the risk of the epitaxial structure at the step being corroded through, while ensuring the reliability of the light-emitting diode while improving the brightness of the light-emitting diode.

[0095] Figure 6 It is a flowchart of another method for manufacturing a light-emitting diode provided by an embodiment of the present disclosure. Refer to Figure 6 , the method steps include:

[0096] S21. Fabricate a second semiconductor layer, an active layer, and a first semiconductor layer on a temporary substrate, and the second semiconductor layer, the active layer, and the first semiconductor layer constitute an epitaxial structure.

[0097] Among them, the temporary substrate is a gallium arsenide substrate.

[0098] In one example, step S21 includes:

[0099] The first step is to fabricate the second semiconductor layer.

[0100] In the embodiments of the present disclosure, the second semiconductor layer includes an N-type AlGaInP current spreading layer and an N-type AlInP carrier confinement layer stacked in sequence.

[0101] Exemplarily, by using a MOCVD device, an N-type AlInP carrier confinement layer and an N-type AlGaInP current spreading layer are fabricated on the surface of the active layer in sequence.

[0102] In the embodiments of the present disclosure, an etch stop layer may also be fabricated on the surface of the N-type AlGaInP current spreading layer, and the etch medium layer may be a GaInP layer.

[0103] The second step is to fabricate the active layer.

[0104] In the embodiments of the present disclosure, the active layer is a multi-quantum well layer, including multiple periodically stacked AlGaInP quantum well layers and AlGaInP quantum barrier layers.

[0105] Exemplarily, by using a MOCVD device, multiple AlGaInP quantum well layers and AlGaInP quantum barrier layers are alternately grown on the surface of the first semiconductor layer.

[0106] The third step is to fabricate the first semiconductor layer.

[0107] In the embodiments of the present disclosure, the first semiconductor layer includes a P-type AlInP carrier confinement layer and a P-type GaP window layer.

[0108] Exemplarily, by using a Metal Organic Chemical Vapor Deposition (MOCVD) device, a P-type GaP window layer and a P-type AlInP carrier confinement layer are fabricated on the surface of the active layer in sequence.

[0109] Among them, the thickness of the P-type GaP window layer is 2.8 - 3.2 μm, for example, 3 μm.

[0110] Optionally, the P-type GaP window layer may also include a high-temperature protection layer, and the thickness of the high-temperature protection layer may be 400 - 600 Å. For example, 500 Å.

[0111] In the embodiments of the present disclosure, a Veeco K465i or C4 or RB metal organic chemical vapor deposition (MOCVD) apparatus or an AIXTRON metal organic chemical vapor deposition apparatus may be used to implement the growth of the above semiconductor layer. High-purity H 2 (hydrogen) or high-purity N 2 (nitrogen) or a mixed gas of high-purity H 2 and high-purity N 2 is used as the carrier gas, high-purity NH 3 is used as the N source, trimethylgallium (TMGa) and triethylgallium (TEGa) are used as the gallium sources, trimethylindium (TMIn) is used as the indium source, silane (SiH 4 ) is used as the N-type dopant, trimethylaluminum (TMAl) is used as the aluminum source, and bis(cyclopentadienyl)magnesium (CP 2 Mg) is used as the P-type dopant.

[0112] S22. Roughen the epitaxial structure to form a first roughened surface and a second roughened surface.

[0113] In one example, step S22 includes:

[0114] First step, perform a first roughening on the epitaxial structure to produce the first roughened surface.

[0115] In the embodiments of the present disclosure, a first mask layer is used to shield the region corresponding to the bottom surface of the step on the side of the first semiconductor layer away from the active layer. At normal temperature and pressure, the side of the first semiconductor layer away from the active layer is etched with a first buffer solution for 4 to 6 minutes to form the first roughened surface. Under these conditions, the roughening efficiency of the epitaxial structure can be improved, making the roughening process more efficient.

[0116] Exemplarily, a first mask layer is used to shield the region corresponding to the bottom surface of the step on the side of the first semiconductor layer away from the active layer. At normal temperature and pressure, the side of the first semiconductor layer away from the active layer is etched with a first buffer solution for 5 minutes to form the first roughened surface.

[0117] In the embodiments of the present disclosure, the first buffer solution is a hydrofluoric acid solution.

[0118] In the embodiments of the present disclosure, the ratio of sulfuric acid, HF, and water in the hydrofluoric acid solution is 3:1:3. The ratio of sulfuric acid, HF, and water in this ammonium fluoride solution can result in a relatively deep roughening degree of the first roughened surface, a high depth of the roughened surface, and a large particle diameter, which is beneficial for light extraction.

[0119] In the embodiments of the present disclosure, the roughening depth of the first roughened surface is 0.4 - 0.6 μm. The first roughened surface corresponds to the top surface of the step. Adopting this depth can ensure the escape ratio of photons on the first roughened surface, improve the light extraction efficiency, and thus improve the brightness of the light-emitting diode.

[0120] Exemplarily, the roughening depth of the first roughened surface is 0.5 μm.

[0121] In the embodiments of the present disclosure, the particle diameter of the first roughened surface is 0.15 - 0.25 μm. This particle diameter can ensure the escape ratio of photons on the first roughened surface, improve the light extraction efficiency, and thus improve the brightness of the light-emitting diode. Exemplarily, the particle diameter of the first roughened surface is 0.2 μm.

[0122] In the embodiments of the present disclosure, the particles on the roughened surface are usually in the shapes of cones, frustums of cones, cylinders, hemispheres, etc.

[0123] The second step is to perform a second roughening on the epitaxial structure to produce a second roughened surface.

[0124] In the embodiments of the present disclosure, a second mask layer is used to block the area corresponding to the top surface of the step on the side of the first semiconductor layer away from the active layer. At normal temperature and pressure, a second buffer solution is used to etch the side of the first semiconductor layer away from the active layer for 4 - 6 minutes to form the second roughened surface. Under these conditions, the roughening efficiency of the epitaxial structure can be improved, making the roughening process more efficient.

[0125] Exemplarily, a second mask layer is used to block the area corresponding to the top surface of the step on the side of the first semiconductor layer away from the active layer. At normal temperature and pressure, a second buffer solution is used to etch the side of the first semiconductor layer away from the active layer for 5 minutes to form the second roughened surface.

[0126] In the embodiments of the present disclosure, the second buffer solution is an ammonium fluoride solution. Compared with the first buffer solution, this buffer solution has an increased amount of ammonium fluoride and can reduce the roughening depth and particle diameter.

[0127] In the embodiments of the present disclosure, the ratio of sulfuric acid, HF, ammonium fluoride, and water in the ammonium fluoride solution is 3:1:1:3. This ratio of sulfuric acid, HF, ammonium fluoride, and water in the ammonium fluoride solution can make the roughening of the second roughened surface more uniform. When the depth of the roughened surface is beneficial for light extraction, it will not cause the epitaxial structure at the step to be etched through.

[0128] In the embodiments of the present disclosure, the roughening depth of the second roughened surface is 0.2 - 0.4 μm. This depth is not too deep to cause the epitaxial structure to be etched through, and because it has a certain depth, it can effectively improve the brightness of the light-emitting diode in this area.

[0129] Exemplarily, the roughening depth of the second roughened surface is 0.3 μm.

[0130] In the embodiment of the present disclosure, the particle diameter of the second roughened surface is 0.1 - 0.2 μm. The uniformity of the particle diameter is better, and the epitaxial structure can be prevented from being corroded through without sacrificing too much brightness.

[0131] Exemplarily, the particle diameter of the second roughened surface is 0.15 μm.

[0132] In the embodiment of the present disclosure, the difference in undulation of the second roughened surface is smaller than that of the first roughened surface.

[0133] In another example, the second roughened surface can be fabricated first and then the first roughened surface. The present disclosure does not limit the sequence of fabricating the first roughened surface and the second roughened surface.

[0134] S23. Fabricate a bonding layer on the epitaxial structure, bond the epitaxial structure to the substrate through the bonding layer, and remove the temporary substrate.

[0135] Among them, the substrate can be any one of substrates such as sapphire substrate, Si substrate, etc.

[0136] Among them, the bonding temperature is 280 - 320 °C.

[0137] Exemplarily, the bonding temperature is 300 °C.

[0138] In the embodiment of the present disclosure, if the bonding temperature is too high, the semiconductor layer will be damaged; if the bonding temperature is too low, the bonding effect will not be good. Bonding at the above temperature can ensure a good bonding effect and will not damage the semiconductor layer.

[0139] In the embodiment of the present disclosure, the material of the bonding layer is any one of photoresist, benzocyclobutene, and silica gel.

[0140] Exemplarily, the material of the bonding layer is silica gel.

[0141] S24. Pattern the first semiconductor layer, the active layer, and the second semiconductor layer to form a step structure.

[0142] In one example, step S24 includes:

[0143] Using an etching technique to pattern the first semiconductor layer, the active layer, and the second semiconductor layer stacked in sequence to form a step structure may include:

[0144] The first step is to coat a layer of photoresist on the surface of the second semiconductor layer.

[0145] In the second step, a photomask is used for shielding and the photoresist is exposed.

[0146] In the third step, the exposed photoresist is developed to form a photoresist mask with a specific shape.

[0147] In the fourth step, based on the photoresist mask, the first semiconductor layer, the active layer, and the second semiconductor layer are etched to form a step structure.

[0148] In the fifth step, the photoresist is removed using a photoresist stripping solution.

[0149] S25. Fabricate a first electrode and a second electrode, where the first electrode is located on the surface of the first semiconductor layer and the second electrode is located on the surface of the second semiconductor layer.

[0150] In one example, step S25 includes:

[0151] Using electron beam evaporation technology or magnetron sputtering technology, form the first electrode on the step surface of the first semiconductor layer and form the second electrode on the surface of the second semiconductor layer.

[0152] S26. Fabricate a reflective layer, where the reflective layer covers the step structure.

[0153] In one example, step S26 includes:

[0154] Using plasma enhanced chemical vapor deposition (PECVD) technology or atomic layer deposition (ALD) technology, fabricate a DBR layer on the surface of the second semiconductor layer and the step structure to form a reflective layer.

[0155] S27. Fabricate a first electrode pad and a second electrode pad, where the first electrode pad penetrates through the reflective layer and is connected to the first electrode, and the second electrode pad penetrates through the reflective layer and is connected to the second electrode.

[0156] In one example, step S27 includes:

[0157] In the first step, perform patterning on the reflective layer to form a first through hole and a second through hole.

[0158] Among them, the first through hole penetrates through the reflective layer and communicates with the first electrode, and the second through hole penetrates through the reflective layer and communicates with the second electrode.

[0159] In the second step, fabricate the first electrode pad and the second electrode pad.

[0160] Fabricate the first electrode pad and the second electrode pad using electron beam evaporation or magnetron sputtering technology.

[0161] In an embodiment of the present disclosure, the first electrode pad and the second electrode pad include a Cr layer, an Al layer, a Ti layer, a Ni layer, and an Au alloy layer stacked in sequence.

[0162] In one example, the thickness of the Cr layer is 80 - 120 nm, the thickness of the Al layer is 2500 - 3500 nm, the thickness of the Ti layer is 450 - 550 nm, the thickness of the Ni layer is 1800 - 2200 nm, and the thickness of the Au alloy layer is 18000 - 22000 nm.

[0163] Exemplarily, the thickness of the Cr layer is 100 nm, the thickness of the Al layer is 3000 nm, the thickness of the Ti layer is 500 nm, the thickness of the Ni layer is 2000 nm, and the thickness of the Au alloy layer is 20000 nm.

[0164] In an embodiment of the present disclosure, the first electrode and the first electrode pad form a first electrode structure, and the second electrode and the second electrode pad form a second electrode structure.

[0165] S28. Fabricate a passivation layer, where the passivation layer is a light-transmitting layer and wraps the surface of the reflective layer.

[0166] In one example, step S28 includes:

[0167] Adopt plasma-enhanced chemical vapor deposition (PECVD) technology or atomic layer deposition (ALD) technology to fabricate a SiO 2 layer on the surface of the step structure to form a passivation layer.

[0168] In an embodiment of the present disclosure, the passivation layer can also be Al 2 O 3 and other transparent insulating materials, and the present disclosure does not limit the material of the passivation layer.

[0169] S29. Thin the substrate and then test.

[0170] In an embodiment of the present disclosure, the thickness of the thinned substrate is 400 - 600 μm.

[0171] Exemplarily, the thickness of the thinned substrate is 500 μm.

[0172] Figure 7 is a contrast diagram of the undulation of the roughened surfaces at different positions of the light-emitting diode provided by the embodiment of the present disclosure. Refer to Figure 7, the abscissa is the position of the roughened surface, the ordinate is the undulation degree. The left half part is the first roughened surface, and it can be seen that the undulation degree of the first roughened surface is relatively large. The right half part is the second roughened surface, and it can be seen that the undulation degree of the second roughened surface is relatively small. That is, the roughening depth of the first roughened surface is greater than that of the second roughened surface.

[0173] The embodiment of the present disclosure improves the roughening method, mainly by performing selective roughening to form the first roughened surface and the second roughened surface. The roughening degrees of the first roughened surface and the second roughened surface are different. The roughening depth is relatively deep at the corresponding position of the step top surface, which can ensure the improvement of brightness. The depth is relatively shallow at the corresponding position of the step bottom surface. Through such improvement, the brightness can be increased to the greatest extent. Through experimental comparison between the roughening method of the embodiment of the present disclosure and the one-time roughening method of the related technology, it is verified that the brightness has increased by 2.5%, further improving the promotion competitiveness of the light-emitting diode.

[0174] The above are only the optional embodiments of the present disclosure, and are not intended to limit the present disclosure. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principle of the present disclosure shall be included within the protection scope of the present disclosure.

Claims

1. A light emitting diode, characterized in that: The light emitting diode comprises: an epitaxial structure (1000) and a reflective layer (107); The epitaxial structure (1000) comprises a first semiconductor layer (101), an active layer (102) and a second semiconductor layer (103) which are stacked in sequence, wherein the first semiconductor layer (101), the active layer (102) and the second semiconductor layer (103) are in a step structure (20); the step structure (20) has a step bottom surface (201) and a step top surface (202), wherein the step bottom surface (201) is located on the first semiconductor layer (101), and the step top surface (202) is located on the second semiconductor layer (103). On the body layer (103), the reflective layer (107) covers the step structure (20); a side of the first semiconductor layer (101) away from the active layer (102) comprises a first roughened surface (301) and a second roughened surface (302); the first roughened surface (301) corresponds to the top surface of the step (202); the second roughened surface (302) corresponds to the bottom surface of the step (201); and the roughening depth of the first roughened surface (301) is greater than the roughening depth of the second roughened surface (302).

2. The light emitting diode according to claim 1, characterized in that: The roughening depth of the first roughened surface (301) is 0.4 to 0.6 μm, and the roughening depth of the second roughened surface (302) is 0.2 to 0.4 μm.

3. The light emitting diode according to claim 1 or 2, characterized in that: The particle diameter of the first roughened surface (301) is 0.15 to 0.25 μm, and the particle diameter of the second roughened surface (302) is 0.1 to 0.2 μm.

4. The light emitting diode according to claim 1 or 2, characterized in that: The first semiconductor layer (101) comprises a stacked P-type AlInP carrier confinement layer (1011) and a P-type GaP window layer (1012), wherein the P-type AlInP carrier confinement layer (1011) is located between the P-type GaP window layer (1012) and the active layer (102), and the P-type GaP window layer (1012) comprises a high-temperature protection layer (1013), and the high-temperature protection layer (1013) is located in the middle of the P-type GaP window layer (1012).

5. The light emitting diode according to claim 4, characterized in that: The thickness of the P-type GaP window layer (1012) is 2.8-3.2 μm, and the thickness of the high temperature protection layer (1013) is 400-600 angstroms.

6. The light emitting diode according to claim 1 or 2, characterized in that: The light emitting diode further comprises: a bonding layer (104) and a substrate (100); The substrate (100) and the first semiconductor layer (101) are bonded via the bonding layer (104).

7. A method for preparing a light emitting diode, characterized in that: The method comprises: Manufacturing an epitaxial structure, wherein the epitaxial structure comprises a first semiconductor layer, an active layer, and a second semiconductor layer stacked in sequence; Roughening the surface of the first semiconductor layer away from the active layer twice to form a first roughened surface and a second roughened surface, wherein the roughening depth of the first roughened surface is greater than the roughening depth of the second roughened surface; The epitaxial structure is patterned to form a step structure, wherein the step structure has a step bottom surface and a step top surface, wherein the step bottom surface is located on the first semiconductor layer, and the step top surface is located on the second semiconductor layer, wherein the first roughened surface corresponds to the step top surface, and wherein the second roughened surface corresponds to the step bottom surface.

8. The method for preparing a light emitting diode according to claim 7, characterized in that: Roughening the surface of the first semiconductor layer away from the active layer twice to form a first roughened surface and a second roughened surface, comprising: Using a first mask layer to cover the area of ​​the first semiconductor layer away from the active layer and corresponding to the bottom surface of the step, and using a first buffer solution to etch the first semiconductor layer away from the active layer at room temperature and pressure for 4 to 6 minutes to form the first roughened surface; A second mask layer is used to cover the area on the side of the first semiconductor layer away from the active layer corresponding to the top surface of the step. At room temperature and pressure, a second buffer solution is used to corrode the side of the first semiconductor layer away from the active layer for 4 to 6 minutes to form the second roughened surface.

9. The method for preparing a light emitting diode according to claim 8, characterized in that: The first buffer solution is a hydrofluoric acid solution; The ratio of sulfuric acid, HF and water in the hydrofluoric acid solution is 3:1:

3.

10. The method for preparing a light emitting diode according to claim 8, characterized in that: The second buffer solution is an ammonium fluoride solution; The ratio of sulfuric acid, HF, ammonium fluoride and water in the ammonium fluoride solution is 3:1:1:3.

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