Display panel, display device and preparation method

Abstract

The invention relates to the technical field of display panels, particularly provides a display panel, a display device and a preparation method, and aims to solve the problem that an existing pixel defining layer is easily stripped from an anode layer in the forming process. The OLED display panel comprises a substrate, an anode layer and a pixel defining layer, the anode layer is located on the substrate, and the anode layer comprises a first area and a second area surrounding the first area; the pixel defining layer comprises a surrounding part covering the second area and an opening exposing the first area, the anode layer comprises a contact area increasing structure in the second area, and compared with the situation that the anode layer is in plane contact with the surrounding part in the second area, the contact area increasing structure is larger than the contact area increasing structure. The contact area increasing structure enables the contact area of the anode layer in the second region and the surrounding part to be larger. Therefore, the binding force between the pixel defining layer and the anode layer is increased, the possibility of stripping the pixel defining layer from the anode layer in the developing stage is reduced, and the possibility of light leakage or color crossing of the display panel is avoided.

Description

Technical Field

[0001] The present disclosure relates to the technical field of display panels, and specifically provides a display panel, a display device, and a manufacturing method thereof. Background Art

[0002] The pixel defining layer is used to define sub-pixels. Currently, during the process of forming the pixel defining layer by a patterning process, the pixel defining layer is prone to peeling off from the anode layer during the development stage, resulting in display defects such as sub-pixel light leakage and color crosstalk. Summary of the Invention

[0003] The present disclosure aims to solve the above technical problems, that is, to solve the problem that the existing pixel defining layer is prone to peeling off from the anode layer during the formation process.

[0004] In a first aspect, the present disclosure provides an OLED display panel, including: a substrate; an anode layer located on the substrate, including a first region and a second region surrounding the first region; a pixel defining layer, including a surrounding portion covering the second region and an opening exposing the first region, wherein the anode layer includes a contact area increasing structure in the second region, and wherein compared with the case where the anode layer is in planar contact with the surrounding portion in the second region, the contact area increasing structure can make the contact area between the anode layer and the surrounding portion in the second region larger.

[0005] In some exemplary embodiments, the contact area increasing structure is an opening extending from the surface of the anode layer away from the substrate towards the substrate, and the opening is filled with the pixel defining layer.

[0006] In some exemplary embodiments, there are multiple openings, which are evenly distributed in the second region.

[0007] In some exemplary embodiments, the contact area increasing structure is a groove formed in the anode layer, and the groove is filled with the pixel defining layer.

[0008] In some exemplary embodiments, the bottom surface of the groove is a plane; and / or, the bottom surface of the groove is a curved surface protruding towards the substrate.

[0009] In some exemplary embodiments, the contact area increasing structure is a protrusion formed on the anode layer.

[0010] In some exemplary embodiments, the display panel further includes: a pixel driving circuit layer located between the anode layer and the substrate; a light emitting material layer located on the first region; and a cathode.

[0011] In some exemplary embodiments, the pixel driving circuit at least includes a thin-film transistor with IGZO as the channel region material.

[0012] In a second aspect, the present disclosure provides a method for manufacturing an OLED display panel, including: forming an anode layer on a substrate, the anode layer including a first region and a second region surrounding the first region; forming a pixel defining layer, the pixel defining layer including a surrounding region covering the second region and an opening region exposing the first region; wherein, the second region includes a contact area increasing structure, and compared with the case where the second region is in planar contact with the surrounding portion, the contact area increasing structure can make the contact area between the second region and the surrounding portion larger.

[0013] In some exemplary embodiments, forming an anode layer on a substrate includes: forming an anode material layer on the substrate; patterning the anode material layer to form the anode layer; forming an opening extending from the anode layer away from the substrate surface towards the substrate in the second region, wherein the opening constitutes the contact area increasing structure.

[0014] In some exemplary embodiments, forming an anode layer on a substrate includes: forming an anode material layer on the substrate; patterning the anode material layer using a halftone mask process, and forming a groove in the second region while forming the anode layer, wherein the groove constitutes the contact area increasing structure.

[0015] In some exemplary embodiments, forming an anode layer on a substrate includes: forming an anode material layer on the substrate; patterning the anode material layer using a halftone mask process, and forming a protrusion in the second region while forming the anode layer, wherein the protrusion constitutes the contact area increasing structure.

[0016] In a third aspect, the present disclosure provides a display device, including the above display panel or a display panel prepared by the above manufacturing method.

[0017] Compared with the prior art, the present disclosure has the following beneficial effects:

[0018] The OLED display panel provided by the present disclosure includes a substrate, an anode layer, and a pixel defining layer. The anode layer is located on the substrate and includes a first region and a second region surrounding the first region. The pixel defining layer includes a surrounding portion covering the second region and an opening exposing the first region. Among them, the anode layer includes a contact area increasing structure in the second region, and compared with the case where the anode layer is in planar contact with the surrounding portion in the second region, the contact area increasing structure can make the contact area between the anode layer and the surrounding portion in the second region larger. In this way, the bonding force between the pixel defining layer and the anode layer is increased, and the possibility of the pixel defining layer peeling off from the anode layer during the development stage is reduced, so as to avoid the possibility of light leakage or color crosstalk in the display panel. Description of the Drawings

[0019] The preferred embodiments of the present disclosure will be described below with reference to the accompanying drawings, in which:

[0020] Figure 1 is a plan view of a display panel provided by at least one embodiment of the present disclosure;

[0021] Figure 2 is Figure 1 the first cross-sectional view taken along the line A-A in

[0022] Figure 3 is Figure 1 the second cross-sectional view taken along the line A-A in

[0023] Figure 4 is Figure 1 the third cross-sectional view taken along the line A-A in

[0024] Figure 5 is Figure 1 the fourth cross-sectional view taken along the line A-A in

[0025] Figure 6 is Figure 1 the fifth cross-sectional view taken along the line A-A in

[0026] Figures 7A to 7K is a cross-sectional view of a display panel provided by at least one embodiment of the present disclosure during the manufacturing process.

[0027] Description of the Reference Numerals:

[0028] AA, display area; NA, non-display area; 1, substrate; 11, light-shielding layer; 12, buffer layer; 8, sub-pixel; 7, pixel driving circuit; 2, thin-film transistor; 21, active layer; 22, gate insulating layer; 23, gate electrode; 24, interlayer insulating layer; S, source electrode; D, drain electrode; 3, storage capacitor; 31, first electrode plate; 32, second electrode plate; 51, passivation layer; 52, planarization layer; 53, pixel defining layer; 531, surrounding portion; EL, light-emitting element; 54, anode layer; 54a, anode material layer; 541, first region; 542, second region; 543, contact area increasing structure; 55, light-emitting layer; 56, cathode layer; 6, encapsulation layer. Detailed implementation manners

[0029] The preferred implementation manners of the present disclosure will be described below with reference to the accompanying drawings. Those skilled in the art should understand that these implementation manners are only used to explain the technical principle of the present disclosure and are not intended to limit the protection scope of the present disclosure.

[0030] It should be noted that in the description of the present disclosure, the terms indicating the direction or positional relationship such as "upper", "lower", "left", "right", "inner", "outer", etc. are based on the direction or positional relationship shown in the accompanying drawings. This is only for the convenience of description and does not indicate or imply that the device or element must have a specific orientation, be constructed and operated in a specific orientation. Therefore, it should not be construed as a limitation of the present disclosure. In addition, the terms "first" and "second" are only used for descriptive purposes and cannot be understood as indicating or implying relative importance.

[0031] The display panel includes a substrate, the substrate includes a display area and a non-display area, and the non-display area is disposed around the display area. A pixel array is disposed in the display area, and the pixel array includes a plurality of sub-pixels. The sub-pixel includes a pixel driving circuit and a light-emitting element, and the pixel driving circuit is used to drive the light-emitting element to emit light.

[0032] A pixel defining layer is further disposed on the substrate, and the pixel defining layer is used to define a plurality of sub-pixels to prevent light leakage and color mixing of the sub-pixels. The light-emitting unit of the sub-pixel includes an anode layer, a light-emitting layer, and a cathode layer. The pixel defining layer covers a part of the anode layer, the opening defined by the pixel defining layer exposes the anode layer, the light-emitting layer is filled in the opening, and the cathode layer covers the opening.

[0033] The material of the pixel defining layer is an organic material, such as polyimide, epoxy resin, etc., and is formed by a patterning process. The primary patterning process includes, but is not limited to, processes such as exposure and development. For example, first form the material layer of the pixel defining layer, then expose the material layer of the pixel defining layer, and then perform development to form the pixel defining layer. The pixel defining layer (especially the pixel defining layer located above the anode layer) is prone to peeling off during the development stage, resulting in display defects such as light leakage or color mixing of the sub-pixels.

[0034] Based on this, at least one embodiment of the present disclosure provides an OLED display panel, including: a substrate; an anode layer located on the substrate, including a first region and a second region surrounding the first region; a pixel defining layer, including a surrounding portion covering the second region and an opening exposing the first region, wherein the anode layer includes a contact area increasing structure in the second region, and wherein compared with the case where the anode layer is in planar contact with the surrounding portion in the second region, the contact area increasing structure can make the contact area between the anode layer and the surrounding portion in the second region larger.

[0035] The following describes the display panel of some embodiments of the present disclosure through several specific embodiments.

[0036] Figure 1 It is a plan view of the display panel provided by at least one embodiment of the present disclosure. Figure 2 is Figure 1 the first cross-sectional view taken along the line A-A in

[0037] As Figure 1 and Figure 2 shown, the display panel includes a substrate 1, the substrate 1 includes a display area AA and a non-display area NA, and the non-display area NA is disposed around the display area AA. A pixel array is disposed in the display area AA, and the pixel array includes a plurality of sub-pixels 8. The sub-pixel 8 includes a pixel driving circuit 7 and a light-emitting element EL, and the pixel driving circuit 7 is configured to drive the light-emitting element EL to emit light.

[0038] When the display panel is a flexible display panel, the substrate 1 can be a flexible substrate such as polyimide (PI); when the display panel is a rigid substrate, the substrate 1 can be a rigid substrate such as glass or quartz. As Figure 2 shown, a light-shielding layer 11 and a buffer layer 12 are sequentially disposed on the substrate 1, and the light-shielding layer 11 is used to shield the backlight. For example, the light-shielding layer 11 and the buffer layer 12 can be disposed on the entire surface of the substrate 1. For example, the light-shielding layer 11 can be an opaque organic material or inorganic material, such as a light-absorbing and light-shielding material such as a-Si or Mo. The buffer layer 12 can also be an inorganic insulating material such as silicon oxide, silicon nitride, or silicon oxynitride.

[0039] The pixel driving circuit 7 includes structures such as a thin-film transistor 2 and a storage capacitor 3. The thin-film transistor 2 includes an active layer 21, a gate insulating layer 22, a gate electrode 23, and an interlayer insulating layer 24 located on the substrate 1, and the interlayer insulating layer 24 is located on the side of the active layer 21 and the gate electrode 23 away from the substrate 1. The storage capacitor 3 includes opposite first and second electrode plates 31 and 32. Anode electrode S and drain electrode D are disposed on the side of the interlayer insulating layer 24 away from the substrate 1, and the source electrode S and the drain electrode D are electrically connected to both ends of the active layer 21 through vias.

[0040] In some examples, the gate insulating layer 22 and the gate 23 are located on the side of the active layer 21 away from the substrate 1.

[0041] For example, as Figure 2 shown, the gate insulating layer 22 includes a first gate insulating layer and a second gate insulating layer. The first gate insulating layer covers the active layer 21, and the second gate insulating layer covers the gate 23. The interlayer insulating layer 24 covers the second gate insulating layer, and the gate 23 corresponds to the active layer 21. For example, the first electrode plate 31 is located between the first gate insulating layer and the second gate insulating layer and is arranged on the same layer as the gate 23; the second electrode plate 32 is located between the second gate insulating layer and the interlayer insulating layer 24.

[0042] Figure 3 is Figure 1 the second cross-sectional view in the A-A direction in

[0043] For example, as Figure 3 shown, the opposite ends of the active layer 21 extend beyond the gate insulating layer 22 and the gate 23, and the interlayer insulating layer 24 covers the gate 23 and the exposed active layer 21. For example, the orthographic projection of the gate 23 on the substrate 1 substantially coincides with the orthographic projection of the gate insulating layer 22 on the substrate 1, and the orthographic projections of the gate 23 and the gate insulating layer 22 on the substrate 1 both fall within the orthographic projection range of the active layer 21 on the substrate 1, so that the two ends of the active layer 21 extend beyond the gate insulating layer 22, and the source electrode S and the drain electrode D are electrically connected to the two ends of the active layer 21 that extend beyond the gate insulating layer 22. For example, the material of the active layer 21 is IGZO (Indium Gallium Zinc Oxide), and the two ends of the active layer 21 that extend beyond the gate insulating layer 22 are made conductive.

[0044] Figure 4 is Figure 1 the third cross-sectional view in the A-A direction in

[0045] In some other examples, as Figure 4 shown, the gate insulating layer 22 and the gate 23 are located between the active layer 21 and the substrate 1. The gate insulating layer 22 covers the gate 23 to isolate the gate 23 and the active layer 21, and the interlayer dielectric layer covers the active layer 21.

[0046] For example, a passivation layer 51 is provided on the source electrode S and the drain electrode D, and the passivation layer 51 covers the source electrode S and the drain electrode D. A planarization layer 52 and a pixel defining layer 53 are provided on the passivation layer 51. The planarization layer 52 is used to planarize the thin film transistor 2, and the pixel defining layer 53 is located on the planarization layer 52 and is used to define a plurality of sub-pixels 8.

[0047] As Figure 4As shown, the light-emitting unit includes an anode layer 54, a light-emitting layer 55, and a cathode layer 56. The anode layer 54 is located on the passivation layer 51 and is connected to the drain electrode D through a via hole. The anode layer 54 includes a first region 541 and a second region 542 surrounding the first region 541. The pixel defining layer 53 includes a surrounding portion 531 and an opening surrounded by the surrounding portion 531. The surrounding portion 531 covers the second region 542, and the opening exposes the first region 541. The light-emitting layer 55 is located within the opening, and the cathode layer 56 covers the light-emitting layer 55.

[0048] The second region 542 of the anode layer 54 includes a contact area increasing structure 543, and the contact area increasing structure 543 is non-planar. Compared with the case where the anode layer 54 of the second region 542 is in planar contact with the surrounding portion 531 (i.e., the case where the second region 542 does not have the contact area increasing structure 543), the contact area increasing structure 543 can make the contact area between the second region 542 and the surrounding portion 531 larger, thereby increasing the bonding force between the pixel defining layer 53 and the anode layer 54, and reducing the possibility of the pixel defining layer 53 peeling off from the anode layer 54 during the development stage, so as to avoid the possibility of light leakage or color crosstalk in the display panel.

[0049] For example, as Figure 4 shown, the contact area increasing structure 543 is a groove formed in the anode layer 54, and a part of the pixel defining layer 53 is filled in the groove, thereby increasing the contact area and bonding force between the pixel defining layer 53 and the anode layer 54, and reducing the possibility of the pixel defining layer 53 peeling off from the anode layer 54 during the development stage. For example, the grooves are provided in plurality and are uniformly distributed in the second region 542. For example, the bottom surface of the groove is a plane, or the bottom surface of the groove is an arc surface protruding toward the substrate 1 to increase the surface area of the bottom surface of the groove.

[0050] Figure 5 is Figure 1 the fourth cross-sectional view in the A-A direction in

[0051] For example, as Figure 5 shown, the contact area increasing structure 543 is an opening extending from the surface of the anode layer 54 away from the substrate 1 toward the substrate 1, and a part of the pixel defining layer 53 is filled in the opening, thereby increasing the contact area and bonding force between the pixel defining layer 53 and the anode layer 54, and reducing the possibility of the pixel defining layer 53 peeling off from the anode layer 54 during the development stage. For example, the openings are provided in plurality and are uniformly distributed in the second region 542.

[0052] Figure 6 is Figure 1 the fifth cross-sectional view in the A-A direction in

[0053] For example, as Figure 6As shown, the contact area increasing structure 543 is a protrusion formed on the anode layer 54. For example, a plurality of protrusions are provided and evenly distributed within the second region 542.

[0054] For example, the cathode layer 56 is formed over the entire surface of the substrate 1. For example, an auxiliary light-emitting layer (not shown in the figure) that helps the light-emitting layer 55 emit light may also be included between the anode layer 54 and the light-emitting layer 55 and between the cathode layer 56 and the light-emitting layer 55. For example, it includes one or more of an electron transport layer, an electron injection layer, a hole transport layer, and a hole injection layer. The auxiliary light-emitting layer is, for example, an organic material layer. For example, the auxiliary light-emitting layer may also be formed over the entire surface of the substrate 1.

[0055] The display panel may further include a packaging layer, and the packaging layer may include a three-layer stack structure of an inorganic packaging layer / an organic packaging layer / an inorganic packaging layer for packaging the display area AA.

[0056] At least one embodiment of the present disclosure further provides a method for manufacturing a display panel, including: forming an anode layer on a substrate, including a first region and a second region surrounding the first region; forming a pixel defining layer, the pixel defining layer including a surrounding region covering the second region and an opening region exposing the first region; wherein, the second region includes a contact area increasing structure, and compared with the case where the second region is in planar contact with the surrounding portion, the contact area increasing structure can make the contact area between the second region and the surrounding portion larger.

[0057] Figures 7A to 7K It is a cross-sectional view of the display panel provided by at least one embodiment of the present disclosure during the manufacturing process.

[0058] Next, the method for manufacturing the display panel provided by the embodiments of the present disclosure will be introduced.

[0059] First, a substrate 1 is provided. When the display panel is a flexible display panel, the substrate 1 may be a flexible substrate such as polyimide (PI); when the display panel is a rigid substrate, the substrate 1 may be a rigid substrate such as glass or quartz.

[0060] A light-shielding layer 11 and a buffer layer 12 are sequentially formed on the substrate 1, and the light-shielding layer 11 is used to shield the backlight. For example, the light-shielding layer 11 and the buffer layer 12 may be provided over the entire surface of the substrate 1. For example, the light-shielding layer 11 may be an opaque organic material or an inorganic material, such as a light-absorbing and light-shielding material such as a-Si or Mo. The buffer layer 12 may also be an inorganic insulating material such as silicon oxide, silicon nitride, or silicon oxynitride.

[0061] After the light-shielding layer 11 and the buffer layer 12 are formed, structures such as thin-film transistors 2 and storage capacitors 3 are formed within the display area AA.

[0062] For example, an active layer 21 is formed on a buffer layer 12 by using a patterning process. Among them, a single patterning process includes processes such as photoresist formation, exposure, development, and etching. For example, the material of the active layer 21 is IGZO (Indium Gallium Zinc Oxide).

[0063] A gate insulating layer 22 and a gate 23 are formed on the active layer 21. Among them, the orthographic projections of the gate 23 and the gate insulating layer 22 on the substrate 1 both fall within the orthographic projection range of the active layer 21 on the substrate 1, so that both ends of the active layer 21 extend beyond the gate insulating layer 22, as Figure 7A shown. For example, a gate insulating material layer and a gate material layer are first formed on the active layer 21, and then the gate material layer is etched to form the gate 23. The gate insulating material layer is etched using the gate 23 as a mask to form the gate insulating layer 22. For example, the material of the gate 23 is copper, and the gate material layer is etched by wet etching to form the gate 23, and the etching solution is hydrogen peroxide. For example, the material of the gate insulating layer 22 is an inorganic insulating material such as silicon oxide, silicon nitride, or silicon oxynitride, and the gate insulating material layer is etched by dry etching to form the gate insulating layer 22. For example, the etching gas is a mixed gas of high-concentration CF 4 and low-concentration O 2 . Among them, the flow rate of CF 4 can be 2000 - 2500 sccm (standard cubic centimeter per minute), and the flow rate of O 2 can be 1000 - 1500 sccm.

[0064] The end portions of the active layer 21 exposed by the gate 23 and the gate insulating layer 22 are made conductive. For example, ammonia or helium is injected into the exposed active layer 21 to make it conductive.

[0065] An interlayer insulating layer 24 is formed. The interlayer insulating layer 24 covers the gate 23, the exposed active layer 21, and the exposed substrate 1. For example, the interlayer insulating layer 24 is formed by deposition, and the material of the interlayer insulating layer 24 can be an inorganic insulating material such as silicon oxide, silicon nitride, or silicon oxynitride.

[0066] After the via holes in the interlayer insulating layer 24 are formed, a source electrode S and a drain electrode D are formed, that is, the structure as shown in Figure 7B is formed. For example, the source electrode S and the drain electrode D are formed in the same layer to simplify the manufacturing process of the display panel. The source electrode S and the drain electrode D can be formed into a multi-layer metal structure, such as a three-layer metal structure. For example, a titanium material layer, an aluminum material layer, and a titanium material layer are sequentially formed by sputtering or evaporation, and then the three material layers are patterned using the same patterning process to form the titanium / aluminum / titanium three-layer metal structure that constitutes the source electrode S and the drain electrode D.

[0067] After the formation of each film layer of the thin film transistor 2 is completed, a passivation layer 51, a planarization layer 52, an anode layer 54, and a pixel defining layer 53 are formed in sequence.

[0068] For example, the passivation layer 51 and the planarization layer 52 are formed in sequence through a patterning process. The formed passivation layer 51 and planarization layer 52 both have vias, so that the subsequently formed anode layer 54 is electrically connected to the drain electrode D through the vias, forming a structure as Figure 7C shown. The material of the passivation layer 51 can be an inorganic insulating material such as silicon oxide, silicon nitride, or silicon oxynitride, and the material of the planarization layer 52 can be an organic insulating material such as polyimide or epoxy resin.

[0069] The anode layer 54 is formed. Among them, the anode layer 54 includes a first region 541 and a second region 542 surrounding the first region 541. The second region 542 includes a contact area increasing structure 543, and the contact area increasing structure 543 is non-planar. Compared with the case where the anode layer 54 of the second region 542 is in planar contact with the surrounding portion 531 (that is, the case where the second region 542 does not have the contact area increasing structure 543), the contact area increasing structure 543 can make the contact area between the second region 542 and the surrounding portion 531 larger, thereby increasing the bonding force between the pixel defining layer 53 and the anode layer 54, and reducing the possibility of the pixel defining layer 53 peeling off from the anode layer 54 during the development stage, so as to avoid the possibility of light leakage or color bleeding in the display panel.

[0070] For example, the contact area increasing structure 543 includes an opening formed on the anode layer 54, and the opening extends from the anode layer 54 away from the surface of the substrate 1 towards the substrate 1. For example, the contact area increasing structure 543 includes a groove formed on the anode layer 54. For example, the contact area increasing structure 543 includes a protrusion formed on the anode layer 54.

[0071] In some examples, when the contact area increasing structure 543 is a groove formed on the anode layer 54, the process of forming the anode layer 54 is as follows: First, an anode material layer is formed, and a mask is formed on the anode material layer by using a patterning process (including the formation, development, exposure, and removal of photoresist); the anode material layer not covered by the mask is removed by wet etching to form the anode layer 54, and the formed structure is as Figure 7C shown; the mask is subjected to secondary exposure and development to expose a part of the anode layer 54 located in the second region 542, and the formed structure is as Figure 7D shown; the anode layer 54 is continuously etched by wet etching or dry etching to reduce the thickness of the exposed anode layer 54, and finally an anode layer 54 with a groove is formed; the mask is removed, forming a structure as Figure 7EThe structure shown. In this example, two exposures and two etching processes are used in the process of forming the anode layer 54.

[0072] When the contact area increasing structure 543 is an opening formed on the anode layer 54, the process of forming the contact area increasing structure 543 is as follows: First, form the anode material layer 54a, and use a patterning process (including the formation, development, exposure, and removal of photoresist) to form a mask on the anode material layer 54a. Among them, the outer contour shape of the mask is the same as the outer contour shape of the designed anode layer 54, and the mask exposes a part of the anode material layer 54a located in the second region 542. The formed structure is as Figure 7F shown; Use wet etching to remove the anode material layer 54a not covered by the mask to form the anode layer 54; Remove the mask to form a structure as Figure 7G shown. At this time, the formed anode layer 54 naturally has an opening located in the second region 542.

[0073] When the contact area increasing structure 543 is a protrusion formed on the anode layer 54, the process of forming the contact area increasing structure 543 is as follows: First, form the anode material layer, and use a patterning process (including the formation, development, exposure, and removal of photoresist) to form a mask on the anode material layer; Use wet etching to remove the anode material layer not covered by the mask to form the anode layer 54. The formed structure is as Figure 7C shown; Perform secondary exposure and development on the mask so that the mask after secondary exposure and development covers a part of the anode layer 54 in the second region 542. The formed structure is as Figure 7H shown; Use wet etching or dry etching to continue etching the anode layer 54 to reduce the thickness of the exposed anode layer 54, so that the anode layer 54 in a part of the second region 542 covered by the mask forms a protrusion; Finally, remove the mask to form a structure as Figure 7I shown.

[0074] In other examples, when the contact area increasing structure 543 is a groove formed on the anode layer 54, the process of forming the anode layer 54 is as follows: First, form the anode material layer 54a, and pattern the anode material layer 54a using a halftone mask process to form a groove in the second region 542 while forming the anode layer 54. The formed structure is as Figure 7JAs shown. For example, a mask material layer is formed on the anode material layer 54a, and the mask material layer is exposed using a halftone mask process, so that the thickness of a part of the mask material layer in the region above the anode layer 54 within the second region 542 becomes thinner. At the same time, the mask material layer that does not cover the preset pattern of the anode layer 54 is removed to form a mask; the anode material layer 54a that is not covered by the mask is removed by wet etching to form the anode layer 54; then the mask and the anode layer 54 are continuously etched by dry etching to make the thickness of the mask thinner. During the process, the mask with a thinner thickness in the region above the anode layer 54 within the second region 542 is completely etched and a part of the anode layer 54 is exposed. Then the exposed anode layer 54 is etched to form a groove within the second region 542; the remaining mask is removed to form as Figure 7E the structure shown. In this example, the process of forming the anode layer 54 adopts one exposure and two etching steps, which can simplify the process flow.

[0075] When the contact area increasing structure 543 is a protrusion formed on the anode layer 54, the process of forming the anode layer 54 is as follows: First, the anode material layer 54a is formed, and the anode material layer 54a is patterned using a halftone mask process. While forming the anode layer 54, a protrusion is formed within the second region 542 to form as Figure 7K the structure shown. For example, a mask material layer is formed on the anode material layer 54a, and the mask material layer is exposed using a halftone mask process, so that the thickness of a part of the mask material layer in the region above the anode layer 54 within the first region 541 and a part of the second region 542 becomes thinner. At the same time, the mask material layer that does not cover the preset pattern of the anode layer 54 is removed to form a mask; the anode material layer 54a that is not covered by the mask is removed by wet etching to form the anode layer 54; then the mask and the anode layer 54 are continuously etched by dry etching to make the thickness of the mask thinner. During the process, the mask with a thinner thickness in the region above the anode layer 54 within the first region 541 and a part of the second region 542 is completely etched and a part of the anode layer 54 is exposed. Then the exposed anode layer 54 is etched and its thickness is reduced, while the thickness of the anode layer 54 covered by the remaining mask remains unchanged, thereby forming a protrusion within the second region 542; the remaining mask is removed to form as Figure 7I the structure shown.

[0076] For example, the pixel defining layer 53 is formed through a patterning process. The pixel defining layer 53 includes a surrounding portion 531 covering the second region 542 and an opening exposing the first region 541. Since the contact area increasing structure 543 is formed on the anode layer 54, both the contact area and the bonding force between the pixel defining layer 53 and the anode layer 54 are increased, reducing the possibility of the pixel defining layer 53 detaching from the anode layer 54 during the development stage, so as to avoid the possibility of light leakage or color crosstalk in the display panel. For example, the material of the pixel defining layer 53 may include organic insulating materials such as polyimide and epoxy resin.

[0077] For example, the light-emitting layer 55 can be formed in the opening of the pixel defining layer 53 by inkjet printing or evaporation, etc., and then the cathode layer 56 is formed to form a cross-sectional view as Figure 3 , Figure 5 or Figure 6 shown. For example, an auxiliary light-emitting layer (not shown) can also be formed between the light-emitting layer 55 and the anode layer 54 or between the light-emitting layer 55 and the cathode layer 56. The auxiliary light-emitting layer includes, for example, one or more of an electron injection layer, an electron transport layer, a hole injection layer, and a hole transport layer. For example, the cathode layer 56 and the auxiliary light-emitting layer are formed over the entire display panel.

[0078] For example, the material of the light-emitting layer 55 and the material of the auxiliary light-emitting layer are organic materials. The material of the light-emitting layer 55 can be selected according to requirements to be a light-emitting material that can emit light of a certain color (such as red light, blue light, or green light, etc.). The material of the cathode layer 56 can include metals or their alloys such as Mg, Ca, Li, or Al, or metal oxides such as IZO and ZTO, or organic conductive materials such as PEDOT / PSS (poly(3,4-ethylenedioxythiophene) / polystyrene sulfonate).

[0079] For example, after the light-emitting element EL is formed, a packaging layer can be formed on the display area AA.

[0080] The display panel provided by the embodiments of the present disclosure or the display panel obtained by using the manufacturing method provided by the embodiments of the present disclosure can be used in a display device. The display device can be any product or component with a display function such as a mobile phone, a tablet computer, a television, a monitor, a notebook computer, a digital photo frame, a navigator, etc. The embodiments of the present disclosure do not make any limitation thereto.

[0081] There are also the following points to note:

[0082] (1) The drawings of the embodiments of the present disclosure only relate to the structures involved in the embodiments of the present disclosure, and other structures can refer to the general design.

[0083] (2) For clarity, in the drawings used to describe the embodiments of the present disclosure, the thickness of layers or regions is enlarged or reduced, that is, these drawings are not drawn to actual scale. It can be understood that when an element such as a layer, film, region, or substrate is referred to as being "on" or "under" another element, the element can be "directly" on or under the other element or there can be intervening elements.

[0084] (3) Without conflict, the embodiments of the present disclosure and the features in the embodiments can be combined with each other to obtain new embodiments.

[0085] As described above, the foregoing are only specific embodiments of the present disclosure, but the protection scope of the present disclosure is not limited thereto. Any person skilled in the art within the technical scope disclosed by the present disclosure can easily think of changes or substitutions, which should all be covered within the protection scope of the present disclosure. Therefore, the protection scope of the present disclosure shall be subject to the protection scope of the claims.

Claims

1. An OLED display panel, characterized in that: include: Substrate (1); An anode layer (54) located on the substrate (1), comprising a first region (541) and a second region (542) surrounding the first region (541); a pixel defining layer (53), comprising a surrounding portion (531) covering the second region (542) and an opening exposing the first region (541), The anode layer (54) includes a contact area increasing structure (543) in the second region (542), wherein compared with the situation where the anode layer (54) is in planar contact with the surrounding portion (531) in the second region (542), the contact area increasing structure (543) can make the contact area between the anode layer (54) and the surrounding portion (531) in the second region (542) larger.

2. The display panel according to claim 1, characterized in that: The contact area increasing structure (543) is an opening extending from the anode layer (54) away from the surface of the substrate (1) toward the substrate (1), and the pixel defining layer (53) is filled in the opening.

3. The display panel according to claim 2, characterized in that: The openings are multiple and evenly distributed in the second area (542).

4. The display panel according to claim 1, characterized in that: The contact area increasing structure (543) is a groove formed in the anode layer (54), and the pixel defining layer (53) is filled in the groove.

5. The display panel according to claim 4, characterized in that: The bottom surface of the groove is a plane; and / or, The bottom surface of the groove is a curved surface protruding toward the substrate (1).

6. The display panel according to claim 1, characterized in that: The contact area increasing structure (543) is formed as a protrusion on the anode layer (54).

7. The display panel according to any one of claims 1 to 6, characterized in that: The display panel further includes: A pixel driving circuit (7) layer located between the anode layer (54) and the substrate (1); a light-emitting material layer located on the first region (541); cathode.

8. The display panel according to claim 7, characterized in that: The pixel driving circuit (7) at least comprises a thin film transistor (2) using IGZO as a channel region material.

9. A method for preparing an OLED display panel, characterized in that: include: An anode layer (54) is formed on a substrate (1), comprising a first region (541) and a second region (542) surrounding the first region (541); forming a pixel defining layer (53), wherein the pixel defining layer (53) comprises a surrounding area covering the second area (542) and an opening area exposing the first area (541), The second region (542) includes a contact area increasing structure (543), wherein compared with the situation where the second region (542) is in planar contact with the surrounding portion (531), the contact area increasing structure (543) can make the contact area between the second region (542) and the surrounding portion (531) larger.

10. The method for preparing a display panel according to claim 9, characterized in that: An anode layer (54) is formed on a substrate (1), comprising: forming an anode material layer (54a) on the substrate (1); Patterning the anode material layer (54a) to form the anode layer (54); An opening is formed in the second region (542) and extends from the anode layer (54) away from the surface of the substrate (1) toward the substrate (1), wherein the opening constitutes the contact area increasing structure (543).

11. The method for preparing a display panel according to claim 9, characterized in that: An anode layer (54) is formed on a substrate (1), comprising: forming an anode material layer (54a) on the substrate (1); The anode material layer (54a) is patterned using a half-tone mask process, and a groove is formed in the second region (542) while forming the anode layer (54), wherein the groove constitutes the contact area increasing structure (543).

12. The method for preparing a display panel according to claim 9, characterized in that: An anode layer (54) is formed on a substrate (1), comprising: forming an anode material layer (54a) on the substrate (1); The anode material layer (54a) is patterned using a half-tone mask process, and a protrusion is formed in the second region (542) while forming the anode layer (54), wherein the protrusion constitutes the contact area increasing structure (543).

13. A display device, characterized in that: It comprises the display panel as claimed in any one of claims 1 to 7 or the display panel prepared by the preparation method as claimed in any one of claims 8 to 12.

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