Display panel, manufacturing method thereof and display device

Abstract

The embodiment of the invention provides a display panel, and belongs to the technical field of display. The display panel comprises a driving backboard, a pixel definition layer and a light-emitting function layer. The pixel definition layer and the light-emitting function layer are located on the first surface of the driving backboard. The pixel definition layer comprises a plurality of first openings distributed in an array mode, the light-emitting function layer comprises a plurality of light-emitting units distributed in an array mode, and at least parts of the light-emitting units are located in the corresponding first openings. Each light-emitting unit comprises a first electrode, a light-emitting layer and a second electrode which are sequentially stacked on the first surface, and the light-emitting layer comprises a first sub-layer, a light-emitting material layer and a second sub-layer which are sequentially stacked on the first surface. A first groove is formed in the side wall of the first opening, one end, far away from the driving back plate, of the first groove breaks the first sub-layers of the light emitting units, and the broken positions of the first sub-layers are connected with the side wall of the first opening. According to the embodiment of the invention, the problem of abnormal display caused by electric leakage due to too short distance between the first sub-layer and the second electrode is solved.

Description

Technical Field

[0001] Embodiments of the present disclosure relate to the field of display technologies, and particularly to a display panel, a manufacturing method thereof, and a display device. Background Art

[0002] Display devices have a wide range of application scenarios in life, such as electronic devices like mobile phones and tablet computers. The display panel is an important component of the display device.

[0003] In related technologies, the display panel includes a driving backplane, a pixel definition layer, and a light-emitting functional layer. The pixel definition layer and the light-emitting functional layer are located on the first surface of the driving backplane. The pixel definition layer has a plurality of openings distributed in an array, and the light-emitting functional layer includes a plurality of light-emitting units distributed in an array. One light-emitting unit is provided in each opening. Each light-emitting unit includes a first electrode, a light-emitting layer, and a second electrode that are sequentially stacked on the first surface.

[0004] However, some sub-layers (such as the hole injection layer and the hole transport layer) in the light-emitting layer of some light-emitting units may climb along the sidewalls of the openings, resulting in too close a distance between the sub-layers in the light-emitting layer that are electrically connected to the first electrode and the second electrode, causing leakage, and further resulting in abnormal display. Summary of the Invention

[0005] Embodiments of the present disclosure provide a display panel, a manufacturing method thereof, and a display device, which can improve the problem of leakage caused by too close a distance between the sub-layers in the light-emitting layer that are electrically connected to the first electrode and the second electrode, and further resulting in abnormal display. The technical solutions are as follows:

[0006] On the one hand, a display panel is provided. The display panel includes a driving backplane, a pixel definition layer, and a light-emitting functional layer. The pixel definition layer and the light-emitting functional layer are located on the first surface of the driving backplane; the pixel definition layer includes a plurality of first openings distributed in an array, the light-emitting functional layer includes a plurality of light-emitting units distributed in an array, the plurality of light-emitting units correspond to the plurality of first openings one by one, and at least part of the light-emitting unit is located in the corresponding first opening; each light-emitting unit includes a first electrode, a light-emitting layer, and a second electrode that are sequentially stacked on the first surface. The light-emitting layer includes a first sub-layer, a light-emitting material layer, and a second sub-layer that are sequentially stacked on the first surface; the sidewall of the first opening has a first groove, and the first sub-layer is connected to the sidewall of the first opening.

[0007] Optionally, the pixel definition layer includes a first pixel definition sub-layer, a second pixel definition sub-layer, and a third pixel definition sub-layer that are sequentially stacked on the first surface; the surface of the second pixel definition sub-layer close to any one of the light-emitting units is recessed from the surface of the third pixel definition sub-layer close to the same light-emitting unit to form the first groove.

[0008] Optionally, the distance between the edge of the positive projection of the second pixel definition sublayer on the first surface and the edge of the positive projection of the third pixel definition sublayer on the first surface is greater than 0.1 μm and less than one-third of the size of the third pixel definition sublayer located between two adjacent light-emitting units 20 in the direction parallel to the first surface.

[0009] Optionally, the thickness of the second pixel definition sublayer is greater than one-half of the thickness of the first sublayer.

[0010] Optionally, the first pixel definition sublayer and the third pixel definition sublayer are silicon oxide layers, and the second pixel definition sublayer is a silicon nitride layer.

[0011] Optionally, the display panel further includes a partition layer located on the side of the pixel definition layer away from the driving backplane. The partition layer includes a plurality of second openings distributed in an array, and the plurality of light-emitting units correspond to the second openings one by one. A part of the light-emitting unit is located in the corresponding second opening; the side wall of the second opening has a second groove, and the second electrode is connected to the side wall of the second opening.

[0012] Optionally, the partition layer includes a first partition sublayer and a second partition sublayer stacked in sequence on the first surface; the surface of the first partition sublayer close to any one of the light-emitting units is recessed from the surface of the second partition sublayer close to the same light-emitting unit to form the second groove.

[0013] Optionally, the first partition sublayer is an insulating layer, a semiconductor layer or a conductive layer, and the second partition sublayer is an insulating layer.

[0014] Optionally, the display panel further includes a packaging layer and an auxiliary connection layer stacked in sequence on the side of the light-emitting functional layer away from the driving backplane. The packaging layer has a plurality of vias, and the plurality of vias correspond to the plurality of light-emitting units one by one. The auxiliary connection layer is connected to the second electrodes of the plurality of light-emitting units through the plurality of vias; the auxiliary connection layer is a conductive layer.

[0015] Optionally, the driving backplane is a silicon-based driving backplane.

[0016] Optionally, the first electrode is a metal structure, and the second electrode is a semi-transmissive and semi-reflective structure.

[0017] Optionally, the plurality of light-emitting units include a first light-emitting unit, a second light-emitting unit and a third light-emitting unit, and the first light-emitting unit, the second light-emitting unit and the third light-emitting unit emit different colors.

[0018] Optionally, the display panel further includes a plurality of microlens structures, and the plurality of microlens structures are located on a side of the light-emitting functional layer away from the driving backplane.

[0019] On the other hand, a method for manufacturing a display panel is provided. The method includes: providing a driving backplane; fabricating a pixel definition layer and a light-emitting functional layer on a first surface of the driving backplane; wherein, the pixel definition layer includes a plurality of first openings distributed in an array, the light-emitting functional layer includes a plurality of light-emitting units distributed in an array, the plurality of light-emitting units correspond to the plurality of first openings one by one and at least a part of the light-emitting units is located in the corresponding first openings, each of the light-emitting units includes a first electrode, a light-emitting layer, and a second electrode stacked in sequence on the first surface, the light-emitting layer includes a first sub-layer, a light-emitting material layer, and a second sub-layer stacked in sequence on the first surface; a first groove is formed on a sidewall of the first opening, and the first sub-layer is connected to the sidewall of the first opening.

[0020] In yet another aspect, a display device is provided. The display device includes a power supply circuit and any one of the foregoing display panels, and the power supply circuit supplies power to the display panel.

[0021] The beneficial effects brought by the technical solution provided by the present disclosure at least include: by providing a first groove on the sidewall of the first opening in the pixel definition layer, the partial sub-layers of the light-emitting layer electrically connected to the first electrode of different light-emitting units are fully separated, preventing the partial sub-layers electrically connected to the first electrode from climbing along the sidewall of the first opening, and improving the problem of leakage caused by the too-close distance between the partial sub-layers electrically connected to the first electrode and the second electrode, thereby causing display anomalies. Description of the Drawings

[0022] In order to more clearly illustrate the technical solutions in the embodiments of the present disclosure, the drawings required for the description of the embodiments will be briefly introduced below. Obviously, the drawings in the following description are only some embodiments of the present disclosure. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts.

[0023] Figure 1 is a schematic cross-sectional structure diagram of a display panel provided by an embodiment of the present disclosure;

[0024] Figure 2 is a schematic plan view structure diagram of a display panel provided by an embodiment of the present disclosure;

[0025] Figure 3 is a schematic cross-sectional structure diagram of a silicon-based driving backplane provided by an embodiment of the present disclosure;

[0026] Figure 4It is a schematic flow chart of a method for manufacturing a display panel provided by an embodiment of the present disclosure;

[0027] Figures 5 to 8 It is the first to fourth parts of a schematic flow chart of another method for manufacturing a display panel provided by an embodiment of the present disclosure.

[0028] Legend:

[0029] 100, driving backplane A, first surface x, first direction 10, trace

[0030] 101, substrate; 102, source-drain layer; 1021, source; 1022, drain; 103, gate insulating layer; 104, gate layer; 1040, gate; 105, first insulating layer; 106, second insulating layer; 107, planarization layer; 108, isolation groove

[0031] 200, light-emitting functional layer; 20, light-emitting unit; 201, first light-emitting unit; 202, second light-emitting unit; 203, third light-emitting unit

[0032] 21, first electrode; 21a, first sub-layer of the first electrode; 21b, second sub-layer of the first electrode; 21c, third sub-layer of the first electrode; 21d, fourth sub-layer of the first electrode; 21e, fifth sub-layer of the first electrode; 22, light-emitting layer; 22a, first sub-layer; 22b, light-emitting material layer; 22c, second sub-layer; 23, second electrode

[0033] 300, pixel definition layer; 30, first opening; 30a, first groove

[0034] 301, first pixel definition sub-layer; 302, second pixel definition sub-layer; 303, third pixel definition sub-layer

[0035] 400, isolation layer; 40, second opening; 40a, second groove

[0036] 401, first isolation sub-layer; 402, second isolation sub-layer

[0037] 500, encapsulation layer; 50, through-hole; 600, auxiliary connection layer; 700, microlens structure; 800, filling layer; 900, adhesive layer Detailed implementation manners

[0038] To make the objectives, technical solutions, and advantages of the present disclosure clearer, the following will further describe the embodiments of the present application in detail with reference to the accompanying drawings.

[0039] The terms used in the embodiments section of the present disclosure are only for explaining the embodiments of the present disclosure and are not intended to limit the present disclosure. Unless otherwise defined, the technical terms or scientific terms used in the embodiments of the present disclosure should have the ordinary meanings understood by those of ordinary skill in the art to which the present disclosure pertains. The words "first", "second", "third" and similar words used in the specification and claims of the present patent application do not denote any order, quantity or importance, but are only used to distinguish different components. Similarly, words such as "a" or "an" do not denote a quantity limitation, but mean that there is at least one. Words such as "comprising" or "including" mean that the elements or items appearing before "comprising" or "including" cover the elements or items listed after "comprising" or "including" and their equivalents, and do not exclude other elements or items. The orientation terms mentioned in the present disclosure, such as "top", "bottom", "upper", "lower", "left" or "right", etc., are only with reference to the direction of the drawings. Therefore, the orientation terms used are for better and clearer explanation and understanding of the embodiments of the present disclosure, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operate in a specific orientation, and thus should not be construed as a limitation on the embodiments of the present disclosure.

[0040] Figure 1 is a schematic cross-sectional structure diagram of a display panel provided by an embodiment of the present disclosure. Figure 2 is a schematic plan structure diagram of a display panel provided by an embodiment of the present disclosure. As Figure 1 and Figure 2As shown, the display panel includes a driving backplane 100, a pixel definition layer 300, and a light-emitting functional layer 200. The pixel definition layer 300 and the light-emitting functional layer 200 are located on the first surface A of the driving backplane 100. The pixel definition layer 300 includes a plurality of first openings 30 distributed in an array, and the light-emitting functional layer 200 includes a plurality of light-emitting units 20 distributed in an array. The plurality of light-emitting units 20 correspond to the plurality of first openings 30 one by one, and at least a part of the light-emitting unit 20 is located in the corresponding first opening 30. Each light-emitting unit 20 includes a first electrode 21, a light-emitting layer 22, and a second electrode 23 that are sequentially stacked on the first surface A. The light-emitting layer 22 includes a first sub-layer 22a, a light-emitting material layer 22b, and a second sub-layer 22c that are sequentially stacked on the first surface A. The sidewall of the first opening 30 has a first groove 30a, and the first sub-layer 22a is connected to the sidewall of the first opening 30. That is, one end of the first groove 30a away from the driving backplane 100 disconnects the first sub-layers 22a of the plurality of light-emitting units 20, and the disconnected portion of the first sub-layer 22a is connected to the sidewall of the first opening 30. By providing the first groove 30a on the sidewall of the first opening 30 in the pixel definition layer 300, the partial sub-layers of the light-emitting layer 22 electrically connected to the first electrode 21, that is, the first sub-layer 22a, are sufficiently separated, preventing the first sub-layer 22a electrically connected to the first electrode 21 from climbing along the sidewall of the first opening 30, and improving the problem of leakage caused by the too-close distance between the first sub-layer 22a electrically connected to the first electrode 21 and the second electrode 23, and further resulting in abnormal display.

[0041] Optionally, the first electrode 21 is an anode, and the second electrode 22 is a cathode.

[0042] Optionally, the manufacturing material of the first electrode 21 is metal. Optionally, the first electrode 21 is made of one metal; or the first electrode 21 includes a plurality of stacked metal layers. As Figure 1 shown, the first electrode 21 may include a first sub-layer 21a of the first electrode, a second sub-layer 21b of the first electrode, a third sub-layer 21c of the first electrode, a fourth sub-layer 21d of the first electrode, and a fifth sub-layer 21e of the first electrode that are sequentially stacked on the first surface A. The manufacturing material of the first sub-layer 21a of the first electrode may be a titanium layer, the manufacturing material of the second sub-layer 21b of the first electrode may be a titanium nitride layer, the manufacturing material of the third sub-layer 21c of the first electrode may be aluminum, the manufacturing material of the fourth sub-layer 21d of the first electrode may be titanium nitride, and the manufacturing material of the fifth sub-layer 21e of the first electrode may be indium tin oxide.

[0043] Optionally, the display panel further includes a filling structure 1000. The filling structure 1000 is located between two adjacent first electrodes 21 and is used to separate the plurality of first electrodes 21. Optionally, the manufacturing material of the filling structure 1000 is an inorganic material, such as silicon oxide.

[0044] Optionally, in the light-emitting layer 22, the first sub-layer 22a includes at least one of a hole injection layer (HIL), a hole transport layer (HTL), and an electron blocking layer (EBL) that are sequentially stacked on the first surface A. For example, the first sub-layer 22a only includes a hole transport layer. The second sub-layer 22c includes at least one of a hole blocking layer (HBL), an electron transport layer (ETL), and an electron injection layer (EIL) that are sequentially stacked on the first surface A.

[0045] Exemplarily, as Figure 1 shown, the pixel defining layer 300 includes a first pixel defining sub-layer 301, a second pixel defining sub-layer 302, and a third pixel defining sub-layer 303 that are sequentially stacked on the first surface A. The surface of the second pixel defining sub-layer 302 close to any light-emitting unit 20 is recessed from the surface of the third pixel defining sub-layer 303 close to the same light-emitting unit 20 to form a first groove 30a. That is, along the direction parallel to the first surface A (for example, the first direction x), the edge of the second pixel defining sub-layer 302 close to any light-emitting unit 20 is recessed from the edge of the third pixel defining sub-layer 303 close to the same light-emitting unit 20 to form a first groove 30a. During the formation process of the first sub-layer 22a, the first groove 20a can naturally disconnect the first sub-layers 22a of different light-emitting units 20, thereby simplifying the manufacturing process.

[0046] Exemplarily, as Figure 1 shown, the distance a between the edge of the orthographic projection of the second pixel defining sub-layer 302 on the first surface A and the edge of the orthographic projection of the third pixel defining sub-layer 303 on the first surface A is greater than 0.1 μm and less than one-third of the size b of the third pixel defining sub-layer 303 in the direction parallel to the first surface A between two adjacent light-emitting units 20. That is, 0.1 μm < a < b / 3. 0.1 μm < a ensures that the multiple first sub-layers 22a can be sufficiently separated. a < b / 3 ensures that the pixel defining layer 300 has good stability.

[0047] Exemplarily, as Figure 1 shown, the thickness c of the second pixel defining sub-layer 302 is greater than one-half of the thickness d of the first sub-layer 22a, that is, c > d / 2, to ensure that the multiple first sub-layers 22a can be sufficiently separated.

[0048] Optionally, the thickness of the pixel definition layer 300 is comparable to that of the light-emitting layer 22. If the pixel definition layer 300 is too thick, the display panel will be too thick, which is not conducive to the miniaturization of the product. If the pixel definition layer 300 is too thin, it may not be able to sufficiently separate multiple first sub-layers 22a.

[0049] Optionally, the thickness of the pixel definition layer 300 is comparable to that of the light-emitting layer 22. The difference between the two is half of the thickness of the second electrode 23.

[0050] Exemplarily, under the same etching conditions, the etching rate of the manufacturing material of the first pixel definition sub-layer 301 and the third pixel definition sub-layer 303 is less than that of the manufacturing material of the second pixel definition sub-layer 302. This facilitates the natural formation of the first groove 30a under the same etching conditions and saves the process.

[0051] Exemplarily, the first pixel definition sub-layer 301 and the third pixel definition sub-layer 303 are silicon oxide layers, and the second pixel definition sub-layer 302 is a silicon nitride layer. The manufacturing materials of the first pixel definition sub-layer 301 and the third pixel definition sub-layer 303 are the same, and the second pixel definition sub-layer 302 is made of another material with different etching rates, which is convenient for manufacturing the first groove 30a.

[0052] Exemplarily, as Figure 1 and Figure 2 shown, the display panel further includes a partition layer 400. The partition layer 400 is located on the side of the pixel definition layer 300 away from the driving backplane 100. The partition layer 400 includes a plurality of second openings 40 distributed in an array. A plurality of light-emitting units 20 correspond to and are connected to the second openings 40 one by one. A part of the light-emitting unit 20 is located in the corresponding second opening 40. The side wall of the second opening 40 has a second groove 40a, and the second electrode 23 is connected to the side wall of the first partition sub-layer 401. The setting of the partition layer 400 facilitates further separating multiple first sub-layers 22a, as well as separating multiple light-emitting material layers 22b and the second sub-layer 22c layer, that is, separating multiple light-emitting layers 22. Moreover, the setting of the partition layer 400 facilitates separating multiple second electrodes 23, thereby separating different multiple light-emitting units 20.

[0053] Exemplarily, as Figure 1As shown, the partition layer 400 includes a first partition sub-layer 401 and a second partition sub-layer 402 that are sequentially stacked on the first surface A. Along the direction parallel to the driving backplane 100, for example, the first direction x, the edge of the first partition sub-layer 401 near any light-emitting unit 20 is recessed from the edge of the second partition sub-layer 402 near the same light-emitting unit 20, forming a second groove 40a. During the formation process of the light-emitting layer 22 and the second electrode 23, since the surface of the first partition sub-layer 401 near any light-emitting unit 20 is recessed from the surface of the second partition sub-layer 402 near the same light-emitting unit 20, forming the second groove 40a, one end of the second groove 40a away from the driving backplane 100 can naturally disconnect the first sub-layers 22a of different light-emitting units 20, thus simplifying the manufacturing process.

[0054] Exemplarily, the first partition sub-layer 401 is an insulating layer, a semiconductor layer or a conductive layer, and the second partition sub-layer 402 is an insulating layer. The etching rate of the insulating material is less than that of the semiconductor material or the conductive material, and the manufacturing materials of both the second partition sub-layer 402 and the pixel defining layer 22 are insulating materials, so it is convenient to naturally form the second groove 40a in the etching process.

[0055] When the manufacturing material of the first partition sub-layer 401 is a conductive material, such as aluminum, it can also play a role in assisting the connection of the second electrode 23. Optionally, the thickness of the first partition sub-layer 401 is greater than the thickness of the second electrode 23. When the manufacturing material of the first partition sub-layer 401 is a conductive material, the resistance of the first partition sub-layer 401 is less than the resistance of the second electrode 23, which is conducive to the current on the second electrode 23 to flow through.

[0056] Optionally, the manufacturing material of the first partition sub-layer 401 can also be an insulating material, and the etching rate of the first partition sub-layer 401 is greater than the etching rate of the second partition sub-layer 402. Optionally, the manufacturing material of the first partition sub-layer 401 is silicon nitride, and the manufacturing material of the second partition sub-layer 402 is silicon oxide.

[0057] Optionally, the first partition sub-layer 401 is greater than twice the thickness of the second electrode 23.

[0058] Optionally, the thickness of the second partition sub-layer 402 is greater than 500 Å and less than 2000 Å. Optionally, the thickness of the second partition sub-layer 402 is greater than 1000 Å and less than 1500 Å. Optionally, the thickness of the second partition sub-layer 402 can be 1000 Å, 1100 Å, 1200 Å, 1300 Å, 1400 Å, 1500 Å.

[0059] Optionally, the partition layer 400 can also be a single-layer structure. One end of the partition layer 400 near the driving backplane 100 and near any light-emitting unit 20 is recessed from the surface of the partition layer 400 away from the driving backplane 100 and near the same light-emitting unit 20.

[0060] Exemplarily, the display panel further includes a packaging layer 500 and an auxiliary connection layer 600 that are sequentially stacked on a side of the light-emitting functional layer 200 away from the driving backplane 100. The packaging layer 500 has a plurality of through holes 50, and the plurality of through holes 50 correspond to the plurality of light-emitting units 20 one by one. The auxiliary connection layer 600 is connected to the second electrodes 23 of the plurality of light-emitting units through the plurality of through holes 50. The auxiliary connection layer 600 is a conductive layer. The setting of the auxiliary connection layer 600 facilitates the connection of the auxiliary second electrode 23. Since the manufacturing material of the auxiliary connection layer 600 is a conductive material and the auxiliary connection layer 600 is connected to the plurality of second electrodes 23, the auxiliary connection layer 600 is equivalent to being connected in parallel with the plurality of second electrodes 23, and the resistance of the whole formed by the electrical connection between the auxiliary connection layer 600 and the second electrode 23 is smaller than the resistance of the second electrode 23.

[0061] Optionally, the auxiliary connection layer 600 is a whole-layer structure. Alternatively, the auxiliary connection layer 600 is a mesh structure, as long as it can electrically connect the second electrodes 23 of all the light-emitting units.

[0062] Optionally, the manufacturing material of the auxiliary connection layer 600 is a transparent conductive material, such as indium tin oxide or indium zinc oxide.

[0063] Optionally, the packaging layer 500 includes at least one of an organic packaging sub-layer and an inorganic packaging sub-layer. The organic packaging sub-layer can be made of organic materials such as polyimide, polyamide, acrylic resin, and phenolic resin. The inorganic packaging sub-layer can be made of inorganic materials such as silicon nitride, silicon oxide, and silicon oxynitride.

[0064] Exemplarily, the first electrode 21 is a metal structure, and the second electrode 23 is a semi-transmissive and semi-reflective structure. When the light emitted by the light-emitting material layer 22b reaches the second electrode 23, part of the light is reflected by the second electrode 23 to the first electrode 21 and is reflected by the first electrode 21 to the second electrode 23 again. This part of the light interferes with the light originally emitted by the light-emitting material layer 22b. When the optical path difference is an even multiple of half a wavelength, the half-width of the wavelength light is narrowed, thereby improving the brightness of the light emitted by the display panel, improving the color gamut, and reducing pixel crosstalk. Optionally, the manufacturing material of the second electrode 23 is a magnesium-silver alloy.

[0065] In other embodiments, the manufacturing material of the second electrode 23 can also be a transparent conductive material, such as indium tin oxide or indium zinc oxide.

[0066] Optionally, as Figure 1 shown, the display panel further includes a plurality of microlens structures 700, and the plurality of microlens structures 700 are located on a side of the light-emitting functional layer 200 away from the driving backplane 100. Combining Figure 1 and Figure 2, a plurality of microlens structures 700 correspond to the plurality of light-emitting units 20 one by one, and the orthographic projection of the light-emitting unit 20 on the first surface A is located within the orthographic projection of the corresponding microlens structure 700 on the first surface A. The microlens structure 700 has a surface that bulges away from the driving backplane 100. The setting of the microlens structure 700 can further improve the light extraction of the display panel.

[0067] Optionally, the shape of the microlens structure 700 is hemispherical, semi-elliptical, or a shape with a smooth arc similar to a hemispherical or semi-elliptical surface.

[0068] Optionally, the shape of the orthographic projection of the microlens structure 700 on the first surface A is circular or elliptical. Correspondingly, the shape of the orthographic projection of the light-emitting unit 20 on the first surface A is square or circular and is located within the orthographic projection of the microlens structure 700 on the first surface A. Optionally, the center of the orthographic projection of the microlens structure 700 on the first surface A coincides with the center of the orthographic projection of the light-emitting unit 20 on the first surface A.

[0069] Optionally, the manufacturing material of the microlens structure 700 is an organic material, such as resin.

[0070] Optionally, as Figure 1 shown, the display panel further includes a filling layer 800, and the filling layer 800 is used to level the surface of the plurality of microlens structures 700 away from the driving backplane 100.

[0071] Optionally, the refractive index of the filling layer 800 is less than the refractive index of the microlens structure 700, which is convenient for further improving light extraction.

[0072] Optionally, the manufacturing material of the filling layer 800 is an organic material, such as OCA (Optically Clear Adhesive). OCA is colorless and transparent, with a light transmittance of more than 99%. OCA has good strength and stability, and is resistant to high temperature and ultraviolet rays.

[0073] Optionally, the display panel further includes a protective layer, and the protective layer is located on the side of the filling layer 800 away from the display backplane 10. The protective layer can play a role in protecting the display panel. Optionally, the manufacturing material of the protective layer is glass or plastic, etc.

[0074] Optionally, the display panel further includes an adhesive layer 900, and the adhesive layer 900 is located between the auxiliary connection layer 600 and the plurality of microlens structures 700. The adhesive layer 900 is used to bond the plurality of microlens structures 700 to the display panel. Optionally, the manufacturing material of the adhesive layer 900 is a transparent adhesive material.

[0075] Exemplarily, as Figure 2As shown, a plurality of light-emitting units 20 include a first light-emitting unit 201, a second light-emitting unit 202, and a third light-emitting unit 203. The first light-emitting unit 201, the second light-emitting unit 202, and the third light-emitting unit 203 emit different colors to achieve a display function. In the related art, the color of the light emitted by the light-emitting layer is white, and a color film layer is provided on the side of the light-emitting functional layer away from the driving backplane. The color film layer includes a plurality of color resistance blocks that can convert white light into light of different colors. However, the setting of the color film layer will reduce the brightness by about 70%. In the embodiment of the present disclosure, the structure without the color film layer can improve the problem of reducing the brightness due to the low transmittance of the color film layer, which is beneficial to improving the brightness of the display panel.

[0076] Exemplarily, the driving backplane 100 is a silicon-based driving backplane. The pixels of the display panel including the silicon-based driving backplane are small and the brightness is low. The display panel in the embodiment of the present disclosure is beneficial to improving the brightness of the display panel. Therefore, the embodiment of the present disclosure is particularly suitable for the display panel including the silicon-based driving backplane.

[0077] Optionally, as Figure 1 shown, the driving backplane 100 includes a trace 10 for transmitting the electrical signal in the driving backplane 100 to the first electrode 21.

[0078] Optionally, the manufacturing material of the trace 10 is a metal material, such as copper, aluminum, or tungsten. The trace 10 can be made of one metal material or can include a plurality of metal films made of different materials stacked.

[0079] The structure of the silicon-based driving backplane will be exemplarily described below. Figure 3 is a schematic cross-sectional structure diagram of a silicon-based driving backplane provided by an embodiment of the present disclosure. As Figure 3 shown, the silicon-based driving backplane includes a plurality of transistors, and the transistors can be metal oxide semiconductor field effect transistors (MOS).

[0080] As Figure 3 shown, the silicon-based driving backplane includes a substrate 101, a source-drain layer 102, a gate insulating layer 103, a gate layer 104, a first insulating layer 105, a first trace layer (not shown in the figure), a second insulating layer 106, a second trace layer (not shown in the figure), and a planarization layer 107 stacked in sequence. Among them, a plurality of vias are included between the gate insulating layer 103, the first insulating layer 105, the second insulating layer 106, and the planarization layer 107, facilitating the trace 10 to electrically connect the first electrode 21 and the transistors in the driving backplane through the vias.

[0081] Exemplarily, the gate layer 104 includes a gate 1040, the source-drain layer 102 includes a source 1021 and a drain 1022, and the gate 1040, the source 1021, and the drain 1022 form a MOS transistor.

[0082] Optionally, the transistor can be an N-type MOS transistor or a P-type MOS transistor. For an N-type MOS transistor, the substrate 101 located below the N-type MOS transistor can be a P-type semiconductor, and the source 1021 and the drain 1022 can be N-type semiconductors; for a P-type MOS transistor, the substrate 101 located below the P-type MOS transistor can be an N-type semiconductor, and the source 1021 and the drain 1022 can be P-type semiconductors.

[0083] Optionally, the silicon-based driving backplane 10 further includes a plurality of isolation trenches 109, and the isolation trenches 109 are located between two adjacent transistors. Optionally, the isolation trenches 109 are formed by a shallow trench isolation (STI) process. Optionally, the isolation trenches 109 are filled with deposited oxides.

[0084] Optionally, the driving backplane 100 includes a plurality of pixel driving circuits, and the plurality of pixel driving circuits are connected to a plurality of light-emitting units in one-to-one correspondence. The first wiring layer includes a plurality of gate lines, and the first wiring layer is electrically connected to the gate layer 104. The second wiring layer includes a plurality of data lines, and the second wiring layer is electrically connected to the source-drain layer 102. The extending directions of the gate lines and the data lines can be the first direction x and the second direction y respectively, and the second direction y intersects the first direction x. Each gate line is electrically connected to a plurality of pixel driving circuits, and each data line is electrically connected to a plurality of pixel driving circuits. The display function is realized.

[0085] Exemplarily, the material for manufacturing the gate insulating layer 103 can be silicon oxide, silicon nitride, silicon oxynitride, etc.

[0086] Exemplarily, the material for manufacturing the first insulating layer 105 can be silicon oxide, silicon nitride, silicon oxynitride, etc.

[0087] Exemplarily, the material for manufacturing the second insulating layer 107 can be silicon oxide, silicon nitride, silicon oxynitride, etc.

[0088] Exemplarily, the planarization layer 109 is made of an organic insulating material, such as resin, etc.

[0089] Optionally, the driving backplane 100 may also be a driving backplane including a plurality of TFTs (Thin Film Transistors), such as an LTPO (Low-temperature Polycrystalline Oxide) backplane or an LTPS (Low-Temperature Poly-Silicon) backplane. Optionally, the display backplane includes a gate layer, an active layer, and a source-drain layer. Among them, the active layer is made of a low-temperature polycrystalline silicon material and a metal oxide semiconductor material such as IGZO (Indium Gallium Zinc Oxide), or the active layer is made of a low-temperature polycrystalline silicon material.

[0090] Figure 4 is a schematic flowchart of a method for manufacturing a display panel provided by an embodiment of the present disclosure. As Figure 4 shown, the method includes:

[0091] In step S1, a driving backplane is provided.

[0092] In step S2, a pixel definition layer and a light-emitting functional layer are formed on the first surface of the driving backplane.

[0093] Among them, the pixel definition layer includes a plurality of first openings distributed in an array, the light-emitting functional layer includes a plurality of light-emitting units distributed in an array, the plurality of light-emitting units correspond to the plurality of first openings one by one, and at least a part of the light-emitting unit is located in the corresponding first opening. Each light-emitting unit includes a first electrode, a light-emitting layer, and a second electrode stacked in sequence on the first surface. The light-emitting layer includes a first sub-layer, a light-emitting material layer, and a second sub-layer stacked in sequence on the first surface. The sidewall of the first opening has a first groove, and the first sub-layer is connected to the sidewall of the first opening.

[0094] Figures 5 to 8 is the first to fourth parts of a schematic flowchart of another method for manufacturing a display panel provided by an embodiment of the present disclosure, and can manufacture Figure 1 the display panel as shown.

[0095] The first step, as Figure 5As shown in part (a), a driving backplane 100 is provided. A first electrode material layer is formed on the driving backplane by, for example, deposition. The first electrode material layer is patterned to form a plurality of first electrodes 21. A filling structure is formed between the plurality of first electrodes 21 by, for example, deposition. Optionally, a Lateral Height Coverage (LHC) process is used to reduce the step difference between the surface of the first electrode and the upper surface of the adjacent filling structure. Then, an initial first pixel definition sub-layer 3010, an initial second pixel definition sub-layer 3020, an initial third pixel definition sub-layer 3030, an initial first partition sub-layer 4010, and an initial second partition sub-layer 4020 are sequentially formed by, for example, deposition.

[0096] The second step, as Figure 5 shown in part (b), a photoresist structure is formed on the surface of the initial second partition sub-layer 4020 through processes such as photoresist coating, exposure, and development.

[0097] The third step, as Figure 5 shown in part (c), the initial first partition sub-layer 4010 and the initial second partition sub-layer 4020 are etched to form a first partition sub-layer 401 and a second partition sub-layer 402. Among them, the etching rates of the initial first partition sub-layer 4010 and the initial second partition sub-layer 4020 are different. Optionally, different gases are used to etch the initial first partition sub-layer 4010 and the initial second partition sub-layer 4020. Optionally, the etching conditions of the initial first partition sub-layer 4010 and the initial partition sub-layer 4020 are the same, for example, the same gas is used for etching.

[0098] The fourth step, as Figure 5 shown in part (d), a photoresist structure is formed on the surface of the initial third pixel definition sub-layer 3030 and the second partition sub-layer 402 through processes such as photoresist coating, exposure, and development.

[0099] The fifth step, as Figure 6As shown in part (a), the initial first pixel definition sub-layer 3010, the initial second pixel definition sub-layer 3020, and the initial third pixel definition sub-layer 3030 are etched to form the first pixel definition sub-layer 301, the second pixel definition sub-layer 302, and the third pixel definition sub-layer 303. Among them, the etching rates of the initial first pixel definition sub-layer 3010, the initial second pixel definition sub-layer 3020, and the initial third pixel definition sub-layer 3030 are different. Optionally, different gases are used to etch the initial first pixel definition sub-layer 3010, the initial second pixel definition sub-layer 3020, and the initial third pixel definition sub-layer 3030. Optionally, the same gas is used to etch the initial first pixel definition sub-layer 3010, the initial second pixel definition sub-layer 3020, and the initial third pixel definition sub-layer 3030.

[0100] Step 6, as Figure 6 shown in part (b), the light-emitting layer material 2210 of the first light-emitting unit, the second electrode material layer 230, and the encapsulation layer 500 are sequentially obtained by, for example, evaporation.

[0101] Step 7, as Figure 6 shown in part (c), a photoresist structure is formed at a position corresponding to the first light-emitting unit through processes such as photoresist coating, exposure, and development.

[0102] Step 8, as Figure 6 shown in part (d), the light-emitting layer 221 of the first light-emitting unit, the second electrode 23, and a part of the encapsulation layer 500 located above the first light-emitting unit are formed by, for example, etching.

[0103] Step 9, as Figure 7 shown in part (a), the light-emitting layer material 2220 of the second light-emitting unit, the second electrode material layer 230, and the encapsulation layer 500 are sequentially obtained by, for example, evaporation.

[0104] Step 10, as Figure 7 shown in part (b), a photoresist structure is formed at a position corresponding to the second light-emitting unit through processes such as photoresist coating, exposure, and development.

[0105] Step 11, as Figure 7 shown in part (c), the light-emitting layer 222 of the second light-emitting unit, the second electrode 23, and a part of the encapsulation layer 500 located above the second light-emitting unit are formed by, for example, etching.

[0106] Step 12, as Figure 7As shown in part (d), the light-emitting layer material, the third electrode material layer, and the encapsulation layer 500 of the third light-emitting unit are sequentially obtained by, for example, evaporation coating. The light-emitting layer material of the third light-emitting unit is patterned to remove the light-emitting layer material, the third electrode material layer, and a part of the encapsulation layer of the third light-emitting unit above the first light-emitting unit and the second light-emitting unit. Finally, the encapsulation layer 500 is formed on the surface of the second partition layer 402 by, for example, deposition. The encapsulation layer 500 on the surfaces of the first light-emitting unit, the second light-emitting unit, the third light-emitting unit, and the second partition layer 402 is connected to form an integral body.

[0107] The thirteenth step, as Figure 8 As shown in part (a), a photoresist structure is formed at positions corresponding to the plurality of light-emitting units through processes such as photoresist coating, exposure, and development.

[0108] The fourteenth step, as Figure 8 As shown in part (b), the encapsulation layer 500 is etched to form a plurality of through holes 50. The plurality of through holes 50 correspond one-to-one to the plurality of light-emitting units, and the through holes 50 of the encapsulation layer 500 are located above the light-emitting units.

[0109] The fifteenth step, as Figure 8 As shown in part (c), an auxiliary connection layer 600 is formed on the surface of the encapsulation layer 500 by, for example, deposition.

[0110] The sixteenth step, as Figure 8 As shown in part (d), an adhesive layer 900 is formed on the surface of the auxiliary connection layer by, for example, coating. A plurality of microlens structures 700 are fabricated on the surface of the adhesive layer 900. Optionally, a microlens structure material layer is formed by coating, and the microlens structure material layer is patterned to form a plurality of dot-like structures distributed in an array, and then by baking, the upper surface of the microlens structure material layer bulges to form a plurality of microlens structures distributed in an array. Optionally, a filling layer 800 is formed by, for example, coating. The display panel as shown in Figure 1 is obtained.

[0111] Optionally, the patterning process includes processes such as photoresist coating, exposure, development, etching, and stripping.

[0112] Optionally, in the embodiments of the present disclosure, lithography is used for etching instead of evaporation using a silicon mask. Since the development of the silicon mask technology is difficult, the corresponding evaporation equipment has high alignment accuracy and high cost. The service life of the silicon mask also needs to be considered. Moreover, when using a silicon mask for evaporation, PT (particle) control also needs to be considered, that is, to prevent impurity particles (such as organic materials attached to the silicon mask) from falling on the silicon driving substrate during evaporation. However, the lithography method adopted in the embodiments of the present disclosure can avoid the above problems.

[0113] The embodiments of the present disclosure further provide a display device, which includes any one of the foregoing display panels and a power supply circuit for supplying power to the display panel.

[0114] Exemplarily, the display device provided by the embodiments of the present disclosure can be any product or component with a display function, such as a mobile phone, a tablet computer, a television, a monitor, a laptop computer, a digital photo frame, a navigator, etc.

[0115] This display device has the same effects as the foregoing display panel and will not be elaborated herein.

[0116] The above are only optional embodiments of the present disclosure and are not intended to limit the present disclosure. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principle of the present disclosure shall be included within the protection scope of the present disclosure.

Claims

1. A display panel, characterized in that, the display panel includes a driving backplane, a pixel definition layer, and a light-emitting functional layer, and the pixel definition layer and the light-emitting functional layer are located on a first surface of the driving backplane; the pixel definition layer includes a plurality of first openings distributed in an array, the light-emitting functional layer includes a plurality of light-emitting units distributed in an array, the plurality of light-emitting units correspond to the plurality of first openings one by one, and at least a part of the light-emitting unit is located in the corresponding first opening; each light-emitting unit includes a first electrode, a light-emitting layer, and a second electrode stacked in sequence on the first surface, and the light-emitting layer includes a first sub-layer, a light-emitting material layer, and a second sub-layer stacked in sequence on the first surface; a side wall of the first opening has a first groove, and the first sub-layer is connected to the side wall of the first opening.

2. The display panel according to claim 1, characterized in that, the pixel definition layer includes a first pixel definition sub-layer, a second pixel definition sub-layer, and a third pixel definition sub-layer stacked in sequence on the first surface; a surface of the second pixel definition sub-layer close to any one of the light-emitting units is recessed from a surface of the third pixel definition sub-layer close to the same light-emitting unit, forming the first groove.

3. The display panel according to claim 2, characterized in that, a distance between an edge of a positive projection of the second pixel definition sub-layer on the first surface and an edge of a positive projection of the third pixel definition sub-layer on the first surface is greater than 0.1 μm and less than one-third of a size of the third pixel definition sub-layer located between two adjacent light-emitting units in a direction parallel to the first surface.

4. The display panel according to claim 2, characterized in that, a thickness of the second pixel definition sub-layer is greater than one-half of a thickness of the first sub-layer.

5. The display panel according to any one of claims 2 to 4, characterized in that, the first pixel definition sub-layer and the third pixel definition sub-layer are silicon oxide layers, and the second pixel definition sub-layer is a silicon nitride layer.

6. The display panel according to any one of claims 1 to 4, characterized in that, the display panel further includes a partition layer, the partition layer is located on a side of the pixel definition layer away from the driving backplane, the partition layer includes a plurality of second openings distributed in an array, the plurality of light-emitting units correspond to the second openings one by one, and a part of the light-emitting unit is located in the corresponding second opening; a side wall of the second opening has a second groove, and the second electrode is connected to the side wall of the second opening.

7. The display panel according to claim 6, characterized in that, the partition layer includes a first partition sub-layer and a second partition sub-layer stacked in sequence on the first surface; a surface of the first partition sub-layer close to any one of the light-emitting units is recessed from a surface of the second partition sub-layer close to the same light-emitting unit, forming the second groove.

8. The display panel according to claim 7, characterized in that, the first partition sub-layer is an insulating layer, a semiconductor layer, or a conductive layer, and the second partition sub-layer is an insulating layer.

9. The display panel according to claim 7 or 8, wherein, the display panel further includes a packaging layer and an auxiliary connection layer that are sequentially stacked on a side of the light-emitting functional layer away from the driving backplane. The packaging layer has a plurality of vias, and the plurality of vias correspond to the plurality of light-emitting units one by one. The auxiliary connection layer is connected to the second electrodes of the plurality of light-emitting units through the plurality of vias; the auxiliary connection layer is a conductive layer.

10. The display panel according to any one of claims 1 to 4 and claims 7 to 8, wherein, the driving backplane is a silicon-based driving backplane.

11. The display panel according to any one of claims 1 to 4 and claims 7 to 8, wherein, the first electrode is a metal structure, and the second electrode is a semi-transmissive and semi-reflective structure.

12. The display panel according to any one of claims 1 to 4 and claims 7 to 8, wherein, the plurality of light-emitting units include a first light-emitting unit, a second light-emitting unit, and a third light-emitting unit, and the first light-emitting unit, the second light-emitting unit, and the third light-emitting unit emit different colors.

13. The display panel according to any one of claims 1 to 4 and claims 7 to 8, wherein, the display panel further includes a plurality of microlens structures, and the plurality of microlens structures are located on a side of the light-emitting functional layer away from the driving backplane.

14. A method for manufacturing a display panel, wherein, the method includes: providing a driving backplane; fabricating a pixel definition layer and a light-emitting functional layer on a first surface of the driving backplane; wherein, the pixel definition layer includes a plurality of first openings distributed in an array, the light-emitting functional layer includes a plurality of light-emitting units distributed in an array, the plurality of light-emitting units correspond to the plurality of first openings one by one and at least a part of the light-emitting unit is located in the corresponding first opening, and each light-emitting unit includes a first electrode, a light-emitting layer, and a second electrode that are sequentially stacked on the first surface. The light-emitting layer includes a first sub-layer, a light-emitting material layer, and a second sub-layer that are sequentially stacked on the first surface; a first groove is provided on a sidewall of the first opening, and the first sub-layer is connected to the sidewall of the first opening.

15. A display device, wherein, the display device includes a power supply circuit and the display panel according to any one of claims 1 to 13, and the power supply circuit supplies power to the display panel.

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