Display panel, display device and preparation method of display panel

Abstract

The invention provides a display panel, a display device and a preparation method of the display panel, the display panel comprises an array substrate and a plurality of light-emitting units, the array substrate comprises a substrate and a plurality of pixel circuits arranged on one side of the substrate, and the light-emitting units are arranged on the side, away from the substrate, of the array substrate. The light-emitting unit comprises a first electrode, a light-emitting part and a second electrode which are sequentially stacked in the direction away from the substrate. The orthographic projection of at least one pixel circuit on the substrate and the orthographic projection of the first electrode on the substrate are staggered, and the pixel circuit is coupled with the first electrode. In the embodiment of the invention, the position of the first electrode is not limited by the position of the corresponding pixel circuit any more, that is, the position of the light emitting unit is not limited by the position of the corresponding pixel circuit any more. Furthermore, by reducing the distance between the adjacent light-emitting units, the layout of the plurality of light-emitting units is more compact, so that the resolution of the display panel is improved, and the display effect is improved.

Description

Technical Field

[0001] This application relates to the technical field of display devices, and particularly to a display panel, a display device, and a method for manufacturing a display panel. Background Art

[0002] Flat display panels such as organic light emitting diode (OLED) display panels and display panels using light emitting diode (LED) devices have been widely used in various consumer electronic products such as mobile phones, televisions, personal digital assistants, digital cameras, laptop computers, and desktop computers due to their advantages of high image quality, power saving, thin body, and wide application range, and have become the mainstream in display devices. Summary of the Invention

[0003] Embodiments of this application provide a display panel, a display device, and a method for manufacturing a display panel, which can improve the display effect.

[0004] In a first aspect, embodiments of this application provide a display panel, including:

[0005] An array substrate, which includes a substrate and a plurality of pixel circuits disposed on one side of the substrate;

[0006] A plurality of light emitting units, disposed on the side of the array substrate away from the substrate, and each light emitting unit includes a first electrode, a light emitting portion, and a second electrode that are sequentially stacked along a direction away from the substrate;

[0007] Wherein, the orthographic projection of at least one pixel circuit on the substrate is misaligned with the orthographic projection of the first electrode on the substrate, and is coupled to the first electrode.

[0008] In some embodiments, the display panel has a first region and a second region surrounding the periphery of the first region, the light emitting units are located in the first region, and at least some of the pixel circuits are located in the second region;

[0009] Wherein, the pixel circuits located in the second region are coupled to the first electrodes in the first region;

[0010] In some embodiments, along the thickness direction, the area ratio of the second region to the first region is a, and a satisfies: 2 ≤ a ≤ 5;

[0011] In some embodiments, some of the pixel circuits are located in the first region;

[0012] In some embodiments, the first electrode and at least some of the pixel circuits that overlap in the orthographic projection on the substrate are insulated from each other;

[0013] In some embodiments, at least a part of the pixel circuits located in the first region are arranged such that the orthographic projection of the pixel circuits on the substrate at least partially overlaps with the orthographic projection of the coupled first electrodes on the substrate.

[0014] In some embodiments, the light-emitting portions of different light-emitting units are spaced apart, and at least some of the different light-emitting units are configured to emit light of different colors.

[0015] In some embodiments, the arrangement of a plurality of pixel circuits is the same as the arrangement of the corresponding light-emitting units.

[0016] In some embodiments, some of the light-emitting units form repeating pixel units, and some of the pixel circuits form repeating circuit units. The repeating circuit units are configured to drive the light emission of the light-emitting units in the repeating pixel units.

[0017] Wherein, a plurality of repeating pixel units are arranged repetitively along a first direction, and a plurality of repeating circuit units are arranged repetitively along the first direction; and / or, a plurality of repeating pixel units are arranged repetitively along a second direction, and a plurality of repeating circuit units are arranged repetitively along the second direction; the first direction intersects with the second direction.

[0018] The first direction intersects with the second direction.

[0019] In some embodiments, the repeating pixel unit includes a first light-emitting unit, a second light-emitting unit, and a third light-emitting unit that are arranged in sequence along the first direction and have different colors. The repeating circuit unit includes a first pixel circuit, a second pixel circuit, and a third pixel circuit that are arranged in sequence along the first direction. The first pixel circuit is coupled to the first electrode of the first light-emitting unit, the second pixel circuit is coupled to the first electrode of the second light-emitting unit, and the third pixel circuit is coupled to the first electrode of the third light-emitting unit.

[0020] In some embodiments, the array substrate includes a first conductor layer on one side of the substrate and a second conductor layer on the side of the first conductor layer facing away from the substrate. Both the first conductor layer and the second conductor layer are located on the side of the light-emitting unit facing the substrate, and the second conductor layer includes a conduction portion.

[0021] The pixel circuit includes a first transistor. The control terminal of the first transistor is coupled to the light-emission control signal line, and the first pole is located within the first conductor layer and is coupled to the first electrode through the conduction portion.

[0022] In some embodiments, the orthographic projections of a plurality of conduction portions on the substrate are respectively offset from each other.

[0023] In some embodiments, the array substrate includes an insulating layer between the first conductor layer and the second conductor layer. The thickness of the insulating layer is H, and H satisfies: 1μm ≤ H ≤ 3μm.

[0024] In some embodiments, the array substrate includes a third conductor layer located between the substrate and the first conductor layer, and the control terminal of the first transistor is located in the third conductor layer;

[0025] In some embodiments, the array substrate includes a fourth conductor layer and a fifth conductor layer located between the substrate and the third conductor layer, the pixel circuit includes a storage capacitor, and the storage capacitor includes a first electrode located in the fourth conductor layer and a second electrode located in the fifth conductor layer.

[0026] In some embodiments, the array substrate includes an insulating layer located between the first conductor layer and the second conductor layer, the insulating layer is provided with a first via hole, and the conductive portion is connected to the first electrode of the first transistor through the first via hole;

[0027] A plurality of pixel circuits arranged along a first direction together form a circuit row, and in a direction parallel to the first direction and pointing from the center of the first area to the edge of the second area, the distances between the first via holes corresponding to the plurality of pixel circuits in a single circuit row and the center of the first area in the second direction gradually decrease, and the first direction intersects the second direction;

[0028] In some embodiments, a plurality of pixel circuits arranged along the second direction together form a circuit column, and first via holes corresponding to a plurality of pixel circuits in a single circuit column are arranged side by side in the second direction;

[0029] In some embodiments, the pixel circuit has a third edge and a fourth edge opposite to each other in the first direction, and a distance between the third edge and the center of the first region in the first direction is smaller than a distance between the fourth edge and the center of the first region in the first direction;

[0030] The orthographic projection of the first via hole on the substrate is arranged adjacent to the orthographic projection of the third edge of the corresponding pixel circuit on the substrate.

[0031] In some embodiments, the array substrate includes a first portion, a second portion disposed opposite to the first portion, and a bending portion connecting the first portion and the second portion;

[0032] The light-emitting unit is arranged at the first part, the second part is bent to a side of the first part away from the light-emitting unit through the bending portion, and the pixel circuit is at least partially located in the second part;

[0033] In some embodiments, an orthographic projection of at least a portion of the pixel circuit located in the second portion on the substrate overlaps with an orthographic projection of the first electrode on the substrate.

[0034] In some embodiments, the first electrodes of different light-emitting units are arranged at insulated intervals, and the light-emitting parts of at least some of the light-emitting units are connected and arranged as one;

[0035] In some embodiments, the display panel further includes a filter layer on a side of the light-emitting unit facing away from the array substrate. The filter layer includes filter portions of different colors arranged at intervals, and light-shielding portions located between adjacent filter portions;

[0036] Among them, the light-emitting portion is used to emit white light;

[0037] In some embodiments, the orthographic projection of the first electrode on the substrate overlaps with the orthographic projection of the filter portion on the substrate.

[0038] In a second aspect, an embodiment of the present application provides a method for manufacturing a display panel, including:

[0039] Forming a pixel circuit on one side of the substrate;

[0040] Forming a conduction portion on a side of the pixel circuit facing away from the substrate to obtain a first substrate, and the conduction portion is coupled to the pixel circuit;

[0041] Forming a light-emitting unit on the cover plate to obtain a second substrate. The light-emitting unit includes a second electrode, a light-emitting portion, and a first electrode sequentially arranged along a direction away from the cover plate;

[0042] Bonding the first substrate and the second substrate together. The first electrode is coupled to the pixel circuit through the conduction portion. The orthographic projection of at least one pixel circuit on the substrate is misaligned with the orthographic projection of the first electrode on the substrate and is coupled to the first electrode.

[0043] In some embodiments, before the step of forming the light-emitting unit on the cover plate, it further includes:

[0044] Forming a filter layer on the cover plate. The filter layer includes filter portions of different colors arranged at intervals;

[0045] In forming the light-emitting unit on the cover plate, it includes:

[0046] Forming a second electrode layer on a side of the filter layer facing away from the substrate. The second electrode layer includes a plurality of second electrodes connected together;

[0047] Forming a light-emitting layer on a side of the second electrode layer facing away from the cover plate. The light-emitting layer includes a plurality of light-emitting portions connected together;

[0048] Forming a first electrode layer on a side of the light-emitting layer facing away from the cover plate. The first electrode layer includes a plurality of first electrodes arranged at intervals;

[0049] In some embodiments, the orthographic projection of the first electrode on the cover plate overlaps with the orthographic projection of the filter portion on the cover plate.

[0050] In a third aspect, an embodiment of the present application provides a display device, including the display panel in any of the foregoing embodiments, or including the display panel manufactured by the manufacturing method in any of the foregoing embodiments.

[0051] An embodiment of the present application provides a display panel, a display device, and a method for manufacturing a display panel. The orthographic projection of at least one pixel circuit on the substrate is misaligned with the orthographic projection of the first electrode on the substrate and is coupled to the first electrode. That is, the first electrode and the correspondingly coupled pixel circuit are not arranged in a position corresponding manner, but there is a certain projection misalignment on the substrate. On this basis, the position of the first electrode is no longer limited by the position of the corresponding pixel circuit, that is, the position of the light-emitting unit is no longer limited by the position of the corresponding pixel circuit. Further, by reducing the distance between adjacent light-emitting units, the layout of multiple light-emitting units can be made more compact, thereby improving the resolution of the display panel and enhancing the display effect. BRIEF DESCRIPTION OF THE DRAWINGS

[0052] To more clearly illustrate the technical solutions of the embodiments of the present application, the following briefly introduces the drawings required to be used in the embodiments of the present application. For those of ordinary skill in the art, other drawings can also be obtained based on these drawings without creative efforts.

[0053] Figure 1 is a schematic structural diagram of a display panel provided by an embodiment of the present application;

[0054] Figure 2 is a schematic cross-sectional structural diagram of a display panel provided by an embodiment of the present application;

[0055] Figure 3 is a schematic simplified diagram of a pixel circuit in a display panel provided by an embodiment of the present application;

[0056] Figure 4 is a schematic layout structural diagram of light-emitting units in a display panel provided by an embodiment of the present application;

[0057] Figure 5 is a schematic layout structural diagram of pixel circuits in a display panel provided by an embodiment of the present application;

[0058] Figure 6 is a schematic structural diagram of another display panel provided by an embodiment of the present application;

[0059] Figure 7 is a schematic cross-sectional structural diagram of another display panel provided by an embodiment of the present application;

[0060] Figure 8 is a flowchart of a method for manufacturing a display panel provided by an embodiment of the present application;

[0061] Figures 9a to 9d is a schematic process structural diagram of a method for manufacturing a display panel provided by an embodiment of the present application;

[0062] Figure 10 is a flowchart of still another method for manufacturing a display panel provided by an embodiment of the present application;

[0063] Figure 11 is a schematic structural diagram of the process of a method for manufacturing a display panel provided by an embodiment of the present application;

[0064] Figure 12 is a flowchart of a method for manufacturing a display panel provided by an embodiment of the present application;

[0065] Figures 13a to 13c is a schematic structural diagram of the process of a method for manufacturing a display panel provided by an embodiment of the present application;

[0066] Figure 14 is a schematic structural diagram of a display device provided by an embodiment of the present application.

[0067] Marking description:

[0068] 100, display panel; 110, first substrate; 120, second substrate; 200, display device;

[0069] 10, array substrate; 11, substrate; 12, first conductor layer; 13, second conductor layer; 14, insulating layer; 141, first via; 15, third conductor layer; 16, fourth conductor layer; 17, fifth conductor layer;

[0070] 20, pixel circuit; 20a, first pixel circuit; 20b, second pixel circuit; 20c, third pixel circuit; 21, circuit row; 22, circuit column;

[0071] 30, light-emitting unit; 31, first electrode; 32, light-emitting part; 33, second electrode; 30a, first light-emitting unit; 30b, second light-emitting unit; 30c, third light-emitting unit;

[0072] 40, conduction part;

[0073] 50, cover plate;

[0074] 60, light-filtering layer; 61, light-filtering part; 62, light-shielding part;

[0075] B1, first part; B2, second part; B3, bending part;

[0076] C, storage capacitor; C1, first electrode plate; C2, second electrode plate;

[0077] A1, first area; A2, second area;

[0078] J1, first pole;

[0079] Y1. Repeating pixel unit; Y2. Repeating circuit unit;

[0080] O. Center of the first area; E1. First edge; E2. Second edge; E3. Third edge; E4. Fourth edge;

[0081] X. First direction; Y. Second direction; Z. Thickness direction. Detailed implementation manners

[0082] The features and exemplary embodiments of various aspects of the present application will be described in detail below. To make the objectives, technical solutions and advantages of the present application clearer and more understandable, the present application will be further described in detail below with reference to the accompanying drawings and specific embodiments. It should be understood that the specific embodiments described herein are only intended to explain the present application, rather than to limit the present application. For those skilled in the art, the present application can be implemented without some of these specific details. The following description of the embodiments is only intended to provide a better understanding of the present application by showing examples of the present application.

[0083] It should be noted that, in this document, relational terms such as first and second are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or sequence between these entities or operations. Moreover, the term "comprising", "including" or any other variant thereof is intended to cover a non-exclusive inclusion, such that a process, method, article or device comprising a series of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such process, method, article or device. Without further limitation, an element defined by the statement "comprising..." does not exclude the existence of additional identical elements in the process, method, article or device comprising the element.

[0084] To meet market demands, more and more types of display devices have emerged. With the emergence and development of VR products, high resolution has become one of the main core parameters of existing VR products. VR products on the market usually need to meet a resolution of over 1500 PPI to obtain a better user experience. However, products using organic light-emitting diodes as light-emitting elements are limited by the driving method and circuit structure and often cannot meet the requirements of high-resolution devices.

[0085] Regarding the above problems, in the first aspect, please refer to Figures 1 to 3, an embodiment of the present application provides a display panel 100. The display panel 100 includes an array substrate 10 and a plurality of light-emitting units 30. The array substrate 10 includes a substrate 11 and a plurality of pixel circuits 20 disposed on one side of the substrate 11. The light-emitting units 30 are disposed on the side of the array substrate 10 away from the substrate 11. The light-emitting unit 30 includes a first electrode 31, a light-emitting portion 32, and a second electrode 33 that are sequentially stacked in a direction away from the substrate 11. Among them, the orthographic projection of at least one pixel circuit 20 on the substrate 11 is misaligned with the orthographic projection of the first electrode 31 on the substrate 11 and is coupled to the first electrode 31.

[0086] The array substrate 10 is a structure in the display panel 100 for arranging circuits and electronic components. The array substrate 10 may include a plurality of film layer structures stacked inside. The substrate 11 is a film layer structure in the array substrate 10 for supporting and carrying. The "orthographic projection on the substrate 11" mentioned in the embodiment of the present application refers to: the projection morphology of the structure falling on the substrate 11 in the thickness direction Z of the array substrate 10, which does not limit the shape of the substrate 11. The substrate 11 may be a rigid structure or a flexible structure. The surface of the substrate 11 in the thickness direction Z may be a flat structure or may be locally bent.

[0087] Regarding the specific film layer composition of the array substrate 10, the embodiment of the present application does not make any restrictions. Optionally, the array substrate 10 may include a plurality of conductor layers, semiconductor layers disposed on the same side of the substrate 11 and stacked, and insulating layers located between adjacent conductor layers or semiconductor layers.

[0088] The light-emitting unit 30 is a structure in the display panel 100 for performing a light-emitting function. The light-emitting unit 30 includes, but is not limited to, a red light-emitting unit 30 for emitting red light, a green light-emitting unit 30 for emitting green light, and a blue light-emitting unit 30 for emitting blue light. Each light-emitting unit 30 includes a first electrode 31, a second electrode 33, and a light-emitting portion 32 located between the first electrode 31 and the second electrode 33. Among them, the light-emitting portion 32 may include a plurality of film layers stacked. Exemplarily, the light-emitting portion 32 may include a hole injection layer (Hole Inject Layer, HIL), a hole transport layer (Hole Transport Layer, HTL), a light-emitting layer, and an electron transport layer (Electron Transport Layer, ETL), an electron injection layer (Electron Inject Layer, EIL), and other film layers stacked. In some other embodiments, the light-emitting portion 32 in a single light-emitting unit 30 may include a plurality of stacked light-emitting layers, and a charge generation layer is provided between adjacent light-emitting layers.

[0089] The first electrode 31 is located on the side of the light-emitting part 32 facing the array substrate 10, and the second electrode 33 is located on the side of the light-emitting part 32 facing away from the array substrate 10. The light-emitting unit 30 can control whether the light-emitting part 32 emits light or not by means of the first electrode 31 and the second electrode 33. Exemplarily, the first electrode 31 is an anode and the second electrode 33 is a cathode.

[0090] In some alternative embodiments, the second electrodes 33 of different light-emitting units 30 are integrally connected to form a planar structure covering multiple light-emitting units 30. Further, the array substrate 10 includes a second power signal line, and the second power signal line is coupled to the second electrode 33 by means such as and transmits a constant-voltage PVEE signal to the second electrode 33.

[0091] The array substrate 10 includes a plurality of pixel circuits 20, and different pixel circuits 20 are respectively coupled to the first electrodes 31 in different light-emitting units 30. That is, a single pixel circuit 20 can realize the driving and adjustment of the internal voltage of a specific first electrode 31 to control whether a specific light-emitting unit 30 emits light or not. Among them, one pixel circuit 20 can be coupled to only the first electrode 31 in one light-emitting unit 30 to realize a one-to-one driving mode. Or one pixel circuit 20 can also be simultaneously coupled to the first electrodes 31 in a plurality of light-emitting units 30 to realize a one-to-many driving mode. The embodiments of the present application do not limit this.

[0092] The pixel circuit 20 can have various forms. For example, the pixel circuit 20 can be a 2T1C structure, that is, the pixel circuit 20 includes two transistors and a storage capacitor C. Or the pixel circuit 20 can also be a 7T1C structure, that is, the pixel circuit 20 includes seven transistors and a storage capacitor C. Or the pixel circuit 20 can also be an 8T1C structure, that is, the pixel circuit 20 includes eight transistors and a storage capacitor C.

[0093] However, the pixel circuit 20 with 2T1C often has many problems. Specifically, due to the circuit design, a part of the signal voltage is applied to the organic light-emitting diode instead of all being applied to the control terminal J3 of the driving transistor. This results in the need for a higher signal voltage to obtain the same pixel current. Secondly, the voltage on the driving transistor is affected by the properties of the organic light-emitting diode and may change with different organic light-emitting diode devices in the manufacturing process or may also change with the increase in the working time of the organic light-emitting diode. Under the combined action of these factors, the performance and stability of the circuit are affected, which is not conducive to the long-term display use of the display panel 100.

[0094] In view of this, in order for the display panel 100 to have excellent display effects and a long service life, the pixel circuit 20 often adopts complex circuit structures such as 7T1C or 8T1C structures. The increase in circuit complexity often leads to an increase in the size of the circuit. That is, as the complexity of the corresponding structure of the pixel circuit 20 increases, the projected size of the pixel circuit 20 in the thickness direction Z of the display panel 100 also increases.

[0095] In the related art, the pixel circuit 20 and the corresponding first electrode 31 are often correspondingly arranged. That is, the projection of the first electrode 31 in the thickness direction Z only overlaps with the orthographic projection of the pixel circuit 20 to which it is coupled on the substrate 11, and does not overlap with the orthographic projection of other pixel circuits 20 on the substrate 11. Usually, the position of the first electrode 31 often affects the position of the corresponding light-emitting unit 30. On this basis, combining the above content, it can be seen that in the related art, the position of the light-emitting unit 30 is affected by the corresponding pixel circuit 20. Due to the complexity of the structure of the pixel circuit 20 itself, it is difficult to adjust and reduce the size of the pixel circuit 20 itself, resulting in difficulty in adjusting the relative distance between different light-emitting units 30, and thus it is difficult to meet the display requirements of high resolution. Moreover, the wiring structure in some film layers in the array substrate 10 needs to be designed with size matching for the first electrode 31 and the light-emitting part 32, resulting in the wiring layout in the array substrate 10 being restricted by space.

[0096] In view of this, the embodiment of the present application adjusts the relationship between the first electrode 31 and the pixel circuit 20, which helps to meet the display requirements of high resolution. Specifically, the orthographic projection of at least one pixel circuit 20 on the substrate 11 is misaligned with the orthographic projection of the first electrode 31 on the substrate 11 and is coupled to the first electrode 31. That is, the first electrode 31 and the corresponding pixel circuit 20 with which it is coupled are not arranged in a corresponding position, but there is a certain projection misalignment on the substrate 11.

[0097] On this basis, the position of the first electrode 31 is no longer limited by the position of the corresponding pixel circuit 20, that is, the position of the light-emitting unit 30 is no longer limited by the position of the corresponding pixel circuit 20. Further, by reducing the distance between adjacent light-emitting units 30, the layout of multiple light-emitting units 30 can be made more compact, thereby improving the resolution of the display panel 100 and the display effect.

[0098] In addition, since the pixel circuit 20 and the corresponding coupled first electrode 31 are not arranged in a position-matched manner, the orthographic projection size of the pixel circuit 20 on the substrate 11 may not be limited by the orthographic projection size of the first electrode 31 on the substrate 11. Therefore, the wiring structure in some film layers of the array substrate 10 does not need to be designed to match the size of the first electrode 31 and the light-emitting portion 32, so the embodiment of the present application can also improve the flexibility of the wiring layout in the array substrate 10.

[0099] It should be noted that the embodiment of the present application does not limit the coupling method between the first electrode 31 and the pixel circuit 20. Optionally, a conductive portion 40 may be provided in the array substrate 10, and the conductive portion 40 may extend between different regions of the array substrate 10 and be coupled to the pixel circuit 20 and the first electrode 31 respectively in a manner such that the pixel circuit 20 controls the first electrode 31.

[0100] In addition, the pixel circuit 20 provided in the embodiment of the present application may adopt a 7T1C structure, or may also adopt an 8T1C structure, etc., and the embodiment of the present application is not limited to this. Figure 3 The case where the pixel circuit 20 adopts 7T1C is shown in FIG. The display panel 100 provided in the embodiment of the present application can be applied to VR devices, or can also be applied to electronic devices such as display devices on vehicles and display devices on airplanes that have high requirements for resolution and have a large space for accommodating the pixel circuit 20.

[0101] In addition to the above film structure, the display panel 100 may also include other film structures. The present application embodiment does not limit the specific film composition of the display panel 100. Optionally, the display panel 100 further includes a cover plate 50 located on the side of the light emitting unit 30 away from the array substrate 10.

[0102] In some embodiments, see Figures 1 to 5 The display panel 100 has a first area A1 and a second area A2 surrounding the first area A1. The light emitting unit 30 is located in the first area A1, and at least part of the pixel circuit 20 is located in the second area A2. The pixel circuit 20 located in the second area A2 is coupled to the first electrode 31 in the first area A1.

[0103] The display panel 100 has at least a first area A1 and a second area A2. The first area A1 is an area in the display panel 100 for realizing the display function, and the second area A2 is a frame area located around the first area A1. The light-emitting unit 30 is only located in the first area A1, and there is no light-emitting unit 30 in the second area A2.

[0104] The embodiments of the present application do not limit the specific shapes and dimensional relationships of the first region A1 and the second region A2. Optionally, the shapes of the first region A1 and the second region A2 are adapted to each other. For example, if the first region A1 is a circular region, the second region A2 can be an annular region surrounding the circular region. If the first region A1 is a square region, the second region A2 can be a square annular region surrounding the square region.

[0105] In the embodiments of the present application, by coupling the pixel circuit 20 located in the second region A2 to the first electrode 31 in the first region A1, on the basis of satisfying the driving control of the pixel circuit 20 over the light-emitting unit 30, a staggered distribution of the corresponding pixel circuit 20 and the light-emitting unit 30 is realized, so that the light-emitting unit 30 can be only integrated in the first region A1, thereby reducing the pitch between adjacent light-emitting units 30, reducing the area of the region in the display panel 100 for realizing the light-emitting function, and improving the display resolution of the display panel 100. In addition, only one signal trace for providing the corresponding signal of the first electrode 31 and a wiring change hole corresponding to the signal trace need to be provided on one side of a single light-emitting unit 30 facing the substrate 11. Therefore, this design also helps to simplify the wiring layout on the side of the light-emitting unit 30 facing the substrate 11.

[0106] In some embodiments, along the thickness direction Z, the area ratio of the second region A2 to the first region A1 is a, and a satisfies: 2 ≤ a ≤ 5.

[0107] The display panel 100 provided by the embodiments of the present application can be applicable to display devices such as VR devices that have little requirement for the border size but have high requirements for the display resolution. Among them, limited by factors such as the size and quantity of the pixel circuit 20, the ratio of the projected area of the second region A2 to the projected area of the first region A1 is not less than 2. And considering the influence of factors such as the manufacturing difficulty, the distance between the light-emitting units 30 should not be too small. Therefore, by making the ratio of the projected area of the second region A2 to the projected area of the first region A1 not greater than 5, it helps to reduce the manufacturing difficulty of the display panel 100 and improve the practicability.

[0108] In some embodiments, some of the pixel circuits 20 are located in the first region A1, that is, multiple pixel circuits 20 are distributed in the first region A1 and the second region A2 respectively, which helps to reduce the size of the second region A2.

[0109] In some embodiments, the first electrode 31 and at least part of the pixel circuits 20 that overlap in the orthographic projection on the substrate 11 are insulated from each other.

[0110] For the first electrode 31 and the pixel circuit 20, a first electrode 31 may overlap with only one pixel circuit 20 in the orthographic projection on the substrate 11, or a first electrode 31 may also overlap with multiple pixel circuits 20 in the orthographic projection on the substrate 11 at the same time. When a first electrode 31 overlaps with multiple pixel circuits 20 in the orthographic projection on the substrate 11 at the same time, the first electrode 31 and the corresponding pixel circuit 20 coupled and arranged may be arranged in an overlapping manner, as long as it satisfies that the first electrode 31 overlaps with at least one pixel circuit 20 arranged in insulation. Optionally, at least part of the pixel circuits 20 located in the first region A1 overlap with the orthographic projection of the coupled first electrode 31 on the substrate 11 at least partially.

[0111] In some embodiments, as Figure 2 shown, the light-emitting portions 32 of different light-emitting units 30 are arranged at intervals, and at least part of different light-emitting units 30 are used to emit light of different colors.

[0112] In the embodiments of the present application, in order to satisfy the multi-color display effect of the display panel 100, the light-emitting portions 32 of different light-emitting units 30 are arranged at intervals from each other to achieve independent light emission between different light-emitting units 30. At the same time, at least part of different light-emitting units 30 are also arranged to emit light of different colors, so as to meet the display needs of different colors and improve the display effect of the display panel 100. Optionally, the multiple light-emitting units 30 include a red light-emitting unit for emitting red light, a green light-emitting unit for emitting green light, and a blue light-emitting unit for emitting blue light.

[0113] In some embodiments, the arrangement manner of the multiple pixel circuits 20 is the same as the arrangement manner of the corresponding light-emitting units 30.

[0114] Combined with the foregoing content, there is a projection misalignment between the pixel circuit 20 and the first electrode 31 in the corresponding light-emitting unit 30. In order to meet the coupling requirement between the two, the display panel 100 needs to be provided with a conduction portion 40 coupled to the first electrode 31 and the pixel circuit 20 respectively, so as to realize the signal transmission between the pixel circuit 20 and the first electrode 31 by means of the conduction portion 40. The present application embodiments do not limit the specific film layer position of the conduction portion 40.

[0115] On this basis, due to the position mismatch between the pixel circuit 20 and the first electrode 31 in the corresponding light-emitting unit 30, the conduction portion 40 needs to extend in different regions of the display panel 100. Further, if the distance between the position where the pixel circuit 20 is located and the position where the corresponding first electrode 31 is located is too large, it will cause the extension length of the conduction portion 40 to be too long, and signal voltage drop is likely to occur, affecting the actual display effect of the display panel 100.

[0116] In view of this, in the embodiments of the present application, the arrangement mode of the pixel circuits 20 and the arrangement mode of the light-emitting units 30 are adjusted, so that the arrangement modes of the multiple pixel circuits 20 are the same as those of the corresponding light-emitting units 30. For example, in combination with Figure 1 Taking two light-emitting units 30 and their corresponding two pixel circuits 20 as an example, if one light-emitting unit 30 is adjacent to another light-emitting unit 30 in the first direction X, the two pixel circuits 20 corresponding to the two light-emitting units 30 are also adjacent to each other in the first direction X, and the arrangement order in the first direction X is the same as that of the two light-emitting units 30.

[0117] In the embodiments of the present application, by setting the arrangement modes of the multiple pixel circuits 20 to be the same as those of the corresponding light-emitting units 30, it helps to reduce the layout difficulty of the conduction part 40 for coupling the pixel circuits 20 and the first electrode 31, and helps to reduce the extension length of the conduction part 40, reduce the situation that the extension length of a single conduction part 40 is too long, thereby reducing the signal voltage drop and improving the reliability of signal transmission, which is beneficial to the display effect of the display panel 100.

[0118] In some embodiments, such as Figure 1 , Figure 4 and Figure 5 as shown, some light-emitting units 30 form a repeated pixel unit Y1, and some pixel circuits 20 form a repeated circuit unit Y2. The repeated circuit unit Y2 is used to drive the light emission of each light-emitting unit 30 in the repeated pixel unit Y1. Among them, multiple repeated pixel units Y1 are arranged repeatedly along the first direction X, and multiple repeated circuit units Y2 are arranged repeatedly along the first direction X; and / or, multiple repeated pixel units Y1 are arranged repeatedly along the second direction Y, and multiple repeated circuit units Y2 are arranged repeatedly along the second direction Y.

[0119] The repeated pixel unit Y1 is the smallest repeated unit composed of multiple adjacent light-emitting units 30 in the pixel arrangement structure, and the repeated circuit unit Y2 is the smallest repeated unit composed of multiple adjacent pixel circuits 20 in the circuit arrangement structure. Among them, multiple adjacent pixel circuits 20 located in a single repeated circuit unit Y2 are used to control the light emission of multiple adjacent light-emitting units 30 located in a single repeated pixel unit Y1.

[0120] Furthermore, in the embodiments of the present application, the arrangement modes of the multiple repeated pixel units Y1 and the multiple repeated circuit units Y2 are set to be the same, which helps to reduce the layout difficulty of the conduction part 40 for coupling the pixel circuits 20 and the first electrode 31, and helps to reduce the extension length of the conduction part 40, reduce the situation that the extension length of a single conduction part 40 is too long, thereby reducing the signal voltage drop and improving the reliability of signal transmission, which is beneficial to the display effect of the display panel 100.

[0121] In some embodiments, the repeating pixel unit Y1 includes a first light-emitting unit 30a, a second light-emitting unit 30b, and a third light-emitting unit 30c that are arranged in sequence along the first direction X and have different colors. The repeating circuit unit Y2 includes a first pixel circuit 20a, a second pixel circuit 20b, and a third pixel circuit 20c that are arranged in sequence along the first direction X. The first pixel circuit 20a is coupled to the first electrode 31 of the first light-emitting unit 30a, the second pixel circuit 20b is coupled to the first electrode 31 of the second light-emitting unit 30b, and the third pixel circuit 20c is coupled to the first electrode 31 of the third light-emitting unit 30c.

[0122] The first light-emitting unit 30a, the second light-emitting unit 30b, and the third light-emitting unit 30c are arranged in sequence along the first direction X and together form the repeating pixel unit Y1. Regarding the specific light-emitting colors of the first light-emitting unit 30a, the second light-emitting unit 30b, and the third light-emitting unit 30c, the embodiments of the present application do not make any restrictions. Optionally, the first light-emitting unit 30a, the second light-emitting unit 30b, and the third light-emitting unit 30c are respectively configured to emit red light, blue light, and green light.

[0123] The first pixel circuit 20a, the second pixel circuit 20b, and the third pixel circuit 20c are circuit structures for forming the repeating circuit unit Y2 and are respectively configured to drive the first light-emitting unit 30a, the second light-emitting unit 30b, and the third light-emitting unit 30c in the same repeating pixel unit Y1. Among them, the layout directions and arrangement orders of the first pixel circuit 20a, the second pixel circuit 20b, and the third pixel circuit 20c are consistent with the layout directions and arrangement orders of the corresponding first light-emitting unit 30a, the second light-emitting unit 30b, and the third light-emitting unit 30c. This helps to reduce the extension length of the conduction part 40, reduce the situation where the extension length of a single conduction part 40 is too long, thereby reducing the signal voltage drop and improving the reliability of signal transmission, which is beneficial to the display effect of the display panel 100.

[0124] It should be noted that the embodiments of the present application only illustrate an arrangement manner of multiple light-emitting units 30 in a repeating pixel unit Y1. However, according to different actual needs, multiple light-emitting units 30 in the repeating pixel unit Y1 can also adopt other arrangement manners. On this basis, the arrangement manner of multiple pixel circuits 20 in the repeating circuit unit Y2 can also be consistent with the arrangement manner of multiple light-emitting units 30 in the corresponding repeating pixel unit Y1. Regarding the arrangement manner of multiple light-emitting units 30 in the repeating pixel unit Y1, the embodiments of the present application do not impose too many restrictions.

[0125] In some embodiments, such as Figure 2As shown in the figure, the array substrate 10 includes a first conductor layer 12 on one side of the substrate 11 and a second conductor layer 13 on the side of the first conductor layer 12 away from the substrate 11. Both the first conductor layer 12 and the second conductor layer 13 are on the side of the light-emitting unit 30 facing the substrate 11. The second conductor layer 13 includes a conduction portion 40; the pixel circuit 20 includes a first transistor T6. The control terminal of the first transistor T6 is coupled to the light-emitting control signal line, and the first pole J1 is located in the first conductor layer 12 and is coupled to the first electrode 31 through the conduction portion 40.

[0126] The substrate 11 is a film layer structure for supporting and carrying. The first conductor layer 12 and the second conductor layer 13 are sequentially arranged in a direction away from the substrate 11. Both the first conductor layer 12 and the second conductor layer 13 are film layer structures for arranging conductors.

[0127] The pixel circuit 20 includes a plurality of transistors. Each transistor has a control terminal, a first pole, and a second pole. The control terminal is used to control the conduction or non-conduction between the first pole and the second pole. Exemplarily, the control terminal is the gate of the transistor, and the first pole and the second pole are the source and drain of the transistor respectively.

[0128] The first transistor T6 is one of the plurality of transistors in the pixel circuit 20. Taking the pixel circuit 20 as a 7T1C structure as an example, the control terminal of the first transistor is coupled to the light-emitting control signal line. The light-emitting control signal line is used to transmit the light-emitting control signal EM. The first pole of the first transistor T6 is coupled to the first electrode 31, and the second pole of the first transistor T6 is coupled to the first pole of the transistor T1.

[0129] The first pole in the first transistor T6 is located in the first conductor layer 12. Considering that the first pole in the first transistor T6 and the corresponding first electrode 31 are not correspondingly arranged in the orthographic projection on the substrate 11, but are misaligned. Therefore, in order to meet the signal transmission requirement between the first pole of the first transistor T6 and the first electrode 31, the embodiment of the present application is provided with a second conductor layer 13, and a conduction portion 40 is provided in the second conductor layer 13. The conduction portion 40 can extend from the position where the first pole of the first transistor is located to the position where the first electrode 31 is located, and is coupled to the first pole of the first transistor and the first electrode 31 by means of via connection or the like, so as to meet the signal transmission requirement between the first pole of the first transistor T6 and the first electrode 31. In addition, combined with Figure 2 It can be seen that this design helps to simplify the wiring layout at the corresponding position of the light-emitting unit 30 and facing the substrate side, and reduces the design and manufacturing difficulty of the array substrate 10.

[0130] The embodiments of the present application do not limit the relative positional relationship of the plurality of conductive portions 40 coupled to the plurality of first electrodes 31. Optionally, the orthographic projections of the plurality of conductive portions 40 on the substrate 11 are respectively misaligned with each other, which can meet the requirement of the same layer of the plurality of conductive portions 40, reduce the risk of signal interference between different conductive portions 40, and improve the display reliability of the display panel 100.

[0131] In some embodiments, the array substrate 10 includes an insulating layer 14 located between the first conductor layer 12 and the second conductor layer 13, and the thickness of the insulating layer 14 is H, where H satisfies: 1μm ≤ H ≤ 3μm.

[0132] Considering that the conductive portion 40 needs to extend in different regions of the display panel 100, this may cause the orthographic projection of a single conductive portion 40 to overlap with the first pole or the second pole J2 of the first transistor in the plurality of pixel circuits 20. On this basis, in order to reduce the influence of the conductive portion 40 on the signals transmitted in the first pole and the second pole J2 of different first transistors, the embodiments of the present application thicken the insulating layer 14 between the first conductor layer 12 and the second conductor layer 13, so that the thickness H is not less than 1μm, improving the reliability of the signals transmitted in the first conductor layer 12 and the second conductor layer 13 respectively. At the same time, the thickness H is also set to be not greater than 3μm, reducing the risk of the overall thickness of the display panel 100 being too large and improving the practicability.

[0133] The embodiments of the present application do not limit the composition of other film layers in the array substrate 10. Optionally, the array substrate 10 includes a third conductor layer 15 located between the substrate 11 and the first conductor layer 12, and the control end of the first transistor is located in the third conductor layer 15.

[0134] Further, in some embodiments, as Figure 2 shown, the array substrate 10 includes a fourth conductor layer 16 and a fifth conductor layer 17 located between the substrate 11 and the third conductor layer 15, and the pixel circuit 20 includes a storage capacitor C, and the storage capacitor C includes a first electrode plate C1 located in the fourth conductor layer 16 and a second electrode plate C2 located in the fifth conductor layer 17. Among them, for the transistor T3, the control end of the transistor T3 can be located in the fourth conductor layer 16.

[0135] In some embodiments, as Figures 1 to 5As shown, the array substrate 10 includes an insulating layer 14 located between a first conductor layer 12 and a second conductor layer 13. The insulating layer 14 is provided with a first via 141, and the conduction part 40 is connected to a first pole of a first transistor through the first via 141. A plurality of pixel circuits 20 arranged along a first direction X together form a circuit row 21. In a direction parallel to the first direction X and pointing from the center O of the first region A1 to the edge of the second region A2, the distance L between the first vias 141 corresponding to the plurality of pixel circuits 20 in a single circuit row 21 and the center O of the first region A1 in a second direction Y gradually decreases, and the first direction X intersects with the second direction Y.

[0136] The first via 141 is a hole structure penetrating the insulating layer 14 along the thickness direction Z. There are a plurality of first vias 141, and different first vias 141 are used to realize the coupling between different pixel circuits 20 and the corresponding conduction parts 40. Among them, the position where the first via 141 is located often determines the position of one end of the corresponding conduction part 40.

[0137] A plurality of pixel circuits 20 arranged along the first direction X together form a circuit row 21, and a plurality of circuit rows 21 are arranged along the second direction Y. A plurality of light-emitting units 30 arranged along the first direction X together form a pixel row, and a plurality of pixel rows are arranged along the second direction Y. Optionally, the plurality of pixel circuits 20 in a single circuit row 21 can be used to control whether the plurality of light-emitting units 30 in a single pixel row emit light or not, and the arrangement order of the plurality of pixel circuits 20 in a single circuit row 21 is the same as the arrangement order of the plurality of light-emitting units 30 in a single pixel row.

[0138] In the embodiment of the present application, the relative positions of the first vias 141 corresponding to different pixel circuits 20 are adjusted, so that in a direction parallel to the first direction X and pointing from the center O of the first region A1 to the edge of the second region A2, the distance L between the first vias 141 corresponding to the plurality of pixel circuits 20 in a single circuit row 21 and the center O of the first region A1 in the second direction Y gradually decreases. Specifically, combined with Figure 1 it, the second region A2 has opposite first edge E1 and second edge E2 in the first direction X. The direction parallel to the first direction X and pointing from the center O of the first region A1 to the edge of the second region A2 can be the direction from the center O of the first region A1 to the first edge E1, or the direction from the center O of the first region A1 to the second edge E2.

[0139] Taking the direction from the center O of the first region A1 to the first edge E1 as an example, for the first vias 141 that are farther away from the center O of the first region A1 in the first direction X, the distance L between them and the center O of the first region A1 in the second direction Y is smaller. With this design, the orthographic projections of different conductive parts 40 on the substrate 11 will not overlap, thereby improving the reliability of signal transmission corresponding to each conductive part 40. At the same time, this also helps to reduce the difference in the extension lengths corresponding to different conductive parts 40, thereby reducing the difference in voltage drops corresponding to different conductive parts 40 and improving the reliability of signal transmission.

[0140] In some embodiments, as Figure 1 and Figure 5 shown, a plurality of pixel circuits 20 arranged along the second direction Y together form a circuit column 22, and the first vias 141 corresponding to the plurality of pixel circuits 20 located in a single circuit column 22 are arranged in the second direction Y.

[0141] A plurality of pixel circuits 20 arranged along the second direction Y together form a circuit column 22, and a plurality of circuit columns 22 are arranged along the first direction X. A plurality of light-emitting units 30 arranged along the second direction Y together form a pixel column, and a plurality of pixel columns are arranged along the first direction X. Optionally, the plurality of pixel circuits 20 in a single circuit column 22 can be used to control whether the plurality of light-emitting units 30 in a single pixel column emit light or not, and the arrangement order of the plurality of pixel circuits 20 in a single circuit column 22 is the same as the arrangement order of the plurality of light-emitting units 30 in a single pixel column.

[0142] In the embodiments of the present application, by arranging the first vias 141 corresponding to the plurality of pixel circuits 20 in a single circuit column 22 side by side in the second direction Y, the arrangement mode of the plurality of conductive parts 40 corresponding to a single circuit column 22 is made more unified, thereby reducing the layout difficulty corresponding to the plurality of conductive parts 40.

[0143] In some embodiments, the pixel circuit 20 has opposite third edge E3 and fourth edge E4 in the first direction X, and the distance between the third edge E3 and the center O of the first region A1 in the first direction X is less than the distance between the fourth edge E4 and the center O of the first region A1 in the first direction X. Among them, the orthographic projection of the first via 141 on the substrate 11 is adjacently arranged with the orthographic projection of the corresponding third edge E3 of the pixel circuit 20 on the substrate 11.

[0144] The pixel circuit 20 has two opposite edges in the first direction X, wherein the third edge E3 is an edge closer to the center O of the first area A1 than the fourth edge E4 in the first direction X. The projection of the first via 141 is adjacent to the projection of the third edge E3 of the corresponding pixel circuit 20, wherein the “adjacent arrangement” mentioned here means that the projection of the first via 141 is close to the projection of the third edge E3 of the corresponding pixel circuit 20 in the first direction X, and the projection of the first via 141 may overlap with the projection of the third edge E3, or may not overlap, and the embodiment of the present application does not limit this.

[0145] In the embodiment of the present application, by arranging the projection of the first via hole 141 adjacent to the projection of the third edge E3 of the corresponding pixel circuit 20, it is helpful to reduce the corresponding extension length of the conductive part 40, thereby reducing the signal voltage drop, improving the reliability of signal transmission, and further improving the display effect of the display panel 100.

[0146] In some embodiments, see Figure 6 The array substrate 10 includes a first portion B1, a second portion B2 arranged opposite to the first portion B1, and a bending portion B3 connecting the first portion B1 and the second portion B2. The light-emitting unit 30 is arranged at the first portion B1, and the second portion B2 is bent to a side of the first portion B1 away from the light-emitting unit 30 through the bending portion B3. The pixel circuit 20 is at least partially located in the second portion B2.

[0147] The array substrate 10 provided in the embodiment of the present application is a flexible structure, which includes a first portion B1, a second portion B2 and a bending portion B3. The bending portion B3 can be bent and deformed to bend the second portion B2 to the back of the first portion B1, so that the first portion B1 and the second portion B2 are arranged opposite to each other in the thickness direction Z. There can be a variety of positions and connection relationships between the first portion B1 and the second portion B2. For example, the second portion B2 can be connected to only one side or both sides of the first portion B1 along the first direction X through the bending portion B3, or the second portion B2 can also be connected to only one side or both sides of the first portion B1 along the second direction Y through the bending portion B3, or the second portion B2 can also be partially connected to one side or both sides of the first portion B1 along the first direction X through the bending portion B3, and partially connected to one side or both sides of the first portion B1 along the second direction Y through the bending portion B3.

[0148] The light emitting unit 30 is only disposed in the first portion B1, and there is no light emitting unit 30 in the second portion B2 and the bending portion B3, and a plurality of pixel circuits 20 can be disposed in the first portion B1, the second portion B2 and the bending portion B3 at the same time. Figure 1On the basis of the structure shown, it is formed by bending part of the structure in the second area A2 to the back side of the first area A1.

[0149] In the embodiment of the present application, by bending the second part B2 to the side of the first part B1 away from the light-emitting unit 30, it helps to reduce the projection size of the border area corresponding to the display panel 100 in the thickness direction Z. This can be used to allow the display panel 100 to have a larger size in the thickness direction Z, while having certain restrictions on the size of the display panel 100 perpendicular to the thickness direction Z. This can meet the use needs of the display panel 100 in more scenarios and has strong practicality.

[0150] In some optional embodiments, the orthographic projection of at least part of the pixel circuit 20 located in the second portion B2 on the substrate 11 overlaps with the orthographic projection of the first electrode 31 on the substrate 11. The pixel circuit 20 and the first electrode 31 whose orthographic projections overlap may be the pixel circuit 20 and the first electrode 31 that are coupled to each other, or the pixel circuit 20 and the first electrode 31 that are insulated from each other, which is not limited in the embodiment of the present application.

[0151] In some embodiments, see Figure 7 The first electrodes 31 of different light-emitting units 30 are arranged with insulation intervals, and the light-emitting parts 32 of at least some of the light-emitting units 30 are connected and arranged as a whole.

[0152] The size of the light-emitting area corresponding to the light-emitting unit 30 is usually determined by the size of the contact area between the light-emitting portion 32 and the first electrode 31. Specifically, the light-emitting unit 30 includes a first electrode 31, a light-emitting portion 32 and a second electrode 33 which are stacked. Under a certain voltage drive, electrons and holes are respectively injected from the second electrode 33 and the first electrode 31 into the electron transport layer and the hole transport layer in the light-emitting portion 32. The electrons and holes respectively migrate through the electron transport layer and the hole transport layer to the light-emitting layer in the light-emitting portion 32, and meet in the light-emitting layer to form excitons and excite the light-emitting molecules to realize the display function.

[0153] On this basis, the light-emitting portion 32 usually only emits light in the area corresponding to the contact between the first electrode 31 and the second electrode 33, and the other areas do not play a light-emitting function. Furthermore, the second electrode 33 is often in a planar structure and covers the light-emitting portions 32 of multiple light-emitting units 30 at the same time, while the first electrode 31 is often in a block structure and the first electrodes 31 corresponding to different light-emitting units 30 are insulated and spaced apart from each other. Therefore, combined with the above content, it can be seen that the size of the light-emitting area corresponding to the light-emitting unit 30 is usually determined by the size of the contact area between the light-emitting portion 32 and the first electrode 31.

[0154] In the embodiments of the present application, the light-emitting units 30 and the corresponding pixel circuits 20 may be arranged in a staggered manner, thereby reducing the distance between adjacent light-emitting units 30 and improving the display resolution of the display panel 100. Further, considering that the distance between adjacent light-emitting units 30 is small, and the light-emitting portion 32 of the light-emitting unit 30 does not completely need to be set to match the size of the first electrode 31, at least part of the light-emitting portions 32 of the light-emitting units 30 that emit the same color light and are adjacent to each other may be integrally connected, thereby forming a larger light-emitting module, which helps to reduce the manufacturing difficulty of the corresponding light-emitting portions 32 of different light-emitting units 30 and has strong practicability.

[0155] In some embodiments, the display panel 100 further includes a color filter layer 60 on the side of the light-emitting unit 30 away from the array substrate 10. The color filter layer 60 includes spaced-apart color filter portions 61 of different colors and light-blocking portions 62 between adjacent color filter portions 61. Among them, the light-emitting portion 32 is used to emit white light.

[0156] The color filter portion 61 is used to selectively transmit light of different wavelengths while blocking the remaining light waves to allow light of a specific color to exit the display panel 100. In the embodiments of the present application, the presence of multiple color filter portions 61 of different colors can meet the color requirements of the display panel 100. On this basis, the light-emitting portions 32 of each light-emitting unit 30 can be set to emit white light, that is, the light-emitting portions 32 of each light-emitting unit 30 emit light of the same color. In this case, the light-emitting portions 32 of all the light-emitting units 30 can be integrally connected, thereby further reducing the manufacturing difficulty of the corresponding light-emitting portions 32 of different light-emitting units 30 and having strong practicability.

[0157] In addition, in addition to the color filter portion 61, the color filter layer 60 further includes a light-blocking portion 62. The light-blocking portion 62 is located between adjacent color filter portions 61. The light-blocking portion 62 can absorb and block part of the light exiting from between adjacent color filter portions 61, thereby improving the display accuracy of the display panel 100.

[0158] In some alternative embodiments, the orthographic projection of the first electrode 31 on the substrate overlaps with the orthographic projection of the color filter portion 61 on the substrate.

[0159] In a second aspect, please refer to Figure 8 and FIG. 9. The embodiments of the present application provide a method for manufacturing a display panel 100. The manufacturing method includes:

[0160] S100: Form a pixel circuit on a substrate.

[0161] Please refer to Figure 9a, in step S100, the pixel circuit 20 is a circuit structure for controlling whether the light-emitting unit 30 emits light or not. To meet the structural requirements of the pixel circuit 20, multiple conductor layers, semiconductor layers, and insulating layers located between adjacent two conductor layers or between adjacent conductor layer and semiconductor layer need to be stacked on one side of the substrate.

[0162] It should be noted that step S100 includes multiple processes. The specific number of processes and steps in step S100 are not limited in the embodiments of the present application. Optionally, a buffer layer can be first formed on one side of the substrate, and then a semiconductor layer and multiple conductor layers are sequentially formed on one side of the buffer layer. Among them, some structures in the semiconductor layer and the conductor layer together form the pixel circuit 20.

[0163] S110: Form a conduction part on the side of the pixel circuit away from the substrate.

[0164] Please refer to Figure 9b , in step S100, after forming the conduction part 40, the first substrate 110 is obtained. The conduction part 40 is coupled to the pixel circuit 20, and after the light-emitting unit 30 is formed subsequently, the conduction part 40 will also be coupled to the first electrode 31 of the light-emitting unit 30, thereby realizing the signal transmission between the pixel circuit 20 and the first electrode 31.

[0165] S120: Form a light-emitting unit on the cover plate.

[0166] Please refer to Figure 9c , in step S120, after forming the light-emitting unit 30, the second substrate 120 is obtained. The first substrate 110 and the second substrate 120 are separately prepared and formed. Different from the related art, the light-emitting unit 30 is not formed on the substrate 11, but on the cover plate 50.

[0167] The light-emitting unit 30 includes a second electrode 33, a light-emitting part 32, and a first electrode 31 which are sequentially stacked in a direction away from the cover plate 50. Among them, multiple film layer structures in the light-emitting unit 30 can be prepared by evaporation process. Specifically, the second electrode 33 can be first formed on the cover plate 50, and the second electrode 33 can be a whole-surface structure. Then the pixel defining layer is formed by coating, and it is patterned through photolithography and development processes to define multiple opening structures. Then the light-emitting part 32 is formed by evaporation in the opening structures, and finally the first electrode 31 corresponding to the light-emitting part 32 is patterned on the side of the light-emitting part 32 away from the cover plate 50.

[0168] S130: Bond the first substrate and the second substrate together.

[0169] Please refer to Figure 9d, in step S130, the first electrode 31 is coupled to the pixel circuit 20 through the conduction portion 40. The orthographic projection of at least one pixel circuit 20 on the substrate 11 is misaligned with the orthographic projection of the first electrode 31 on the substrate 11 and is coupled to the first electrode 31.

[0170] Combined with Figure 1 the structure shown, considering the misalignment between the position where the pixel circuit 20 is located and the position where the light-emitting unit 30 is located, in order to reduce the influence of the position difference between the two on the manufacturing precision of the light-emitting unit 30, in the embodiment of the present application, the light-emitting unit 30 is formed on the cover plate 50 instead of on the substrate 11. Then, by laminating the first substrate 110 and the second substrate 120, the relative fixation between the pixel circuit 20 and the light-emitting unit 30 is realized. This design can improve the evaporation efficiency of the light-emitting unit 30 and the material utilization rate, thereby improving the manufacturing yield of the display panel 100 and reducing the manufacturing difficulty.

[0171] In addition, in the embodiment of the present application, since the light-emitting unit 30 and the first substrate 110 are separately manufactured and due to the existence of the conduction portion 40, on the basis of only adjusting the position of the light-emitting unit 30, the internal structure layout of the first substrate 110 can be unchanged. On this basis, the first substrate 110 can adopt a conventional array substrate, that is, the structure of the existing array substrate is not adjusted, reducing the manufacturing and design difficulty of the display panel 100. At the same time, without changing the wiring layout in the first substrate 110, by changing the layout mode of the light-emitting unit 30 on the cover plate 50, various different display panels 100 can be formed, which has strong flexibility and practicability.

[0172] In some embodiments, please refer to Figure 10 and Figure 11 , before step S120, it further includes:

[0173] S140: Form a filter layer on the cover plate.

[0174] Please refer to Figure 11 , in step S140, the filter layer 60 includes a plurality of filter portions 61 arranged at intervals and of different colors. The filter portions 61 are used to selectively transmit light of different wavelengths and block the remaining light waves at the same time, so that after the display panel 100 is formed, only light of a specific color is allowed to exit the display panel 100 to meet the color requirements of the display panel 100.

[0175] Optionally, the filter layer 60 further includes a light-shielding portion 62 located between adjacent filter portions 61. During the formation of the filter layer 60, a whole-surface light-shielding material is first coated, and then it is patterned by photolithography and development to form the light-shielding portion 62. Then, a filter material is coated and patterned by photolithography and development to form the filter portions 61.

[0176] Please refer to Figure 12 and FIG. 13. In step S120, it includes:

[0177] S121: Form a second electrode layer on the side of the filter layer facing away from the cover plate.

[0178] Please refer to Figure 13a , in step S111, the second electrode layer has a full-surface structure and includes a plurality of second electrodes 33 connected integrally. Exemplarily, the second electrode 33 is a cathode.

[0179] S122: Form a light-emitting layer on the side of the second electrode layer facing away from the cover plate.

[0180] Please refer to Figure 13b , in step S112, the light-emitting layer includes a plurality of light-emitting portions 32 connected integrally. Due to the presence of a plurality of different color filter portions 61, the color requirements of the display panel 100 can be met. Therefore, on this basis, the light-emitting portions 32 of each light-emitting unit 30 can be set to emit light of the same color, and color display can be achieved by means of the filter portion 61. In this case, the light-emitting portions 32 of all the light-emitting units 30 can be connected integrally, so as to improve the light-emitting brightness and service life of the light-emitting unit 30, and further reduce the manufacturing difficulty of the corresponding light-emitting portions 32 of different light-emitting units 30, which has strong practicability. At the same time, this design can also cancel the preparation of the pixel definition layer and improve the resolution of the finally formed display panel 100.

[0181] S123: Form a first electrode layer on the side of the light-emitting layer facing away from the cover plate.

[0182] Please refer to Figure 13c , in step S123, the first electrode layer includes a plurality of first electrodes 31 arranged at intervals. Exemplarily, the first electrode 31 is an anode. Optionally, as Figure 7 shown, the orthographic projection of the first electrode 31 on the cover plate 50 overlaps with the orthographic projection of the filter portion 61 on the cover plate 50.

[0183] In a third aspect, please refer to Figure 14 , an embodiment of the present application provides a display device, which includes the display panel in any of the foregoing embodiments, or includes the display panel prepared by the preparation method in any of the foregoing embodiments.

[0184] It should be noted that the display device provided by the embodiment of the present application has the beneficial effects of the display panel and the preparation method of the display panel in any of the foregoing embodiments. For the specific content, please refer to the description of the beneficial effects of the display panel and the preparation method of the display panel in the foregoing, and the embodiment of the present application will not be repeated.

[0185] Although the embodiments disclosed in the present application are as described above, the content described is only an embodiment adopted for the convenience of understanding the present application and is not intended to limit the present invention. Any person skilled in the art within the technical field to which the present application pertains may make any modifications and changes in the form of implementation and details without departing from the spirit and scope disclosed in the present application. However, the protection scope of the present application shall still be subject to the scope defined by the appended claims.

[0186] As described above, the foregoing is only a specific implementation manner of the present application. Those skilled in the art can clearly understand that for the sake of convenience and brevity of description, the replacement of other connection manners described above and the like can refer to the corresponding processes in the foregoing method embodiments and will not be elaborated herein. It should be understood that the protection scope of the present application is not limited thereto. Any person skilled in the art within the technical scope disclosed in the present application can easily think of various equivalent modifications or replacements, and these modifications or replacements should be covered within the protection scope of the present application.

Claims

1. A display panel, characterized in that: include: An array substrate, the array substrate comprising a substrate and a plurality of pixel circuits arranged on one side of the substrate; A plurality of light-emitting units are arranged on a side of the array substrate away from the substrate, the light-emitting units comprising a first electrode, a light-emitting portion and a second electrode which are sequentially stacked in a direction away from the substrate; Wherein, at least one of the pixel circuits has an orthographic projection on the substrate that is misaligned with an orthographic projection of the first electrode on the substrate, and is coupled to the first electrode.

2. The display panel according to claim 1, characterized in that: The display panel comprises a first area and a second area surrounding the first area, the light emitting unit is located in the first area, and at least part of the pixel circuit is located in the second area; Wherein, the pixel circuit located in the second area is coupled to the first electrode in the first area; Preferably, along the thickness direction, the area ratio of the second region to the first region is a, and a satisfies: 2≤a≤5; Preferably, part of the pixel circuit is located in the first area; Preferably, the first electrode and at least a portion of the pixel circuit whose orthographic projection overlaps the substrate are insulated from each other; Preferably, at least part of the pixel circuits located in the first area are arranged such that the orthographic projection of the substrate at least partially overlaps with the orthographic projection of the coupled first electrode on the substrate; Preferably, the light-emitting parts of different light-emitting units are arranged at intervals, and at least some of the different light-emitting units are used to emit lights of different colors.

3. The display panel according to claim 2, characterized in that: The arrangement of the plurality of pixel circuits is the same as the arrangement of the corresponding light-emitting units; Preferably, part of the light-emitting units constitutes a repeated pixel unit, part of the pixel circuits constitutes a repeated circuit unit, and the repeated circuit unit is used to drive each of the light-emitting units in the repeated pixel unit to emit light; Wherein, a plurality of the repeated pixel units are repeatedly arranged along a first direction, and a plurality of the repeated circuit units are repeatedly arranged along the first direction; and / or a plurality of the repeated pixel units are repeatedly arranged along a second direction, and a plurality of the repeated circuit units are repeatedly arranged along the second direction; The first direction intersects the second direction; Preferably, the repeated pixel unit includes a first light-emitting unit, a second light-emitting unit and a third light-emitting unit which are arranged in sequence along the first direction and have different colors, and the repeated circuit unit includes a first pixel circuit, a second pixel circuit and a third pixel circuit which are arranged in sequence along the first direction, the first pixel circuit is coupled to the first electrode of the first light-emitting unit, the second pixel circuit is coupled to the first electrode of the second light-emitting unit, and the third pixel circuit is coupled to the first electrode of the third light-emitting unit.

4. The display panel according to claim 2, characterized in that: The array substrate comprises a first conductor layer located at one side of the substrate and a second conductor layer located at a side of the first conductor layer away from the substrate, the first conductor layer and the second conductor layer are both located at a side of the light emitting unit facing the substrate, and the second conductor layer comprises a conducting portion; The pixel circuit comprises a first transistor, a control end of the first transistor is coupled to a light emitting control signal line, a first electrode is located in the first conductor layer and is coupled to the first electrode through the conducting portion; Preferably, the orthographic projections of the plurality of conductive parts on the substrate are respectively staggered with each other; Preferably, the array substrate comprises an insulating layer between the first conductor layer and the second conductor layer, the thickness of the insulating layer is H, and H satisfies: 1 μm≤H≤3 μm; Preferably, the array substrate comprises a third conductor layer located between the substrate and the first conductor layer, and the control terminal of the first transistor is located in the third conductor layer; Preferably, the array substrate includes a fourth conductor layer and a fifth conductor layer located between the substrate and the third conductor layer, the pixel circuit includes a storage capacitor, and the storage capacitor includes a first electrode plate located in the fourth conductor layer and a second electrode plate located in the fifth conductor layer.

5. The display panel according to claim 4, characterized in that: The array substrate comprises an insulating layer located between the first conductor layer and the second conductor layer, the insulating layer is provided with a first via hole, and the conducting portion is connected to the first electrode of the first transistor through the first via hole; A plurality of the pixel circuits arranged along the first direction together form a circuit row, and in a direction parallel to the first direction and pointing from the center of the first area to the edge of the second area, the distances between the first via holes corresponding to the plurality of the pixel circuits in a single circuit row and the center of the first area in the second direction gradually decrease, and the first direction intersects with the second direction; Preferably, the plurality of pixel circuits arranged along the second direction together form a circuit column, and the first via holes corresponding to the plurality of pixel circuits in a single circuit column are arranged side by side in the second direction; Preferably, the pixel circuit has a third edge and a fourth edge opposite to each other in the first direction, and a distance between the third edge and the center of the first area in the first direction is smaller than a distance between the fourth edge and the center of the first area in the first direction; The orthographic projection of the first via hole on the substrate is arranged adjacent to the orthographic projection of the third edge of the corresponding pixel circuit on the substrate.

6. The display panel according to claim 1, characterized in that: The array substrate comprises a first portion, a second portion arranged opposite to the first portion, and a bending portion connecting the first portion and the second portion; The light emitting unit is disposed at the first portion, the second portion is bent through the bending portion to a side of the first portion away from the light emitting unit, and the pixel circuit is at least partially located in the second portion; Preferably, at least part of the pixel circuit located in the second portion is arranged so that the orthographic projection of the first electrode on the substrate overlaps with the orthographic projection of the first electrode on the substrate.

7. The display panel according to claim 1, characterized in that: The first electrodes of different light-emitting units are arranged at insulated intervals, and the light-emitting parts of at least some of the light-emitting units are connected and arranged as one; Preferably, the display panel further comprises a filter layer located on a side of the light emitting unit away from the array substrate, the filter layer comprising filter portions that are arranged at intervals and have different colors, and a light shielding portion located between adjacent filter portions; Wherein, the light emitting portion is used to emit white light; Preferably, the orthographic projection of the first electrode on the substrate overlaps with the orthographic projection of the filter portion on the substrate.

8. A method for preparing a display panel, characterized in that: include: forming a pixel circuit on one side of the substrate; forming a conductive portion on a side of the pixel circuit away from the substrate to obtain a first substrate, wherein the conductive portion is coupled to the pixel circuit; forming a light-emitting unit on the cover plate to obtain a second substrate, wherein the light-emitting unit comprises a second electrode, a light-emitting portion and a first electrode which are sequentially arranged in layers in a direction away from the cover plate; The first substrate and the second substrate are bonded together, the first electrode is coupled to the pixel circuit through the conductive portion, at least one of the pixel circuits is misaligned with the orthographic projection of the first electrode on the substrate, and is coupled to the first electrode.

9. The preparation method according to claim 8, characterized in that: Before the step of forming the light-emitting unit on the cover plate, the method further includes: forming a filter layer on the cover plate, wherein the filter layer comprises filter portions that are spaced apart and have different colors; The step of forming a light emitting unit on the cover plate includes: A second electrode layer is formed on a side of the filter layer away from the substrate, wherein the second electrode layer includes a plurality of second electrodes connected in one body; A light-emitting layer is formed on a side of the second electrode layer away from the cover plate, wherein the light-emitting layer includes a plurality of light-emitting parts connected in one body; Forming a first electrode layer on a side of the light-emitting layer away from the cover plate, wherein the first electrode layer includes a plurality of first electrodes arranged at intervals; Preferably, the orthographic projection of the first electrode on the cover plate is arranged to overlap with the orthographic projection of the filter portion on the cover plate.

10. A display device, characterized in that: A display panel comprising any one of claims 1 to 7, or a display panel prepared by the preparation method according to any one of claims 8 to 9.

Images