Preparation method of silicon-based OLED bare chip

Abstract

The invention relates to the technical field of a silicon-based OLED (Organic Light Emitting Diode) for near-eye display equipment, in particular to a preparation method of a silicon-based OLED bare chip. The invention provides a preparation method of a silicon-based OLED bare chip. The preparation method comprises the following steps: providing a light-emitting device of a silicon-based substrate; determining a cutting area on the surface of the light-emitting device of the silicon-based substrate, adding a mask in the cutting area, sequentially preparing a first ALD layer, a CVD layer and a second ALD layer on the surface of the light-emitting device of the silicon-based substrate, removing the mask, and cutting along a reserved cutting position to obtain the silicon-based OLED bare chip. According to the preparation method, the problem of film stripping generated in the cutting process is avoided, and the utilization rate of the wafer chip is improved.

Description

Technical Field

[0001] The present invention relates to the technical field of silicon-based OLED for near-eye display devices, and particularly to a method for preparing a silicon-based OLED die. Background Art

[0002] As a core component of near-eye display devices (VR, MR or AR), a silicon-based OLED is fabricated by manufacturing light-emitting devices on a silicon-based substrate and then cutting them into individual small dies, and then forming a light-emitting display screen by combining relevant processes of a printed circuit board (PCB) on the small dies obtained after cutting. However, during the cutting process, since the cutting wheel directly cuts the wafer chip, the atomic layer deposition (ALD) + chemical vapor deposition (CVD) + ALD material encapsulation film layer on the surface of the wafer chip peels off during the cutting process, thereby damaging the wire routing area at the chip edge, and ultimately causing abnormal electrical signal transmission during later use or reliability processes. To address the above problems, the prior art generally increases the distance between the electrical wire routing at the die edge and the cutting area during chip design to avoid the peeling phenomenon of the atomic layer deposition (ALD) + CVD (chemical vapor deposition) + ALD material encapsulation film layer on the surface of the wafer chip. However, due to the increased safety distance for cutting in the above solution, the cutting utilization rate of the wafer is significantly reduced. Summary of the Invention

[0003] In view of this, the purpose of the present invention is to provide a method for preparing a silicon-based OLED die, which avoids the problem of film layer peeling during the cutting process and improves the utilization rate of the wafer chip.

[0004] To achieve the above object of the present invention, the present invention provides the following technical solutions:

[0005] The present invention provides a method for preparing a silicon-based OLED die, comprising the following steps:

[0006] Providing a light-emitting device on a silicon-based substrate;

[0007] Determining a cutting area on the surface of the light-emitting device on the silicon-based substrate, adding a mask plate in the cutting area, sequentially preparing a first ALD layer, a CVD layer and a second ALD layer on the surface of the light-emitting device on the silicon-based substrate, removing the mask plate, and cutting along the reserved cutting position to obtain the silicon-based OLED die.

[0008] Preferably, the light-emitting device on the silicon-based substrate includes a functional area, an edge wire routing area, a safety distance area and a cutting area.

[0009] Preferably, the functional region includes a silicon wafer substrate, a CMOS driving circuit, an anode layer, an OLED layer, and an SPT layer that are sequentially stacked;

[0010] The PDL pixel definition layer is disposed at intervals in the anode layer, and a part of the PDL pixel definition layer in the thickness direction is embedded in the OLED layer.

[0011] Preferably, the edge routing region includes a silicon wafer substrate and a CMOS driving circuit that are sequentially stacked.

[0012] Preferably, the anode layer includes a Ti layer, an Al layer, and a TiN layer that are sequentially stacked;

[0013] The thickness of the anode layer is

[0014] The PDL pixel definition layer includes a first silicon dioxide layer, a silicon nitride layer, and a second silicon dioxide layer that are sequentially stacked.

[0015] Preferably, the OLED layer includes a hole injection layer, a hole transport layer, an electron blocking layer, a light emitting layer, an electron transport layer, and an electron injection layer that are sequentially stacked.

[0016] Preferably, the material of the SPT layer is indium tin oxide;

[0017] The thickness of the SPT layer is

[0018] Preferably, the width of the edge routing region is 200 - 210 μm;

[0019] The width of the safety distance region is 100 - 110 μm.

[0020] Preferably, both the first ALD layer and the second ALD layer include an aluminum oxide layer and a titanium oxide layer that are sequentially stacked, and the thickness of both is

[0021] Preferably, the material of the CVD layer is silicon nitride, and the thickness is

[0022] The present invention provides a method for preparing a silicon-based OLED die, comprising the following steps: providing a light-emitting device on a silicon-based substrate; determining a cutting area on the surface of the light-emitting device on the silicon-based substrate, adding a mask plate in the cutting area, sequentially preparing a first ALD layer, a CVD layer and a second ALD layer on the surface of the light-emitting device on the silicon-based substrate, removing the mask plate, and performing cutting along the reserved cutting position to obtain the silicon-based OLED die. The preparation method of the present invention can ensure that no serious film layer peeling problem occurs during the cutting process by adding a mask plate at the cutting position, thereby improving the reliability of the product, extending the service life, and at the same time, there is no need to require a safety distance for the cutting area and the edge routing area on each Die, avoiding the problem of low cutting utilization rate caused by increasing the safety distance in the prior art. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] Figure 1 FIG. 6 is a schematic structural diagram of the preparation method described in Embodiment 1 of the present invention before cutting;

[0024] Figure 2 FIG. 10 is a schematic structural diagram of the preparation method described in Embodiment 1 of the present invention after cutting. DETAILED DESCRIPTION OF THE INVENTION

[0025] The present invention provides a method for preparing a silicon-based OLED die, comprising the following steps:

[0026] providing a light-emitting device on a silicon-based substrate;

[0027] determining a cutting area on the surface of the light-emitting device on the silicon-based substrate, adding a mask plate in the cutting area, sequentially preparing a first ALD layer, a CVD layer and a second ALD layer on the surface of the light-emitting device on the silicon-based substrate, removing the mask plate, and performing cutting along the reserved cutting position to obtain the silicon-based OLED die.

[0028] The present invention provides a light-emitting device on a silicon-based substrate.

[0029] In the present invention, the light-emitting device on the silicon-based substrate preferably comprises a functional area, an edge routing area, a safety distance area and a cutting area.

[0030] In the present invention, the functional area preferably comprises a silicon wafer substrate, a CMOS driving circuit, an anode layer, an OLED layer and an SPT layer which are sequentially stacked; the anode layer preferably has PDL pixel definition layers arranged at intervals, and a part of the PDL pixel definition layers in the thickness direction is embedded in the OLED layer.

[0031] The present invention has no special limitation on the silicon wafer substrate and the CMOS driving circuit, and those well-known to those skilled in the art can be used.

[0032] In the present invention, the anode layer preferably includes a Ti layer, an Al layer, and a TiN layer which are sequentially stacked; the thickness of the anode layer is preferably

[0033] In the present invention, the OLED layer preferably includes a hole injection (HIL) layer, a hole transport (HTL) layer, an electron blocking (EBL) layer, a light emitting (EML) layer, an electron transport (ETL) layer, and an electron injection (EIL) layer which are sequentially stacked.

[0034] In the present invention, the material of the SPT layer is preferably indium tin oxide (IZO); the thickness of the SPT layer is preferably More preferably

[0035] In the present invention, the edge routing area preferably includes a silicon wafer substrate and a CMOS driving circuit which are sequentially stacked. The present invention has no special limitation on the silicon wafer substrate and the CMOS driving circuit, and those well-known to those skilled in the art can be used. In the present invention, the silicon wafer substrate and the CMOS driving circuit in the edge routing area are the same as those in the functional area.

[0036] In the present invention, the width of the edge routing area is preferably 200 - 210 μm, and more preferably 210 μm.

[0037] In the present invention, the safety distance area and the cutting area preferably include a silicon wafer substrate. The silicon wafer substrate is different regions of the same silicon wafer substrate as that in the functional area and the edge routing area.

[0038] In the present invention, the width of the safety distance area is preferably 100 - 110 μm, and more preferably 110 μm; the width of the cutting area is preferably 150 - 160 μm, and more preferably 160 μm.

[0039] The present invention has no special limitation on the process of adding the mask, and the process well-known to those skilled in the art can be used.

[0040] In the present invention, both the first ALD layer and the second ALD layer preferably include an alumina layer and a titanium oxide layer which are sequentially stacked, and the thicknesses are both preferably In the present invention, the preparation method of the first ALD layer and the second ALD layer is preferably atomic layer deposition. The present invention has no special limitation on the process of the atomic layer deposition, and the process well-known to those skilled in the art can be used.

[0041] In the present invention, the material of the CVD layer is preferably silicon nitride (SiN), and the thickness is preferably In the present invention, the preparation method of the CVD layer is preferably chemical vapor deposition. The present invention does not have any special limitations on the process of the chemical vapor deposition method, and the process well-known to those skilled in the art can be adopted.

[0042] The present invention does not have any special limitations on the process of removing the mask plate, and the process well-known to those skilled in the art can be adopted.

[0043] The present invention does not have any special limitations on the process of cutting, and the process well-known to those skilled in the art can be adopted.

[0044] Next, the technical solutions of the present invention will be clearly and completely described in conjunction with the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without making creative efforts belong to the scope of protection of the present invention.

[0045] Example 1

[0046] Provide a light-emitting device on a silicon-based substrate (including a functional area, an edge routing area, a safety distance area, and a cutting area. The functional area includes a silicon wafer substrate, a CMOS driving circuit, an anode layer (with a thickness of including a Ti layer, an Al layer, and a TiN layer stacked in sequence), an OLED layer (including a hole injection layer, a hole transport layer, an electron blocking layer, a light-emitting layer, an electron transport layer, and an electron injection layer stacked in sequence), and an SPT layer (the material is IZO (indium tin oxide), with a thickness of ), a PDL pixel definition layer is preferably arranged at intervals in the anode layer, and a part of the PDL pixel definition layer in the thickness direction is embedded in the OLED layer; the edge routing area includes a silicon wafer substrate and a CMOS driving circuit stacked in sequence; both the safety distance area and the cutting area include a silicon wafer substrate);

[0047] Add a mask plate to the cutting area of the light-emitting device on the silicon-based substrate, and sequentially prepare a first ALD layer (an alumina layer and a titanium oxide layer stacked in sequence, with a thickness of ), a CVD layer (the material is SiN, with a thickness of ), and a second ALD layer (an alumina layer and a titanium oxide layer stacked in sequence, with a thickness of ) on the surface of the light-emitting device on the silicon-based substrate, remove the mask plate (the obtained intermediate structure is as Figure 1 shown), and perform cutting along the reserved cutting position to obtain the silicon-based OLED die (the structural schematic diagram of the silicon-based OLED die obtained after cutting is as Figure 2 shown).

[0048] The above are only the preferred embodiments of the present invention and do not impose any formal restrictions on the present invention. It should be noted that for those of ordinary skill in the art, without departing from the principle of the present invention, several improvements and refinements can still be made, and these improvements and refinements should also be regarded as the protection scope of the present invention.

Claims

1. A method for preparing a silicon-based OLED bare chip, characterized in that: The following steps are involved: Providing a light-emitting device on a silicon-based substrate; A cutting area is determined on the surface of the light-emitting device of the silicon-based substrate, and a mask is added in the cutting area. A first ALD layer, a CVD layer, and a second ALD layer are sequentially prepared on the surface of the light-emitting device of the silicon-based substrate. The mask is removed, and cutting is performed along the reserved cutting position to obtain the silicon-based OLED bare chip.

2. The preparation method according to claim 1, characterized in that The light-emitting device of the silicon-based substrate comprises a functional area, an edge wiring area, a safety distance area and a cutting area.

3. The preparation method according to claim 1, characterized in that: The functional area includes a silicon wafer substrate, a CMOS driving circuit, an anode layer, an OLED layer and an SPT layer which are stacked in sequence; A PDL pixel definition layer is disposed in the anode layer, and a portion of the PDL pixel definition layer in a thickness direction is embedded in the OLED layer.

4. The preparation method according to claim 1, characterized in that: The edge wiring area includes a silicon wafer substrate and a CMOS driving circuit which are stacked in sequence.

5. The preparation method according to claim 1, characterized in that: The anode layer comprises a Ti layer, an Al layer and a TiN layer stacked in sequence; The thickness of the anode layer is The PDL pixel definition layer includes a first silicon dioxide layer, a silicon nitride layer, and a second silicon dioxide layer which are stacked in sequence.

6. The preparation method according to claim 1, characterized in that: The OLED layer includes a hole injection layer, a hole transport layer, an electron blocking layer, a light emitting layer, an electron transport layer and an electron injection layer which are stacked in sequence.

7. The preparation method according to claim 1, characterized in that: The material of the SPT layer is indium tin oxide; The thickness of the SPT layer is 8. The preparation method according to claim 1, characterized in that: The width of the edge routing area is 200-210 μm; The width of the safety distance zone is 100-110 μm.

9. The preparation method according to claim 1, characterized in that: The first ALD layer and the second ALD layer each include an aluminum oxide layer and a titanium oxide layer stacked in sequence, each having a thickness of 10. The preparation method according to claim 1, characterized in that: The material of the CVD layer is silicon nitride, and the thickness is

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