A CMOS-MEMS flow and gas thermal conductivity integrated sensor and a preparation method and application thereof

Abstract

The application provides a CMOS-MEMS flow and gas thermal conductivity integrated sensor and a preparation method and application thereof, and belongs to the field of sensors. The application designs a heat insulation structure between a thermal flow sensor and a gas thermal conductivity sensor, reduces external thermal interference and thermal interference between different sensors, realizes simultaneous detection of gas related thermal physical property parameters, corrects the flow, further improves the performance of the flow sensor, and meets the demand of flow detection and gas parameter detection in a more complex environment. In the preparation of the sensor, a Post-CMOS process without a mask plate is adopted, the complicated photoetching step is avoided, and the efficiency of the whole Post-CMOS post-processing is greatly improved. Through reasonable process design, the sensor realizes monolithic integration of multiple sensors, and is integrally prepared into a CMOS-MEMS process.

Description

Technical Field

[0001] This invention relates to the field of sensors, specifically to a CMOS-MEMS integrated sensor for flow rate and gas thermal conductivity, its fabrication method, and its application. Background Technology

[0002] MEMS thermal flow sensors measure flow rate through heat exchange, eliminating the need for conversions using physical quantities such as pressure, thus simplifying the testing process. This type of sensor is sensitive to minute changes in flow rate and can accurately detect low-flow gas variations. Its high accuracy and repeatability enable it to provide stable test results.

[0003] MEMS gas thermal conductivity sensors utilize the principle of heat transfer to detect the thermal conductivity of gases. They can be used to analyze gas composition, such as for hydrogen detection, detection of toxic and harmful gases, and monitoring and controlling gas composition. Like calorimetric flow sensors, MEMS gas thermal conductivity sensors rely on heat transfer.

[0004] Currently, most flow sensors or gas thermal conductivity sensors based on the principle of heat exchange can only detect flow rate or gas thermal conductivity, respectively. Since thermal sensors work by detecting heat distribution under different detection environments through heat transfer effects, reflecting temperature changes in the detection area and their impact on resistance, and ultimately converting this into an electrical signal (such as voltage), this principle makes the heat-carrying effect of flow velocity prone to interference when detecting thermal conductivity. Similarly, during flow detection, the difference in thermal conductivity between different gases can affect the detection resistance of flow velocity sensors due to heat transfer from the heating resistor, leading to temperature deviations at the detection location, which in turn affects the resistance value and the output electrical signal, ultimately causing errors in the test results. Therefore, how to reduce the mutual interference between the two types of sensors through reasonable design has become a critical problem that urgently needs to be solved. Summary of the Invention

[0005] This invention provides a CMOS-MEMS integrated sensor for flow rate and gas thermal conductivity, its fabrication method, and its application. The sensor of this invention integrates a gas flow rate sensor and a gas thermal conductivity sensor. The mutual influence between the gas flow rate sensor and the gas thermal conductivity sensor is reduced through a thermal insulation structure. Furthermore, the gas flow rate sensor and the gas thermal conductivity sensor are fabricated simultaneously using a Post-CMOS process.

[0006] The present invention provides a CMOS-MEMS sensor integrating flow rate and gas thermal conductivity, comprising a substrate 1, a silicon dioxide structure layer 2 located on the substrate, and a circuit portion;

[0007] In a direction parallel to the bottom surface of the substrate, the silicon dioxide structural layer 2 includes a first silicon dioxide structural layer, a second silicon dioxide structural layer, and a third silicon dioxide structural layer; the first silicon dioxide structural layer and the third silicon dioxide structural layer are located on both sides of the silicon dioxide structural layer; the second silicon dioxide structural layer includes a suspended portion and a non-suspended portion; the non-suspended portion is in contact with the substrate;

[0008] A first PAD region and a first metal via are embedded in the first silicon dioxide structural layer; the first PAD region includes several metal layers; the first metal via penetrates other metal layers in the first PAD region except for the top metal layer;

[0009] An ambient temperature sensing resistor 7 is embedded in the first silicon dioxide structural layer and the third silicon dioxide structural layer;

[0010] The first cavity 9 is formed by the first silicon dioxide layer, the suspended portion of the second silicon dioxide layer, the non-suspended portion of the second silicon dioxide layer, and the substrate;

[0011] Gas thermal conductivity sensor 8 suspended in the first cavity 9;

[0012] A plurality of first through holes are provided between the first silicon dioxide structural layer and the second silicon dioxide structural layer. The plurality of first through holes connect the first cavity 9 with the outside world, so that the gas to be measured can enter the first cavity 9 and come into contact with the gas thermal conductivity sensor 8.

[0013] The thermal insulation structure 10 is located in the second silicon dioxide structural layer;

[0014] The second cavity 6 is formed by the second silicon dioxide structural layer, the third silicon dioxide structural layer and the substrate, and the second cavity 6 is in communication with the outside.

[0015] Inside the second cavity 6, a first thermistor 3, a flow sensor heating resistor 4, and a second thermistor 5 are suspended sequentially in the direction from the first silicon dioxide structural layer to the third silicon dioxide structural layer.

[0016] A second PAD region and a second metal via are embedded in the third silicon dioxide structural layer; the second PAD region includes several metal layers; the second metal via penetrates other metals in the second PAD region except for the top metal layer;

[0017] Leads that are respectively connected to the first PAD region and the second PAD region.

[0018] Preferably, the ambient temperature sensing resistor 7 has a ring structure.

[0019] Preferably, the heat insulation structure 10 includes a metal structural layer embedded in the suspended portion and the non-suspended portion;

[0020] The thermal insulation structure 10 also includes a third metal via, which extends through a metal structure layer that penetrates the non-suspended portion to the substrate 1.

[0021] Preferably, when the number of metal structure layers is ≥2, the heat insulation structure 10 further includes a fourth metal via in the suspended portion of the adjacent metal structure layers, wherein the metal structure layers are arranged parallel to the bottom of the substrate and adjacent metal structure layers are spaced apart.

[0022] Preferably, the substrate 1 has a first pit and a second pit; the first pit is located between the first silicon dioxide layer and the second silicon dioxide layer, and the second pit is located between the second silicon dioxide structural layer and the third silicon dioxide structural layer.

[0023] The first recess, together with the first silicon dioxide layer and the second silicon dioxide layer, forms a first cavity 9;

[0024] The second recess, together with the second and third silicon dioxide structural layers, forms a second cavity 6.

[0025] Preferably, the first thermistor 3 and the second thermistor 5 each have two thermistors.

[0026] Preferably, the first thermistor 3, the flow sensor heating resistor 4, and the second thermistor 5 are each encapsulated in silicon dioxide.

[0027] Preferably, the sensor further includes:

[0028] A passivation layer located on the silicon dioxide structural layer 2.

[0029] The present invention also provides a method for manufacturing the sensor described in the above technical solution, comprising the following steps:

[0030] (a) A CMOS die is provided, the CMOS die comprising a substrate 1, a silicon dioxide structure layer 2 on the substrate, and a circuit portion;

[0031] In a direction parallel to the bottom surface of the substrate, the silicon dioxide structural layer 2 includes a first silicon dioxide structural layer, a second silicon dioxide structural layer, and a third silicon dioxide structural layer; the first silicon dioxide structural layer and the third silicon dioxide structural layer are located on both sides of the silicon dioxide structural layer; the second silicon dioxide structural layer includes a suspended portion and a non-suspended portion; the non-suspended portion is in contact with the substrate;

[0032] A first PAD region and a first metal via are embedded in the first silicon dioxide structural layer; the first PAD region includes several metal layers; the first metal via penetrates other metal layers in the first PAD region except for the top metal layer;

[0033] An ambient temperature sensing resistor 7 is embedded in the first silicon dioxide structural layer and the third silicon dioxide structural layer;

[0034] Gas thermal conductivity sensor 8 is located below the suspended portion and on the surface of substrate 1;

[0035] A plurality of first through holes are provided between the first silicon dioxide structural layer and the second silicon dioxide structural layer, the plurality of first through holes connecting the gas thermal conductivity sensor 8 to the outside, and the plurality of first through holes are sealed by sacrificial metal;

[0036] The space between the gas thermal conductivity sensor 8 and the suspended portion of the second silicon dioxide structure layer is sealed by sacrificial metal.

[0037] The thermal insulation structure 10 is located in the second silicon dioxide structural layer;

[0038] A first thermistor 3, a flow sensor heating resistor 4, and a second thermistor 5 are sequentially arranged in the direction from the first silicon dioxide structural layer to the third silicon dioxide structural layer; the first thermistor 3, the flow sensor heating resistor 4, and the second thermistor 5 are sealed above by sacrificial metal; the first thermistor 3, the flow sensor heating resistor 4, and the second thermistor 5 are located between the second silicon dioxide structural layer and the third silicon dioxide structural layer, above the silicon substrate;

[0039] The flow sensor heating resistor 4 is provided with a silicon dioxide layer above the first thermistor 3 and the second thermistor 5; second through holes are provided between the second silicon dioxide structure layer and the first thermistor 3, between the first thermistor 3 and the heating resistor 4, between the heating resistor 4 and the second thermistor 5, and between the second thermistor 5 and the third silicon dioxide structure layer, which are channels for etching the substrate.

[0040] A second PAD region and a second metal via are embedded in the third silicon dioxide structural layer; the second PAD region includes several metal layers; the second metal via penetrates other metals in the second PAD region except for the top metal layer;

[0041] The sacrificial metal is located above the first PAD region and the second PAD region respectively, and the third through hole connects the sacrificial metal to the top of the sensor;

[0042] A sacrificial silicon dioxide structure layer is spaced between the top metal in the first PAD region and the sacrificial metal, serving as a mask for the first PAD region and the second PAD region to prevent the first PAD region and the second PAD region from being etched away when the sacrificial metal is etched.

[0043] (b) Remove all sacrificial metal from the CMOS die by wet etching;

[0044] (c) The substrate between the second silicon dioxide structure layer and the third silicon dioxide structure layer in the chip obtained in step (b) is etched by DRIE to form a trench;

[0045] (d) The chip obtained in step (c) is etched with sacrificial silicon dioxide by means of RIE to expose the metal PAD;

[0046] (e) The substrate in the chip obtained in step (d) is etched by isotropic dry etching with XeF2, and the first thermistor 3, the flow sensor heating resistor 4, the second thermistor 5 and the gas thermal conductivity sensor 8 are suspended.

[0047] (f) Bond the first metal PAD region and the second metal PAD region in the chip obtained in step (e) to the leads to obtain the sensor.

[0048] The present invention also provides the application of the sensor described in the above technical solution or the sensor prepared by the preparation method described in the above technical solution in measuring gas flow rate and gas thermal conductivity.

[0049] This invention reduces external thermal interference to the flow sensor and thermal interference between different internal sensors by designing a heat-insulating structure for the thermal flow sensor and the gas thermal conductivity sensor, and by forming through holes between the first silicon dioxide structural layer, the second silicon dioxide structural layer and the gas thermal conductivity sensor 8. This results in more accurate gas thermal property parameters and decoupling of flow parameters, providing a suitable sensor foundation for subsequent compensation work, improving the performance of the gas flow sensor, and meeting the needs of flow detection and gas parameter detection in more complex environments. Different gases have different heat transfer capabilities, and the gas flow sensor reflects the flow rate through heat distribution. By analyzing the actual heat transfer capability of the gas through the gas thermal conductivity sensor, the flow rate can be corrected.

[0050] The sensor of this invention is small in size and highly integrated, and has the potential to be used as a small, multifunctional dedicated sensor.

[0051] This invention precisely patterns the first thermistor 3, the flow sensor heating resistor 4, the second thermistor 5, the ambient temperature sensor resistor 7, and the gas thermal conductivity sensor 8 within a CMOS die by designing sacrificial metal, PAD regions, and thermal insulation structures (its position, shape, size, and other parameters are defined through layout). This allows for non-destructive etching of the required components, reducing photolithography steps. Finally, by employing DRIE anisotropic silicon etching and XeF2 isotropic silicon etching methods, a sensor with a suspended structure is formed, avoiding complex photolithography steps, significantly improving the efficiency of the entire Post-CMOS post-processing, and greatly reducing the sensor cost. Through rational process design, this invention achieves monolithic integration of multiple sensors in a single CMOS-MEMS process. Attached Figure Description

[0052] Figure 1 The flowchart for the preparation of the sensor in Example 1 is shown below;

[0053] Figure 2 This is a three-dimensional structural schematic diagram of one of the sensors of the present invention;

[0054] Figure 3 This is a top view schematic of one of the flow sensor components of the present invention;

[0055] Figure 4 This is a schematic top view of one of the thermal conductivity sensors in this invention;

[0056] Figure 5 This is a schematic side view of one of the thermal conductivity sensors of the present invention;

[0057] Figure 6 This is a schematic cross-sectional view of the sensor in Example 1. Detailed Implementation

[0058] The present invention provides a CMOS-MEMS sensor integrating flow rate and gas thermal conductivity, comprising a substrate 1, a silicon dioxide structure layer 2 located on the substrate, and a circuit portion;

[0059] In a direction parallel to the bottom surface of the substrate, the silicon dioxide structural layer 2 includes a first silicon dioxide structural layer, a second silicon dioxide structural layer, and a third silicon dioxide structural layer; the first silicon dioxide structural layer and the third silicon dioxide structural layer are located on both sides of the silicon dioxide structural layer; the second silicon dioxide structural layer includes a suspended portion and a non-suspended portion; the non-suspended portion is in contact with the substrate;

[0060] A first PAD region and a first metal via are embedded in the first silicon dioxide structural layer; the first PAD region includes several metal layers; the first metal via penetrates other metal layers in the first PAD region except for the top metal layer;

[0061] An ambient temperature sensing resistor 7 is embedded in the first silicon dioxide structural layer and the third silicon dioxide structural layer;

[0062] The first cavity 9 is formed by the first silicon dioxide layer, the suspended portion of the second silicon dioxide layer, the non-suspended portion of the second silicon dioxide layer, and the substrate;

[0063] Gas thermal conductivity sensor 8 suspended in the first cavity 9;

[0064] A plurality of first through holes are provided between the first silicon dioxide structural layer and the second silicon dioxide structural layer. The plurality of first through holes connect the first cavity 9 with the outside world, so that the gas to be measured can enter the first cavity 9 and come into contact with the gas thermal conductivity sensor 8.

[0065] The thermal insulation structure 10 is located in the second silicon dioxide structural layer;

[0066] The second cavity 6 is formed by the second silicon dioxide structural layer, the third silicon dioxide structural layer and the substrate, and the second cavity 6 is in communication with the outside.

[0067] Inside the second cavity 6, a first thermistor 3, a flow sensor heating resistor 4, and a second thermistor 5 are suspended sequentially in the direction from the first silicon dioxide structural layer to the third silicon dioxide structural layer.

[0068] A second PAD region and a second metal via are embedded in the third silicon dioxide structural layer; the second PAD region includes several metal layers; the second metal via penetrates other metals in the second PAD region except for the top metal layer;

[0069] Leads that are respectively connected to the first PAD region and the second PAD region.

[0070] The sensor provided by the present invention includes a substrate 1, wherein the substrate 1 is preferably made of a silicon wafer;

[0071] The sensor provided by the present invention includes a silicon dioxide structural layer 2 located on the substrate; in a direction parallel to the bottom surface of the substrate, the silicon dioxide structural layer includes a first silicon dioxide structural layer, a second silicon dioxide structural layer, and a third silicon dioxide structural layer; the first silicon dioxide structural layer and the third silicon dioxide structural layer are located on both sides of the silicon dioxide structural layer; the second silicon dioxide structural layer includes a suspended portion and a non-suspended portion; the non-suspended portion is in contact with the substrate;

[0072] The sensor provided by the present invention preferably further includes a passivation layer located on the silicon dioxide structural layer 2.

[0073] The sensor provided by this invention includes a first PAD region and a first metal via embedded in a first silicon dioxide structure layer; the first PAD region includes a plurality of metal layers; the first metal via penetrates other metal layers in the first PAD region except for the top metal layer; the metal in the metal layer is preferably aluminum; the number of metal layers in the first PAD region is preferably five, and adjacent metal layers in the first PAD region are preferably separated by silicon dioxide in the first silicon dioxide structure layer.

[0074] The sensor provided by this invention includes an ambient temperature sensing resistor 7 embedded in the first silicon dioxide structural layer and the third silicon dioxide structural layer; the material of the ambient temperature sensing resistor 7 is preferably polycrystalline silicon. The ambient temperature sensing resistor 7 is preferably a ring structure, and is preferably located below or to the side of the first PAD region and the second PAD region.

[0075] The sensor provided by this invention includes a first cavity 9 formed by a first silicon dioxide layer, a suspended portion of a second silicon dioxide layer, a non-suspended portion of a second silicon dioxide layer, and a substrate; the substrate 1 preferably has a first pit, the first pit being located between the first silicon dioxide layer and the second silicon dioxide layer; the first pit preferably forms the first cavity 9 with the first silicon dioxide layer and the second silicon dioxide layer.

[0076] The sensor provided by this invention includes a gas thermal conductivity sensor 8 suspended in the first cavity 9; the gas thermal conductivity sensor 8 preferably has a through hole, which communicates with the plurality of first through holes; the through hole is preferably realized by the retraction of the gas thermal conductivity sensor 8.

[0077] In this invention, a plurality of first through holes are provided between the first silicon dioxide structural layer and the second silicon dioxide structural layer. The plurality of first through holes connect the first cavity 9 to the outside, allowing the gas to be measured to enter the first cavity 9 and come into contact with the gas thermal conductivity sensor 8. The plurality of first through holes can also be used to remove the sacrificial metal of the suspended portion between the gas thermal conductivity sensor 8 and the second silicon dioxide structural layer in the CMOS die.

[0078] The sensor provided by this invention includes a heat insulation structure 10 located in the second silicon dioxide structural layer; the heat insulation structure 10 preferably includes a metal structural layer embedded in the suspended portion and the non-suspended portion, and the heat insulation structure 10 preferably also includes a third metal via, the third metal via extending through the metal structural layer of the non-suspended portion to the substrate 1; when the number of metal structural layers is ≥2, the heat insulation structure 10 preferably also includes a fourth metal via of the adjacent metal structural layer in the suspended portion, the metal structural layers are arranged parallel to the bottom of the substrate and adjacent metal structural layers are spaced apart; the heat insulation structure 10 is used to reduce external thermal interference and thermal interference between different internal sensors, and to achieve physical isolation and decoupling.

[0079] In this invention, the second silicon dioxide structural layer preferably surrounds the gas thermal conductivity sensor 8 on all four sides and above.

[0080] The sensor provided by this invention includes a second cavity 6 formed by the second silicon dioxide structural layer, the third silicon dioxide structural layer and the substrate, and the second cavity 6 is in communication with the outside; the substrate 1 preferably also includes a second pit, the second pit being located between the second silicon dioxide structural layer and the third silicon dioxide structural layer; the second pit preferably forms the cavity 6 with the second silicon dioxide structural layer and the third silicon dioxide structural layer.

[0081] The sensor provided by this invention includes a first thermistor 3, a flow sensor heating resistor 4, and a second thermistor 5, which are sequentially suspended in the second cavity 6 along the direction from the first silicon dioxide structural layer to the third silicon dioxide structural layer; the flow sensor heating resistor 4 is located between the first thermistor 3 and the second thermistor 5; the first thermistor (3), the flow sensor heating resistor (4), and the second thermistor (5) are preferably wrapped with silicon dioxide; there are gaps between the first thermistor 3 and the flow sensor heating resistor 4, and between the flow sensor heating resistor 4 and the second thermistor 5; the number of thermistors in the first thermistor 3 and the second thermistor 5 is preferably two each.

[0082] The first thermistor 3, the flow sensor heating resistor 4, the second thermistor 5, and the ambient temperature sensing resistor 7 together form a thermal flow sensor.

[0083] The sensor provided by the present invention includes a second PAD region and a second metal via embedded in the third silicon dioxide structure layer; the second PAD region includes a plurality of metal layers; the second metal via penetrates other metal layers in the second PAD region except for the top metal layer; the metal in the metal layer is preferably aluminum; the number of metal layers in the second PAD region is preferably 5, and adjacent metal layers in the second PAD region are preferably separated by silicon dioxide in the third silicon dioxide structure layer.

[0084] The sensor provided by this invention includes leads that are respectively connected to the first PAD region and the second PAD region;

[0085] The sensor provided by this invention includes a circuit component.

[0086] The sensor section adopts a suspended structure, which has the advantages of fast response speed and low heat dissipation.

[0087] The present invention also provides a method for manufacturing the sensor described in the above technical solution, comprising the following steps:

[0088] (a) A CMOS die is provided, the CMOS die comprising a substrate 1, a silicon dioxide structure layer 2 on the substrate, and a circuit portion;

[0089] In a direction parallel to the bottom surface of the substrate, the silicon dioxide structural layer 2 includes a first silicon dioxide structural layer, a second silicon dioxide structural layer, and a third silicon dioxide structural layer; the first silicon dioxide structural layer and the third silicon dioxide structural layer are located on both sides of the silicon dioxide structural layer; the second silicon dioxide structural layer includes a suspended portion and a non-suspended portion; the non-suspended portion is in contact with the substrate;

[0090] A first PAD region and a first metal via are embedded in the first silicon dioxide structural layer; the first PAD region includes several metal layers; the first metal via penetrates other metal layers in the first PAD region except for the top metal layer;

[0091] An ambient temperature sensing resistor 7 is embedded in the first silicon dioxide structural layer and the third silicon dioxide structural layer;

[0092] Gas thermal conductivity sensor 8 is located below the suspended portion and on the surface of substrate 1;

[0093] A plurality of first through holes are provided between the first silicon dioxide structural layer and the second silicon dioxide structural layer. The plurality of first through holes connect the gas thermal conductivity sensor 8 to the outside world. The top of the plurality of first through holes is sealed with sacrificial metal.

[0094] The space between the gas thermal conductivity sensor 8 and the suspended portion of the second silicon dioxide structure layer is sealed by sacrificial metal.

[0095] The thermal insulation structure 10 is located in the second silicon dioxide structural layer;

[0096] A first thermistor 3, a flow sensor heating resistor 4, and a second thermistor 5 are sequentially provided between the second and third silicon dioxide structural layers in the direction from the first silicon dioxide structural layer to the third silicon dioxide structural layer.

[0097] The space between the second and third silicon dioxide structural layers, and above the first thermistor 3, the flow sensor heating resistor 4, and the second thermistor 5, is sealed with sacrificial metal.

[0098] The first thermistor 3, the flow sensor heating resistor 4, and the second thermistor 5 are located between the second silicon dioxide structure layer and the third silicon dioxide structure, above the silicon substrate;

[0099] The flow sensor heating resistor 4 is provided with a silicon dioxide layer above the first thermistor 3 and the second thermistor 5; second through holes are provided between the second silicon dioxide structure layer and the first thermistor 3, between the first thermistor 3 and the heating resistor 4, between the heating resistor 4 and the second thermistor 5, and between the second thermistor 5 and the third silicon dioxide structure layer, which are channels for etching the substrate.

[0100] A second PAD region and a second metal via are embedded in the third silicon dioxide structural layer; the second PAD region includes several metal layers; the second metal via penetrates other metals in the second PAD region except for the top metal layer;

[0101] The sacrificial metal is located above the first PAD region and the second PAD region respectively, and the third through hole connects the sacrificial metal to the top of the sensor;

[0102] The top metal in the first PAD region and the second PAD region are separated from the sacrificial metal by a sacrificial silicon dioxide structure layer, which is used to protect the first PAD region and the second PAD region and prevent the first PAD region and the second PAD region from being etched away when the sacrificial metal is etched.

[0103] (b) Remove all sacrificial metals from the CMOS die by wet etching;

[0104] (c) The substrate between the second silicon dioxide structure layer and the third silicon dioxide structure layer in the chip obtained in step (b) is etched by DRIE to form a trench;

[0105] (d) The chip obtained in step (c) is etched with sacrificial silicon dioxide by means of RIE to expose the metal PAD;

[0106] (e) The substrate in the chip obtained in step (d) is etched by isotropic dry etching with XeF2, and the first thermistor 3, the flow sensor heating resistor 4, the second thermistor 5 and the gas thermal conductivity sensor 8 are suspended.

[0107] (f) Bond the first metal PAD region and the second metal PAD region in the chip obtained in step (e) to the leads to obtain the sensor.

[0108] Figure 2 This is a three-dimensional structural schematic diagram of one of the sensors of the present invention;

[0109] Figure 3 This is a top view schematic of one of the flow sensor components of the present invention;

[0110] Figure 4 This is a schematic top view of one of the thermal conductivity sensor components in this invention;

[0111] Figure 5 This is a schematic side view of one of the thermal conductivity sensors of the present invention.

[0112] The present invention also provides the application of the sensor described in the above technical solution or the sensor prepared by the preparation method described in the above technical solution in measuring gas flow rate and gas thermal conductivity.

[0113] In this invention, the application preferably includes:

[0114] The sensor is attached to a carrier, and its leads are connected to an external signal processing module to simultaneously detect the gas flow rate and thermal conductivity in the environment. The signal processing module uses changes in resistance or voltage to determine the signal received, analyzes the relationship between different signals, and performs corrections and compensations.

[0115] In this invention, the carrier preferably includes a PCB board.

[0116] The following detailed description, in conjunction with embodiments, illustrates the CMOS-MEMS integrated sensor for flow rate and gas thermal conductivity provided by the present invention, its fabrication method, and its applications. However, these descriptions should not be construed as limiting the scope of protection of the present invention.

[0117] The gas thermal conductivity sensor 8, the first thermistor 3, the flow sensor heating resistor 4, and the second thermistor 5 are suspended in the cavity through a cantilever beam sensing structure.

[0118] Example 1

[0119] Step (a): Using a 0.18um 1P6M CMOS semiconductor process, the required structure for the sensor is formed on a silicon wafer in one step: a silicon substrate layer 1 and a silicon dioxide structure layer 2, wherein the silicon dioxide structure layer 2 is disposed above the silicon substrate layer 1;

[0120] The silicon dioxide structure layer 2 includes: PAD areas at both ends and a gas flow sensor area, a heat insulation structure, and a gas thermal conductivity sensor area in the center.

[0121] In the PAD region, silicon dioxide and metal materials are arranged in an overlapping manner, with metal vias penetrating from the first to the fifth metal layer. A well-designed metal layer pattern and metal vias in the PAD region ensure that the space between the sixth and fifth metal layers is filled with silicon dioxide, thus forming a natural mask for the PAD region during metal etching and protecting its structure. In the gas flow sensor region: a heating resistor 4 and a first thermistor 3 and a second thermistor 5 distributed on both sides of the heating resistor 4 are placed within silicon dioxide. A well-designed polysilicon layer pattern in the gas flow sensor region constitutes the heating resistor, upstream resistor, and downstream thermistor of the flow sensor. A well-designed first metal layer pattern and metal vias in the gas flow sensor region ensure that a thin layer of silicon dioxide remains above the heating resistor, the first thermistor 3, and the second thermistor 4, forming a natural mask for the heating resistor, the first thermistor, and the second thermistor. Simultaneously, the vias extend directly to the silicon substrate, becoming channels for subsequent silicon etching and forming a cavity 6.

[0122] The temperature sensor 7 is placed in the silicon dioxide layer above the silicon substrate, and does not require a suspension design.

[0123] The thermal conductivity sensor is a gas thermal conductivity sensor 8, which is placed in a silicon dioxide material and in contact with the substrate; and a metal layer is provided between the gas thermal conductivity sensor 8 and the silicon dioxide layer above it.

[0124] The thermal insulation structure, located above the gas thermal conductivity sensor, transfers the heat effects that may arise from changes in external environmental heat and the heating resistor portion of the flow sensor to the silicon substrate via a metal thermally conductive layer. This heat is not removed during the entire fabrication process. The thermal insulation structure consists of a metal structural layer placed within a silicon dioxide structural layer, surrounding the thermal conductivity sensor structure on all sides and above, and connected to the silicon substrate via a metal via.

[0125] Step (b): Remove the excess metal structure layer of the chip obtained in step 1 by wet etching (etching solution with H2SO4:H2O2 ratio of 3:1). Etch at 90°C for 10 minutes and observe repeatedly to determine whether to extend the etching time.

[0126] Step (c): The silicon substrate of the chip obtained in step (b) is etched by DRIE. The silicon substrate is etched by deep reactive ion etching using a high aspect ratio silicon dry etching method based on fluorine-based gas to form a trench structure.

[0127] Step (d): Using reactive ion etching (RIE), the silicon substrate is dry-etched with high aspect ratio silicon using fluorine-based gas to form a trench structure; silicon dioxide etching is then performed to expose the metal PAD.

[0128] Step (e): Perform XeF2 isotropic dry etching on the chip obtained in step (d). The isotropic etching method can etch to both sides and the bottom, thereby removing silicon material from under the silicon dioxide layer and releasing the sensor suspension structure.

[0129] Step (f): Wire bond the chip obtained in step (e) to complete the fabrication of a CMOS-MEMS monolithic integrated flow and thermal conductivity sensor.

[0130] Figure 1 This is a flowchart of the sensor fabrication process in Example 1.

[0131] Figure 6 The cross-sectional schematic diagram of the sensor in Example 1 is as follows: 1-Silicon substrate; 2-Silicon dioxide structural layer; 3-First thermistor; 4-Flow sensor heating resistor; 5-Second thermistor; 6-Flow sensor cavity structure; 7-Ambient temperature sensing resistor; 8-Gas thermal conductivity sensor; 9-Thermal conductivity sensor cavity structure; 10-Heat insulation structure.

[0132] The sensor prepared in Example 1 consists of the following components:

[0133] Substrate 1, wherein the material of substrate 1 is a silicon wafer;

[0134] A silicon dioxide structural layer 2 is located on the substrate; in a direction parallel to the bottom surface of the substrate, the silicon dioxide structural layer is divided into a first silicon dioxide structural layer, a second silicon dioxide structural layer, and a third silicon dioxide structural layer; the first silicon dioxide structural layer and the third silicon dioxide structural layer are located on both sides of the silicon dioxide structural layer; the second silicon dioxide structural layer is divided into a suspended portion and a non-suspended portion; the non-suspended portion is in contact with the substrate;

[0135] A first PAD region and a first metal via are embedded in the first silicon dioxide structure layer; the first PAD region contains several metal layers; the first metal via penetrates other metal layers in the first PAD region except for the top metal layer; the metal in the metal layer is aluminum; the number of metal layers in the first PAD region is 5, and adjacent metal layers in the first PAD region are separated by silicon dioxide in the first silicon dioxide structure layer.

[0136] An ambient temperature sensing resistor 7 is embedded in the first and third silicon dioxide structural layers; the ambient temperature sensing resistor 7 is made of polycrystalline silicon. The ambient temperature sensing resistor 7 has a ring structure and is located below the first and second PAD regions.

[0137] The first cavity 9 is formed by the suspended portion of the first silicon dioxide layer and the second silicon dioxide layer, the non-suspended portion of the second silicon dioxide layer, and the substrate; the substrate 1 has a first pit, which is located between the first silicon dioxide layer and the second silicon dioxide layer; the first pit preferably forms the first cavity 9 with the first silicon dioxide layer and the second silicon dioxide layer.

[0138] A gas thermal conductivity sensor 8 is suspended in the first cavity 9; the gas thermal conductivity sensor 8 is folded back to obtain a through hole, and the through hole is connected to the plurality of first through holes;

[0139] A plurality of first through holes are provided between the first silicon dioxide structural layer and the second silicon dioxide structural layer. The plurality of first through holes connect the first cavity 9 with the outside world, so that the gas to be measured can enter the first cavity 9 and come into contact with the gas thermal conductivity sensor 8.

[0140] A heat insulation structure 10 is located in the second silicon dioxide structure layer; the heat insulation structure 10 includes a multilayer metal structure layer embedded in the suspended portion and the non-suspended portion, and the heat insulation structure 10 also includes a third metal via, which extends through the metal structure layer of the non-suspended portion to the substrate 1.

[0141] The thermal insulation structure 10 also includes a fourth metal via in the suspended portion of the adjacent metal structure layer, wherein the metal structure layer is parallel to the bottom of the substrate and the adjacent metal structure layers are arranged at intervals.

[0142] The second silicon dioxide structure layer surrounds the gas thermal conductivity sensor 8 on all four sides and above.

[0143] The second cavity 6 is formed by the second silicon dioxide structural layer, the third silicon dioxide structural layer and the substrate, and the second cavity 6 is in communication with the outside; the substrate 1 has a second pit, which is located between the second silicon dioxide structural layer and the third silicon dioxide structural layer; the second pit, the second silicon dioxide structural layer and the third silicon dioxide structural layer form the cavity 6.

[0144] Within the second cavity 6, a first thermistor 3, a flow sensor heating resistor 4, and a second thermistor 5 are sequentially suspended in the direction from the first silicon dioxide structural layer to the third silicon dioxide structural layer; the flow sensor heating resistor 4 is located between the first thermistor 3 and the second thermistor 5; a gap is provided between the first thermistor 3 and the flow sensor heating resistor 4, and between the flow sensor heating resistor 4 and the second thermistor 5; the number of thermistors in the first thermistor 3 and the second thermistor 5 are two each.

[0145] The second PAD region and the second metal via are embedded in the third silicon dioxide structural layer; the second PAD region includes several metal layers; the second metal via penetrates other metal layers in the second PAD region except for the top metal layer; the metal in the metal layer is aluminum; the number of metal layers in the second PAD region is 5, and adjacent metal layers in the second PAD region are preferably separated by silicon dioxide in the third silicon dioxide structural layer.

[0146] Leads that are respectively connected to the first PAD region and the second PAD region;

[0147] Circuitry section and passivation layer.

[0148] This invention utilizes a 0.18µm 1P6M process to design a sensor structure in one step, including a silicon substrate layer 1 and a silicon dioxide structure layer 2, as well as various functional components contained in the silicon dioxide structure layer. Then, a CMOS-MEMS monolithically integrated flow and thermal conductivity sensor with a floating structure and thinning treatment is obtained through a maskless post-CMOS process.

[0149] Unlike conventional CMOS-MEMS integrated sensor fabrication methods, this invention innovatively proposes a method for fabricating a monolithic CMOS-MEMS integrated flow and thermal conductivity sensor:

[0150] Unlike conventional calorimetric flow sensors, this invention utilizes CMOS technology, combining dry and wet etching to thin and precisely pattern the sensor structure. Finally, it employs DRIE anisotropic silicon etching and XeF2 isotropic silicon etching methods to form a maskless calorimetric flow sensor with a suspended structure.

[0151] Unlike conventional thermal conductivity sensors, this invention utilizes the multi-metal layer characteristics of CMOS technology, designing a metal sacrificial layer to form a cavity. Due to the use of the aforementioned release hole structure, for example... Figure 4 , Figure 5The vertical metal vent structure shown directly connects the top layer of silicon dioxide to the cavity of the bottom thermal conductivity device, and has a very small size, for example, 0.22 micrometers. The vent is surrounded by a silicon dioxide layer, with only the top portion of the small hole exposed for ventilation, thus shielding the cavity of the thermal conductivity structure from the upper silicon dioxide layer. The thermal insulation structure, for example... Figure 4 , Figure 5 As shown, heat conduction is achieved through metal layers M2 to M6 and metal vias connecting them, which are then connected to a surrounding metal thermally conductive structure leading to the silicon substrate. The thermal insulation structure allows external thermal disturbances and potential thermal disturbances from the heating components of the flow sensor to be transferred to the silicon substrate through the metal layers, reducing the impact on the thermal conductivity sensor. The design of the release holes and thermal insulation structure reduces the influence of airflow and the external environment on the structure's heat dissipation, temperature distribution, and ultimately, the output resistance or voltage.

[0152] The flow sensor, thermal conductivity sensor, and heat insulation structure are manufactured using compatible processes and can be integrated into a single unit through a reasonable layout. Because this invention employs an integrated CMOS fabrication process and a mask-free post-processing technique to manufacture the sensor and suspended structure, this sensor offers advantages such as high stability and fast response.

[0153] This invention proposes a design and fabrication method for a monolithically integrated CMOS-MEMS flow rate and gas thermal conductivity sensor, realizing the integration of multiple functional sensors on a single chip. Through integrated design and simplified fabrication processes, the manufacturing cost of the sensor is significantly reduced. This invention not only greatly improves energy utilization but also possesses advantages such as high stability, high sensitivity, low heat dissipation, and low hysteresis. The monolithically integrated flow rate and gas thermal conductivity sensor is characterized by its small size and high integration, effectively solving the problems of excessive size and poor adaptability caused by the simple stacking of traditional single-function sensors. Furthermore, this invention overcomes the shortcomings of existing gas flow rate and gas thermal conductivity sensors, such as low energy utilization, high cost, large heat dissipation, and limited sensitivity and response speed, while also possessing the advantages of low cost, simple fabrication process, and ease of mass production.

[0154] The above description is only a preferred embodiment of the present invention. It should be noted that for those skilled in the art, several improvements and modifications can be made without departing from the principle of the present invention, and these improvements and modifications should also be considered within the scope of protection of the present invention.

Claims

1. A CMOS-MEMS sensor integrating flow rate and gas thermal conductivity, characterized in that, It includes a substrate (1), a silicon dioxide structural layer (2) located on the substrate, and a circuit portion; In a direction parallel to the bottom surface of the substrate, the silicon dioxide structure layer (2) includes a first silicon dioxide structure layer, a second silicon dioxide structure layer, and a third silicon dioxide structure layer; the first silicon dioxide structure layer and the third silicon dioxide structure layer are located on both sides of the silicon dioxide structure layer; the second silicon dioxide structure layer includes a suspended portion and a non-suspended portion; the non-suspended portion is in contact with the substrate; A first PAD region and a first metal via are embedded in the first silicon dioxide structural layer; the first PAD region includes several metal layers; the first metal via penetrates other metal layers in the first PAD region except for the top metal layer; An ambient temperature sensing resistor (7) embedded in the first silicon dioxide structural layer and the third silicon dioxide structural layer; The first cavity (9) formed by the first silicon dioxide structural layer, the suspended portion of the second silicon dioxide structural layer, the non-suspended portion of the second silicon dioxide structural layer, and the substrate. Gas thermal conductivity sensor (8) suspended in the first cavity (9); A plurality of first through holes are provided between the first silicon dioxide structural layer and the second silicon dioxide structural layer. The plurality of first through holes connect the first cavity (9) with the outside world, so that the gas to be measured enters the first cavity (9) and comes into contact with the gas thermal conductivity sensor (8). Thermal insulation structure (10) located in the second silicon dioxide structural layer; The thermal insulation structure (10) includes a metal structural layer embedded in the suspended portion and the non-suspended portion; The thermal insulation structure (10) also includes a third metal via, which extends through a metal structure layer that penetrates the non-suspended portion to the substrate (1). The number of metal structure layers is ≥2, and the heat insulation structure (10) further includes a fourth metal via in the suspended portion of the adjacent metal structure layers. The metal structure layers are arranged parallel to the bottom of the substrate and adjacent metal structure layers are spaced apart. The second cavity (6) formed by the second silicon dioxide structural layer, the third silicon dioxide structural layer and the substrate is connected to the outside. Inside the second cavity (6), a first thermistor (3), a flow sensor heating resistor (4), and a second thermistor (5) are suspended sequentially in the direction from the first silicon dioxide structure layer to the third silicon dioxide structure layer. A second PAD region and a second metal via are embedded in the third silicon dioxide structural layer; the second PAD region includes several metal layers; the second metal via penetrates other metals in the second PAD region except for the top metal layer; Leads that are respectively connected to the first PAD region and the second PAD region.

2. The sensor according to claim 1, characterized in that, The ambient temperature sensing resistor (7) has a ring structure.

3. The sensor according to claim 1, characterized in that, The substrate (1) has a first pit and a second pit; the first pit is located between the first silicon dioxide structural layer and the second silicon dioxide structural layer, and the second pit is located between the second silicon dioxide structural layer and the third silicon dioxide structural layer; The first pit, together with the first silicon dioxide structural layer and the second silicon dioxide structural layer, forms a first cavity (9). The second pit, the second silicon dioxide structural layer, and the third silicon dioxide structural layer form a second cavity (6).

4. The sensor according to claim 1, characterized in that, The first thermistor (3) and the second thermistor (5) each have two thermistors.

5. The sensor according to claim 1, characterized in that, The first thermistor (3), the flow sensor heating resistor (4), and the second thermistor (5) are respectively wrapped with silicon dioxide.

6. The sensor according to claim 1, characterized in that, The sensor also includes: A passivation layer located on the silicon dioxide structural layer (2).

7. A method for manufacturing the sensor according to any one of claims 1 to 6, characterized in that, Includes the following steps: (a) A CMOS die is provided, the CMOS die comprising a substrate (1), a silicon dioxide structure layer (2) on the substrate, and a circuit portion; In a direction parallel to the bottom surface of the substrate, the silicon dioxide structure layer (2) includes a first silicon dioxide structure layer, a second silicon dioxide structure layer, and a third silicon dioxide structure layer; the first silicon dioxide structure layer and the third silicon dioxide structure layer are located on both sides of the silicon dioxide structure layer; the second silicon dioxide structure layer includes a suspended portion and a non-suspended portion; the non-suspended portion is in contact with the substrate; A first PAD region and a first metal via are embedded in the first silicon dioxide structural layer; the first PAD region includes several metal layers; the first metal via penetrates other metal layers in the first PAD region except for the top metal layer; An ambient temperature sensing resistor (7) embedded in the first silicon dioxide structural layer and the third silicon dioxide structural layer; Gas thermal conductivity sensor (8) located below the suspended portion on the surface of substrate (1); A plurality of first through holes are provided between the first silicon dioxide structural layer and the second silicon dioxide structural layer. The plurality of first through holes connect the gas thermal conductivity sensor (8) to the outside world. The plurality of first through holes are sealed by sacrificial metal. The space between the gas thermal conductivity sensor (8) and the suspended portion of the second silicon dioxide structure layer is sealed by sacrificial metal; Thermal insulation structure (10) located in the second silicon dioxide structural layer; A first thermistor (3), a flow sensor heating resistor (4), and a second thermistor (5) are sequentially arranged in the direction from the first silicon dioxide structure layer to the third silicon dioxide structure layer; the first thermistor (3), the flow sensor heating resistor (4), and the second thermistor (5) are sealed above by sacrificial metal; the first thermistor (3), the flow sensor heating resistor (4), and the second thermistor (5) are located between the second silicon dioxide structure layer and the third silicon dioxide structure layer, above the silicon substrate; The flow sensor heating resistor (4) is provided with a silicon dioxide layer above the first thermistor (3) and the second thermistor (5); second through holes are provided between the second silicon dioxide structure layer and the first thermistor (3), between the first thermistor (3) and the heating resistor (4), between the heating resistor (4) and the second thermistor (5), and between the second thermistor (5) and the third silicon dioxide structure layer, which are channels for etching the substrate; A second PAD region and a second metal via are embedded in the third silicon dioxide structural layer; the second PAD region includes several metal layers; the second metal via penetrates other metals in the second PAD region except for the top metal layer; The sacrificial metal is located above the first PAD region and the second PAD region respectively, and the third through hole connects the sacrificial metal to the top of the sensor; The top metal in the first PAD region and the second PAD region are separated from the sacrificial metal by a sacrificial silicon dioxide structure layer, which is used to protect the first PAD region and the second PAD region and prevent the first PAD region and the second PAD region from being etched away when the sacrificial metal is etched. (b) Remove all sacrificial metal from the CMOS die by wet etching; (c) The substrate between the second silicon dioxide structure layer and the third silicon dioxide structure layer in the chip obtained in step (b) is etched by DRIE to form a trench; (d) The chip obtained in step (c) is etched with sacrificial silicon dioxide by means of RIE to expose the metal PAD; (e) The substrate in the chip obtained in step (d) is etched by isotropic dry etching with XeF2, and the first thermistor (3), the flow sensor heating resistor (4), the second thermistor (5) and the gas thermal conductivity sensor (8) are suspended. (f) Bond the first metal PAD region and the second metal PAD region in the chip obtained in step (e) to the leads to obtain the sensor.

8. The application of the sensor according to any one of claims 1 to 6 or the sensor prepared by the preparation method according to claim 7 in measuring gas flow rate and gas thermal conductivity.

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