Memory dynamic configuration method and electronic device

Abstract

The disclosure provides a memory dynamic configuration method and electronic equipment, applied to the terminal technical field, which can set a larger TSD for a process with larger memory demand and a smaller TSD for a process with smaller memory demand, so as to better balance system performance and memory occupation. The method comprises the following steps: obtaining a local memory allocation value corresponding to a historical runtime of a process when the process is started; obtaining a local memory prediction value corresponding to a current runtime of the process according to a prediction model and the local memory allocation value corresponding to the historical runtime of the process; determining a first TSD quantity corresponding to the process according to the local memory prediction value corresponding to the current runtime of the process; obtaining a second TSD quantity corresponding to the process, the second TSD quantity being an initial TSD quantity corresponding to the process; and in the case that the first TSD quantity and the second TSD quantity are different, adjusting the second TSD quantity corresponding to the process to the first TSD quantity.

Description

Technical Field

[0001] This disclosure relates to the field of terminal technology, and in particular to a method for dynamic memory configuration and an electronic device. Background Technology

[0002] Scudo is a memory allocator introduced in Android 11 and above. Its main purpose is to provide a more secure and reliable memory allocation service for native applications.

[0003] When a thread in the operating system needs to allocate memory, Scudo first acquires Thread-Specific Data (TSD) and then allocates a memory block from the TSD. Since the number of TSDs is limited, allocation can lead to contention when multiple threads are waiting for allocation. Contention can generally be reduced by increasing the number of TSDs, which also improves system performance. However, increasing TSDs leads to increased caching and higher memory usage. Therefore, balancing system performance and memory consumption is a pressing issue that needs to be addressed. Summary of the Invention

[0004] This disclosure provides a method and electronic device for dynamic memory configuration, which sets a larger TSD for processes with large memory requirements and a smaller TSD for processes with small memory requirements, thereby better balancing system performance and memory usage.

[0005] To achieve the above objectives, the embodiments of this disclosure adopt the following technical solutions:

[0006] In a first aspect, this disclosure provides a method for dynamic memory allocation, the method comprising: first, obtaining the local memory allocation value corresponding to the historical runtime of the process when the process starts; then, obtaining the predicted local memory value corresponding to the current runtime of the process based on the prediction model and the local memory allocation value corresponding to the historical runtime of the process; then, determining the first TSD value corresponding to the process based on the predicted local memory value corresponding to the current runtime of the process; then, obtaining the second TSD value corresponding to the process, the second TSD value being the initial TSD value corresponding to the process; and finally, if the first TSD value and the second TSD value are different, adjusting the second TSD value corresponding to the process to the first TSD value.

[0007] Based on the dynamic memory allocation method of the first aspect, this disclosure, after process startup, can predict the local memory allocation value corresponding to the current runtime of the process based on the local memory allocation value and prediction model corresponding to the process's historical runtime. Then, based on the local memory prediction value corresponding to the current runtime of the process, the first TSD (Time Limits) quantity corresponding to the process is obtained. Then, the second TSD quantity is obtained. Since the second TSD quantity (i.e., the initial TSD quantity) is generated during the compilation stage and does not refer to the actual memory data of the process (i.e., the local memory allocation value corresponding to historical runtime), the second TSD quantity corresponding to the process may not meet the memory requirements. Therefore, when the first TSD quantity and the second TSD quantity are different, the TSD quantity of the process can be adjusted to the first TSD quantity. In this way, processes with large memory requirements can be set with larger TSD quantities, and processes with small memory requirements can be set with smaller TSD quantities, thereby better balancing system performance and memory usage.

[0008] In conjunction with the first aspect, another possible implementation method further includes: obtaining the actual local memory value corresponding to the current runtime of the process; if the actual local memory value corresponding to the current runtime of the process differs from the predicted local memory value, determining a third TSD based on the actual local memory value, and adjusting the first TSD value corresponding to the process to the third TSD value. Based on this scheme, this disclosure also considers the actual local memory value corresponding to the process runtime. If the actual local memory value corresponding to the current runtime differs from the predicted local memory value, a new third TSD value can be determined based on the actual local memory value, thereby adjusting the TSD value corresponding to the process according to the third TSD value. In this way, not only can the TSD value of the process be dynamically configured, but the TSD value corresponding to the process can also be made more in line with the usage requirements of the process.

[0009] In combination with the first aspect, in another possible implementation, the method further includes: the local memory allocation value corresponding to the historical running of the process includes the local memory allocation values corresponding to the process at a plurality of historical running moments; obtaining the predicted local memory value corresponding to the current running of the process according to the prediction model and the local memory allocation values corresponding to the historical running of the process includes: acquiring weight coefficients corresponding to the process at each historical running moment in the prediction model; obtaining the predicted local memory value corresponding to the current running of the process according to the weight coefficients corresponding to the process at each historical running moment and the local memory allocation values corresponding to each historical running moment. According to the solution, the predicted local memory value corresponding to the current running of the process is obtained according to data of a plurality of historical running moments (that is, the local memory allocation values corresponding to the process at the plurality of historical running moments) and the weight coefficients corresponding to each historical running moment in the prediction model, which means that data of a plurality of historical running moments of the process is referenced when determining the predicted local memory value corresponding to the current running of the process, thus enabling the obtained predicted local memory value corresponding to the current running of the process to be more accurate.

[0010] In combination with the first aspect, in another possible implementation, the prediction model satisfies the following expression:

[0011] M n =c1M n-1 +c2M n-2 +c3M n-3

[0012] wherein, M n is the predicted local memory value corresponding to the current running of the process; M n-1 is the local memory allocation value corresponding to the (n-1)th running of the process, M n-2 is the local memory allocation value corresponding to the (n-2)th running of the process; M n-3 is the local memory allocation value corresponding to the (n-3)th running of the process; c1 is the weight coefficient corresponding to the (n-1)th running of the process, c2 is the weight coefficient corresponding to the (n-2)th running of the process, c3 is the weight coefficient corresponding to the (n-3)th running of the process; 0 < c1 ≤ 1; 0 < c2 ≤ 1; 0 < c3 ≤ 1; and c1 + c2 + c3 = 1. An example of the prediction model is provided.

[0013] In conjunction with the first aspect, another possible implementation involves determining the first TSD quantity for a process based on the predicted local memory value corresponding to the process's current runtime. This includes: determining the first TSD quantity as a first value when the predicted local memory value is less than a first memory threshold; determining the first TSD quantity as a second value when the predicted local memory value is greater than the first memory threshold but less than a second memory threshold; the second value being greater than the first value; and determining the first TSD quantity as a third value when the predicted local memory value is greater than the second memory threshold; the third value being greater than the second value. Based on this scheme, it can be seen that this disclosure uses a first memory threshold and a second memory threshold to more finely classify the first TSD quantity. This ensures that when the predicted local memory value corresponding to the process's current runtime falls within different memory threshold ranges, a first TSD quantity that better matches the predicted local memory value can be obtained, thereby efficiently utilizing TSD.

[0014] In conjunction with the first aspect, in another possible implementation, the number of the first TSDs satisfies the following expression:

[0015]

[0016] Among them, M n Let σ1 be the predicted local memory value corresponding to the current runtime of the process, σ2 be the first memory threshold, and σ1 be the second memory threshold. An example of an expression satisfying the first TSD (Time Limit Distributed) is proposed.

[0017] In conjunction with the first aspect, another possible implementation involves determining the third TSD quantity based on the actual local memory value corresponding to the process's current runtime. This includes: determining the third TSD quantity as a fourth value when the actual local memory value corresponding to the process's current runtime is less than a third memory threshold; determining the third TSD quantity as a fifth value when the predicted local memory value corresponding to the process's current runtime is greater than the third memory threshold but less than the fourth memory threshold; and determining the third TSD quantity as a sixth value when the predicted local memory value corresponding to the process's current runtime is greater than the fourth memory threshold; and determining the sixth value as a sixth value. Based on this scheme, it can be seen that this disclosure provides a more refined classification of the third TSD quantity through the third and fourth memory thresholds. This ensures that when the actual local memory value corresponding to the process's current runtime falls within different memory threshold ranges, a third TSD quantity that better matches the actual local memory value corresponding to the current runtime can be obtained, thereby efficiently utilizing TSD.

[0018] In conjunction with the first aspect, in another possible implementation, the third TSD quantity satisfies the following expression:

[0019]

[0020] Among them, M i σ3 represents the actual local memory value corresponding to the current runtime of the process, σ4 represents the third memory threshold, and σ5 represents the fourth memory threshold.

[0021] In conjunction with the first aspect, another possible implementation method further includes: determining if the process is a core system process and adjusting the TSD (Transmission Scale) corresponding to the process to a first threshold; determining if the process is a non-core system process and adjusting the TSD corresponding to the process to a second threshold, where the second threshold is less than the first threshold. Based on this scheme, this disclosure sets the TSD corresponding to core system processes to be greater than the TSD corresponding to non-core system processes. Since core system processes require more memory, this approach better balances system performance and memory usage.

[0022] In conjunction with the first aspect, another possible implementation method further includes: determining the process as a preset application's process, and adjusting the TSD (Time-of-Slot) count of the preset application's main process and child processes to a third threshold; the preset application is an application that occupies 1GB or more of memory; determining the process as a non-preset application's process, and adjusting the TSD count of the non-preset application's main process to the third threshold, and adjusting the TSD count of the non-preset application's child processes to a fourth threshold. Generally, the main process requires more memory than child processes. Therefore, this disclosure sets the TSD count of the preset application's main process, child processes, and the non-preset application's main process to be greater than the TSD count of the non-preset application's child processes. This better balances system performance and memory usage.

[0023] Secondly, embodiments of this disclosure provide a memory dynamic configuration device, which can be applied to electronic devices to implement the method described in the first aspect. The functionality of this memory dynamic configuration device can be implemented in hardware or by hardware executing corresponding software. The hardware or software includes one or more modules corresponding to the aforementioned functions, such as an acquisition module, a creation module, and a storage module.

[0024] The acquisition module is configured to acquire the local memory allocation value corresponding to the historical runtime of the process when the process starts; the determination module is configured to obtain the predicted local memory value corresponding to the current runtime of the process based on the prediction model and the local memory allocation value corresponding to the historical runtime of the process; and determine the first TSD value corresponding to the process based on the predicted local memory value corresponding to the current runtime of the process; the acquisition module is also configured to acquire the second TSD value corresponding to the process, the second TSD value being the initial TSD value corresponding to the process; and the adjustment module is configured to adjust the second TSD value corresponding to the process to the first TSD value if the first TSD value and the second TSD value are different.

[0025] In conjunction with the second aspect, in one possible implementation, the acquisition module is further configured to acquire the actual value of the local memory corresponding to the current runtime of the process; the determination module is further configured to, when the actual value of the local memory corresponding to the current runtime of the process and the predicted value of the local memory corresponding to the current runtime of the process are different, determine the third TSD number based on the actual value of the local memory corresponding to the current runtime of the process, and adjust the first TSD number corresponding to the process to the third TSD number.

[0026] In conjunction with the second aspect, in one possible implementation, the local memory allocation value corresponding to the historical runtime of the process includes the local memory allocation value corresponding to the process at multiple historical runtime moments; the acquisition module is further configured to acquire the weight coefficients in the prediction model corresponding to the process at each historical runtime moment; the determination module is further configured to obtain the predicted local memory value corresponding to the current runtime of the process based on the weight coefficients corresponding to the process at each historical runtime moment and the local memory allocation value corresponding to each historical runtime moment.

[0027] In conjunction with the second aspect, in one possible implementation, the prediction model satisfies the following expression:

[0028] M n =c1M n-1 +c2M n-2 +c3M n-3

[0029] Among them, M n M is the predicted local memory value corresponding to the current runtime of the process. n-1 M is the local memory allocation value corresponding to the (n-1)th run of the process. n-2 The local memory allocation value corresponding to the (n-2)th run of the process; M n-3is a local memory allocation value corresponding to the (n-3)th operation of the process; c1 is a weight coefficient corresponding to the (n-1)th operation of the process, c2 is a weight coefficient corresponding to the (n-2)th operation of the process, c3 is a weight coefficient corresponding to the (n-3)th operation of the process; 0<c1≤1; 0<c2≤1; 0<c3≤1; and c1+c2+c3=1.

[0030] In combination with the second aspect, in a possible implementation, the determining module is further configured to: determine that the first TSD number is a first numerical value when a predicted local memory value corresponding to current operation of the process is less than a first memory threshold; determine that the first TSD number is a second numerical value when the predicted local memory value corresponding to current operation of the process is greater than the first memory threshold and less than a second memory threshold, wherein the second numerical value is greater than the first numerical value; and determine that the first TSD number is a third numerical value when the predicted local memory value corresponding to current operation of the process is greater than the second memory threshold, wherein the third numerical value is greater than the second numerical value.

[0031] In combination with the second aspect, in a possible implementation, the first TSD number satisfies the following expression:

[0032]

[0033] wherein, M n is the predicted local memory value corresponding to current operation of the process, σ1 is the first memory threshold, and σ2 is the second memory threshold.

[0034] In combination with the second aspect, in a possible implementation, the determining module is further configured to: determine that the third TSD number is a fourth numerical value when an actual local memory value corresponding to current operation of the process is less than a third memory threshold; determine that the third TSD number is a fifth numerical value when the predicted local memory value corresponding to current operation of the process is greater than the third memory threshold and less than a fourth memory threshold, wherein the fifth numerical value is greater than the fourth numerical value; and determine that the third TSD number is a sixth numerical value when the predicted local memory value corresponding to current operation of the process is greater than the fourth memory threshold, wherein the sixth numerical value is greater than the fifth numerical value.

[0035] In combination with the second aspect, in a possible implementation, the third TSD number satisfies the following expression:

[0036]

[0037] wherein, M i is an actual local memory value corresponding to current operation of the process, σ3 is the third memory threshold, and σ4 is the fourth memory threshold.

[0038] In conjunction with the second aspect, in one possible implementation, the determining module is further configured to determine if the process is a core system process and adjust the TSD count of the process to a first threshold; or to determine if the process is a non-core system process and adjust the TSD count of the process to a second threshold, wherein the second threshold is less than the first threshold.

[0039] In conjunction with the second aspect, in one possible implementation, the determining module is further configured to determine the process as a process of a preset application, and adjust the TSD count of the main process and child processes of the preset application to a third threshold; the preset application is an application that occupies 1G or more of memory; if the determined process is a process of a non-preset application, adjust the TSD count of the main process of the non-preset application to a third threshold, and adjust the TSD count of the child processes of the non-preset application to a fourth threshold, where the fourth threshold is less than the third threshold.

[0040] Thirdly, this disclosure provides an electronic device, including: a memory, a display screen, and one or more processors; the memory, the display screen, and the processors are coupled. The memory stores computer program code, including computer instructions; when the electronic device is running, the processor executes one or more computer instructions stored in the memory to cause the electronic device to perform a dynamic memory configuration method as described in any of the first aspects above.

[0041] Fourthly, this disclosure provides a computer storage medium including computer instructions that, when executed on an electronic device, cause the electronic device to perform a dynamic memory configuration method as described in any of the first aspects.

[0042] Fifthly, this disclosure provides a computer program product that, when run on an electronic device, causes the electronic device to execute a memory dynamic configuration method as described in any of the first aspects.

[0043] In a sixth aspect, an apparatus (e.g., a system-on-a-chip) is provided, comprising a processor for supporting an electronic device in performing the functions described in the first aspect above. In one possible design, the apparatus further comprises a memory for storing program instructions and data necessary for the electronic device. When the apparatus is a system-on-a-chip, it may be composed of chips or may include chips and other discrete devices.

[0044] It should be understood that the beneficial effects of the second to sixth aspects mentioned above can be found in the relevant descriptions in the first aspect mentioned above, and will not be repeated here. Attached Figure Description

[0045] Figure 1 This is a software structure block diagram of an electronic device provided in an embodiment of the present disclosure.

[0046] Figure 2 This is a schematic diagram of primary memory allocation provided in an embodiment of this disclosure.

[0047] Figure 3 This is a schematic diagram of the hardware structure of an electronic device provided in an embodiment of this disclosure.

[0048] Figure 4 This is one of the schematic diagrams of the software structure of an electronic device provided in an embodiment of this disclosure.

[0049] Figure 5 This is a second schematic diagram of the software structure of an electronic device provided in an embodiment of this disclosure.

[0050] Figure 6 This is a flowchart illustrating a dynamic memory configuration method provided in an embodiment of this disclosure.

[0051] Figure 7 This is a schematic diagram of the structure of a chip system provided in an embodiment of this disclosure. Detailed Implementation

[0052] The technical solutions of the embodiments of this disclosure will be described below with reference to the accompanying drawings. In the description of this disclosure, unless otherwise stated, " / " indicates that the objects before and after are in an "or" relationship. For example, A / B can represent A or B. "And / or" in this disclosure is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A alone, A and B simultaneously, and B alone, where A and B can be singular or plural. Furthermore, in the description of this disclosure, unless otherwise stated, "multiple" refers to two or more. "At least one of the following" or similar expressions refer to any combination of these items, including any combination of single or plural items. For example, at least one of a, b, or c can represent: a, b, c, ab, ac, bc, or abc, where a, b, and c can be single or multiple. Furthermore, to facilitate a clear description of the technical solutions of the embodiments of this disclosure, the terms "first" and "second" are used in the embodiments of this disclosure to distinguish identical or similar items with substantially the same function and effect. Those skilled in the art will understand that the terms "first" and "second" do not limit the quantity or execution order, and that "first" and "second" are not necessarily different. Meanwhile, in the embodiments of this disclosure, words such as "exemplary" or "for example" are used to indicate that something is being used as an example, illustration, or description. Any embodiment or design scheme described as "exemplary" or "for example" in the embodiments of this disclosure should not be construed as being more preferred or advantageous than other embodiments or design schemes. Specifically, the use of words such as "exemplary" or "for example" is intended to present the relevant concepts in a concrete manner for ease of understanding.

[0053] Furthermore, the network architecture and business scenarios described in the embodiments of this disclosure are for the purpose of more clearly illustrating the technical solutions of the embodiments of this disclosure, and do not constitute a limitation on the technical solutions provided in the embodiments of this disclosure. As those skilled in the art will know, with the evolution of network architecture and the emergence of new business scenarios, the technical solutions provided in the embodiments of this disclosure are also applicable to similar technical problems.

[0054] To ensure clarity and conciseness in the description of the following embodiments, a brief introduction to the relevant concepts or technologies is given first:

[0055] (1) Process: A process is an instance of a program running in the operating system. A process has its own memory space, registers, stack, and file descriptors. A process can communicate and interact with other processes through system calls.

[0056] (2) Thread: The smallest unit of computation that the operating system can schedule. A thread is contained within a process and is the actual unit of operation of the process. A thread refers to a single sequential flow of control within a process. Multiple threads can run concurrently within a process, and each thread executes different tasks in parallel.

[0057] (3) Memory: Used to store programs and data when a process or thread is running, also known as executable memory.

[0058] (4) Freelist: This refers to a collection of memory blocks used to store available memory blocks. In Scudo, each TSD has a corresponding freelist used to store memory blocks available for thread use. When the memory blocks in the TSD are insufficient, the TSD will retrieve new memory blocks from its corresponding freelist to fill the cache.

[0059] With the development of operating systems (such as Android), Android has now been updated to Android 13. An operating system is system software that runs on the hardware of electronic devices (such as mobile phones, computers, etc.). It manages and controls the hardware resources of electronic devices and provides a good operating environment for upper-layer applications.

[0060] To better manage memory allocation for processes in electronic devices, starting with Android 11, electronic devices use Scudo as the primary memory allocator for memory allocation and management.

[0061] Figure 1 An exemplary block diagram of the software structure of an electronic device is shown.

[0062] Generally speaking, the implementation of electronic device functions requires not only hardware support but also software cooperation. The software system of electronic devices can adopt a layered architecture, event-driven architecture, microkernel architecture, microservice architecture, or cloud architecture. Figure 1 The illustrated embodiment uses a layered architecture. Taking the system as an example, the software structure of the electronic device is illustrated. Figure 1 The software architecture diagram shown is specifically used to illustrate the memory allocation architecture of electronic devices. For example... Figure 1 As shown, this layered architecture divides the software into several layers, from top to bottom: the application layer, the system library (also known as the native layer), and the kernel layer.

[0063] The application layer includes applications that run on the operating system of electronic devices. These applications require memory to store data and code.

[0064] The system library includes Scudo. Scudo helps applications better manage and release memory. Scudo also provides other functions such as memory inspection, memory leak detection, and memory allocation optimization. As an intermediate layer, Scudo provides better control and monitoring between the application layer and the kernel layer.

[0065] The kernel layer includes a memory management module. When an application process is running, the memory management module is used to allocate and release memory space for the process.

[0066] In some examples, such as Figure 1 As shown, applications in the application layer can use the `malloc` function to request memory from the Scudo library in the system library, and use the `free` function to release memory from Scudo. The `malloc` and `free` functions are provided in the C language. The `malloc` function is used for dynamic memory allocation. The `free` function is used for memory release. When an application needs to allocate memory, it can call the `malloc` function. The `malloc` function can accept a memory parameter and return the address of the allocated memory. This memory parameter describes the size of the memory to be allocated. When the application no longer needs the memory, it can call the `free` function to release the memory.

[0067] For example, when an application is running, its process can send a memory allocation request to Scudo using the malloc function. Upon receiving the request, Scudo can allocate memory to the application's process in response. The application's process can also send a memory release request to Scudo using the free function. Upon receiving this request, Scudo can release the memory in response.

[0068] In some examples, such as Figure 1 As shown, Scudo can use the memory mapping function (mmap) to request the memory management module in the kernel layer to map files or devices into memory, and it can also use the munmap function to request the memory management module to release memory.

[0069] The mmap function maps files or devices into memory, allowing application processes to access these resources more efficiently. By mapping files or devices into a process's virtual address space, mmap enables processes to access these resources as if they were in memory, thus avoiding unnecessary file I / O operations and improving efficiency.

[0070] When an application's process no longer needs a block of memory, it can call the `munmap` function to release that memory. The `munmap` function removes the memory from the process's virtual address space and releases the corresponding resources.

[0071] In addition, the memory management module can provide other memory management functions, such as the `madvise` function. Using `madvise`, the memory management module can determine the memory region corresponding to the read and write operations performed by an application process. This allows the memory management module to better optimize memory management and improve the overall performance of the operating system.

[0072] In combination with the above Figure 1 As shown in the memory allocation architecture, Scudo plays a crucial role in the memory allocation process. Scudo is a dynamic user-mode memory allocator (also known as a heap allocator) designed to defend against heap-related vulnerabilities (such as heap-based buffer overflows, free-and-reuse, and double-free) while maintaining good performance.

[0073] Scudo consists of four components: the Primary Allocator, the Secondary Allocator, the TSD (Thread-Specific Memory Disk), and the Quarantine. The Primary Allocator is the core of Scudo, responsible for quickly and efficiently allocating smaller blocks of memory. Primary allocators typically allocate memory blocks smaller than one page, allowing for rapid response to allocation requests. Secondary allocators allocate larger blocks of memory, usually between several pages. The TSD is used to store thread-specific data. Typically, each thread has a unique TSD.

[0074] Quarantine is one of the safety mechanisms of the Scudo allocator, used to isolate freed memory blocks. When an application frees memory, the memory block is not immediately returned to the backend (i.e., the Primary Allocator) collection, but is first placed in a Quarantine. This ensures that freed memory blocks are not immediately reallocated, avoiding potential use-after-free vulnerabilities. Quarantine periodically checks these memory blocks and puts them back to the backend collection for reuse.

[0075] Since Primary is a core part of Scudo, the following can be combined with... Figure 2 The process of primary memory allocation is explained in detail. Figure 2As shown, in order to improve memory allocation efficiency, Scudo can use multiple TSDs (e.g., TSD1, ..., TSD8) in the TSD Array as a cache. When multiple threads (e.g., thread 0, thread 1, ..., thread n-1, thread n) access the memory concurrently, Scudo can use multiple TSDs to support concurrent access by multiple threads.

[0076] To facilitate the execution of multiple threads, Figure 2 The paper also proposes a thread scheduling algorithm called Round robin, which can allocate time slices to each thread in a cyclical order to ensure that each thread gets a chance to execute.

[0077] When multiple TSDs are used as caches, each TSD also stores a cache array (PerClassArray) for allocating and freeing memory. Scudo also includes a memory allocator, SizeClassAllocatorLocalCache, in which PerClassArray is set. SizeClassAllocatorLocalCache categorizes memory blocks by size and stores the categorized memory blocks in PerClassArray. Thus, when a thread requests to allocate memory of a specific size, the TSD can quickly find and allocate the corresponding memory block through SizeClassAllocatorLocalCache.

[0078] like Figure 2 As shown, PerClassArray contains multiple PerClassArray[i] (e.g., PerClassArray[0], PerClassArray[1], ..., PerClassArray

[38] , etc.). Here, i represents different classes. Each PerClassArray[i] stores a memory block (Chunk) belonging to the same class.

[0079] PerClassArray also includes a data structure called PerClass for organizing multiple classes and their memory blocks. PerClass comprises multiple Classes, each containing one or more memory blocks (e.g., memory block [0], memory block [1], ..., memory block [n], etc.), each storing object instances belonging to the same class. In Scudo, memory blocks [0], [1], ..., [n] represent memory blocks of different classes within PerClass. They are managed and cached through PerClassArray for quick allocation and release of memory when needed.

[0080] Additionally, Scudo includes the data structure RegionInfoArray. RegionInfoArray is used to track and manage the status and metadata of each TSD. RegionInfoArray is an array, with each element corresponding to a class. RegionInfoArray includes status information for multiple classes (e.g., Class0, Class1, Class38, etc.) in the cache array. This status information could include a list of free memory blocks, pointers to other classes, the number of free memory blocks, the number of allocated memory blocks, etc. Each class corresponds to a memory block of a specific size, used for allocating and freeing memory of that size.

[0081] Scudo also includes the data structure TransferBatch, which is used to populate a batch of memory blocks obtained from the freelist into a TSD. TransferBatch includes information about the memory blocks, such as their starting address and size. RegionInfoArray can be used in conjunction with TransferBatch. As mentioned above, RegionInfoArray tracks the status and metadata of each TSD. Once RegionInfoArray has tracked the status and metadata of each TSD, it can manage and operate the TransferBatch process based on this information to ensure correctness and consistency when populating the TSD.

[0082] Combination Figure 2 When a thread needs to allocate memory, it can first obtain available memory blocks from the TSD's cache array (i.e., PerClassArray), instead of always obtaining them from the Primary allocator's freelist. When the memory blocks in the TSD's PerClassArray are used up, a batch of memory blocks can be obtained from the Primary allocator's freelist using the TransferBatch mechanism and added to the TSD's PerClassArray.

[0083] When a thread needs to release memory, it can first attempt to release the memory to the class corresponding to the PerClassArray in the TSD. If the TSD is full, meaning there are not enough free memory blocks in the PerClassArray of the TSD, Scudo will choose to release half of the memory blocks and return them to the backend freelist so that other threads can allocate and use them again from the freelist. In this way, Scudo provides an efficient memory allocation and release mechanism while supporting multi-threaded concurrent access.

[0084] Based on the above, we know that when a thread allocates memory, it first needs to acquire a Time Scale (TSD) and then allocate a memory block from the TSD. Since the number of TSDs is limited, contention is inevitable when multiple threads need to allocate memory. In this situation, increasing the TSD can reduce contention and improve system memory allocation performance. However, increasing the TSD leads to more caching and increased memory usage. Therefore, balancing system performance and memory usage is a pressing issue that needs to be addressed.

[0085] Furthermore, the Android operating system contains at least two hundred processes, and the number of threads and memory requirements vary significantly among different processes. Therefore, this disclosure provides a dynamic memory allocation method that sets a larger TSD for processes with higher memory requirements and a smaller TSD for processes with lower memory requirements, thereby better balancing system performance and memory usage.

[0086] The electronic device in this disclosure can be a mobile phone, tablet computer, ultra-mobile personal computer (UMPC), netbook, as well as cellular phone, personal digital assistant (PDA), personal computer (PC), augmented reality (AR) / virtual reality (VR) device, etc., which can interact with other devices. The embodiments of this disclosure do not impose any special limitations on the specific form of the electronic device.

[0087] For example, Figure 3 A schematic diagram of an electronic device is shown. For example... Figure 3As shown, the electronic device may include a processor 310, an external memory interface 320, an internal memory 321, a universal serial bus (USB) interface 330, a charging management module 340, a power management module 341, a battery 342, an antenna 1, an antenna 2, a mobile communication module 350, a wireless communication module 360, an audio module 370, a speaker 370A, a receiver 370B, a microphone 370C, a headphone jack 370D, a sensor module 380, buttons 390, a motor 391, an indicator 392, a camera 393, a display screen 394, and a subscriber identification module (SIM) card interface 395, etc. The sensor module 380 may include a pressure sensor 380A, a gyroscope sensor 380B, a barometric pressure sensor 380C, a magnetic sensor 380D, an accelerometer sensor 380E, a distance sensor 380F, a proximity light sensor 380G, a fingerprint sensor 380H, a temperature sensor 380J, a touch sensor 380K, an ambient light sensor 380L, a bone conduction sensor 380M, etc.

[0088] It is understood that the structure illustrated in this embodiment does not constitute a specific limitation on the electronic device. In other embodiments, the electronic device may include more or fewer components than illustrated, or combine some components, or split some components, or have different component arrangements. The illustrated components may be implemented in hardware, software, or a combination of software and hardware.

[0089] Processor 310 may include one or more processing units, such as: application processor (AP), modem processor, graphics processing unit (GPU), image signal processor (ISP), controller, memory, video codec, digital signal processor (DSP), baseband processor, and / or neural network processing unit (NPU), etc. The different processing units may be independent devices or integrated into one or more processors.

[0090] A controller can be the nerve center and command center of an electronic device. Based on the instruction opcode and timing signals, the controller generates operation control signals to control the fetching and execution of instructions.

[0091] The processor 310 may also include a memory for storing instructions and data. In some embodiments, the memory in the processor 310 is a cache memory. This memory can store instructions or data that the processor 310 has just used or that are used repeatedly. If the processor 310 needs to use the instruction or data again, it can retrieve it directly from the memory. This avoids repeated accesses, reduces the waiting time of the processor 310, and thus improves the efficiency of the system.

[0092] In some embodiments, the processor 310 may include one or more interfaces. Interfaces may include an inter-integrated circuit (I2C) interface, an inter-integrated circuit sound (I2S) interface, a pulse code modulation (PCM) interface, a universal asynchronous receiver / transmitter (UART) interface, a mobile industry processor interface (MIPI), a general-purpose input / output (GPIO) interface, a subscriber identity module (SIM) interface, and / or a universal serial bus (USB) interface, etc.

[0093] The wireless communication function of electronic devices can be realized through antenna 1, antenna 2, mobile communication module 350, wireless communication module 360, modem processor and baseband processor, etc.

[0094] Antenna 1 and antenna 2 are used to transmit and receive electromagnetic wave signals. Each antenna in the electronic device can be used to cover one or more communication frequency bands. Different antennas can also be reused to improve antenna utilization. For example, antenna 1 can be reused as a diversity antenna for a wireless local area network. In some other embodiments, the antennas can be used in conjunction with a tuning switch.

[0095] The mobile communication module 350 can provide solutions for wireless communication applications including 2G / 3G / 4G / 5G in electronic devices. The mobile communication module 350 may include at least one filter, switch, power amplifier, low noise amplifier (LNA), etc. The mobile communication module 350 can receive electromagnetic waves via antenna 1, and perform filtering, amplification, and other processing on the received electromagnetic waves before transmitting them to a modem processor for demodulation. The mobile communication module 350 can also amplify the signal modulated by the modem processor and convert it into electromagnetic waves for radiation via antenna 1. In some embodiments, at least some functional modules of the mobile communication module 350 may be housed in the processor 310. In some embodiments, at least some functional modules of the mobile communication module 350 and at least some modules of the processor 310 may be housed in the same device.

[0096] The wireless communication module 360 ​​can provide solutions for wireless communication applications in electronic devices, including wireless local area networks (WLANs) (such as wireless fidelity (Wi-Fi) networks), Bluetooth (BT), global navigation satellite system (GNSS), frequency modulation (FM), near field communication (NFC), and infrared (IR) technologies. The wireless communication module 360 ​​can be one or more devices integrating at least one communication processing module. The wireless communication module 360 ​​receives electromagnetic waves via antenna 2, performs frequency modulation and filtering of the electromagnetic wave signals, and sends the processed signal to processor 310. The wireless communication module 360 ​​can also receive signals to be transmitted from processor 310, perform frequency modulation and amplification, and convert them into electromagnetic waves for radiation via antenna 2.

[0097] In some embodiments, antenna 1 of the electronic device is coupled to mobile communication module 350, and antenna 2 is coupled to wireless communication module 360, enabling the electronic device to communicate with networks and other devices via wireless communication technology. Wireless communication technology may include Global System for Mobile Communications (GSM), General Packet Radio Service (GPRS), Code Division Multiple Access (CDMA), Wideband Code Division Multiple Access (WCDMA), Time-Division Code Division Multiple Access (TD-SCDMA), Long Term Evolution (LTE), BT, GNSS, WLAN, NFC, FM, and / or IR technologies, etc.

[0098] Electronic devices implement display functions through a GPU, a display screen 394, and an application processor. The GPU is a microprocessor for image processing, connecting the display screen 394 and the application processor. The GPU performs mathematical and geometric calculations and is used for graphics rendering. The processor 310 may include one or more GPUs, which execute program instructions to generate or modify display information.

[0099] Display screen 394 is used to display images, videos, etc. Display screen 394 includes a display panel. The display panel may be a liquid crystal display (LCD), an organic light-emitting diode (OLED), an active-matrix organic light-emitting diode (AMOLED), a flexible light-emitting diode (FLED), a Mini LED, a MicroLED, a Micro-OLED, a quantum dot light-emitting diode (QLED), etc. In some embodiments, the electronic device may include one or N displays 394, where N is a positive integer greater than 1.

[0100] The electronic device can implement shooting functions through an ISP, camera 393, video codec, GPU, display 394, and application processor. In some embodiments, the electronic device may include one or N cameras 393, where N is a positive integer greater than 1.

[0101] Internal memory 321 can be used to store executable program code, including instructions. Processor 310 executes various functional applications and data processing of the electronic device by running the instructions stored in internal memory 321. Internal memory 321 may include a program storage area and a data storage area. The program storage area may store the operating system, at least one application program required for a function (such as sound playback, image playback, etc.), etc. The data storage area may store data generated during the use of the electronic device (such as audio data, phonebook, etc.). Furthermore, internal memory 321 may include high-speed random access memory, and may also include non-volatile memory, such as at least one disk storage device, flash memory device, universal flash storage (UFS), etc.

[0102] In addition, an operating system runs on top of the aforementioned components, for example... Windows Applications can be installed and run on this operating system. In other embodiments, the electronic device may run multiple operating systems.

[0103] It should be understood that Figure 3 The hardware modules included in the illustrated electronic device are merely illustrative and do not limit the specific structure of the electronic device. In fact, the electronic device provided in this disclosure may also include other hardware modules that interact with the hardware modules illustrated in the figures; these are not specifically limited here. For example, the electronic device may also include a flash, a miniature projector, etc. Furthermore, if the electronic device is a PC, it may also include components such as a keyboard and a mouse.

[0104] Understandably, the implementation of electronic device functions generally requires not only hardware support but also software cooperation.

[0105] The software system of the aforementioned electronic device can adopt a layered architecture, event-driven architecture, microkernel architecture, microservice architecture, or cloud architecture. This disclosure embodiment uses a layered architecture. Taking the system as an example, the software structure of the electronic device is illustrated.

[0106] Figure 4 This is a software structure block diagram of the electronic device provided in the embodiments of this disclosure.

[0107] A layered architecture divides software into several layers, each with a clear role and function. Layers communicate with each other through software interfaces. In some embodiments, the Android operating system is divided into four layers, from top to bottom: the application layer, the application framework layer, the Android runtime and system libraries, and the kernel layer.

[0108] The application layer can include a series of application packages. For example... Figure 4 As shown, the application package can include applications such as camera, gallery, calendar, phone, map, navigation, WLAN, Bluetooth, music, video, and SMS. The application framework layer provides application programming interfaces (APIs) and a programming framework for the applications in the application layer. The application framework layer includes some predefined functions.

[0109] Understandably, the application layer can include multiple applications, which may be of the same or different types. For example, the application layer may include multiple shopping applications, all of which are of the same type: shopping. The application layer may also include map applications and communication applications, which may be of different types.

[0110] like Figure 4 As shown, the application framework layer may include a window manager, content provider, view system, phone manager, resource manager, notification manager, etc.

[0111] The window manager is used to manage windowed applications. It can retrieve screen size, determine the presence of a status bar, lock the screen, and capture screenshots, among other things.

[0112] Content providers store and retrieve data, making that data accessible to applications. This data can include videos, images, audio, phone calls made and received, browsing history and bookmarks, phone books, and more.

[0113] A view system includes visual controls, such as controls for displaying text and controls for displaying images. View systems can be used to build applications. A display interface can consist of one or more views. For example, a display interface including a text notification icon could include views for displaying text and views for displaying images.

[0114] A phone manager is used to provide communication functions for electronic devices. For example, it manages call status (including connection and disconnection).

[0115] The file explorer provides applications with various resources, such as localized strings, icons, images, layout files, video files, and more.

[0116] The notification manager allows applications to display notifications in the status bar. These notifications can be used to deliver informational messages and can disappear automatically after a short pause, requiring no user interaction. For example, the notification manager can be used to notify users of completed downloads or message alerts. The notification manager can also display notifications as icons or scrolling text in the top status bar, such as notifications from background applications, or as dialog boxes on the screen. Examples include displaying text messages in the status bar, emitting sounds, vibrating electronic devices, and flashing indicator lights.

[0117] The Android Runtime comprises the core libraries and the virtual machine. The Android Runtime is responsible for scheduling and managing the Android system. The core libraries consist of two parts: one part contains the functionalities that Java calls, and the other part contains the core Android libraries. The application layer and application framework layer run in the virtual machine. The virtual machine executes the Java files of the application layer and application framework layer as binary files. The virtual machine is used to perform functions such as object lifecycle management, stack management, thread management, security and exception management, and garbage collection.

[0118] System libraries can include multiple functional modules. For example: surface manager, media libraries, 3D graphics processing libraries (e.g., OpenGL ES), 2D graphics engines (e.g., SGL), etc.

[0119] The Surface Manager is used to manage the display subsystem and provides the fusion of two-dimensional and three-dimensional layers for multiple applications.

[0120] The media library supports playback and recording of various common audio and video formats, as well as still image files. It also supports multiple audio and video encoding formats.

[0121] The 3D graphics processing library is used to implement 3D graphics drawing, image rendering, compositing, and layer processing.

[0122] A 2D graphics engine is a drawing engine for 2D drawing.

[0123] The kernel layer is the layer between hardware and software. The kernel layer contains at least the display driver, camera driver, audio driver, and sensor driver.

[0124] The methods described in the following embodiments can all be implemented in electronic devices having the above-described hardware or software structures.

[0125] In some examples, in order to implement the dynamic memory allocation method provided in the embodiments of this disclosure, in Figure 4 Based on the software structure block diagram of the electronic device shown, such as Figure 5 As shown, the application framework layer may also include system services. System services include a memory management module, which comprises a local memory prediction submodule and a TSD (Total Memory Distance) quantity decision submodule.

[0126] The memory management module is used to control the number of TSDs for all processes.

[0127] The local memory prediction submodule is used to obtain the local memory allocation values ​​corresponding to the historical runtime of all processes; based on the local memory allocation values ​​corresponding to the historical runtime of the processes and the prediction module, it determines the local memory prediction value corresponding to the current runtime of the process; and generates a first notification based on the local memory prediction value corresponding to the current runtime of the process, and sends the first notification to the TSD quantity decision submodule. The first notification is used to request the TSD quantity decision submodule to determine the first TSD quantity corresponding to the process based on the local memory prediction value corresponding to the current runtime of the process. The first notification includes the local memory prediction value corresponding to the current runtime of the process.

[0128] The TSD quantity decision submodule receives a first notification; in response to the first notification, it determines the first TSD quantity for the process based on the predicted local memory value corresponding to the process's current runtime; it obtains the second TSD quantity for the process; and it compares the first TSD quantity with the second TSD quantity. If the first TSD quantity and the second TSD quantity are different, it generates a second notification and sends the second notification to the local cache setting module. The second notification requests the local cache setting module to adjust the TSD quantity for the process to the first TSD quantity. The second notification includes the first TSD quantity.

[0129] For example, when a process needs to interact with hardware, it needs to use resources from system libraries. For instance, when a process needs to read a file from the hard drive, it can use the system library's file system driver to access the file. Furthermore, system libraries can also perform tasks through processes, such as starting a service or running an application.

[0130] like Figure 5 As shown, the system library may also include a local cache setting module and Scudo. The local cache setting module is used to receive a second notification; in response to the second notification, it adjusts the TSD count corresponding to the process to the first TSD count.

[0131] Scudo is integrated into processes and used to configure process memory allocation. Scudo also includes a local cache dynamic adjustment module and a third TSD (Third TSD). The local cache dynamic adjustment module obtains the actual and predicted local memory values ​​for the process at runtime; it compares these values, and if they differ, it determines the third TSD based on the actual local memory value and adjusts the process's TSD accordingly. Generally, Scudo allows memory allocation and deallocation using functions such as malloc, calloc, and free.

[0132] In some examples, when a process starts, the memory management module in the system service can manage the TSD (Time-of-Stake) of the process based on the process's memory requirements. For instance, when a process starts, the local memory prediction submodule can determine the predicted local memory value for the current runtime of the process based on the local memory allocation values ​​corresponding to the process's historical runtime. Based on this predicted local memory value, it generates a first notification and sends it to the TSD quantity decision submodule. The TSD quantity decision submodule then responds to the first notification and determines the first TSD value for the process based on the predicted local memory value for the current runtime of the process in the first notification. The TSD quantity decision submodule can also obtain the second TSD value for the process. It then compares the first and second TSD values. If the first and second TSD values ​​differ, it sends a second notification to the local cache setting module. The local cache setting module then responds to the second notification and adjusts the TSD value for the process to the first TSD value.

[0133] Additionally, Scudo's local cache dynamic adjustment module can obtain both the actual and predicted local memory values ​​for the currently running process. It then compares these values. If they differ, it determines the third TSD (Third Time Limit) for the process based on the actual local memory value and adjusts the process's TSD accordingly.

[0134] The following describes in detail, with reference to the accompanying drawings, a method for dynamically configuring memory according to an embodiment of this disclosure. This method can be applied to the aforementioned electronic device. Figure 6 As shown, the method specifically includes:

[0135] Step 601: When the process starts, the local memory prediction submodule obtains the local memory allocation value corresponding to the historical runtime of the process.

[0136] The local memory allocation values ​​corresponding to the historical runtime of the process include the local memory allocation values ​​corresponding to multiple historical runtime moments of the process.

[0137] When a process starts, the local memory prediction submodule can obtain the local memory allocation value corresponding to the process's historical runtime, so as to use the local memory allocation value corresponding to the process's historical runtime to determine the local memory prediction value corresponding to the process's current runtime.

[0138] In some examples, when an application is triggered in the operating system, it can invoke the corresponding process to launch, thereby implementing the application's functionality. For example, for a music playback application, the process could be the foreground playback process, background playback process, foreground display process, background caching process, etc., corresponding to the music playback application. A process can also be a process corresponding to a system application, such as the foreground shooting process of a camera application, or the background Bluetooth data transmission process of a Bluetooth application. A process can also be a system server process, such as Android... TM System processes. A process can also be a middleware process, such as a process using C or C++ code; a file encryption / decryption process; an encoding / decoding process, etc. A process can also be an empty process run by the operating system when performing process management functions, etc. This disclosure does not limit the type of process.

[0139] In some examples, the local memory allocation values ​​obtained by the local memory prediction submodule for multiple historical runtime moments can be: the local memory allocation values ​​obtained by the local memory prediction submodule for the process in the three most recent historical runtimes. For example, if the process is process A, the local memory allocation value for process A in the three most recent historical runtimes is MA. n-1 MA n-2 and MA n-3 Among them, MA n-1 MA is the local memory allocation value for the (n-1)th run of process A. n-2 MA is the local memory allocation value for the (n-2)th run of process A. n-3 This is the local memory allocation value for the (n-3)th run of process A.

[0140] In some examples, the local memory prediction submodule can obtain the local memory allocation values ​​corresponding to the historical runtime of all processes in the operating system.

[0141] In some examples, since the local memory prediction submodule can obtain the local memory allocation values ​​corresponding to the historical runtime of all processes in the operating system, when a process starts, the local memory prediction submodule can find the local memory allocation value corresponding to the historical runtime of the process based on the process name of the process from the local memory allocation values ​​corresponding to the historical runtime of all processes.

[0142] Step 602: The local memory prediction submodule determines the local memory prediction value corresponding to the current runtime of the process based on the local memory allocation value and prediction model corresponding to the historical runtime of the process.

[0143] Once the local memory prediction submodule determines the local memory allocation values ​​for the process's historical runtime, it can determine the predicted local memory allocation value for the process's current runtime based on these historical values ​​and the prediction model. Then, the TSD (Total Memory Distributed Space) count can be set according to the predicted local memory allocation value for the process's current runtime. This prevents insufficient TSD from impacting system performance during subsequent process execution.

[0144] In some examples, the local memory prediction submodule obtains the predicted local memory value for the current runtime of the process based on the prediction model and the local memory allocation values ​​corresponding to the process's historical runtime.

[0145] In some examples, the local memory allocation values ​​corresponding to the process's historical runtime include the local memory allocation values ​​corresponding to the process at multiple historical runtime moments. The process of determining the predicted local memory value corresponding to the process's current runtime based on the local memory allocation values ​​corresponding to the process's historical runtime and the prediction model can be as follows: obtain the weight coefficients in the prediction model corresponding to the process at each historical runtime moment; and obtain the predicted local memory value corresponding to the process's current runtime based on the weight coefficients corresponding to the process at each historical runtime moment and the local memory allocation values ​​corresponding to each historical runtime moment.

[0146] For example, the local memory allocation value corresponding to multiple historical execution times is the local memory allocation value M corresponding to the (n-1)th execution time of the process. n-1 The local memory allocation value M corresponding to the (n-2)th run of the process. n-2 And the local memory allocation value M corresponding to the (n-3)th run of the process. n-3 The weight coefficient corresponding to the (n-1)th run of the process can be c1; the weight coefficient corresponding to the (n-2)th run of the process can be c2; and the weight coefficient corresponding to the (n-3)th run of the process can be c3. This can be determined based on c1, c2, c3, and M. n-1 M n-2 and M n-3 Obtain the predicted local memory value corresponding to the current runtime of the process.

[0147] In addition, in different operation scenarios, the weight coefficients corresponding to the process at each historical operation moment may be the same or different. In some examples, in different operation scenarios, the weight coefficients corresponding to the process at each historical operation moment may be obtained through a large number of experiments.

[0148] In some examples, based on the local memory allocation values corresponding to the historical operation of the process and the prediction model, the process of determining the local memory prediction value corresponding to the current operation of the process may be: inputting the local memory allocation values corresponding to the historical operation of the process into the prediction model, and the prediction model outputs the local memory prediction value corresponding to the current operation of the process.

[0149] In some examples, the prediction model satisfies the following expression:

[0150] M n =c1M n-1 +c2M n-2 +c3M n-3

[0151] wherein, M n is the predicted local memory value corresponding to the current operation of the process; M n-1 is the local memory allocation value corresponding to the (n-1)th operation of the process, M n-2 is the local memory allocation value corresponding to the (n-2)th operation of the process; M n-3 is the local memory allocation value corresponding to the (n-3)th operation of the process; c1 is the weight coefficient corresponding to the process at the (n-1)th operation, c2 is the weight coefficient corresponding to the process at the (n-2)th operation, c3 is the weight coefficient corresponding to the process at the (n-3)th operation. 0<c1≤1; 0<c2≤1; 0<c3≤1; and c1+c2+c3=1.

[0152] For example, when c2=0 and c3=0, since c1+c2+c3=1, c1=1. The local memory allocation value corresponding to the historical operation of the process is input into the prediction model, and M output by the prediction model n =M n-1 . That is, the predicted local memory value corresponding to the current operation of the process is consistent with the local memory allocation value corresponding to the previous operation. If the state of the operating system does not change greatly, it is generally considered that in this case, the obtained predicted local memory value corresponding to the current operation of the process is more accurate. If the state of the operating system changes greatly, it is considered that there will be a certain deviation in the predicted local memory value corresponding to the current operation of the process obtained based on this method.

[0153] Step 603: The local memory prediction submodule generates a first notification based on the local memory prediction value corresponding to the current runtime of the process, and sends the first notification to the TSD quantity decision submodule.

[0154] The first notification, also known as the TSD quantity determination signal, requests the TSD quantity decision submodule to determine the first TSD quantity for the process based on the predicted local memory value corresponding to the process's current runtime. The first notification includes the predicted local memory value corresponding to the process's current runtime.

[0155] Once the local memory prediction submodule determines the local memory prediction value of the process at its current runtime, it can generate a first notification based on the local memory prediction value corresponding to the process at its current runtime and send the first notification to the TSD quantity decision submodule, so that the TSD quantity decision submodule can determine the first TSD quantity corresponding to the process based on the local memory prediction value corresponding to the process at its current runtime in the first notification.

[0156] Step 604: The TSD quantity decision submodule receives the first notification.

[0157] Step 605: In response to the first notification, the TSD quantity decision submodule determines the first TSD quantity for the process based on the local memory prediction value corresponding to the current runtime of the process.

[0158] After receiving the first notification, the TSD quantity decision submodule can determine the first TSD for the process based on the predicted local memory value corresponding to the process's current runtime, as shown in the first notification. Then, the TSD for the process can be set according to the first TSD, thereby preventing insufficient TSD from impacting system performance during subsequent operation.

[0159] In some examples, the TSD (Time Limit Distributed) quantity decision submodule determines the first TSD quantity for a process based on the predicted local memory value at the current runtime of the process. This process can be as follows: If the predicted local memory value is less than a first memory threshold, the first TSD quantity is determined to be a first value. If the predicted local memory value is greater than the first memory threshold but less than a second memory threshold, the first TSD quantity is determined to be a second value; the second value is greater than the first value. If the predicted local memory value is greater than the second memory threshold, the first TSD quantity is determined to be a third value; the third value is greater than the second value.

[0160] For example, the first memory threshold is 100, and the second memory threshold is 200. The first value is 2, the second value is 4, and the third value is 8. It is understood that with the updates of memory configuration technology, the first memory threshold, the second memory threshold, the first value, the second value, and the third value may change. This disclosure does not limit the values ​​of the first memory threshold, the second memory threshold, the first value, the second value, and the third value; the specific application shall prevail.

[0161] In some examples, the process by which the TSD quantity decision submodule determines the first TSD quantity for a process based on the predicted local memory value corresponding to the current runtime of the process can be as follows: the TSD quantity decision submodule inputs the predicted local memory value corresponding to the current runtime of the process into the allocation model, and the allocation model outputs the first TSD quantity for the process.

[0162] In some examples, the assignment model satisfies the following expression:

[0163]

[0164] Among them, M n This represents the predicted local memory values ​​for the current runtime of the process. σ1 is the first memory threshold, and σ2 is the second memory threshold. σ1 = 100, σ2 = 200.

[0165] When the predicted local memory usage value for the currently running process is less than σ1, it indicates that the process's memory requirement is low, so the first TSD value for the process is set to 2. When the predicted local memory usage value for the currently running process is greater than σ1 but less than σ2, it indicates that the process's memory requirement is relatively high, so the first TSD value for the process is set to 4. When the predicted local memory usage value for the currently running process is greater than σ2, it indicates that the process's memory requirement is very high, so the first TSD value for the process is set to 8. In other words, this embodiment sets a larger TSD for processes with higher memory requirements and a smaller TSD for processes with lower memory requirements, thus better balancing system performance and memory usage.

[0166] For example, if the predicted local memory value MA for process A at its current runtime is 150, and the predicted local memory value for process A at its current runtime is input into the above allocation model, the allocation model will output that the first TSD number for process A is 4.

[0167] Based on the above process of determining the first TSD (Time Limit of Storage) for a process based on its predicted local memory usage, it's clear that a larger predicted local memory usage indicates a greater need for memory allocation via Scudo. Consequently, the probability of this process competing with other processes for TSDs is also higher. Therefore, when a process requires a large amount of memory, the TSD decision submodule can increase the TSD to meet its memory demands. Furthermore, increasing the TSD for a process allows for faster response to control commands during execution and improves the operating system's processing efficiency.

[0168] If the predicted local memory usage for a process is low, it indicates a lower memory allocation requirement from Scudo. Consequently, the probability of this process competing with other processes for TSD (Time Limits) is also lower. Even if some latency or efficiency issues occur during memory allocation, they will not significantly impact the overall performance of the process. Therefore, when a process requires less memory, the TSD decision submodule can reduce the TSD to avoid memory overload.

[0169] Step 606: The TSD quantity decision submodule obtains the second TSD quantity corresponding to this process.

[0170] The second TSD quantity can also be called the initial TSD quantity. The second TSD quantity is the initial TSD quantity allocated by Scudo to this process.

[0171] In some examples, the number of second TSDs that Scudo allocates to the process is set during the compilation phase. For instance, Scudo supports 2 TSDs by default, with a maximum of 8 TSDs. Therefore, the number of second TSDs that Scudo allocates to the process can be 2 or 8.

[0172] Step 607: The TSD quantity decision submodule compares the first TSD quantity with the second TSD quantity. If the first TSD quantity and the second TSD quantity are different, the TSD quantity decision submodule sends a second notification to the local cache setting module.

[0173] The second notification, also known as an adjustment signal, requests the local cache setting module to adjust the TSD count for the process. The second notification includes the first TSD count.

[0174] Since the second TSD value is generated during the compilation phase, the current TSD value set for this process is the second TSD value. Because the TSD value set during compilation does not reference the process's actual memory data (i.e., the local memory allocation value corresponding to historical runtime), the second TSD value for this process may not meet its memory requirements. To make the TSD value setting for this process more reasonable, after the TSD value decision submodule obtains the first and second TSD values, it can determine whether the TSD value needs adjustment based on the first and second TSD values. Then, based on the determination result, it proceeds to the next step, ensuring that the processed TSD value meets the process's memory requirements.

[0175] In some examples, the process by which the TSD quantity decision submodule determines whether the TSD quantity needs adjustment based on a first TSD quantity and a second TSD quantity can be as follows: The TSD quantity decision submodule compares the first TSD quantity and the second TSD quantity. If the first TSD quantity and the second TSD quantity are the same, it determines that no adjustment is needed. If the first TSD quantity and the second TSD quantity are different, it determines that the TSD quantity needs adjustment. If it is determined that the TSD quantity needs adjustment, the TSD quantity decision submodule can send a second notification to the local cache setting module to instruct the local cache setting module to adjust the TSD quantity of the process to the first TSD quantity.

[0176] In some scenarios, the TSD quantity decision submodule compares the first TSD quantity and the second TSD quantity. If the first TSD quantity and the second TSD quantity are the same, it means that the number of TSDs allocated by Scudo to the process during the compilation phase meets the memory requirements of the process. Therefore, it is not necessary to adjust the TSD quantity of the process through the second notification.

[0177] The TSD quantity decision submodule compares the first TSD quantity with the second TSD quantity. If the first TSD quantity and the second TSD quantity are different, it means that during the compilation phase, the number of TSDs allocated by Scudo to the process does not meet the memory requirements of the process. Therefore, it is necessary to adjust the TSD quantity corresponding to the process through the second notification so that the adjusted TSD quantity can meet the memory requirements of the process.

[0178] In some examples, the Android operating system can call the bionic library, which includes adjustment signals. When the TSD count decision submodule determines that the first TSD count and the second TSD count are different, it can call the adjustment signal in the bionic library and send the adjustment signal to the local cache setting module, so that the local cache setting module can adjust the TSD count of the process based on the adjustment signal.

[0179] Bionic is a C library provided by the Android operating system for C / C++ developers to develop native applications, conforming to the Portable Operating System Interface (POSIX) standard. It is a derivative of the Android operating system's BSD (a branch of the UNIX operating system) standard C library. Bionic provides the minimal set of constructs required to develop any type of functional native code on the Android operating system.

[0180] Step 608: The local cache settings module receives the second notification.

[0181] Step 609: In response to the second notification, the local cache setting module adjusts the number of TSDs corresponding to the process to the first number of TSDs.

[0182] After the local cache setting module receives the second notification, it can respond to the second notification by adjusting the number of TSDs corresponding to the process based on the first TSD number in the second notification.

[0183] In some examples, in response to the second notification, the process by which the local cache setting module adjusts the number of TSDs corresponding to the process to the first TSD number can be as follows: after receiving the second notification, the local cache setting module calls the cache setting interface to adjust the number of TSDs corresponding to the process to the first TSD number based on the first TSD number in the second notification.

[0184] For example, adjusting the TSD value of a process to the first TSD value by calling the cache settings interface can be achieved using the mallopt function in the signal handler. It is understood that the local cache settings module can also use other functions to adjust the TSD value of the process, and this disclosure does not limit this.

[0185] In some examples, reference Figure 5 Calling the cache setting interface to adjust the number of TSDs corresponding to the process to the first TSD number can be done by the local cache setting module calling the cache setting interface to adjust the number of TSDs integrated in Scudo of the process to the first TSD number.

[0186] Step 610: The local cache dynamic adjustment module obtains the actual local memory value and the predicted local memory value corresponding to the current runtime of the process.

[0187] To accurately understand the memory requirements of a process, the local cache dynamic adjustment module can also obtain the actual local memory value and the predicted local memory value corresponding to the current runtime of the process. Then, it compares the actual local memory value and the predicted local memory value corresponding to the current runtime of the process to further determine whether the TSD value corresponding to the process needs to be adjusted.

[0188] As can be seen from steps 601-609 above, the first TSD (Time Limit of Storage) of the process can be obtained based on the predicted local memory value corresponding to the current runtime of the process. Therefore, determining whether to adjust the TSD of the process refers to adjusting the first TSD of the process.

[0189] Step 611: The local cache dynamic adjustment module compares the actual local memory value corresponding to the current runtime of the process with the predicted local memory value corresponding to the current runtime of the process. If the actual local memory value corresponding to the current runtime of the process is different from the predicted local memory value corresponding to the current runtime of the process, the module determines the third TSD value corresponding to the process based on the actual local memory value corresponding to the current runtime of the process and adjusts the TSD value corresponding to the process to the third TSD value.

[0190] In some examples, after obtaining the actual local memory value corresponding to the current runtime of the process, the local cache dynamic adjustment module can also obtain the predicted local memory value for the current runtime of the process generated by the local memory prediction submodule. Then, it compares the actual local memory value and the predicted local memory value for the current runtime of the process; and based on the comparison result, it further adjusts the TSD (Total Storage Distributed) of the process.

[0191] In some examples, the process by which the local cache dynamic adjustment module further adjusts the TSD of a process based on a comparison between the actual local memory value and the predicted local memory value at the current runtime of the process can be as follows: The local cache dynamic adjustment module compares the actual local memory value and the predicted local memory value at the current runtime of the process. If the actual local memory value and the predicted local memory value at the current runtime of the process are the same, it determines that no adjustment to the TSD is needed.

[0192] It is understandable that if the actual local memory value corresponding to the current runtime of the process is the same as the predicted local memory value corresponding to the current runtime of the process, it means that the current set first TSD value meets the memory requirements of the process, and there is no need to set the TSD value corresponding to the process again.

[0193] If the actual local memory value corresponding to the current runtime of the process is different from the predicted local memory value corresponding to the current runtime of the process (or, the actual local memory value corresponding to the current runtime of the process is significantly different from the predicted local memory value corresponding to the current runtime of the process), it is determined that the TSD quantity needs to be adjusted.

[0194] Understandably, if the actual local memory value corresponding to the current runtime of the process is different from the predicted local memory value corresponding to the current runtime of the process, it means that the currently set first TSD value does not meet the memory requirements of the process, and the TSD value corresponding to the process needs to be set again.

[0195] If it is determined that the TSD (Time Limit of Storage) number needs to be adjusted, the local cache dynamic adjustment module determines the third TSD number based on the actual local memory value corresponding to the process's current runtime. Finally, the TSD number corresponding to the process is adjusted to the third TSD number.

[0196] In some examples, when it is determined that the TSD (Time Limit of Storage) value needs to be adjusted, the local cache dynamic adjustment module determines the third TSD value based on the actual local memory value corresponding to the process's current runtime. This process can be as follows: If the actual local memory value corresponding to the process's current runtime is less than the third memory threshold, the third TSD value is determined to be the fourth value. If the predicted local memory value corresponding to the process's current runtime is greater than the third memory threshold but less than the fourth memory threshold, the third TSD value is determined to be the fifth value; the fifth value is greater than the fourth value. If the predicted local memory value corresponding to the process's current runtime is greater than the fourth memory threshold, the third TSD value is determined to be the sixth value; the sixth value is greater than the fifth value.

[0197] For example, the third memory threshold is 100, and the fourth memory threshold is 200. The fourth value is 2, the fifth value is 4, and the sixth value is 8. It is understood that with the updates of memory allocation technology, the values ​​of the third memory threshold, the fourth memory threshold, the fourth value, the fifth value, and the sixth value may change. This disclosure does not limit the values ​​of the third memory threshold, the fourth memory threshold, the fourth value, the fifth value, and the sixth value; the specific value shall be determined by the actual application.

[0198] In some examples, when it is determined that the number of TSDs needs to be adjusted, the process by which the local cache dynamic adjustment module determines the third TSD based on the actual local memory value corresponding to the process at its current runtime can be as follows: The local cache dynamic adjustment module determines the third TSD corresponding to the process based on the actual local memory value corresponding to the process at its current runtime and the adjustment model.

[0199] In some examples, the process by which the local cache dynamic adjustment module determines the number of third TSDs for a process based on the actual local memory value and the adjustment model corresponding to the current runtime of the process can be as follows: input the actual local memory value corresponding to the current runtime of the process into the adjustment model, and the adjustment model outputs the number of third TSDs for the process.

[0200] In some examples, the model is adjusted to satisfy the following expression:

[0201]

[0202] Among them, M i This represents the actual local memory value corresponding to the current runtime of the process. σ3 is the third memory threshold, and σ4 is the fourth memory threshold. For example, σ3 = 100, σ4 = 200.

[0203] Based on the adjustment model, when the actual local memory value corresponding to the current running process is less than σ3, the third TSD value for the process is set to 2. When the actual local memory value corresponding to the current running process is greater than σ3 but less than σ4, the third TSD value for the process is set to 4. When the actual local memory value corresponding to the current running process is greater than σ4, the third TSD value for the process is set to 8.

[0204] In some examples, if the local cache dynamic adjustment module determines, based on the actual local memory usage of the process at its current runtime, that the third TSD (Time Limits per Second) for the process is greater than the first TSD, then it can adjust the TSD count for the process accordingly. If, based on the actual local memory usage of the process at its current runtime, the third TSD count is equal to the first TSD, then the TSD count for the process will not be adjusted. If, based on the actual local memory usage of the process at its current runtime, the third TSD count is less than the first TSD, then the TSD count for the process will not be adjusted.

[0205] In some examples, if the local cache dynamic adjustment module determines that the third TSD of a process is less than the first TSD based on the actual local memory value corresponding to the process at its current runtime, then it adjusts the TSD of the process according to the third TSD.

[0206] In some examples, as seen in step 602, the predicted local memory value for the current running process is obtained based on the local memory allocation values ​​for the process's historical running. For a process running for the first time, since there are no historical local memory allocation values ​​for the process, the local memory prediction submodule cannot determine the predicted local memory value for the current running process based on the historical local memory allocation values ​​and prediction model. Consequently, the TSD quantity decision submodule also cannot determine the TSD quantity for the process based on the predicted local memory value for the current running process. Therefore, in this case, the local cache dynamic adjustment module can be used to obtain the actual local memory value for the current running process, and then the TSD quantity for the process can be determined based on the actual local memory value for the current running process. If the determined TSD quantity for the process differs from the second TSD quantity, the second TSD quantity can be adjusted to match the TSD quantity for the process. If the determined TSD quantity for the process is the same as the second TSD quantity, no adjustment is required.

[0207] In some scenarios, the dynamic memory configuration method proposed in this disclosure can dynamically configure the number of TSDs based on the memory requirements of the process and changes in the scenario. The dynamic memory configuration method of this disclosure can also include various adjustment strategies. In practical applications, an appropriate adjustment strategy can be selected based on the state of the Android operating system and the actual scenario. The adjustment strategies provided in this disclosure are described in detail below.

[0208] Adjustment Strategy 1: For the core system processes of the Android operating system, the TSD (Transmission Time Limit) of these core system processes can be directly increased. For example, the TSD of these core system processes can be adjusted to 8. The core system processes of the Android operating system can include system service (system_server) processes, launcher processes, systemui processes, surfaceflinger processes, etc.

[0209] Because these core system processes provide the core services of the Android operating system, they typically have a large number of threads. Consequently, their memory requirements are also high. Therefore, increasing the TSD (Time Limit of Storage) of these processes can improve memory allocation efficiency, thereby enhancing system performance.

[0210] Adjustment Strategy 2: For non-core system processes in the Android operating system, the TSD (Transmission Distributed Speed) of these processes can be directly reduced. For example, the TSD of a non-core system process can be adjusted to 2. Non-core system processes in the Android operating system can include the Calendar process, Bluetooth process, etc.

[0211] Since the aforementioned non-core system processes have a relatively small number of threads, their memory requirements are also low. Even if some latency or efficiency issues occur during memory allocation, they will not significantly impact the overall performance of the processes. Therefore, the TSD (Time-of-Demand) of these processes can be adjusted to a smaller value, thereby making more efficient use of the operating system's memory resources.

[0212] Adjustment Strategy 3: For pre-installed applications in the Android operating system, you can directly increase the TSD (Time Limits) of both the main process and child processes of the pre-installed application. For example, adjust the TSD of the main process and child processes of the pre-installed application to 8. Pre-installed applications can also be referred to as top third-party applications. Pre-installed applications typically occupy 1GB or more of memory. For example, a pre-installed application could be... And other large-scale mobile games, etc.

[0213] Preset applications consume significant system resources when processing user requests or performing specific tasks, which can lead to slower response times or reduced processing power. This can cause the preset application to malfunction, crash, or become unresponsive. Therefore, this disclosure increases the TSD (Time Limits) of both the main process and child processes of the preset application to avoid these issues and improve its performance.

[0214] Adjustment Strategy 4: For non-preset applications in the Android operating system, you can directly increase the TSD value of the main process of the non-preset application and decrease the TSD value of its child processes. For example, adjust the TSD value of the main process of the non-preset application to 8 and the TSD value of its child processes to 2. This can reduce the memory usage of non-preset applications.

[0215] It is understood that the memory dynamic configuration method corresponding to steps 601-611 above can also be considered as an adjustment strategy, namely adjustment strategy 5. In practical applications, one or more of the above adjustment strategies can be selected for use in combination, and this disclosure does not impose any restrictions on this.

[0216] In some examples, the above dynamic memory configuration method further includes: determining that the process is a core system process and adjusting the TSD corresponding to the process to a first threshold; determining that the process is a non-core system process and adjusting the TSD corresponding to the process to a second threshold, wherein the second threshold is less than the first threshold.

[0217] For example, the first threshold is 8 and the second threshold is 2. It is understood that the first and second thresholds can be adjusted according to actual memory requirements, and this disclosure does not limit this.

[0218] In some examples, the above-mentioned dynamic memory configuration method further includes: determining that the process is a process of a preset application, adjusting the TSD corresponding to the main process and child processes of the preset application to a third threshold; the preset application is an application that occupies 1G or more of memory; determining that the process is a process of a non-preset application, adjusting the TSD corresponding to the main process of the non-preset application to a third threshold, and adjusting the TSD corresponding to the child processes of the non-preset application to a fourth threshold, wherein the fourth threshold is less than the third threshold.

[0219] For example, the third threshold is 8 and the fourth threshold is 2. It is understood that the third and fourth thresholds can be adjusted according to actual memory requirements, and this disclosure does not limit this.

[0220] Therefore, using this scheme, after the process starts, the current local memory allocation value of the process can be predicted based on the local memory allocation value and prediction model corresponding to the process's historical runtime. Then, based on the predicted local memory value corresponding to the current runtime, the first TSD value for the process is obtained. Next, the second TSD value is obtained. Since the second TSD value (i.e., the initial TSD value) is generated during the compilation phase and does not refer to the process's actual memory data (i.e., the local memory allocation value corresponding to historical runtime), the second TSD value for the process may not meet the memory requirements. Therefore, when the first TSD value and the second TSD value are different, the TSD value of the process can be adjusted to the first TSD value. In this way, processes with larger memory requirements can be set with larger TSD values, and processes with smaller memory requirements can be set with smaller TSD values, thereby better balancing system performance and memory usage.

[0221] In addition, this disclosure also considers the actual value of local memory corresponding to the process at runtime. If the actual value of local memory corresponding to the current runtime is different from the predicted value of local memory corresponding to the current runtime, the actual value of local memory corresponding to the current runtime can be used to determine a new third TSD number. The TSD number corresponding to the process can then be adjusted according to the third TSD number. In this way, not only can the TSD number of the process be configured dynamically, but the TSD number corresponding to the process can also be made to better meet the usage requirements of the process.

[0222] It should be understood that the steps in the above-described method embodiments provided in this disclosure can be implemented by integrated logic circuits in the processor hardware or by instructions in software form. The method steps disclosed in conjunction with the embodiments of this disclosure can be directly implemented by a hardware processor, or implemented by a combination of hardware and software modules in the processor.

[0223] In one example, the unit in the above device may be one or more integrated circuits configured to implement the above methods, such as one or more ASICs, or one or more DSPs, or one or more FPGAs, or a combination of at least two of these integrated circuit forms.

[0224] For example, when the units in the device can be implemented through a processing element scheduler, the processing element can be a general-purpose processor, such as a CPU or other processor capable of calling programs. Alternatively, these units can be integrated together to form a system-on-a-chip (SoC).

[0225] In one implementation, the units that implement the corresponding steps in the above methods can be implemented in the form of a processing element scheduler. For example, the device may include a processing element and a storage element, wherein the processing element calls a program stored in the storage element to execute the methods of the above method embodiments. The storage element may be a storage element located on the same chip as the processing element, i.e., an on-chip storage element.

[0226] In another implementation, the program used to perform the above methods can be located on a storage element on a different chip than the processing element, i.e., an off-chip storage element. In this case, the processing element calls or loads the program from the off-chip storage element onto the on-chip storage element to call and execute the methods of the above method embodiments.

[0227] For example, embodiments of this disclosure may also provide an apparatus, such as an electronic device, which may include a processor and a memory for storing processor-executable instructions. When the processor is configured to execute the aforementioned instructions, the electronic device implements the memory dynamic configuration method as described in the foregoing embodiments. The memory may be located within or outside the electronic device. Furthermore, the processor may include one or more processors.

[0228] In another implementation, the unit implementing each step of the above method can be configured as one or more processing elements, which can be disposed on the corresponding electronic device described above. These processing elements can be integrated circuits, such as one or more ASICs, one or more DSPs, one or more FPGAs, or combinations of these types of integrated circuits. These integrated circuits can be integrated together to form a chip.

[0229] This disclosure also provides a chip, such as... Figure 7 As shown, the chip system includes at least one processor 701 and at least one interface circuit 702. The processor 701 and the interface circuit 702 are interconnected via lines. For example, the interface circuit 702 can be used to receive signals from other devices. As another example, the interface circuit 702 can be used to send signals to other devices (e.g., the processor 701).

[0230] For example, interface circuit 702 can read instructions stored in the memory of the device and send those instructions to processor 701. When the instructions are executed by processor 701, they can enable electronic devices (such as...) Figure 3 The electronic device 300 shown performs the steps in the above embodiments. Of course, the chip system may also include other discrete devices, and this disclosure does not specifically limit this.

[0231] This disclosure also provides a computer-readable storage medium storing computer program instructions thereon. When the computer program instructions are executed by an electronic device, the electronic device can implement the memory dynamic configuration method described above.

[0232] This disclosure also provides a computer program product, including computer instructions for operation of the electronic device described above. When the computer instructions are executed in the electronic device, the electronic device enables the dynamic memory configuration method described above. Through the above description of the embodiments, those skilled in the art will clearly understand that, for the sake of convenience and brevity, only the division of the above functional modules is used as an example. In practical applications, the above functions can be assigned to different functional modules as needed, that is, the internal structure of the device can be divided into different functional modules to complete all or part of the functions described above.

[0233] In the several embodiments provided in this disclosure, it should be understood that the disclosed apparatus and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for instance, the division of modules or units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another device, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be through some interfaces; the indirect coupling or communication connection of devices or units may be electrical, mechanical, or other forms.

[0234] The units described as separate components may or may not be physically separate. A component shown as a unit can be one or more physical units; that is, it can be located in one place or distributed in multiple different locations. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0235] Furthermore, the functional units in the various embodiments of this disclosure can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit.

[0236] If the integrated unit is implemented as a software functional unit and sold or used as an independent product, it can be stored in a readable storage medium. Based on this understanding, the technical solutions of the embodiments of this disclosure, in essence, or the part that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product, such as a program. This software product is stored in a program product, such as a computer-readable storage medium, and includes several instructions to cause an electronic device (which may be a microcontroller, chip, etc.) or processor to execute all or part of the steps of the methods of the various embodiments of this disclosure. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, ROM, RAM, magnetic disks, or optical disks.

[0237] For example, embodiments of this disclosure may also provide a computer-readable storage medium having computer program instructions stored thereon. When the computer program instructions are executed by an electronic device, the electronic device causes the electronic device to implement the dynamic memory allocation method as described in the foregoing method embodiments.

[0238] The above are merely specific embodiments of this disclosure, but the scope of protection of this disclosure is not limited thereto. Any changes or substitutions within the technical scope disclosed in this disclosure should be included within the scope of protection of this disclosure. Therefore, the scope of protection of this disclosure should be determined by the scope of the claims.

Claims

1. A method for dynamic memory allocation, characterized in that, The method includes: When the process starts, obtain the local memory allocation value corresponding to the process's historical runtime. Based on the prediction model and the local memory allocation values ​​corresponding to the historical runtime of the process, the predicted local memory value corresponding to the current runtime of the process is obtained; The first TSD (Time Limit of Storage) of the process is determined based on the predicted local memory value corresponding to the current runtime of the process; the process includes core system processes and non-core system processes, and the TSD of the core system processes and the non-core system processes are different; Obtain the second TSD number corresponding to the process, where the second TSD number is the initial TSD number corresponding to the process; If the first TSD number and the second TSD number are different, the second TSD number corresponding to the process will be adjusted to the first TSD number; Obtain the actual local memory value corresponding to the current runtime of the process; If the actual value of the local memory corresponding to the current running process is different from the predicted value of the local memory corresponding to the current running process, a third TSD number is determined based on the actual value of the local memory corresponding to the current running process, and the first TSD number corresponding to the process is adjusted to the third TSD number. The step of determining the first TSD number corresponding to the process based on the predicted local memory value corresponding to the current runtime of the process includes: If the predicted local memory value corresponding to the current runtime of the process is less than the first memory threshold, the first TSD number is determined to be the first value; If the predicted local memory value corresponding to the current running process is greater than the first memory threshold and less than the second memory threshold, the first TSD value is determined to be the second value; the second value is greater than the first value. If the predicted local memory value corresponding to the current running process is greater than the second memory threshold, the first TSD value is determined to be a third value; the third value is greater than the second value.

2. The method according to claim 1, characterized in that, The local memory allocation values ​​corresponding to the historical runtime of the process include the local memory allocation values ​​corresponding to the process at multiple historical runtime moments; obtaining the predicted local memory value corresponding to the current runtime of the process based on the prediction model and the local memory allocation values ​​corresponding to the historical runtime of the process includes: Obtain the weight coefficients in the prediction model corresponding to the process at each of the historical running times; Based on the weight coefficients corresponding to the process at each of the historical running times and the local memory allocation values ​​corresponding to each of the historical running times, the predicted local memory value corresponding to the current running time of the process is obtained.

3. The method according to claim 1 or 2, characterized in that, The prediction model satisfies the following expression: M n =c1M n-1 +c2M n-2 +c3M n-3 wherein, M n is a local memory prediction value corresponding to the current runtime of said process; M n-1 is a local memory allocation value corresponding to the (n-1)th runtime of said process, M n-2 is a local memory allocation value corresponding to the (n-2)th runtime of said process; M n-3 is a local memory allocation value corresponding to the (n-3)th runtime of said process; c1 is a weight coefficient corresponding to said process at said (n-1)th runtime, c2 is a weight coefficient corresponding to said process at said (n-2)th runtime, c3 is a weight coefficient corresponding to said process at said (n-3)th runtime; 0 < c1 ≤ 1; 0 < c2 ≤ 1; 0 < c3 ≤ 1; and c1 + c2 + c3 = 1.

4. The method according to claim 1, characterized in that, The first TSD quantity satisfies the following expression: Among them, M n This is the predicted local memory value corresponding to the current runtime of the process. The first memory threshold, This is the second memory threshold.

5. The method according to claim 1, characterized in that, Determining the third TSD quantity based on the actual local memory value corresponding to the current runtime of the process includes: If the actual value of the local memory corresponding to the current running process is less than the third memory threshold, the third TSD value is determined to be the fourth value. If the predicted local memory value corresponding to the current running process is greater than the third memory threshold and less than the fourth memory threshold, the third TSD value is determined to be the fifth value; the fifth value is greater than the fourth value. If the predicted local memory value corresponding to the current running process is greater than the fourth memory threshold, the third TSD value is determined to be the sixth value; the sixth value is greater than the fifth value.

6. The method according to claim 5, characterized in that, The third TSD quantity satisfies the following expression: in, This represents the actual local memory value corresponding to the current runtime of the process. The third memory threshold, This is the fourth memory threshold.

7. The method according to claim 1, characterized in that, The method further includes: The process is identified as a core system process, and the number of TSDs corresponding to the process is adjusted to a first threshold. If the process is determined to be a non-core system process, the number of TSDs corresponding to the process is adjusted to a second threshold, where the second threshold is less than the first threshold.

8. The method according to claim 1, characterized in that, The method further includes: The process is identified as a process of a preset application, and the TSD counts of the main process and child processes of the preset application are adjusted to the third threshold; the preset application is an application that occupies 1G or more of memory. If the process is determined to be a non-preset application process, the TSD count corresponding to the main process of the non-preset application is adjusted to the third threshold, and the TSD count corresponding to the child process of the non-preset application is adjusted to the fourth threshold, wherein the fourth threshold is less than the third threshold.

9. An electronic device, characterized in that, The electronic device includes a processor and a memory for storing processor-executable instructions; the processor is configured to, when executing the instructions, cause the electronic device to perform the method as described in any one of claims 1 to 8.

10. A computer-readable storage medium having computer program instructions stored thereon; characterized in that, When the computer program instructions are executed by the electronic device, the electronic device performs the method as described in any one of claims 1 to 8.

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