Signal path planning method and apparatus

Abstract

This application relates to a signal path planning method and apparatus. The method includes: acquiring a device layout mesh diagram of a circuit board; the device layout mesh diagram includes a two-dimensional mesh diagram of multi-layer devices; determining multiple start and end pin pairs based on the pin grid coordinates of each device in the device layout mesh diagram; and determining the optimal signal path between each start and end pin pair based on signal line loss conditions and signal line crosstalk conditions. In this method, by setting signal line loss conditions and signal line crosstalk conditions, the path that simultaneously satisfies both conditions is selected as the optimal signal path between each start and end pin pair. This takes into account various constraints in signal path planning, selecting the path that simultaneously satisfies all conditions as the optimal signal path, reducing the workload of engineers in optimizing paths and improving the efficiency of signal path planning.

Description

Technical Field

[0001] This application relates to the field of circuit board routing planning technology, and in particular to a signal path planning method and apparatus. Background Technology

[0002] With the rapid development of information technology, the number of components in servers is constantly increasing, and their layout is becoming increasingly dense.

[0003] In related technologies, in order to maximize the performance of a server, a lot of time and effort is often required to rationally arrange the components required in the server on the printed circuit board (PCB) and plan the high-speed signal paths between the components.

[0004] However, the related technologies suffer from low planning efficiency when planning high-speed signal paths between devices. Summary of the Invention

[0005] Therefore, it is necessary to provide a signal path planning method and apparatus to address the aforementioned technical problems and improve the efficiency of signal path planning.

[0006] In a first aspect, embodiments of this application provide a signal path planning method, including:

[0007] Obtain the component layout mesh diagram of the circuit board; the component layout mesh diagram includes a two-dimensional mesh diagram of multi-layer components;

[0008] Based on the pin grid coordinates of each component in the component layout grid diagram, determine multiple start and end pin pairs;

[0009] Based on signal line loss and signal line crosstalk conditions, the optimal signal path between each start and stop pin pair is determined.

[0010] The signal path planning method provided in this application involves obtaining a device layout mesh diagram of a circuit board, which includes a multi-layer two-dimensional mesh diagram of devices. Then, based on the pin grid coordinates of each device in the circuit board within the device layout mesh diagram, multiple start and end pin pairs are determined. Finally, based on signal line loss conditions and signal line crosstalk conditions, the optimal signal path between each start and end pin pair is determined. This method, by setting signal line loss and crosstalk conditions, selects the path that simultaneously satisfies both conditions as the optimal signal path between each start and end pin pair. This takes into account various constraints in signal path planning, selecting the path that simultaneously meets all conditions as the optimal signal path, reducing the workload of engineers in optimizing paths and improving the efficiency of signal path planning.

[0011] In one embodiment, obtaining a device layout mesh diagram of the circuit board includes:

[0012] Obtain the component layout image of the circuit board;

[0013] The device layout image is divided into grids to obtain a two-dimensional mesh diagram of the device.

[0014] Based on the number of layers in the circuit board, the two-dimensional mesh diagram of the components is transformed to obtain a component layout mesh diagram composed of multi-layer component two-dimensional mesh diagrams.

[0015] In the signal path planning method provided in this application embodiment, a device layout image of a circuit board is obtained, and then the device layout image is divided into a grid to obtain a two-dimensional device grid image. Finally, based on the layer information of the circuit board, the two-dimensional device grid image is transformed to obtain a device layout grid image composed of multi-layer device two-dimensional grid images. This method provides an optional way to obtain the device layout grid image of the circuit board by introducing the layer information of the circuit board to convert the two-dimensional device grid image into a three-dimensional grid image, thus obtaining a device layout grid image including multi-layer device two-dimensional grid images.

[0016] In one embodiment, multiple start and end pin pairs are determined based on the pin grid coordinates of each device in the device layout grid diagram, including:

[0017] The device located within a preset range on the circuit board is identified as the starting device;

[0018] The pins of each starting device are designated as starting pins;

[0019] Based on the layout relationship between the devices and the pin grid coordinates of each device's pins in the device layout grid diagram, the termination pin corresponding to each starting pin is determined, resulting in multiple start and stop pin pairs.

[0020] In the signal path planning method provided in this application embodiment, devices within a preset range on the circuit board are identified as starting devices. Then, the pins of each starting device are identified as starting pins. Finally, based on the layout relationship between the devices and the pin grid coordinates of each device's pins in the device layout grid diagram, the termination pin corresponding to each starting pin is determined, resulting in multiple start-end pin pairs. This method provides an optional approach to quickly determine multiple start-end pin pairs. By determining the layout relationship between the devices, each starting device and its corresponding termination device can be identified. Then, based on the pin grid coordinates of each device's pins in the device layout grid diagram, the pin grid coordinates of the termination pin corresponding to each starting pin can be determined, resulting in multiple start-end pin pairs.

[0021] In one embodiment, determining the optimal signal path between each start and stop pin pair based on signal line loss conditions and signal line crosstalk conditions includes:

[0022] Obtain the priority between each start and end pin pair;

[0023] Based on signal line loss and signal line crosstalk conditions, the optimal signal path between each start and end pin pair is obtained in order of priority.

[0024] The signal path planning method provided in this application obtains the priority between each start and end pin pair, and then, based on signal line loss conditions and signal line crosstalk conditions, sequentially obtains the optimal signal path between each start and end pin pair according to the priority. This method, by introducing the priority between each start and end pin pair, sequentially obtains the optimal signal path between each start and end pin pair according to their priority. This avoids having to go back and modify the already planned path when planning other signal paths, further improving the efficiency of signal path planning.

[0025] In one embodiment, based on signal line loss conditions and signal line crosstalk conditions, the optimal signal path between each start and end pin pair is obtained sequentially according to priority, including:

[0026] For the first and last pin pairs with the highest priority, the optimal signal path between the first and last pin pairs is obtained in the two-dimensional mesh diagram of the first layer of the circuit board based on the signal line loss condition.

[0027] For start and stop pin pairs that are not the first priority, the optimal signal path between the start and stop pin pairs is obtained in the two-dimensional mesh diagram of all layers of the circuit board based on the signal line loss condition and the signal line crosstalk condition.

[0028] In the signal path planning method provided in this application embodiment, for the first-priority start-end pin pair, the optimal signal path between the start-end pin pair is obtained in the two-dimensional mesh diagram of the first layer of the circuit board based on the signal line loss condition; for the start-end pin pair whose priority is not the first, the optimal signal path between the start-end pin pair is obtained in the two-dimensional mesh diagram of all layers of the circuit board based on the signal line loss condition and the signal line crosstalk condition. In this method, since the first-priority start-end pin pair is not affected by crosstalk, when determining the optimal signal path, it is only necessary for the signal path to meet the signal line loss condition. However, for the start-end pin pair whose priority is not the first, since there is a pre-planned signal path, it will be affected by crosstalk. Therefore, when determining the optimal signal path, the signal path needs to simultaneously meet the signal line loss condition and the signal line crosstalk condition.

[0029] In one embodiment, based on signal line loss conditions, the optimal signal path between start and end pin pairs is obtained from the two-dimensional mesh diagram of the first layer of the circuit board, including:

[0030] In the first-layer device two-dimensional mesh diagram, starting from the start pin of the start-end pin alignment, move one mesh along multiple preset directions to obtain multiple candidate mesh nodes;

[0031] Obtain the loss cost value of each candidate grid node, and determine the candidate grid node that meets the signal line loss condition as the first path node of the start and end pin pair;

[0032] Starting from the first path node, the remaining path nodes of the start and end pin pairs are obtained sequentially until the termination pin of the start and end pin pairs is reached, thus obtaining the optimal signal path for the start and end pin pairs.

[0033] In the signal path planning method provided in this application embodiment, in the two-dimensional mesh diagram of the first-layer device, starting from the starting pin of the start-end pin pair, the device moves one mesh along multiple preset directions to obtain multiple candidate mesh nodes. Then, the loss cost value of each candidate mesh node is obtained, and the candidate mesh node that satisfies the signal line loss condition is determined as the first path node of the start-end pin pair. Finally, starting from the first path node, the remaining path nodes of the start-end pin pair are obtained sequentially until the termination pin of the start-end pin pair is reached, thus obtaining the optimal signal path for the start-end pin pair. This method provides an optional approach for quickly determining the optimal signal path between start-end pin pairs with the highest priority. By introducing a loss cost value, the optimal path is determined based on whether the loss cost value satisfies the signal line loss condition, thus ensuring that the loss is minimized under this signal path.

[0034] In one embodiment, obtaining the loss cost value of each candidate grid node includes:

[0035] Based on the unit cost value of each preset direction, determine the actual loss cost value of each candidate grid node; and based on the grid coordinates of each candidate grid node and the pin grid coordinates of the start and end pins aligned with the end pins, determine the estimated loss cost value of each candidate grid node.

[0036] The loss cost value of each candidate grid node is determined based on the actual loss cost value and the estimated loss cost value.

[0037] The signal path planning method provided in this application determines the actual loss cost value of each candidate grid node based on the unit cost value of each preset direction, and determines the estimated loss cost value of each candidate grid node based on the grid coordinates of each candidate grid node and the pin grid coordinates of the start and end pins aligned with the end pin. Then, the total loss cost value of each candidate grid node is determined based on both the actual and estimated loss cost values. This method provides an optional approach for quickly determining the loss cost value of each candidate grid node by determining both the actual and estimated loss cost values, and then using the sum of these values ​​as the total loss cost value.

[0038] In one embodiment, based on signal line loss conditions and signal line crosstalk conditions, the optimal signal path between start and end pin pairs is obtained in the two-dimensional mesh diagram of all layers of the circuit board, including:

[0039] Perform a candidate path lookup operation in the first-layer device 2D mesh diagram to obtain candidate signal paths for the start and end pin pairs;

[0040] If a candidate signal path intersects with a planned signal path in the first-layer device 2D mesh diagram, then according to the layer order of the circuit board, jump to the next layer device 2D mesh diagram to perform a candidate path search operation to obtain a new candidate signal path, until the obtained new candidate signal path does not intersect with the planned signal path in the device 2D mesh diagram of its own layer, and obtain the optimal signal path between the start and end pin pairs.

[0041] In the signal path planning method provided in this application embodiment, a candidate path search operation is performed in the first-layer device two-dimensional mesh diagram to obtain candidate signal paths for the start and end pin pairs. If the candidate signal path intersects with the planned signal path in the first-layer device two-dimensional mesh diagram, the search operation is performed in the next layer device two-dimensional mesh diagram according to the layer order of the circuit board to obtain new candidate signal paths, until the obtained new candidate signal path does not intersect with the planned signal path in the two-dimensional mesh diagram of its own layer, thus obtaining the optimal signal path between the start and end pin pairs. In this method, for start and end pin pairs with non-first priority, a candidate signal path search is first performed in the first-layer device two-dimensional mesh diagram. If the candidate signal path does not intersect with the path in the first-layer device two-dimensional mesh diagram, the candidate signal path can be directly used as the optimal signal path. If the candidate signal path intersects with the path in the first-layer device two-dimensional mesh diagram, the search for candidate signal paths needs to be continued in the next layer device two-dimensional mesh diagram until no intersection is found and the optimal signal path is obtained.

[0042] In one embodiment, the candidate path lookup operation includes:

[0043] Starting from the centering pin of the start and end pins, move one grid along multiple preset directions to obtain multiple candidate grid nodes;

[0044] Obtain the comprehensive cost value of each candidate grid node, and determine the candidate grid node that simultaneously satisfies the signal line loss condition and the signal line crosstalk condition as the first path node of the start and end pin pair;

[0045] Starting from the first path node, the remaining path nodes of the start and end pin pairs are obtained sequentially until the termination pin of the start and end pin pairs is reached, thus obtaining the candidate signal paths of the start and end pin pairs.

[0046] In the signal path planning method provided in this application embodiment, starting from the starting pin of the start-end pin pair, the method moves one grid along multiple preset directions to obtain multiple candidate grid nodes. The comprehensive cost value of each candidate grid node is obtained, and the candidate grid node that simultaneously satisfies the signal line loss condition and the signal line crosstalk condition is determined as the first path node of the start-end pin pair. The remaining path nodes of the start-end pin pair are then obtained sequentially, starting from the first path node, until the ending pin of the start-end pin pair is reached, thus obtaining the candidate signal path for the start-end pin pair. This method provides an optional approach for quickly obtaining candidate signal paths by introducing a comprehensive cost value. The candidate signal path is determined based on whether the comprehensive cost value satisfies the signal line loss condition and the signal line crosstalk condition. This ensures both minimal loss and minimal crosstalk from surrounding signal paths along the path.

[0047] In one embodiment, obtaining the comprehensive cost value of each candidate grid node includes:

[0048] The loss cost value of each candidate grid node is determined based on the unit cost value of each preset direction, the grid coordinates of each candidate grid node, and the pin grid coordinates of the termination pin.

[0049] The crosstalk cost value of each candidate grid node is determined based on the grid coordinates of each candidate grid node and the obstacle grid coordinates in the current layer device 2D grid diagram; the obstacle grid coordinates represent the grid coordinates of each grid in the planned signal path in the current layer device 2D grid diagram.

[0050] Based on the cost values ​​of each loss and each crosstalk, the comprehensive cost value of each candidate grid node is determined.

[0051] The signal path planning method provided in this application determines the loss cost value of each candidate grid node based on the unit cost value of each preset direction, the grid coordinates of each candidate grid node, and the pin grid coordinates of the termination pin. Then, based on the grid coordinates of each candidate grid node and the obstacle grid coordinates in the current layer device's two-dimensional grid diagram, the crosstalk cost value of each candidate grid node is determined. The obstacle grid coordinates represent the grid coordinates of each planned signal path in the current layer device's two-dimensional grid diagram. Finally, based on the loss cost value and the crosstalk cost value, the comprehensive cost value of each candidate grid node is determined. This method, by determining the loss cost value and crosstalk cost value of each candidate grid node and then using the sum of these values ​​as the comprehensive cost value of each candidate grid node, provides an optional approach for quickly determining the comprehensive cost value of each candidate grid node.

[0052] In one embodiment, the crosstalk cost value of each candidate grid node is determined based on the grid coordinates of each candidate grid node and the obstacle grid coordinates in the current layer device's two-dimensional grid diagram, including:

[0053] Based on the near-end crosstalk weight, the grid coordinates of each obstacle, and the grid coordinates of each candidate grid node, determine the near-end crosstalk cost value of each candidate grid node;

[0054] Based on the far-end crosstalk weight, the grid coordinates of each obstacle, and the grid coordinates of each candidate grid node, determine the far-end crosstalk cost value of each candidate grid node.

[0055] The crosstalk cost value of each candidate grid node is determined based on the crosstalk cost values ​​of each near end and each far end.

[0056] The signal path planning method provided in this application determines the near-end crosstalk cost value of each candidate grid node based on the near-end crosstalk weight, the grid coordinates of each obstacle, and the grid coordinates of each candidate grid node. Then, it determines the far-end crosstalk cost value of each candidate grid node based on the far-end crosstalk weight, the grid coordinates of each obstacle, and the grid coordinates of each candidate grid node. Finally, it determines the crosstalk cost value of each candidate grid node based on both the near-end and far-end crosstalk cost values. This method provides an optional approach for quickly determining the crosstalk cost value of each candidate grid node by determining both the near-end and far-end crosstalk cost values ​​and then summing them as the crosstalk cost value of each candidate grid node.

[0057] Secondly, embodiments of this application also provide a signal path planning device, comprising:

[0058] The mesh diagram acquisition module is used to acquire the component layout mesh diagram of the circuit board; the component layout mesh diagram includes a two-dimensional mesh diagram of multi-layer components;

[0059] The first determining module is used to determine multiple start and end pin pairs based on the pin grid coordinates of each component in the component layout grid diagram on the circuit board.

[0060] The second determining module is used to determine the optimal signal path between each start and stop pin pair based on signal line loss conditions and signal line crosstalk conditions.

[0061] Thirdly, embodiments of this application also provide a computer device. The computer device includes a memory and a processor, the memory storing a computer program, and the processor executing the computer program to implement the steps in any of the embodiments of the first aspect described above.

[0062] Fourthly, embodiments of this application also provide a computer-readable storage medium. The computer-readable storage medium stores a computer program thereon, which, when executed by a processor, implements the steps in any of the embodiments of the first aspect described above.

[0063] Fifthly, embodiments of this application also provide a computer program product. The computer program product includes a computer program that, when executed by a processor, implements the steps in any of the embodiments of the first aspect described above.

[0064] The aforementioned signal path planning method and apparatus acquire a device layout mesh diagram of a circuit board, which includes a multi-layer two-dimensional mesh diagram of devices. Then, based on the pin grid coordinates of each device in the circuit board within the device layout mesh diagram, multiple start and end pin pairs are determined. Finally, based on signal line loss and crosstalk conditions, the optimal signal path between each start and end pin pair is determined. In this method, by setting signal line loss and crosstalk conditions, the path that simultaneously satisfies both conditions is selected as the optimal signal path between each start and end pin pair. This takes into account various constraints in signal path planning, selecting the path that simultaneously meets all conditions as the optimal signal path, reducing the workload of engineers in optimizing paths and improving the efficiency of signal path planning. Attached Figure Description

[0065] To more clearly illustrate the technical solutions in the embodiments or related technologies of this application, the accompanying drawings used in the description of the embodiments or related technologies will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0066] Figure 1This is an internal structural diagram of a computer device in one embodiment;

[0067] Figure 2 This is a flowchart illustrating a signal path planning method in one embodiment;

[0068] Figure 3 This is a schematic diagram of the process for obtaining a device layout mesh diagram in one embodiment;

[0069] Figure 4 This is a flowchart illustrating the process of determining multiple start and end pin pairs in one embodiment;

[0070] Figure 5 This is a flowchart illustrating the determination of the optimal signal path in one embodiment;

[0071] Figure 6 This is a flowchart illustrating the determination of the optimal signal path in another embodiment;

[0072] Figure 7 This is a flowchart illustrating the determination of the optimal signal path in another embodiment;

[0073] Figure 8 This is a schematic diagram of the process for obtaining the loss cost value in one embodiment;

[0074] Figure 9 This is a flowchart illustrating the determination of the optimal signal path in another embodiment;

[0075] Figure 10 This is a flowchart illustrating the process of performing a candidate path lookup operation in one embodiment;

[0076] Figure 11 This is a schematic diagram of the process for obtaining the comprehensive cost value in one embodiment;

[0077] Figure 12 This is a schematic diagram of the process for determining crosstalk cost values ​​in one embodiment;

[0078] Figure 13 This is a schematic diagram of a two-dimensional mesh diagram of the device in one embodiment;

[0079] Figure 14 This is a flowchart illustrating the signal path planning method in another embodiment;

[0080] Figure 15 This is a schematic diagram of the signal path planning device in one embodiment. Detailed Implementation

[0081] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application.

[0082] The signal path planning method provided in this application can be applied to computer devices. The computer device can be a server, and its internal structure diagram can be as follows: Figure 1 As shown. The computer device includes a processor, memory, input / output interfaces (I / O), and a communication interface. The processor, memory, and I / O interfaces are connected via a system bus, and the communication interface is also connected to the system bus via the I / O interfaces. The processor provides computational and control capabilities. The memory includes a non-volatile storage medium and internal memory. The non-volatile storage medium stores the operating system, computer programs, and a database. The internal memory provides an environment for the operation of the operating system and computer programs stored in the non-volatile storage medium. The database stores signal path planning data. The I / O interfaces are used for exchanging information between the processor and external devices. The communication interface is used for communication with external terminals via a network connection. When the computer program is executed by the processor, it implements a signal path planning method. Those skilled in the art will understand that... Figure 1 The structure shown is merely a block diagram of a portion of the structure related to the present application and does not constitute a limitation on the computer device to which the present application is applied. Specific computer devices may include more or fewer components than those shown in the figure, or combine certain components, or have different component arrangements.

[0083] With the rapid development of information technology, the number of components in servers is constantly increasing, and their layout is becoming increasingly dense.

[0084] To maximize server performance, a significant amount of time and effort is often required to rationally arrange the components on the printed circuit board (PCB) and plan the high-speed signal paths between them.

[0085] In related technologies, many Electronic Design Automation (EDA) software programs include automatic routing functionality. However, the underlying logic and algorithms of these programs are relatively simple, and they can only achieve simple electrical connections. Signal path planning completed in this way is not considered the optimal design from the perspective of multiple R&D engineers, including routing engineers and signal integrity engineers. Therefore, after completing the path planning using EDA software, multiple engineers are still needed to continuously optimize and modify the design. This slows down the progress of signal path planning, and certain measures need to be taken to improve the efficiency of signal path planning.

[0086] Based on this, this application proposes a signal path planning method. By setting signal line loss conditions and signal line crosstalk conditions, the path that simultaneously satisfies both conditions is selected as the optimal signal path between each start and end pin pair. In this way, various constraints of signal path planning are taken into account, and the path that simultaneously satisfies all conditions is selected as the optimal signal path, reducing the work of engineers in optimizing the path and improving the efficiency of signal path planning.

[0087] It should be noted that the beneficial effects or technical problems solved by the embodiments of this application are not limited to this one, but may also be other implicit or related problems. For details, please refer to the description of the embodiments below.

[0088] The technical solution of this application and how it solves the above-mentioned technical problems will be described in detail below with specific embodiments. These specific embodiments can be combined with each other, and the same or similar concepts or processes may not be described again in some embodiments. The embodiments of this application will be described below with reference to the accompanying drawings.

[0089] In one exemplary embodiment, such as Figure 2 As shown, a signal path planning method is provided. Taking the application of this method to a computer device as an example, the method includes the following steps 201 to 203. Wherein:

[0090] S201, Obtain the component layout mesh diagram of the circuit board.

[0091] The device layout mesh diagram includes a multi-layer device two-dimensional mesh diagram. The device two-dimensional mesh diagram can be obtained by dividing the device layout image into a mesh. Multiple device two-dimensional mesh diagrams can be stacked to obtain a multi-layer device two-dimensional mesh diagram.

[0092] Based on the aforementioned two-dimensional device mesh diagram, a device layout mesh diagram of the circuit board can be obtained. For example, a device layout image of the circuit board can be obtained first, and then the device layout image can be divided into meshes to obtain a two-dimensional device mesh diagram. Then, based on multiple two-dimensional device mesh diagrams, a three-dimensional device layout mesh diagram can be obtained.

[0093] S202, determine multiple start and end pin pairs based on the pin grid coordinates of each component in the component layout grid diagram.

[0094] The circuit board contains multiple components, including start and stop components, which can form multiple pairs of start and stop devices. The start pin of the start device in a pair of start and stop devices corresponds one-to-one with the stop pin of the stop device, thus obtaining multiple start and stop pin pairs.

[0095] Multiple starting devices in the circuit board are obtained, and the pins of each starting device are used as starting pins. Then, based on the pre-set mapping relationship, the corresponding ending pins can be obtained. Then, based on each ending pin, the device where each ending pin is located is determined. Finally, based on the pin grid coordinates of each device in the device layout grid diagram, the pin grid coordinates of each starting pin and the pin grid coordinates of the ending pin are determined, and multiple start and end pin pairs are obtained.

[0096] S203 determines the optimal signal path between each start and stop pin pair based on signal line loss and signal line crosstalk conditions.

[0097] The signal line loss condition refers to minimizing the loss of the path from the start pin to the end pin. The signal crosstalk condition refers to minimizing the crosstalk from surrounding paths on the path from the start pin to the end pin. The optimal signal path is the path from the start pin to the end pin that satisfies both the signal line loss condition and the signal line crosstalk condition.

[0098] For any start and stop pin pair, multiple paths between the start and stop pin pairs can be determined based on the pin grid coordinates of the start pin and the stop pin. Then, the path that satisfies the signal line loss condition and the signal line crosstalk condition is determined as the optimal signal path between the start and stop pin pairs.

[0099] The signal path planning method provided in this application involves obtaining a device layout mesh diagram of a circuit board, which includes a multi-layer two-dimensional mesh diagram of devices. Then, based on the pin grid coordinates of each device in the circuit board within the device layout mesh diagram, multiple start and end pin pairs are determined. Finally, based on signal line loss conditions and signal line crosstalk conditions, the optimal signal path between each start and end pin pair is determined. This method, by setting signal line loss and crosstalk conditions, selects the path that simultaneously satisfies both conditions as the optimal signal path between each start and end pin pair. This takes into account various constraints in signal path planning, selecting the path that simultaneously meets all conditions as the optimal signal path, reducing the workload of engineers in optimizing paths and improving the efficiency of signal path planning.

[0100] The component layout mesh diagram of a circuit board includes a multi-layer two-dimensional component mesh diagram. The two-dimensional component mesh diagram can be obtained first from the component layout image of the circuit board, and then a three-dimensional component layout mesh diagram can be obtained based on the number of wiring signal layers on the circuit board. Based on this, the following embodiment describes the method for obtaining the component layout mesh diagram.

[0101] In one exemplary embodiment, such as Figure 3 As shown, the component layout mesh diagram of the circuit board is obtained, including:

[0102] S301, Obtain the component layout image of the circuit board.

[0103] After the wiring engineer determines the layout of multiple components on the circuit board, the component layout image in the circuit board design file can be exported using electronic design automation software.

[0104] S302, perform grid division on the device layout image to obtain a two-dimensional grid diagram of the device.

[0105] The size of the grid can be set according to actual needs and is not limited here. For example, if the circuit board size is 40cm×40cm, the component layout image can be divided into a 40×40 grid or a 400×400 grid, etc.

[0106] S303, based on the layer information of the circuit board, performs conversion processing on the two-dimensional mesh diagram of the components to obtain a component layout mesh diagram composed of multi-layer component two-dimensional mesh diagrams.

[0107] The layer number information of the circuit board can be understood as the number of signal layers on the circuit board that can be wired.

[0108] Obtain the number of layers on the circuit board that can be routed. Based on the number of layers on the circuit board that can be routed, convert the two-dimensional mesh diagram of the components into a three-dimensional mesh diagram, thus obtaining a component layout mesh diagram composed of two-dimensional mesh diagrams of multiple components.

[0109] In the signal path planning method provided in this application embodiment, a device layout image of a circuit board is obtained, and then the device layout image is divided into a grid to obtain a two-dimensional device grid image. Finally, based on the layer information of the circuit board, the two-dimensional device grid image is transformed to obtain a device layout grid image composed of multi-layer device two-dimensional grid images. This method provides an optional way to obtain the device layout grid image of the circuit board by introducing the layer information of the circuit board to convert the two-dimensional device grid image into a three-dimensional grid image, thus obtaining a device layout grid image including multi-layer device two-dimensional grid images.

[0110] After obtaining the device layout mesh, the start and end pins in the mesh can be identified, facilitating the subsequent determination of the optimal signal path between each start pin and its corresponding end pin. Based on this, the following embodiment illustrates how to obtain multiple start and end pin pairs.

[0111] In one exemplary embodiment, such as Figure 4 As shown, based on the pin grid coordinates of each component in the component layout grid diagram, multiple start and end pin pairs are determined, including:

[0112] S401, determine the device within the preset range on the circuit board as the starting device.

[0113] Obtain the components within a preset range on the circuit board, determine their corresponding positions in the component layout grid based on their positions on the circuit board, and use the components at each corresponding position as the starting components.

[0114] S402 determines the pins of each starting device as the starting pins.

[0115] Each pin in each starting device is used as the starting pin.

[0116] S403 determines the termination pin corresponding to each start pin based on the layout relationship between each device and the pin grid coordinates of each device's pins in the device layout grid diagram, thus obtaining multiple start and stop pin pairs.

[0117] A start-stop pin pair includes a start pin and a corresponding stop pin.

[0118] Based on the layout relationship between the devices, the corresponding termination device for each starting device is determined. Then, based on the preset mapping relationship, the termination pin corresponding to each starting pin can be obtained. After that, based on each termination pin, the termination device where each termination pin is located is determined. Finally, based on the pin grid coordinates of each device's pin in the device layout grid diagram, the pin grid coordinates of each starting pin and the pin grid coordinates of the termination pin are determined, and multiple start and stop pin pairs are obtained.

[0119] In the signal path planning method provided in this application embodiment, devices within a preset range on the circuit board are identified as starting devices. Then, the pins of each starting device are identified as starting pins. Finally, based on the layout relationship between the devices and the pin grid coordinates of each device's pins in the device layout grid diagram, the termination pin corresponding to each starting pin is determined, resulting in multiple start-end pin pairs. This method provides an optional approach to quickly determine multiple start-end pin pairs. By determining the layout relationship between the devices, each starting device and its corresponding termination device can be identified. Then, based on the pin grid coordinates of each device's pins in the device layout grid diagram, the pin grid coordinates of the termination pin corresponding to each starting pin can be determined, resulting in multiple start-end pin pairs.

[0120] When planning signal paths for multiple start and stop pin pairs, the paths need to be planned according to a certain priority order. Based on this, the following embodiment illustrates how to determine the optimal signal path between each start and stop pin pair.

[0121] In one exemplary embodiment, such as Figure 5 As shown, based on signal line loss and signal line crosstalk conditions, the optimal signal path between each start and stop pin pair is determined, including:

[0122] S501 retrieves the priority between each start and stop pin pair.

[0123] In one embodiment, the priority between each start and stop pin pair can be obtained by calculating the distance between them, with higher priority indicating greater distance. For example, the Euclidean distance between each start and stop pin pair can be determined according to the following formula (1).

[0124]

[0125] Where x1, y1, and z1 are the pin grid coordinates of the start pin; x2, y2, and z2 are the pin grid coordinates of the end pin; and d1 is the Euclidean distance between the start pin and the end pin.

[0126] S502, based on signal line loss and signal line crosstalk conditions, sequentially obtains the optimal signal path between each start and stop pin pair according to priority.

[0127] Based on the pin grid coordinates of the starting pin and the pin grid coordinates of the ending pin in each start-end pin pair, multiple paths between the start-end pin pair with the highest priority are first obtained. Then, the path that satisfies the signal line loss condition and the signal line crosstalk condition is determined as the optimal signal path between the start-end pin pair. After that, the optimal signal paths between other start-end pin pairs can be obtained in sequence according to the priority and the above method.

[0128] The signal path planning method provided in this application obtains the priority between each start and end pin pair, and then, based on signal line loss conditions and signal line crosstalk conditions, sequentially obtains the optimal signal path between each start and end pin pair according to the priority. This method, by introducing the priority between each start and end pin pair, sequentially obtains the optimal signal path between each start and end pin pair according to their priority. This avoids having to go back and modify the already planned path when planning other signal paths, further improving the efficiency of signal path planning.

[0129] For the first-priority start and stop pin pairs, since there are no other signal paths, they are not affected by crosstalk; that is, only the signal line loss condition needs to be met. However, for start and stop pin pairs that are not first-priority, there are pre-planned signal paths, and they will be affected by crosstalk; that is, both the signal line loss condition and the signal line crosstalk condition need to be met simultaneously. Based on this, the following example illustrates how to obtain the optimal signal path between each start and stop pin pair according to priority.

[0130] In one exemplary embodiment, such as Figure 6 As shown, based on signal line loss and crosstalk conditions, the optimal signal path between each start and end pin pair is obtained sequentially according to priority, including:

[0131] S601, for the first and last pin pairs with the highest priority, obtains the optimal signal path between the first and last pin pairs in the two-dimensional grid diagram of the first layer of the circuit board based on the signal line loss condition.

[0132] For the first and last pin pairs with the highest priority, since there are no other signal paths, they will not be affected by crosstalk. That is, it is only necessary to obtain the optimal signal path based on the signal line loss condition, and path planning is only required in the two-dimensional mesh diagram of the first-layer device.

[0133] Based on the pin grid coordinates of the starting pin and the ending pin in the start-end pin pair, multiple signal paths can be obtained in the two-dimensional grid diagram of the first layer of the circuit board. Then, the signal path that meets the signal line loss condition is determined as the optimal signal path for the start-end pin pair.

[0134] S602, for start and stop pin pairs that are not the first priority, obtains the optimal signal path between start and stop pin pairs in the two-dimensional mesh diagram of all layers of the circuit board based on signal line loss conditions and signal line crosstalk conditions.

[0135] For start and stop pin pairs that are not the first priority, since there is already a planned signal path, they will be affected by crosstalk from the planned signal path. That is, it is necessary to obtain the optimal signal path based on both the signal line loss condition and the signal line crosstalk condition, and path planning is required in the two-dimensional mesh diagram of all layers of devices.

[0136] For any start and stop pin pair that is not the first priority, multiple signal paths can be obtained in the two-dimensional grid diagram of all devices on the circuit board based on the pin grid coordinates of the start pin and the stop pin in the start and stop pin pair. Then, the signal path that simultaneously satisfies the signal line loss condition and the signal line crosstalk condition is determined as the optimal signal path for the start and stop pin pair.

[0137] In the signal path planning method provided in this application embodiment, for the first-priority start-end pin pair, the optimal signal path between the start-end pin pair is obtained in the two-dimensional mesh diagram of the first layer of the circuit board based on the signal line loss condition; for the start-end pin pair whose priority is not the first, the optimal signal path between the start-end pin pair is obtained in the two-dimensional mesh diagram of all layers of the circuit board based on the signal line loss condition and the signal line crosstalk condition. In this method, since the first-priority start-end pin pair is not affected by crosstalk, when determining the optimal signal path, it is only necessary for the signal path to meet the signal line loss condition. However, for the start-end pin pair whose priority is not the first, since there is a pre-planned signal path, it will be affected by crosstalk. Therefore, when determining the optimal signal path, the signal path needs to simultaneously meet the signal line loss condition and the signal line crosstalk condition.

[0138] When determining the optimal signal path for the first and last priority pin pairs, the loss cost value can be calculated, and the optimal path can be determined based on whether the loss cost value meets the signal line loss condition. Based on this, the following example illustrates how to determine the optimal signal path for the first and last priority pin pairs.

[0139] In one exemplary embodiment, such as Figure 7 As shown, based on the signal line loss condition, the optimal signal path between the start and end pin pairs is obtained from the two-dimensional mesh diagram of the first layer of the circuit board, including:

[0140] S701, in the first-layer device two-dimensional mesh diagram, starting from the start pin of the start-end pin alignment, moves one mesh along multiple preset directions to obtain multiple candidate mesh nodes.

[0141] In the first-layer device 2D mesh diagram, starting from the centering pin of the start and end pins, moving one grid along multiple preset directions yields multiple candidate grid nodes. These preset directions can include up, down, left, right, upper left, lower left, upper right, and lower right.

[0142] It should be noted that when moving the grid, you need to avoid the grid coordinates where each device is located.

[0143] S702, obtain the loss cost value of each candidate grid node, and determine the candidate grid node that meets the signal line loss condition as the first path node of the start and end pin pair.

[0144] The loss cost value represents the movement cost from the starting pin to each candidate grid node.

[0145] Moving to different positions corresponds to different loss cost values. By obtaining the loss cost value of each candidate grid node, the candidate grid node corresponding to the loss cost value that meets the signal line loss condition is determined as the first path node of the start and end pin pair.

[0146] S703 continues to obtain the remaining path nodes of the start and end pin pairs sequentially, starting from the first path node, until it moves to the end pin of the start and end pin pairs, thus obtaining the optimal signal path of the start and end pin pairs.

[0147] After determining the first path node, continue to use the first path node as the starting point and adopt the same acquisition method as in step 702 to sequentially acquire the remaining path nodes of the start and end pin pairs until the termination pin of the start and end pin pairs is reached, thereby obtaining the optimal signal path of the start and end pin pairs.

[0148] In the signal path planning method provided in this application embodiment, in the two-dimensional mesh diagram of the first-layer device, starting from the starting pin of the start-end pin pair, the device moves one mesh along multiple preset directions to obtain multiple candidate mesh nodes. Then, the loss cost value of each candidate mesh node is obtained, and the candidate mesh node that satisfies the signal line loss condition is determined as the first path node of the start-end pin pair. Finally, starting from the first path node, the remaining path nodes of the start-end pin pair are obtained sequentially until the termination pin of the start-end pin pair is reached, thus obtaining the optimal signal path for the start-end pin pair. This method provides an optional approach for quickly determining the optimal signal path between start-end pin pairs with the highest priority. By introducing a loss cost value, the optimal path is determined based on whether the loss cost value satisfies the signal line loss condition, thus ensuring that the loss is minimized under this signal path.

[0149] The loss cost value can include the actual loss cost value and the estimated loss cost value. Based on this, the following example illustrates how to obtain the loss cost value of each candidate grid node.

[0150] In one exemplary embodiment, such as Figure 8 As shown, the loss cost value of each candidate grid node is obtained, including:

[0151] S801, determine the actual loss cost value of each candidate grid node based on the unit cost value of each preset direction; and determine the estimated loss cost value of each candidate grid node based on the grid coordinates of each candidate grid node and the pin grid coordinates of the start and end pins aligned with the end pins.

[0152] The unit cost value varies depending on the preset direction. For example, the unit cost value is 1 for the preset direction of up, down, left or right, and 1.4 for the preset direction of up right, down right, up left or down left.

[0153] The estimated loss cost can be obtained by calculating the Manhattan distance between the grid coordinates of each candidate grid node and the pin grid coordinates of the start and end pin pairs.

[0154] For any candidate grid node, first obtain the unit cost value of the direction of movement to the candidate grid node, and determine the unit cost value as the actual loss cost value of the candidate grid node. Then, obtain the grid coordinates of the candidate grid node and the pin grid coordinates of the start and end pin alignment termination pin. The estimated loss cost value of the candidate grid node is obtained by calculating the Manhattan distance between the grid coordinates of the candidate grid node and the pin grid coordinates of the start and end pin alignment termination pin.

[0155] S802, based on each actual loss cost value and each estimated loss cost value, determine the loss cost value of each candidate grid node.

[0156] For any candidate grid node, the sum of the actual loss cost value and the estimated loss cost value of the candidate grid node is determined as the loss cost value of the candidate grid node.

[0157] The signal path planning method provided in this application determines the actual loss cost value of each candidate grid node based on the unit cost value of each preset direction, and determines the estimated loss cost value of each candidate grid node based on the grid coordinates of each candidate grid node and the pin grid coordinates of the start and end pins aligned with the end pin. Then, the total loss cost value of each candidate grid node is determined based on both the actual and estimated loss cost values. This method provides an optional approach for quickly determining the loss cost value of each candidate grid node by determining both the actual and estimated loss cost values, and then using the sum of these values ​​as the total loss cost value.

[0158] For start and end pin pairs that are not the first priority, the path can first be obtained in the first-level device 2D mesh diagram. If there is no intersection with the path in the first-level device 2D mesh diagram, the optimal signal path can be found directly in the first-level device 2D mesh diagram. If there is an intersection with the path in the first-level device 2D mesh diagram, it is necessary to continue searching for a path in the next level device 2D mesh diagram. Based on this, the following example illustrates the method for obtaining the optimal signal path for start and end pin pairs that are not the first priority.

[0159] In one exemplary embodiment, such as Figure 9 As shown, based on signal line loss and crosstalk conditions, the optimal signal path between start and end pin pairs is obtained in the two-dimensional mesh diagram of all layers of the circuit board, including:

[0160] S901 performs a candidate path lookup operation in the first-layer device two-dimensional mesh diagram to obtain candidate signal paths for the start and end pin pairs.

[0161] Based on the preset candidate path lookup method, a candidate path lookup operation is performed in the first-layer device two-dimensional mesh diagram to obtain candidate signal paths for the start and end pin pairs.

[0162] S902, if the candidate signal path intersects with the planned signal path in the first layer device two-dimensional grid diagram, then according to the layer order of the circuit board, jump to the next layer device two-dimensional grid diagram to perform the candidate path search operation to obtain a new candidate signal path, until the obtained new candidate signal path does not intersect with the planned signal path in the two-dimensional grid diagram of its own layer device, and obtain the optimal signal path between the start and end pin pairs.

[0163] The candidate signal path is compared with the planned signal path in the first-layer device 2D mesh diagram to determine whether the candidate signal path intersects with the planned signal path in the first-layer device 2D mesh diagram. For example, the grid coordinates of each grid in the candidate signal path and the grid coordinates of each grid in the planned signal path in the first-layer device 2D mesh diagram can be obtained. The grid coordinates of each grid in the candidate signal path are compared with the grid coordinates of each grid in the planned signal path. If there are no identical grid coordinates, it is determined that the candidate signal path does not intersect with the planned signal path in the first-layer device 2D mesh diagram. If there are identical grid coordinates, it is determined that the candidate signal path intersects with the planned signal path in the first-layer device 2D mesh diagram.

[0164] Furthermore, if a candidate signal path intersects with a planned signal path in the first-layer device 2D mesh diagram, then according to the layer order of the circuit board, jump to the next layer device 2D mesh diagram to perform a candidate path search operation to obtain a new candidate signal path, until the obtained new candidate signal path does not intersect with the planned signal path in the device 2D mesh diagram of its own layer, and the optimal signal path between the start and end pin pairs can be obtained.

[0165] In the signal path planning method provided in this application embodiment, a candidate path search operation is performed in the first-layer device two-dimensional mesh diagram to obtain candidate signal paths for the start and end pin pairs. If the candidate signal path intersects with the planned signal path in the first-layer device two-dimensional mesh diagram, the search operation is performed in the next layer device two-dimensional mesh diagram according to the layer order of the circuit board to obtain new candidate signal paths, until the obtained new candidate signal path does not intersect with the planned signal path in the two-dimensional mesh diagram of its own layer, thus obtaining the optimal signal path between the start and end pin pairs. In this method, for start and end pin pairs with non-first priority, a candidate signal path search is first performed in the first-layer device two-dimensional mesh diagram. If the candidate signal path does not intersect with the path in the first-layer device two-dimensional mesh diagram, the candidate signal path can be directly used as the optimal signal path. If the candidate signal path intersects with the path in the first-layer device two-dimensional mesh diagram, the search for candidate signal paths needs to be continued in the next layer device two-dimensional mesh diagram until no intersection is found and the optimal signal path is obtained.

[0166] When obtaining candidate signal paths for start and end pin pairs, the comprehensive cost value of candidate grid nodes can be calculated by moving the grid. The candidate signal path is then determined based on whether the loss cost value meets the signal line loss condition and the signal line crosstalk condition. Based on this, the following example illustrates how to perform the candidate path search operation.

[0167] In one exemplary embodiment, such as Figure 10 As shown, the candidate path lookup operation includes:

[0168] S1001, starting from the start pin of the centering pin, moves one grid along multiple preset directions to obtain multiple candidate grid nodes.

[0169] Starting from the initial pin of the start / end pin alignment, moving one grid along multiple preset directions yields multiple candidate grid nodes. These preset directions can include up, down, left, right, upper left, lower left, upper right, and lower right. Furthermore, when moving the grid, it is necessary to avoid the grid coordinates of each device.

[0170] S1002, obtain the comprehensive cost value of each candidate grid node, and determine the candidate grid node that simultaneously satisfies the signal line loss condition and the signal line crosstalk condition as the first path node of the start and end pin pair.

[0171] The comprehensive cost value includes loss cost value and crosstalk cost value.

[0172] Moving to different positions corresponds to different comprehensive cost values. By obtaining the comprehensive cost value of each candidate grid node, the candidate grid node corresponding to the comprehensive cost value that simultaneously satisfies the signal line loss condition and the signal line crosstalk condition is determined as the first path node of the start and end pin pair.

[0173] S1003, continue to obtain the remaining path nodes of the start and end pin pairs in sequence, starting from the first path node, until the termination pin of the start and end pin pairs is reached, and the candidate signal path of the start and end pin pairs is obtained.

[0174] After determining the first path node, continue to use the first path node as the starting point and adopt the same acquisition method as in step 1002 to sequentially acquire the remaining path nodes of the start and end pin pairs until the termination pin of the start and end pin pairs is reached, thereby obtaining the candidate signal paths of the start and end pin pairs.

[0175] In the signal path planning method provided in this application embodiment, starting from the starting pin of the start-end pin pair, the method moves one grid along multiple preset directions to obtain multiple candidate grid nodes. The comprehensive cost value of each candidate grid node is obtained, and the candidate grid node that simultaneously satisfies the signal line loss condition and the signal line crosstalk condition is determined as the first path node of the start-end pin pair. The remaining path nodes of the start-end pin pair are then obtained sequentially, starting from the first path node, until the ending pin of the start-end pin pair is reached, thus obtaining the candidate signal path for the start-end pin pair. This method provides an optional approach for quickly obtaining candidate signal paths by introducing a comprehensive cost value. The candidate signal path is determined based on whether the comprehensive cost value satisfies the signal line loss condition and the signal line crosstalk condition. This ensures both minimal loss and minimal crosstalk from surrounding signal paths along the path.

[0176] The overall cost value includes loss cost and crosstalk cost. Based on this, the following example illustrates how to obtain the overall cost value of each candidate grid node.

[0177] In one exemplary embodiment, such as Figure 11 As shown, the comprehensive cost value of each candidate grid node is obtained, including:

[0178] S1101, based on the unit cost value of each preset direction, the grid coordinates of each candidate grid node, and the pin grid coordinates of the termination pin, determine the loss cost value of each candidate grid node.

[0179] The loss cost value includes the actual loss cost value and the estimated loss cost value.

[0180] For any candidate grid node, obtain the unit cost value of the direction of movement to the candidate grid node, and determine the unit cost value as the actual loss cost value of the candidate grid node. Then, obtain the grid coordinates of the candidate grid node and the pin grid coordinates of the start and end pin alignment termination pin. By calculating the Manhattan distance between the grid coordinates of the candidate grid node and the pin grid coordinates of the start and end pin alignment termination pin, obtain the estimated loss cost value of the candidate grid node. Finally, the sum of the actual loss cost value and the estimated loss cost value of the candidate grid node is determined as the loss cost value of the candidate grid node.

[0181] S1102, determine the crosstalk cost value of each candidate grid node based on the grid coordinates of each candidate grid node and the obstacle grid coordinates in the current layer device two-dimensional grid diagram.

[0182] Among them, the obstacle grid coordinates represent the grid coordinates of each grid in the planned signal path in the two-dimensional grid diagram of the current layer device.

[0183] Based on a pre-defined method for determining crosstalk cost, the crosstalk cost of each candidate grid node is determined according to the grid coordinates of each candidate grid node and the grid coordinates of each planned signal path in the two-dimensional grid diagram of the current layer device.

[0184] S1103, determine the comprehensive cost value of each candidate grid node based on the cost values ​​of each loss and each crosstalk.

[0185] For any candidate grid node, the sum of the loss cost and crosstalk cost of the candidate grid node is determined as the comprehensive cost value of the candidate grid node.

[0186] The signal path planning method provided in this application determines the loss cost value of each candidate grid node based on the unit cost value of each preset direction, the grid coordinates of each candidate grid node, and the pin grid coordinates of the termination pin. Then, based on the grid coordinates of each candidate grid node and the obstacle grid coordinates in the current layer device's two-dimensional grid diagram, the crosstalk cost value of each candidate grid node is determined. The obstacle grid coordinates represent the grid coordinates of each planned signal path in the current layer device's two-dimensional grid diagram. Finally, based on the loss cost value and the crosstalk cost value, the comprehensive cost value of each candidate grid node is determined. This method, by determining the loss cost value and crosstalk cost value of each candidate grid node and then using the sum of these values ​​as the comprehensive cost value of each candidate grid node, provides an optional approach for quickly determining the comprehensive cost value of each candidate grid node.

[0187] Crosstalk cost values ​​include near-end crosstalk cost values ​​and far-end crosstalk cost values. Based on this, the following example illustrates how to determine the crosstalk cost value of a candidate mesh node.

[0188] In one exemplary embodiment, such as Figure 12 As shown, based on the grid coordinates of each candidate grid node and the obstacle grid coordinates in the current layer device's two-dimensional grid diagram, the crosstalk cost value of each candidate grid node is determined, including:

[0189] S1201, based on the near-end crosstalk weight, the grid coordinates of each obstacle, and the grid coordinates of each candidate grid node, determine the near-end crosstalk cost value of each candidate grid node.

[0190] For any candidate grid node, the Euclidean distance between the candidate grid node and the obstacle can be determined first based on the grid coordinates of the candidate grid node and the grid coordinates of each obstacle. Then, the ratio of the near-end crosstalk weight to the Euclidean distance between the candidate grid node and the obstacle is used as the near-end crosstalk cost value of the candidate grid node.

[0191] For example, the near-end crosstalk cost value of each candidate grid node can be determined according to the following formula (2).

[0192]

[0193] Where NEXT is the near-end crosstalk cost; n is the candidate mesh node; w1 is the near-end crosstalk weight; and d2 is the Euclidean distance between the current candidate mesh node and the obstacle.

[0194] like Figure 13The diagram shown is a schematic of the two-dimensional mesh diagram of the device. ① to ④ represent pre-planned paths (obstacle mesh nodes), with the signal direction from ④ to ①; ⑤ to ⑥ represent paths currently being planned, with the signal direction from ⑤ to ⑥; and A is one of the candidate mesh nodes. Taking candidate mesh node A as an example, the near-end crosstalk cost of this candidate mesh node is the ratio of the near-end crosstalk weight to the Euclidean distance between the candidate mesh node and obstacle ②.

[0195] S1202, determine the far-end crosstalk cost value of each candidate grid node based on the far-end crosstalk weight, the grid coordinates of each obstacle, and the grid coordinates of each candidate grid node.

[0196] For any candidate grid node, the Euclidean distance between the candidate grid node and the obstacle can be determined first based on the grid coordinates of the candidate grid node and the grid coordinates of each obstacle. Then, the ratio of the far-end crosstalk weight to the Euclidean distance between the candidate grid node and the obstacle can be calculated. Finally, the sum of the far-end crosstalk cost value of the planned grid node in the start-end pin pair and the above ratio can be used as the far-end crosstalk cost value of the candidate grid node.

[0197] For example, the far-end crosstalk cost value of each candidate grid node can be determined according to the following formula (3).

[0198]

[0199] Where FEXT is the near-end crosstalk cost value; w2 is the far-end crosstalk weight.

[0200] like Figure 13 As shown, taking candidate grid node A as an example, the far-end crosstalk cost of this candidate grid node is the ratio of the far-end crosstalk cost between grid node ⑤ and obstacle ① + the far-end crosstalk cost between grid node ⑥ and obstacle ① + the far-end crosstalk cost to the Euclidean distance between candidate grid node A and obstacle ②.

[0201] S1203, determine the crosstalk cost value of each candidate grid node based on the crosstalk cost values ​​of each near end and each far end.

[0202] For any candidate grid node, the sum of the near-end crosstalk cost value and the far-end crosstalk cost value of the candidate grid node is taken as the crosstalk cost value of the candidate grid node.

[0203] The signal path planning method provided in this application determines the near-end crosstalk cost value of each candidate grid node based on the near-end crosstalk weight, the grid coordinates of each obstacle, and the grid coordinates of each candidate grid node. Then, it determines the far-end crosstalk cost value of each candidate grid node based on the far-end crosstalk weight, the grid coordinates of each obstacle, and the grid coordinates of each candidate grid node. Finally, it determines the crosstalk cost value of each candidate grid node based on both the near-end and far-end crosstalk cost values. This method provides an optional approach for quickly determining the crosstalk cost value of each candidate grid node by determining both the near-end and far-end crosstalk cost values ​​and then summing them as the crosstalk cost value of each candidate grid node.

[0204] Additionally, in one exemplary embodiment, this application also provides an optional example of a signal path planning method, such as... Figure 14 As shown, it may include the following steps:

[0205] S1301, Obtain the component layout image of the circuit board.

[0206] S1302, perform grid division on the device layout image to obtain a two-dimensional grid diagram of the device.

[0207] S1303, based on the layer information of the circuit board, performs conversion processing on the two-dimensional mesh diagram of the device to obtain a device layout mesh diagram composed of a two-dimensional mesh diagram of multiple devices.

[0208] S1304, determine the device within the preset range on the circuit board as the starting device.

[0209] S1305 determines the pins of each starting device as the starting pins.

[0210] S1306, based on the layout relationship between each device and the pin grid coordinates of each device's pins in the device layout grid diagram, determines the termination pin corresponding to each start pin, thus obtaining multiple start and termination pin pairs.

[0211] S1307 retrieves the priority between each start and stop pin pair.

[0212] S1308, based on signal line loss conditions and signal line crosstalk conditions, sequentially obtains the optimal signal path between each start and stop pin pair according to priority.

[0213] Optionally, for the first-priority start-stop pin pair, the optimal signal path between the start-stop pin pair is obtained in the first-layer device 2D mesh diagram of the circuit board based on the signal line loss condition. For start-stop pin pairs that are not the first-priority, the optimal signal path between the start-stop pin pairs is obtained in the 2D mesh diagrams of all layers of the circuit board based on the signal line loss condition and the signal line crosstalk condition.

[0214] The processes S1301-S1308 described above can be found in the description of the above method embodiments, and their implementation principles and technical effects are similar, so they will not be repeated here.

[0215] It should be understood that although the steps in the flowcharts of the embodiments described above are shown sequentially according to the arrows, these steps are not necessarily executed in the order indicated by the arrows. Unless explicitly stated herein, there is no strict order restriction on the execution of these steps, and they can be executed in other orders. Moreover, at least some steps in the flowcharts of the embodiments described above may include multiple steps or multiple stages. These steps or stages are not necessarily completed at the same time, but can be executed at different times. The execution order of these steps or stages is not necessarily sequential, but can be performed alternately or in turn with other steps or at least some of the steps or stages of other steps.

[0216] Based on the same inventive concept, this application also provides a signal path planning apparatus for implementing the signal path planning method described above. The solution provided by this apparatus is similar to the implementation described in the above method; therefore, the specific limitations in one or more signal path planning apparatus embodiments provided below can be found in the limitations of the signal path planning method described above, and will not be repeated here.

[0217] In one exemplary embodiment, such as Figure 15 As shown, a signal path planning device 1 is provided, comprising: a mesh map acquisition module 10, a first determination module 20, and a second determination module 30, wherein:

[0218] The mesh diagram acquisition module 10 is used to acquire the component layout mesh diagram of the circuit board; the component layout mesh diagram includes a two-dimensional mesh diagram of multi-layer components;

[0219] The first determining module 20 is used to determine multiple start and end pin pairs based on the pin grid coordinates of each component in the component layout grid diagram on the circuit board.

[0220] The second determining module 30 is used to determine the optimal signal path between each start and stop pin pair based on signal line loss conditions and signal line crosstalk conditions.

[0221] In one embodiment, the mesh map acquisition module 10 is further configured to:

[0222] Obtain the component layout image of the circuit board; divide the component layout image into a grid to obtain a two-dimensional component grid image; based on the layer information of the circuit board, transform the two-dimensional component grid image to obtain a component layout grid image composed of multi-layer component two-dimensional grid images.

[0223] In one embodiment, the first determining module 20 is further configured to:

[0224] The devices within a preset range on the circuit board are identified as starting devices; the pins of each starting device are identified as starting pins; based on the layout relationship between the devices and the pin grid coordinates of each device's pins in the device layout grid diagram, the termination pin corresponding to each starting pin is determined, resulting in multiple start and stop pin pairs.

[0225] In one embodiment, the second determining module 30 is further configured to:

[0226] Obtain the priority between each start and stop pin pair; based on signal line loss and signal line crosstalk conditions, obtain the optimal signal path between each start and stop pin pair in order of priority.

[0227] In one embodiment, the second determining module 30 is further configured to:

[0228] For the first and last pin pairs with the highest priority, the optimal signal path between the first and last pin pairs is obtained in the two-dimensional mesh diagram of the first layer of the circuit board based on the signal line loss condition.

[0229] For start and stop pin pairs that are not the first priority, the optimal signal path between the start and stop pin pairs is obtained in the two-dimensional mesh diagram of all layers of the circuit board based on the signal line loss condition and the signal line crosstalk condition.

[0230] In one embodiment, the second determining module 30 is further configured to:

[0231] In the first-layer device two-dimensional mesh diagram, starting from the start pin of the start-end pin alignment, move one mesh along multiple preset directions to obtain multiple candidate mesh nodes;

[0232] Obtain the loss cost value of each candidate grid node, and determine the candidate grid node that meets the signal line loss condition as the first path node of the start and end pin pair;

[0233] Starting from the first path node, the remaining path nodes of the start and end pin pairs are obtained sequentially until the termination pin of the start and end pin pairs is reached, thus obtaining the optimal signal path for the start and end pin pairs.

[0234] In one embodiment, the second determining module 30 is further configured to:

[0235] Based on the unit cost value of each preset direction, determine the actual loss cost value of each candidate grid node; and based on the grid coordinates of each candidate grid node and the pin grid coordinates of the start and end pins aligned with the end pins, determine the estimated loss cost value of each candidate grid node; based on each actual loss cost value and each estimated loss cost value, determine the loss cost value of each candidate grid node.

[0236] In one embodiment, the second determining module 30 is further configured to:

[0237] A candidate path search operation is performed in the first-layer device 2D mesh diagram to obtain candidate signal paths for the start and end pin pairs. If a candidate signal path intersects with a planned signal path in the first-layer device 2D mesh diagram, the next layer device 2D mesh diagram is jumped to perform a candidate path search operation to obtain a new candidate signal path in the order of the circuit board layers, until the obtained new candidate signal path does not intersect with the planned signal path in the device 2D mesh diagram of its own layer, thus obtaining the optimal signal path between the start and end pin pairs.

[0238] In one embodiment, the second determining module 30 is further configured to:

[0239] Starting from the starting pin of the start-end pin pair, move one grid along multiple preset directions to obtain multiple candidate grid nodes; obtain the comprehensive cost value of each candidate grid node, and determine the candidate grid node that simultaneously satisfies the signal line loss condition and the signal line crosstalk condition as the first path node of the start-end pin pair; continue to obtain the remaining path nodes of the start-end pin pair sequentially from the first path node until the termination pin of the start-end pin pair is reached, and obtain the candidate signal path of the start-end pin pair.

[0240] In one embodiment, the second determining module 30 is further configured to:

[0241] Based on the unit cost value of each preset direction, the grid coordinates of each candidate grid node, and the pin grid coordinates of the termination pin, the loss cost value of each candidate grid node is determined; based on the grid coordinates of each candidate grid node and the obstacle grid coordinates in the current layer device's two-dimensional grid diagram, the crosstalk cost value of each candidate grid node is determined; the obstacle grid coordinates represent the grid coordinates of each grid in the planned signal path in the current layer device's two-dimensional grid diagram; based on each loss cost value and each crosstalk cost value, the comprehensive cost value of each candidate grid node is determined.

[0242] In one embodiment, the second determining module 30 is further configured to:

[0243] Based on the near-end crosstalk weight, the grid coordinates of each obstacle, and the grid coordinates of each candidate grid node, determine the near-end crosstalk cost value of each candidate grid node; based on the far-end crosstalk weight, the grid coordinates of each obstacle, and the grid coordinates of each candidate grid node, determine the far-end crosstalk cost value of each candidate grid node; based on the near-end crosstalk cost value and the far-end crosstalk cost value, determine the crosstalk cost value of each candidate grid node.

[0244] Each module in the aforementioned signal path planning device can be implemented entirely or partially through software, hardware, or a combination thereof. These modules can be embedded in the processor of a computer device in hardware form or independent of it, or stored in the memory of a computer device in software form, so that the processor can call and execute the operations corresponding to each module.

[0245] In one embodiment, a computer device is also provided, including a memory and a processor, wherein the memory stores a computer program, and the processor executes the computer program to implement the steps in the above method embodiments.

[0246] The implementation principles and technical effects of each step in the processor embodiment of this application are similar to those of the above-described signal path planning method, and will not be repeated here.

[0247] In one embodiment, a computer-readable storage medium is provided having a computer program stored thereon that, when executed by a processor, implements the steps in the above method embodiments.

[0248] The implementation principles and technical effects of each step of the computer program executed by the processor in this embodiment are similar to those of the above-described signal path planning method, and will not be repeated here.

[0249] In one embodiment, a computer program product is provided, including a computer program that, when executed by a processor, implements the steps in the above method embodiments.

[0250] The implementation principles and technical effects of each step of the computer program executed by the processor in this embodiment are similar to those of the above-described signal path planning method, and will not be repeated here.

[0251] It should be noted that the data involved in this application (including but not limited to data used for analysis, data stored, data displayed, etc.) are all information and data that have been authorized or fully authorized by the parties, and the collection, use and processing of the relevant data must comply with relevant regulations.

[0252] Those skilled in the art will understand that all or part of the processes in the methods of the above embodiments can be implemented by a computer program instructing related hardware. The computer program can be stored in a non-volatile computer-readable storage medium, and when executed, it can include the processes of the embodiments of the above methods. Any references to memory, databases, or other media used in the embodiments provided in this application can include at least one of non-volatile and volatile memory. Non-volatile memory can include read-only memory (ROM), magnetic tape, floppy disk, flash memory, optical memory, high-density embedded non-volatile memory, resistive random access memory (ReRAM), magnetic random access memory (MRAM), ferroelectric random access memory (FRAM), phase change memory (PCM), graphene memory, etc. Volatile memory can include random access memory (RAM) or external cache memory, etc. By way of illustration and not limitation, RAM can take many forms, such as Static Random Access Memory (SRAM) or Dynamic Random Access Memory (DRAM). The databases involved in the embodiments provided in this application may include at least one type of relational database and non-relational database. Non-relational databases may include, but are not limited to, blockchain-based distributed databases. The processors involved in the embodiments provided in this application may be general-purpose processors, central processing units, graphics processing units, digital signal processors, programmable logic devices, quantum computing-based data processing logic devices, etc., and are not limited to these.

[0253] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0254] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are specific and detailed, they should not be construed as limiting the scope of this patent application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this application should be determined by the appended claims.

Claims

1. A signal path planning method, characterized in that, The method includes: Obtain a component layout mesh diagram of the circuit board; the component layout mesh diagram includes a two-dimensional mesh diagram of multi-layer components; Based on the pin grid coordinates of each device in the circuit board in the device layout grid diagram, multiple start and end pin pairs are determined; Based on signal line loss conditions and signal line crosstalk conditions, the optimal signal path between each of the start and end pin pairs is determined; wherein, the optimal signal path refers to the path between the start pin and the end pin that satisfies the signal line loss conditions and the signal line crosstalk conditions; the signal line loss condition refers to the path between the start pin and the end pin having the minimum loss, and the signal line crosstalk condition refers to the path between the start pin and the end pin being subject to the minimum crosstalk from surrounding paths.

2. The method according to claim 1, characterized in that, The step of obtaining the device layout mesh diagram of the circuit board includes: Obtain a component layout image of the circuit board; The device layout image is divided into grids to obtain a two-dimensional grid diagram of the device; Based on the layer number information of the circuit board, the two-dimensional mesh diagram of the device is transformed to obtain the device layout mesh diagram composed of the two-dimensional mesh diagram of the multi-layer device.

3. The method according to claim 1 or 2, characterized in that, The step of determining multiple start and end pin pairs based on the pin grid coordinates of each device in the device layout grid diagram includes: Devices located within a preset range on the circuit board are identified as starting devices; The pins of each of the aforementioned starting devices are designated as starting pins; Based on the layout relationship between the devices and the pin grid coordinates of each device's pins in the device layout grid diagram, the termination pin corresponding to each starting pin is determined, thus obtaining the multiple start and stop pin pairs.

4. The method according to claim 1 or 2, characterized in that, The determination of the optimal signal path between each of the start and stop pin pairs based on signal line loss and signal line crosstalk conditions includes: Obtain the priority between each of the aforementioned start and stop pin pairs; Based on the signal line loss condition and the signal line crosstalk condition, the optimal signal path between each of the start and stop pin pairs is obtained sequentially according to the priority.

5. The method according to claim 4, characterized in that, The step of obtaining the optimal signal path between each of the start and end pin pairs according to the priority based on the signal line loss condition and the signal line crosstalk condition includes: For the first and last pin pairs with the highest priority, the optimal signal path between the first and last pin pairs is obtained in the two-dimensional mesh diagram of the first layer of the circuit board according to the signal line loss condition. For start and stop pin pairs that are not the first priority, the optimal signal path between the start and stop pin pairs is obtained in the two-dimensional mesh diagram of all layers of the circuit board based on the signal line loss condition and the signal line crosstalk condition.

6. The method according to claim 5, characterized in that, The step of obtaining the optimal signal path between the start and end pin pairs in the two-dimensional mesh diagram of the first layer of the circuit board based on the signal line loss condition includes: In the two-dimensional grid diagram of the first-layer device, starting from the starting pin of the start-end pin alignment, a grid is moved along multiple preset directions to obtain multiple candidate grid nodes. Obtain the loss cost value of each candidate grid node, and determine the candidate grid node that satisfies the signal line loss condition as the first path node of the start and end pin pair; Starting from the first path node, the remaining path nodes of the start and end pin pairs are obtained sequentially until the termination pin of the start and end pin pairs is reached, thus obtaining the optimal signal path of the start and end pin pairs.

7. The method according to claim 6, characterized in that, The step of obtaining the loss cost value of each candidate grid node includes: Based on the unit cost value of each preset direction, determine the actual loss cost value of each candidate grid node; and based on the grid coordinates of each candidate grid node and the pin grid coordinates of the start and end pin alignment termination pin, determine the estimated loss cost value of each candidate grid node. The loss cost value of each candidate grid node is determined based on the actual loss cost value and the estimated loss cost value.

8. The method according to claim 5, characterized in that, The step of obtaining the optimal signal path between the start and end pin pairs in the two-dimensional mesh diagram of all layers of the circuit board based on the signal line loss condition and the signal line crosstalk condition includes: A candidate path lookup operation is performed in the two-dimensional mesh diagram of the first-layer device to obtain the candidate signal paths of the start and end pin pairs; If the candidate signal path intersects with the planned signal path in the first-layer device two-dimensional grid diagram, then according to the layer order of the circuit board, the candidate path search operation is performed in the next layer device two-dimensional grid diagram to obtain a new candidate signal path until the obtained new candidate signal path does not intersect with the planned signal path in the device two-dimensional grid diagram of its own layer, thus obtaining the optimal signal path between the start and end pin pairs.

9. The method according to claim 8, characterized in that, The candidate path lookup operation includes: Starting from the centering pin of the start and stop pin alignment, move one grid along multiple preset directions to obtain multiple candidate grid nodes; Obtain the comprehensive cost value of each candidate grid node, and determine the candidate grid node that simultaneously satisfies the signal line loss condition and the signal line crosstalk condition as the first path node of the start and end pin pair; Starting from the first path node, the remaining path nodes of the start and end pin pairs are obtained sequentially until the termination pin of the start and end pin pairs is reached, thus obtaining the candidate signal path of the start and end pin pairs.

10. The method according to claim 9, characterized in that, The step of obtaining the comprehensive cost value of each candidate grid node includes: The loss cost value of each candidate grid node is determined based on the unit cost value of each preset direction, the grid coordinates of each candidate grid node, and the pin grid coordinates of the termination pin. The crosstalk cost value of each candidate grid node is determined based on the grid coordinates of each candidate grid node and the obstacle grid coordinates in the current layer device 2D grid diagram; the obstacle grid coordinates represent the grid coordinates of each grid in the planned signal path in the current layer device 2D grid diagram. The comprehensive cost value of each candidate grid node is determined based on the loss cost value and the crosstalk cost value.

11. The method according to claim 10, characterized in that, The step of determining the crosstalk cost value of each candidate grid node based on the grid coordinates of each candidate grid node and the obstacle grid coordinates in the current layer device's two-dimensional grid diagram includes: Based on the near-end crosstalk weight, the grid coordinates of each obstacle, and the grid coordinates of each candidate grid node, the near-end crosstalk cost value of each candidate grid node is determined. The far-end crosstalk cost value of each candidate grid node is determined based on the far-end crosstalk weight, the grid coordinates of each obstacle, and the grid coordinates of each candidate grid node. The crosstalk cost value of each candidate mesh node is determined based on the near-end crosstalk cost value and the far-end crosstalk cost value.

12. A signal path planning device, characterized in that, The device includes: The mesh diagram acquisition module is used to acquire the component layout mesh diagram of the circuit board; the component layout mesh diagram includes a multi-layer component two-dimensional mesh diagram; The first determining module is used to determine multiple start and end pin pairs based on the pin grid coordinates of each device in the device layout grid diagram. The second determining module is used to determine the optimal signal path between each of the start and end pin pairs based on signal line loss conditions and signal line crosstalk conditions; wherein, the optimal signal path refers to the path between the start pin and the end pin that satisfies the signal line loss conditions and the signal line crosstalk conditions; the signal line loss conditions refer to the path between the start pin and the end pin having the minimum loss, and the signal line crosstalk conditions refer to the path between the start pin and the end pin being subject to the minimum crosstalk from surrounding paths.

Images