A chip packaging method and system

Abstract

The application relates to the technical field of image processing, and relates to a chip packaging method and system, which comprises the following steps: obtaining a packaging substrate and a high-precision chip, receiving a chip packaging instruction, starting a chip packaging unit, cleaning, obtaining a cleaned substrate and a cleaned chip, drying, obtaining a prepared substrate and a prepared chip, performing plasma treatment, obtaining a treated substrate and a treated chip, calculating the surface activity of the chip, calculating the surface activity of the substrate, calculating ideal activity, adjusting, obtaining adjusted substrate activity, adjusting, obtaining adjusted chip activity, performing solution coating, obtaining a coated substrate, performing image acquisition, obtaining a chip image, calculating alignment error, adjusting the prepared chip, obtaining a corrected position, performing low-temperature welding, obtaining a packaging workpiece, and completing chip packaging according to the packaging workpiece. The application can improve the quality of chip packaging.

Description

Technical Field

[0001] This invention relates to the field of image processing technology, and in particular to a chip packaging method and system. Background Technology

[0002] With the rapid development of the electronics industry, chip packaging technology is becoming increasingly important in fields such as microelectronics, communications, and computing. Chip packaging not only requires efficient cleaning, drying, and plasma treatment of the packaging substrate and chip, but also requires precise adjustment of the activity of the packaging substrate and chip surface to ensure perfect alignment and reliable connection in the subsequent low-temperature soldering process.

[0003] Traditional chip packaging methods rely on manual cleaning, drying, and plasma treatment, which are susceptible to human error. This not only reduces the precision and efficiency of high-precision packaging but also increases the risk of operational errors and contamination. Furthermore, traditional chip packaging methods use fixed parameters, making it difficult to dynamically adjust the surface activity of the packaging substrate and high-precision chip based on real-time monitoring data. This results in an inability to effectively cope with subtle environmental changes and material differences in actual production, easily leading to poor packaging bonding or uneven soldering. Therefore, improving the quality of chip packaging is a crucial issue that urgently needs to be addressed. Summary of the Invention

[0004] This invention provides a chip packaging method and system, the main purpose of which is to improve the quality of chip packaging.

[0005] To achieve the above objectives, the present invention provides a chip packaging method, comprising:

[0006] The system acquires a packaging substrate and a chip to be packaged, receives a chip packaging instruction, and starts a chip packaging unit based on the chip packaging instruction. The chip packaging unit includes an ultrasonic cleaning unit, a device drying unit, an image acquisition unit, and a local heating unit.

[0007] The ultrasonic cleaning unit is used to clean the packaging substrate and the chip to be packaged, resulting in a cleaned substrate and a cleaned chip.

[0008] The cleaning substrate and the cleaning chip are dried using the device drying unit to obtain the preparation substrate and the preparation chip.

[0009] Plasma treatment is performed on the preparation substrate and the preparation chip to obtain the processed substrate and the processed chip. The surface activity of the chip is calculated based on the processed chip, and the surface activity of the substrate is calculated based on the processed substrate.

[0010] The ideal activity is calculated, which includes the ideal activity of the substrate and the ideal activity of the chip. The surface activity of the substrate is adjusted based on the ideal activity of the substrate to obtain the adjusted substrate activity. The surface activity of the chip is adjusted based on the ideal activity of the chip to obtain the adjusted chip activity. The substrate is then coated with a solution based on the adjusted substrate activity, the adjusted chip activity, and a preset connection area to obtain a coated substrate. A pre-constructed robotic arm is used to place the prepared chip on the connection area of ​​the coated substrate, and the image acquisition unit is used to acquire an image to obtain a chip image.

[0011] The alignment error is calculated based on the chip image, and the chip is adjusted according to the alignment error to obtain the corrected position.

[0012] Based on the local heating unit and the correction position, the prepared chip is low-temperature welded to obtain a packaged workpiece, and the chip is packaged according to the packaged workpiece.

[0013] Optionally, the step of drying the cleaning substrate and the cleaning chip using the device drying unit to obtain the preparation substrate and the preparation chip includes:

[0014] The cleaning substrate and cleaning chip are fixed on a pre-constructed drying bracket, and the cleaning substrate and cleaning chip are initially dried based on a preset drying speed and drying time to obtain a preliminary substrate and a preliminary chip.

[0015] The device drying unit is preheated to obtain the preheating temperature;

[0016] Compare the preheating temperature with the preset drying temperature;

[0017] Once it is confirmed that the preheating temperature is equal to the drying temperature, the sample drying rate is calculated, and the sample drying time is set according to the sample drying rate.

[0018] The preliminary substrate and preliminary chip are dried based on the device drying unit and the sample drying time to obtain the prepared substrate and prepared chip.

[0019] Optionally, the calculation of the sample drying rate includes:

[0020] Obtain the substrate surface area of ​​the cleaning substrate, and obtain the chip surface area of ​​the cleaning chip;

[0021] Obtain the substrate boundary thickness, chip boundary thickness, actual vapor pressure, and internal air velocity. Calculate the sample drying rate based on the substrate surface area, chip surface area, substrate boundary thickness, chip boundary thickness, actual vapor pressure, and internal air velocity.

[0022]

[0023] in, The drying rate of the sample. Refers to the surface area of ​​the chip. This refers to the preset chip diffusion coefficient. Refers to the surface area of ​​the substrate. This refers to the preset substrate diffusion coefficient. Refers to the chip boundary thickness. Refers to the thickness of the substrate boundary. Refers to the hyperbolic sine function. Refers to the preset saturated vapor pressure. Refers to actual vapor pressure. This refers to the preset pressure constant. Refers to the natural constant. Refers to the airflow speed inside the box. This refers to the preset saturation wind speed.

[0024] Optionally, the step of calculating the chip surface activity based on the processing chip includes:

[0025] Obtain the total plasma power and plasma area, and calculate the plasma power density based on the total plasma power and plasma area:

[0026]

[0027] in, Plasma power density Refers to total plasma power. Refers to the area of ​​plasma action;

[0028] The chip activation energy, gas constant, and plasma time of the processing chip are obtained, and the chip surface activity is calculated based on the plasma power density, chip activation energy, gas constant, and plasma time.

[0029] Optionally, the step of calculating the chip surface activity based on the plasma power density, chip activation energy, gas constant, and plasma time includes:

[0030] The region temperature is obtained, and the chip surface activity is calculated based on the plasma power density, chip activation energy, gas constant, plasma time, preset gas constant, preset plasma parameters, and region temperature.

[0031]

[0032] in, Refers to the surface activity of the chip. Refers to the plasmonic parameter. Refers to isostatic time. Refers to the preset time parameters. Refers to chip activation energy, Refers to the gas constant. Refers to regional temperature. This refers to the preset temperature constant.

[0033] Optionally, the calculation of ideal activity includes:

[0034] The active concentration and standard adhesive strength are obtained. Based on the temperature of the region, the preset ideal adhesive strength, the active concentration, the preset reference standard temperature, and the standard adhesive strength, the ideal activity of the chip is calculated. The formula for calculating the ideal activity of the chip is as follows:

[0035]

[0036] in, Refers to the ideal activity of the chip. Refers to standard bond strength. Refers to ideal bond strength. Refers to the preset bonding parameters. The hyperbolic tangent function. Refers to the reference standard temperature. The natural logarithm Refers to the active concentration. Refers to the preset gas parameters;

[0037] The substrate temperature, substrate bonding strength, substrate gas parameters, and substrate bonding parameters are obtained. The ideal activity of the substrate is calculated based on the substrate temperature, ideal bonding strength, active concentration, reference standard temperature, substrate bonding strength, substrate gas parameters, and substrate bonding parameters.

[0038] Ideal activity is obtained based on the ideal activity of the chip and the ideal activity of the substrate.

[0039] Optionally, adjusting the substrate surface activity based on the ideal substrate activity to obtain adjusted substrate activity includes:

[0040] Set the activity difference threshold according to the ideal activity of the substrate;

[0041] The substrate activity difference is calculated based on the ideal substrate activity and the substrate surface activity.

[0042] Compare the substrate activity difference with the activity difference threshold;

[0043] If the substrate activity difference is greater than the activity difference threshold, the total plasma power is adjusted to obtain a first adjusted power, the plasma time is adjusted to obtain a first adjusted time, the substrate surface activity is adjusted according to the first adjusted power and the first adjusted time to obtain a first adjusted activity, the first activity difference is calculated according to the first adjusted activity and the ideal substrate activity, the substrate activity difference is updated using the first activity difference, and the step of comparing the substrate activity difference with the activity difference threshold is returned according to the updated substrate activity difference until the substrate activity difference is not greater than the activity difference threshold.

[0044] If the difference in substrate activity is not greater than the activity difference threshold, then the substrate surface activity is identified as the substrate activity to be adjusted.

[0045] Optionally, before placing the pre-built chip onto the connection area on the coated substrate using a pre-constructed robotic arm and acquiring an image using the image acquisition unit to obtain a chip image, the method further includes:

[0046] Obtain a material template, divide standard blocks based on the preparation chip and the material template, identify the block center according to the standard block, and mark the standard block with features based on the block center to obtain a marked template, wherein the block center is the geometric center of the standard block;

[0047] The marking template is fixed to the back of the preparation chip, and a marking coordinate system is constructed based on the marking template.

[0048] Optionally, the step of calculating the alignment error based on the chip image includes:

[0049] The center coordinates are obtained based on the marked coordinate system. The center of the connected region is identified from the chip image. The region coordinates are identified from the marked coordinate system based on the region center. The region center is the geometric center of the connected region. The center coordinates include: the center x-coordinate and the center y-coordinate. The region coordinates include: the region x-coordinate and the region y-coordinate.

[0050] Calculate the alignment error based on the center coordinates and region coordinates:

[0051]

[0052] in, This refers to alignment error. The x-coordinate of the center. Refers to the x-coordinate of the region. The central ordinate, The vertical coordinate of the region.

[0053] To achieve the above objectives, the present invention also provides a chip packaging process system, comprising:

[0054] The equipment cleaning module is used to acquire the packaging substrate and the chip to be packaged, receive the chip packaging instruction, and start the chip packaging unit based on the chip packaging instruction. The chip packaging unit includes an ultrasonic cleaning unit, a device drying unit, an image acquisition unit, and a local heating unit.

[0055] The ultrasonic cleaning unit is used to clean the packaging substrate and the chip to be packaged, resulting in a cleaned substrate and a cleaned chip.

[0056] An activity calculation module is used to dry the cleaning substrate and the cleaning chip using the device drying unit to obtain a preparation substrate and a preparation chip.

[0057] Plasma treatment is performed on the preparation substrate and the preparation chip to obtain the processed substrate and the processed chip. The surface activity of the chip is calculated based on the processed chip, and the surface activity of the substrate is calculated based on the processed substrate.

[0058] An image acquisition module is used to calculate ideal activity, which includes ideal substrate activity and ideal chip activity. Based on the ideal substrate activity, the surface activity of the substrate is adjusted to obtain adjusted substrate activity. Based on the ideal chip activity, the surface activity of the chip is adjusted to obtain adjusted chip activity. Based on the adjusted substrate activity, adjusted chip activity, and a preset connection area, a solution is applied to the preparation substrate to obtain a coated substrate. A pre-constructed robotic arm is used to place the preparation chip on the connection area of ​​the coated substrate, and the image acquisition unit is used to acquire an image to obtain a chip image.

[0059] The chip welding module is used to calculate the alignment error based on the chip image, and adjust the prepared chip according to the alignment error to obtain the corrected position;

[0060] Based on the local heating unit and the correction position, the prepared chip is low-temperature welded to obtain a packaged workpiece, and the chip is packaged according to the packaged workpiece.

[0061] To address the above problems, the present invention also provides an electronic device, the electronic device comprising:

[0062] Memory, storing at least one instruction;

[0063] The processor executes the instructions stored in the memory to implement the chip packaging method described above.

[0064] To address the aforementioned problems, the present invention also provides a computer-readable storage medium storing at least one instruction, which is executed by a processor in an electronic device to implement the chip packaging method described above.

[0065] To address the problems described in the background art, this invention first receives a chip packaging instruction and initiates a chip packaging unit based on it. This drives the chip packaging process, ensuring automation and standardization, reducing errors caused by human intervention. Furthermore, the chip packaging unit integrates an ultrasonic cleaning unit, a device drying unit, an image acquisition unit, and a local heating unit, improving packaging consistency. Each integrated functional unit can be independently optimized, increasing the flexibility of chip packaging and adapting to different packaging needs. Next, the ultrasonic cleaning unit cleans the packaging substrate and the chip to be packaged. High-frequency ultrasonic vibration removes contaminants from the surfaces of the substrate and chip, improving the cleanliness of the connection area, avoiding packaging defects caused by contamination, and improving the quality of chip packaging. Then, the cleaning... The substrate and cleaned chip are dried to effectively remove residual moisture from the cleaning process, improving packaging reliability. Further, the prepared substrate and chip undergo plasma treatment, and the surface activity of the prepared substrate and chip is calculated. Ideal substrate and chip surface activities are calculated, and adjusted accordingly. Quantifying these activities allows for precise evaluation of the bonding ability of the prepared substrate and chip, improving bonding reliability. Adjusting the surface activity ensures bonding quality and reduces the risk of post-packaging peeling. Finally, alignment error is calculated, and adjustments are made to the prepared chip based on this error, improving chip packaging precision and reducing defects. Therefore, this invention improves chip packaging quality. Attached Figure Description

[0066] Figure 1 This is a schematic flowchart of a chip packaging method provided in an embodiment of the present invention;

[0067] Figure 2 This is a functional block diagram of a chip packaging process system provided in an embodiment of the present invention;

[0068] Figure 3 This is a schematic diagram of the structure of an electronic device that implements the chip packaging method according to an embodiment of the present invention.

[0069] Explanation of reference numerals in the attached figures:

[0070] 10. Electronic device; 11. Processor; 12. Memory; 13. Bus.

[0071] The realization of the objective, functional features and advantages of the present invention will be further explained in conjunction with the embodiments and with reference to the accompanying drawings. Detailed Implementation

[0072] It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.

[0073] This application provides a chip packaging method. The execution entity of the chip packaging method includes, but is not limited to, at least one of the following electronic devices that can be configured to execute the method provided in this application: a server, a terminal, etc. In other words, the chip packaging method can be executed by software or hardware installed on a terminal device or a server device, and the software can be a blockchain platform. The server includes, but is not limited to, a single server, a server cluster, a cloud server, or a cloud server cluster.

[0074] Reference Figure 1 The diagram shown is a schematic flowchart of a chip packaging method according to an embodiment of the present invention. In this embodiment, the chip packaging method includes:

[0075] S1. Obtain the packaging substrate and the chip to be packaged, receive the chip packaging instruction, and start the chip packaging unit based on the chip packaging instruction. The chip packaging unit includes: an ultrasonic cleaning unit, a device drying unit, an image acquisition unit, and a local heating unit.

[0076] Explained, "chip to be packaged" refers to the chip that needs to be packaged, and "chip packaging instruction" refers to the instruction issued by a person to start the chip packaging unit. For example, Xiao Zhang is a chip packaging worker. One day, Xiao Zhang needs to package a chip to be packaged, so he issues a chip packaging instruction and starts the chip packaging unit according to the instruction. The chip packaging unit refers to a unit that integrates an ultrasonic cleaning unit, a device drying unit, an image acquisition unit, and a local heating unit, used to package the chip to be packaged.

[0077] S2. The ultrasonic cleaning unit is used to clean the packaging substrate and the chip to be packaged to obtain a cleaned substrate and a cleaned chip.

[0078] Explained, the ultrasonic cleaning unit refers to the unit that performs ultrasonic cleaning on the chip to be packaged. Optionally, the ultrasonic cleaning unit is an ultrasonic cleaner. The substrate is obtained by ultrasonically cleaning the packaging substrate through the ultrasonic cleaning unit. The cleaned chip refers to the chip obtained after ultrasonically cleaning the chip to be packaged through the ultrasonic cleaning unit. The specific process of cleaning the packaging substrate and the chip to be packaged using the ultrasonic cleaning unit is as follows: First, an ultrasonic cleaning solution is obtained and heated to 35°C. The chip to be packaged and the packaging substrate are placed on a sample holder, ensuring that the chip to be packaged and the packaging substrate do not contact each other on the sample holder. Then, the sample holder, the chip to be packaged, and the packaging substrate are placed into the cleaning tank of the ultrasonic cleaning unit, ensuring that the ultrasonic cleaning solution completely immerses the sample holder, the chip to be packaged, and the packaging substrate. Finally, the ultrasonic frequency, cleaning power, and cleaning time are set. The ultrasonic cleaning unit performs ultrasonic cleaning on the chip to be packaged and the packaging substrate according to the ultrasonic frequency, cleaning power, cleaning time, and ultrasonic cleaning unit to obtain the cleaned substrate and the cleaned chip. During the ultrasonic cleaning process, the temperature in the cleaning tank of the ultrasonic cleaning unit is monitored in real time to ensure that the temperature in the cleaning tank is maintained at 35°C. Ultrasonic cleaning fluid refers to the liquid placed inside the ultrasonic cleaning unit used to clean the chip to be packaged and the packaging substrate. Optionally, the ultrasonic cleaning fluid is deionized water. Sample tray refers to the tray inside the ultrasonic cleaning unit used to hold the chip to be packaged and the packaging substrate. Ultrasonic frequency refers to the energy transferred by the ultrasonic cleaning unit to the ultrasonic cleaning fluid during operation. Optionally, the ultrasonic frequency is 40kHz. Cleaning power refers to the rate at which the ultrasonic cleaning unit transfers energy to the ultrasonic cleaning fluid. Optionally, the cleaning power is 100W. Cleaning time refers to the manually set time used to clean the chip to be packaged and the packaging substrate. Optionally, the cleaning time is 8 minutes.

[0079] S3. The cleaning substrate and the cleaning chip are dried using the device drying unit to obtain the preparation substrate and the preparation chip.

[0080] Explained, the device drying unit refers to a unit used to dry the cleaning substrate and the cleaning chip; optionally, the device drying unit is a drying oven. The prepared substrate refers to the substrate obtained after drying the cleaning substrate using the device drying unit, and the prepared chip refers to the chip obtained after drying the cleaning chip using the device drying unit.

[0081] Specifically, the process of drying the cleaning substrate and the cleaning chip using the device drying unit to obtain the preparation substrate and the preparation chip includes:

[0082] The cleaning substrate and cleaning chip are fixed on a pre-constructed drying bracket, and the cleaning substrate and cleaning chip are initially dried based on a preset drying speed and drying time to obtain a preliminary substrate and a preliminary chip.

[0083] The device drying unit is preheated to obtain the preheating temperature;

[0084] Compare the preheating temperature with the preset drying temperature;

[0085] Once it is confirmed that the preheating temperature is equal to the drying temperature, the sample drying rate is calculated, and the sample drying time is set according to the sample drying rate.

[0086] The preliminary substrate and preliminary chip are dried based on the device drying unit and the sample drying time to obtain the prepared substrate and prepared chip.

[0087] Explained terms: The drying tray refers to the tray used to place and fix the cleaning substrate and the cleaning chip; the drying speed refers to the rotation speed at which the cleaning substrate and the cleaning chip are initially dried, optionally at 40 rpm; the drying time refers to the time for the initial drying of the cleaning substrate and the cleaning chip, optionally at 2 minutes; the preliminary substrate refers to the substrate obtained after the preliminary drying of the cleaning substrate; the preliminary chip refers to the chip obtained after the preliminary drying of the cleaning chip; the preheating temperature refers to the air temperature inside the device drying unit after preheating; the drying temperature refers to a manually set temperature used to determine the preheating temperature, optionally at 40°C. "Initial drying of the cleaning substrate and the cleaning chip based on the preset drying speed and drying time" refers to starting the centrifuge according to the drying speed and drying time, and using the centrifuge to centrifuge and spin-dry the cleaning substrate and the cleaning chip, optionally using a centrifuge dryer.

[0088] Specifically, the calculation of the sample drying rate includes:

[0089] Obtain the substrate surface area of ​​the cleaning substrate, and obtain the chip surface area of ​​the cleaning chip;

[0090] Obtain the substrate boundary thickness, chip boundary thickness, actual vapor pressure, and internal air velocity. Calculate the sample drying rate based on the substrate surface area, chip surface area, substrate boundary thickness, chip boundary thickness, actual vapor pressure, and internal air velocity.

[0091]

[0092] in, The drying rate of the sample. Refers to the surface area of ​​the chip. This refers to the preset chip diffusion coefficient. Refers to the surface area of ​​the substrate. This refers to the preset substrate diffusion coefficient. Refers to the chip boundary thickness. Refers to the thickness of the substrate boundary. Refers to the hyperbolic sine function. Refers to the preset saturated vapor pressure. Refers to actual vapor pressure. This refers to the preset pressure constant. Refers to the natural constant. Refers to the airflow speed inside the box. This refers to the preset saturation wind speed.

[0093] Explained terms: Substrate surface area refers to the effective surface area of ​​the preliminary substrate, which is the surface area exposed to air; chip surface area refers to the effective surface area of ​​the preliminary chip; substrate boundary thickness refers to the boundary layer thickness of the preliminary substrate; chip boundary thickness refers to the boundary layer thickness of the preliminary chip; actual vapor pressure refers to the pressure of water vapor within the device drying unit. Actual vapor pressure determines the ease with which water vapor diffuses from the surface of the preliminary chip and substrate into the air. The higher the actual vapor pressure, the less easily the water vapor evaporates, and the more difficult it is to dry the preliminary chip and substrate. Chamber air velocity refers to the airflow speed within the device drying unit. The higher the chamber air velocity, the greater the drying rate of the preliminary chip and substrate. Drying rate refers to the rate at which the preliminary chip and substrate dry. However, the closer the chamber air velocity is to the saturation air velocity, the smaller the effect of increasing the chamber air velocity on the drying rate. For example, if the saturation air velocity is 3 m / s, the closer the chamber air velocity is to 3 m / s, the smaller the effect of increasing the chamber air velocity on the drying rate. Saturation velocity refers to a manually set wind speed used to adjust the airflow rate inside the chamber. It provides a limit to the airflow rate within the chamber; once this limit is reached, increasing the airflow rate has limited effect on improving the drying rate. Chip diffusion coefficient reflects the diffusion capability of the initial chip, indicating the ability of moisture to diffuse from it. Substrate diffusion coefficient reflects the diffusion capability of the initial substrate, indicating the ability of moisture to diffuse from it. Both chip and substrate diffusion coefficients are affected by the materials used; different materials result in different chip and substrate diffusion coefficients. Saturated vapor pressure refers to the saturated vapor pressure of moisture within the device's drying unit. The pressure constant is a manually set parameter used for normalization. The constant is optional, with the pressure constant being 101325 Pa.

[0094] S4. Perform plasma treatment on the preparation substrate and the preparation chip to obtain the processed substrate and the processed chip. Calculate the surface activity of the chip based on the processed chip and the surface activity of the substrate based on the processed substrate.

[0095] In essence, plasma treatment of the substrate and chip refers to plasma treatment of the cleaned substrate and chip. Plasma treatment is existing technology and will not be elaborated upon here. "Processed substrate" refers to the substrate obtained after plasma treatment of the substrate, and "processed chip" refers to the chip obtained after plasma treatment of the chip. Chip surface activity refers to the chip's ability to adsorb, wet, spread, and react with the coating solvent. Chip surface activity directly affects the welding effect with the substrate; the higher the chip surface activity, the better the welding effect between the chip and the substrate. "Coating solvent" refers to the solvent applied to the connection area of ​​the substrate. The connection area of ​​the substrate refers to the area used for welding with the chip. Substrate surface activity refers to the substrate's ability to adsorb, wet, spread, and react with the coating solvent; substrate surface activity directly affects the welding effect with the chip; the higher the substrate surface activity, the better the welding effect between the chip and the substrate.

[0096] Specifically, the calculation of chip surface activity based on the processing chip includes:

[0097] Obtain the total plasma power and plasma area, and calculate the plasma power density based on the total plasma power and plasma area:

[0098]

[0099] in, Plasma power density Refers to total plasma power. Refers to the area of ​​plasma action;

[0100] The chip activation energy, gas constant, and plasma time of the processing chip are obtained, and the chip surface activity is calculated based on the plasma power density, chip activation energy, gas constant, and plasma time.

[0101] Explainable terms include: total plasma power (the sum of plasma power during the entire plasma treatment process of the chip), plasma treatment area (the area of ​​the chip treated with plasma), plasma power density (the power of plasma applied per unit area of ​​the chip during plasma treatment), chip activation energy (the minimum energy required for the surface molecular bonds of the chip to break, which is related to the material of the chip and has a gas constant of 8.314 J / mol·K), and plasma time (the duration of plasma treatment of the chip). For example, if plasma treatment of the chip begins at 10:00 am and ends at 10:01 am, the plasma time is 1 minute.

[0102] Specifically, the calculation of chip surface activity based on the plasma power density, chip activation energy, gas constant, and plasma time includes:

[0103] The region temperature is obtained, and the chip surface activity is calculated based on the plasma power density, chip activation energy, gas constant, plasma time, preset gas constant, preset plasma parameters, and region temperature.

[0104]

[0105] in, Refers to the surface activity of the chip. Refers to the plasmonic parameter. Refers to isostatic time. Refers to the preset time parameters. Refers to chip activation energy, Refers to the gas constant. Refers to regional temperature. This refers to the preset temperature constant.

[0106] Explained, zone temperature refers to the surface temperature of the prepared chip after plasma treatment, and the unit of zone temperature is °C. Plasma parameters are manually set parameters used to control... The larger the plasmonic parameter, the greater the influence of the chip surface activity. The greater the impact of plasma time on chip surface activity, the greater the influence of plasma time on chip surface activity. The time parameter, used to control the influence of plasma time on chip surface activity, is used to determine this effect. The temperature constant is 273.15℃. The method for calculating substrate surface activity is the same as that for calculating chip surface activity. The specific formula for calculating substrate surface activity is shown below:

[0107]

[0108] in, Refers to the surface activity of the substrate. substrate activation energy, Refers to the substrate temperature.

[0109] Understandably, substrate activation energy refers to the minimum energy required to break the surface molecular bonds of the substrate. The substrate activation energy is related to the material of the substrate. Substrate temperature refers to the temperature of the substrate surface after plasma treatment. The unit of substrate temperature is °C.

[0110] S5. Calculate the ideal activity, wherein the ideal activity includes: ideal substrate activity and ideal chip activity. Adjust the substrate surface activity based on the ideal substrate activity to obtain the adjusted substrate activity. Adjust the chip surface activity based on the ideal chip activity to obtain the adjusted chip activity. Apply a solution to the prepared substrate based on the adjusted substrate activity, the adjusted chip activity, and the preset connection area to obtain the coated substrate. Use a pre-built robotic arm to place the prepared chip on the connection area of ​​the coated substrate, and use the image acquisition unit to acquire an image to obtain a chip image.

[0111] Explained, ideal activity includes ideal substrate activity and ideal chip activity. Ideal substrate activity refers to the desired level of substrate surface activity for preparing the substrate, and ideal chip activity refers to the desired level of chip surface activity for preparing the chip. When the substrate surface activity reaches the ideal substrate activity and the chip surface activity reaches the ideal chip activity, the quality of the chip soldering to be packaged can be ensured. Adjusting substrate activity refers to the ability of the prepared substrate to adsorb, wet, spread, and react with the coating solvent after adjusting the substrate surface activity according to the ideal substrate activity. Adjusting chip activity refers to the ability of the prepared chip to adsorb, wet, spread, and react with the coating solvent after adjusting the chip surface activity according to the ideal chip activity. Coating substrate refers to the prepared substrate obtained after applying a solution to the connection area of ​​the prepared substrate. Optionally, the solution used to apply the solution to the connection area of ​​the prepared substrate is a modified acrylate adhesive. A robotic arm refers to a device used to move a chip. A chip image refers to an image obtained by using an image acquisition unit to capture images of the connection area between the chip and the coating substrate after the chip is placed on the connection area of ​​the coating substrate. The image acquisition unit refers to a unit that captures images of the connection area between the chip and the coating substrate.

[0112] In detail, the calculation of ideal activity includes:

[0113] The active concentration and standard adhesive strength are obtained. Based on the temperature of the region, the preset ideal adhesive strength, the active concentration, the preset reference standard temperature, and the standard adhesive strength, the ideal activity of the chip is calculated. The formula for calculating the ideal activity of the chip is as follows:

[0114]

[0115] in, Refers to the ideal activity of the chip. Refers to standard bond strength. Refers to ideal bond strength. Refers to the preset bonding parameters. The hyperbolic tangent function. Refers to the reference standard temperature. The natural logarithm Refers to the active concentration. Refers to the preset gas parameters;

[0116] The substrate temperature, substrate bonding strength, substrate gas parameters, and substrate bonding parameters are obtained. The ideal activity of the substrate is calculated based on the substrate temperature, ideal bonding strength, active concentration, reference standard temperature, substrate bonding strength, substrate gas parameters, and substrate bonding parameters.

[0117] Ideal activity is obtained based on the ideal activity of the chip and the ideal activity of the substrate.

[0118] Explainable terms: Active concentration refers to the oxygen concentration in the plasma during plasma treatment of the substrate and chip. The active concentration ranges from 0 to 1. Standard bond strength refers to the bond strength of the chip. Ideal bond strength refers to a manually set bond strength required for the chip to be bonded. The unit of ideal bond strength is N / cm². 2 The reference standard temperature refers to a manually set temperature; the selectable reference standard temperature setting is 25℃. The bonding parameters refer to those used to control... The higher the bonding parameter, the greater its influence on the ideal activity of the chip. The smaller the influence of gas parameters on the ideal activity of the chip, the smaller the influence of the active concentration on the ideal activity of the chip. Gas parameters refer to parameters used to control the influence of active concentration on the ideal activity of the chip; the larger the gas parameters, the smaller the influence of active concentration on the ideal activity of the chip. The calculation method for the ideal activity of the substrate is as follows:

[0119]

[0120] in, The ideal activity of the substrate, Refers to the bonding strength of the substrate. Refers to substrate bonding parameters. Refers to the substrate gas parameters.

[0121] Explainable, substrate bond strength refers to the bond strength of the prepared substrate, and substrate gas parameters refer to parameters used to control the influence of active concentration on the ideal activity of the substrate. The higher the substrate gas parameters, the smaller the influence of active concentration on the ideal activity of the substrate. Substrate bond parameters refer to parameters used to control... The parameters that affect the ideal activity of the substrate are such that the larger the substrate bonding parameters, the better. The smaller the influence of the active concentration on the ideal activity of the substrate, the smaller the influence of the active concentration on the ideal activity of the substrate. The substrate gas parameter refers to the parameter used to control the influence of the active concentration on the ideal activity of the substrate.

[0122] Specifically, the adjustment of substrate surface activity based on ideal substrate activity to obtain adjusted substrate activity includes:

[0123] Set the activity difference threshold according to the ideal activity of the substrate;

[0124] The substrate activity difference is calculated based on the ideal substrate activity and the substrate surface activity.

[0125] Compare the substrate activity difference with the activity difference threshold;

[0126] If the substrate activity difference is greater than the activity difference threshold, the total plasma power is adjusted to obtain a first adjusted power, the plasma time is adjusted to obtain a first adjusted time, the substrate surface activity is adjusted according to the first adjusted power and the first adjusted time to obtain a first adjusted activity, the first activity difference is calculated according to the first adjusted activity and the ideal substrate activity, the substrate activity difference is updated using the first activity difference, and the step of comparing the substrate activity difference with the activity difference threshold is returned according to the updated substrate activity difference until the substrate activity difference is not greater than the activity difference threshold.

[0127] If the difference in substrate activity is not greater than the activity difference threshold, then the substrate surface activity is identified as the substrate activity to be adjusted.

[0128] The activity difference threshold is an artificially set value used to determine the difference in substrate activity. When the difference in substrate activity is less than or equal to the activity difference threshold, the substrate surface activity is considered equal to the ideal substrate activity. The substrate activity difference refers to the absolute value of the difference between the substrate surface activity and the ideal substrate activity. The first adjustment power refers to the power obtained after adjusting the total plasma power; optionally, the first adjustment power is obtained by increasing the total plasma power by 10%. The first adjustment time refers to the time obtained after adjusting the plasma time; optionally, the first adjustment time is obtained by increasing the plasma time by 15%. The first adjusted activity refers to the substrate surface activity obtained after plasma treatment of the prepared substrate using the first adjustment power and the first adjustment time; the first activity difference refers to the absolute value of the difference between the first adjusted activity and the ideal substrate activity.

[0129] Specifically, before placing the pre-built robotic arm onto the connection area on the coated substrate and acquiring an image using the image acquisition unit to obtain the chip image, the process further includes:

[0130] Obtain a material template, divide standard blocks based on the preparation chip and the material template, identify the block center according to the standard block, and mark the standard block with features based on the block center to obtain a marked template, wherein the block center is the geometric center of the standard block;

[0131] The marking template is fixed to the back of the preparation chip, and a marking coordinate system is constructed based on the marking template.

[0132] Explained, the material template refers to a flat rectangular template; optionally, the material template is a rectangular piece of white paper. Dividing a standard section based on the preparation chip refers to using the preparation chip to divide a portion of the material template that is identical in shape and size to the preparation chip; this portion is the standard section. For example, if the preparation chip is 3cm long and 2cm wide, then a portion of the material template with the same length and width as the preparation chip is divided according to its size; this portion is the standard section. Marking the standard section based on its center refers to marking the standard section with a crosshair as the center point. The marking template refers to the template obtained after marking the standard section with a crosshair. Constructing a marking coordinate system based on the marking template means constructing a coordinate system with the center point of the marking template as the origin and the crosshair as the coordinate axes, thus obtaining the marking coordinate system.

[0133] S6. Calculate the alignment error based on the chip image, adjust the prepared chip according to the alignment error, and obtain the corrected position.

[0134] Specifically, the calculation of alignment error based on the chip image includes:

[0135] The center coordinates are obtained based on the marked coordinate system. The center of the connected region is identified from the chip image. The region coordinates are identified from the marked coordinate system based on the region center. The region center is the geometric center of the connected region. The center coordinates include: the center x-coordinate and the center y-coordinate. The region coordinates include: the region x-coordinate and the region y-coordinate.

[0136] Calculate the alignment error based on the center coordinates and region coordinates:

[0137]

[0138] in, This refers to alignment error. The x-coordinate of the center. Refers to the x-coordinate of the region. The central ordinate, The vertical coordinate of the region.

[0139] Explainable terms: center coordinates refer to the coordinates of the origin of the marker coordinate system; region coordinates refer to the coordinates of the center of the region connecting the regions in the marker coordinate system; center x-coordinate refers to the x-coordinate of the center coordinate system; center y-coordinate refers to the y-coordinate of the center coordinate system; region x-coordinate refers to the x-coordinate of the region coordinate system; region y-coordinate refers to the y-coordinate of the region coordinate system; alignment error refers to the error between the center coordinates and the region coordinates. Correction position refers to the position of the prepared chip obtained after correcting the center coordinates to coincide with the region coordinates.

[0140] S7. Based on the local heating unit and the correction position, perform low-temperature welding on the prepared chip to obtain the packaged workpiece, and complete the chip packaging according to the packaged workpiece.

[0141] Explained, a local heating unit refers to a unit used for low-temperature soldering of the assembled chip; optionally, the local heating unit is a miniature heating plate. The packaged workpiece refers to the workpiece obtained after the assembled chip soldering is completed.

[0142] To address the problems described in the background art, this invention first receives a chip packaging instruction and initiates a chip packaging unit based on it. This drives the chip packaging process, ensuring automation and standardization, reducing errors caused by human intervention. Furthermore, the chip packaging unit integrates an ultrasonic cleaning unit, a device drying unit, an image acquisition unit, and a local heating unit, improving packaging consistency. Each integrated functional unit can be independently optimized, increasing the flexibility of chip packaging and adapting to different packaging needs. Next, the ultrasonic cleaning unit cleans the packaging substrate and the chip to be packaged. High-frequency ultrasonic vibration removes contaminants from the surfaces of the substrate and chip, improving the cleanliness of the connection area, avoiding packaging defects caused by contamination, and improving the quality of chip packaging. Then, the cleaning... The substrate and cleaned chip are dried to effectively remove residual moisture from the cleaning process, improving packaging reliability. Further, the prepared substrate and chip undergo plasma treatment, and the surface activity of the prepared substrate and chip is calculated. Ideal substrate and chip surface activities are calculated, and adjusted accordingly. Quantifying these activities allows for precise evaluation of the bonding ability of the prepared substrate and chip, improving bonding reliability. Adjusting the surface activity ensures bonding quality and reduces the risk of post-packaging peeling. Finally, alignment error is calculated, and adjustments are made to the prepared chip based on this error, improving chip packaging precision and reducing defects. Therefore, this invention improves chip packaging quality.

[0143] like Figure 2 The diagram shown is a functional block diagram of a chip packaging process system provided in an embodiment of the present invention.

[0144] The chip packaging process system 100 of this invention can be installed in an electronic device. Depending on the functions implemented, the chip packaging process system 100 may include an equipment cleaning module 101, an activity calculation module 102, an image acquisition module 103, and a chip bonding module 104. The module described in this invention can also be referred to as a unit, which refers to a series of computer program segments that can be executed by the processor of an electronic device and can perform a fixed function, and which are stored in the memory of the electronic device.

[0145] The equipment cleaning module 101 is used to acquire the packaging substrate and the chip to be packaged, receive the chip packaging instruction, and start the chip packaging unit based on the chip packaging instruction. The chip packaging unit includes an ultrasonic cleaning unit, a device drying unit, an image acquisition unit, and a local heating unit.

[0146] The ultrasonic cleaning unit is used to clean the packaging substrate and the chip to be packaged, resulting in a cleaned substrate and a cleaned chip.

[0147] The activity calculation module 102 is used to dry the cleaning substrate and the cleaning chip using the device drying unit to obtain the preparation substrate and the preparation chip.

[0148] Plasma treatment is performed on the preparation substrate and the preparation chip to obtain the processed substrate and the processed chip. The surface activity of the chip is calculated based on the processed chip, and the surface activity of the substrate is calculated based on the processed substrate.

[0149] The image acquisition module 103 is used to calculate the ideal activity, which includes the ideal activity of the substrate and the ideal activity of the chip. The substrate surface activity is adjusted based on the ideal activity of the substrate to obtain the adjusted substrate activity. The chip surface activity is adjusted based on the ideal activity of the chip to obtain the adjusted chip activity. The substrate preparation is coated with a solution based on the adjusted substrate activity, the adjusted chip activity and the preset connection area to obtain the coated substrate. The prepared chip is placed on the connection area on the coated substrate using a pre-constructed robotic arm, and the image acquisition unit is used to acquire the image to obtain the chip image.

[0150] The chip welding module 104 is used to calculate the alignment error based on the chip image, adjust the prepared chip based on the alignment error, and obtain the corrected position.

[0151] Based on the local heating unit and the correction position, the prepared chip is low-temperature welded to obtain a packaged workpiece, and the chip is packaged according to the packaged workpiece.

[0152] In detail, the modules in the chip packaging process system 100 described in this embodiment of the invention employ the same methods as described above. Figure 1The same technical means are used in the chip packaging method described above, and the same technical effects can be achieved, so they will not be repeated here.

[0153] like Figure 3 The diagram shown is a schematic diagram of an electronic device that implements a chip packaging method according to an embodiment of the present invention.

[0154] The electronic device 1 may include a processor 10, a memory 11 and a bus 12, and may also include a computer program, such as a chip packaging method program, stored in the memory 11 and executable on the processor 10.

[0155] The memory 11 includes at least one type of readable storage medium, such as flash memory, portable hard drive, multimedia card, card-type memory (e.g., SD or DX memory), magnetic memory, magnetic disk, optical disk, etc. In some embodiments, the memory 11 can be an internal storage unit of the electronic device 1, such as a portable hard drive. In other embodiments, the memory 11 can be an external storage device of the electronic device 1, such as a plug-in portable hard drive, smart media card (SMC), secure digital card (SD), flash card, etc., equipped on the electronic device 1. Furthermore, the memory 11 includes both internal storage units and external storage devices of the electronic device 1. The memory 11 can be used not only to store application software and various types of data installed on the electronic device 1, such as code for chip packaging methods, but also to temporarily store data that has been output or will be output.

[0156] In some embodiments, the processor 10 may be composed of integrated circuits, such as a single packaged integrated circuit or multiple integrated circuits with the same or different functions, including combinations of one or more central processing units (CPUs), microprocessors, digital processing chips, graphics processors, and various control chips. The processor 10 is the control unit of the electronic device, connecting various components of the entire electronic device through various interfaces and lines. It executes programs or modules (such as chip packaging method programs) stored in the memory 11, and calls data stored in the memory 11 to perform various functions of the electronic device 1 and process data.

[0157] The bus 12 can be a peripheral component interconnect (PCI) bus or an extended industry standard architecture (EISA) bus, etc. The bus 12 can be divided into an address bus, a data bus, a control bus, etc. The bus 12 is configured to realize the connection and communication between the memory 11 and at least one processor 10, etc.

[0158] Figure 3 Only electronic devices with components are shown; it will be understood by those skilled in the art that... Figure 3 The structure shown does not constitute a limitation on the electronic device 1, and may include fewer or more components than shown, or combine certain components, or have different component arrangements.

[0159] For example, although not shown, the electronic device 1 may also include a power supply (such as a battery) to power the various components. Preferably, the power supply can be logically connected to the at least one processor 10 through a power management device, thereby enabling functions such as charging management, discharging management, and power consumption management. The power supply may also include one or more DC or AC power supplies, recharging devices, power fault detection circuits, power converters or inverters, power status indicators, and other arbitrary components. The electronic device 1 may also include various sensors, Bluetooth modules, Wi-Fi modules, etc., which will not be described in detail here.

[0160] Furthermore, the electronic device 1 may also include a network interface. Optionally, the network interface may include a wired interface and / or a wireless interface (such as a Wi-Fi interface, a Bluetooth interface, etc.), which is typically used to establish communication connections between the electronic device 1 and other electronic devices.

[0161] Optionally, the electronic device 1 may further include a user interface, which may be a display, an input unit (such as a keyboard), and optionally, a standard wired interface or a wireless interface. Optionally, in some embodiments, the display may be an LED display, a liquid crystal display, a touch-sensitive liquid crystal display, or an OLED (Organic Light-Emitting Diode) touchscreen, etc. The display may also be appropriately referred to as a screen or display unit, used to display information processed in the electronic device 1 and to display a visual user interface.

[0162] The chip packaging method program stored in the memory 11 of the electronic device 1 is a combination of multiple instructions, which, when run in the processor 10, can achieve the following:

[0163] The system acquires a packaging substrate and a chip to be packaged, receives a chip packaging instruction, and starts a chip packaging unit based on the chip packaging instruction. The chip packaging unit includes an ultrasonic cleaning unit, a device drying unit, an image acquisition unit, and a local heating unit.

[0164] The ultrasonic cleaning unit is used to clean the packaging substrate and the chip to be packaged, resulting in a cleaned substrate and a cleaned chip.

[0165] The cleaning substrate and the cleaning chip are dried using the device drying unit to obtain the preparation substrate and the preparation chip.

[0166] Plasma treatment is performed on the preparation substrate and the preparation chip to obtain the processed substrate and the processed chip. The surface activity of the chip is calculated based on the processed chip, and the surface activity of the substrate is calculated based on the processed substrate.

[0167] The ideal activity is calculated, which includes the ideal activity of the substrate and the ideal activity of the chip. The surface activity of the substrate is adjusted based on the ideal activity of the substrate to obtain the adjusted substrate activity. The surface activity of the chip is adjusted based on the ideal activity of the chip to obtain the adjusted chip activity. The substrate is then coated with a solution based on the adjusted substrate activity, the adjusted chip activity, and a preset connection area to obtain a coated substrate. A pre-constructed robotic arm is used to place the prepared chip on the connection area of ​​the coated substrate, and the image acquisition unit is used to acquire an image to obtain a chip image.

[0168] The alignment error is calculated based on the chip image, and the chip is adjusted according to the alignment error to obtain the corrected position.

[0169] Based on the local heating unit and the correction position, the prepared chip is low-temperature welded to obtain a packaged workpiece, and the chip is packaged according to the packaged workpiece.

[0170] Specifically, the processor 10's implementation method for the above instructions can be found in [reference needed]. Figures 1 to 3 The descriptions of the relevant steps in the corresponding embodiments are not repeated here.

[0171] Furthermore, if the modules / units integrated in the electronic device 1 are implemented as software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. The computer-readable storage medium can be volatile or non-volatile. For example, the computer-readable medium may include: any entity or device capable of carrying the computer program code, a recording medium, a USB flash drive, a portable hard drive, a magnetic disk, an optical disk, a computer memory, or a read-only memory (ROM).

[0172] The present invention also provides a computer-readable storage medium storing a computer program, which, when executed by a processor of an electronic device, can perform the following:

[0173] The system acquires a packaging substrate and a chip to be packaged, receives a chip packaging instruction, and starts a chip packaging unit based on the chip packaging instruction. The chip packaging unit includes an ultrasonic cleaning unit, a device drying unit, an image acquisition unit, and a local heating unit.

[0174] The ultrasonic cleaning unit is used to clean the packaging substrate and the chip to be packaged, resulting in a cleaned substrate and a cleaned chip.

[0175] The cleaning substrate and the cleaning chip are dried using the device drying unit to obtain the preparation substrate and the preparation chip.

[0176] Plasma treatment is performed on the preparation substrate and the preparation chip to obtain the processed substrate and the processed chip. The surface activity of the chip is calculated based on the processed chip, and the surface activity of the substrate is calculated based on the processed substrate.

[0177] The ideal activity is calculated, which includes the ideal activity of the substrate and the ideal activity of the chip. The surface activity of the substrate is adjusted based on the ideal activity of the substrate to obtain the adjusted substrate activity. The surface activity of the chip is adjusted based on the ideal activity of the chip to obtain the adjusted chip activity. The substrate is then coated with a solution based on the adjusted substrate activity, the adjusted chip activity, and a preset connection area to obtain a coated substrate. A pre-constructed robotic arm is used to place the prepared chip on the connection area of ​​the coated substrate, and the image acquisition unit is used to acquire an image to obtain a chip image.

[0178] The alignment error is calculated based on the chip image, and the chip is adjusted according to the alignment error to obtain the corrected position.

[0179] Based on the local heating unit and the correction position, the prepared chip is low-temperature welded to obtain a packaged workpiece, and the chip is packaged according to the packaged workpiece.

[0180] In the embodiments provided by this invention, it should be understood that the disclosed devices, systems, and methods can be implemented in other ways. For example, the system embodiments described above are merely illustrative, and actual implementations may have other classification methods.

[0181] The modules described as separate components may or may not be physically separate. The components shown as modules may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the modules can be selected to achieve the purpose of this embodiment according to actual needs.

[0182] Furthermore, the functional modules in the various embodiments of the present invention can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or in the form of hardware plus software functional modules.

[0183] It will be apparent to those skilled in the art that the present invention is not limited to the details of the exemplary embodiments described above, and that the present invention can be implemented in other specific forms without departing from the spirit or essential characteristics of the present invention.

[0184] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and are not intended to limit it. Although the present invention has been described in detail with reference to preferred embodiments, those skilled in the art should understand that modifications or equivalent substitutions can be made to the technical solutions of the present invention without departing from the spirit and scope of the technical solutions of the present invention.

Claims

1. A chip packaging method, characterized in that, The method includes: The system acquires a packaging substrate and a chip to be packaged, receives a chip packaging instruction, and starts a chip packaging unit based on the chip packaging instruction. The chip packaging unit includes an ultrasonic cleaning unit, a device drying unit, an image acquisition unit, and a local heating unit. The ultrasonic cleaning unit is used to clean the packaging substrate and the chip to be packaged, resulting in a cleaned substrate and a cleaned chip. The cleaning substrate and the cleaning chip are dried using the device drying unit to obtain the preparation substrate and the preparation chip. Plasma treatment is performed on the preparation substrate and the preparation chip to obtain the processed substrate and the processed chip. The surface activity of the chip is calculated based on the processed chip, and the surface activity of the substrate is calculated based on the processed substrate. The ideal activity is calculated, which includes the ideal activity of the substrate and the ideal activity of the chip. The surface activity of the substrate is adjusted based on the ideal activity of the substrate to obtain the adjusted substrate activity. The surface activity of the chip is adjusted based on the ideal activity of the chip to obtain the adjusted chip activity. The processing substrate is coated with a solution based on the adjusted substrate activity, the adjusted chip activity and the preset connection area to obtain the coated substrate. The processing chip is placed on the connection area on the coated substrate using a pre-constructed robotic arm, and the image acquisition unit is used to acquire the image to obtain the chip image. The alignment error is calculated based on the chip image, and the processing chip is adjusted according to the alignment error to obtain the corrected position; Based on the local heating unit and the correction position, the processing chip is low-temperature welded to obtain a packaged workpiece, and the chip is packaged according to the packaged workpiece.

2. The chip packaging method as described in claim 1, characterized in that, The process of drying the cleaning substrate and cleaning chip using the device drying unit to obtain a preparation substrate and a preparation chip includes: The cleaning substrate and cleaning chip are fixed on a pre-constructed drying bracket, and the cleaning substrate and cleaning chip are initially dried based on a preset drying speed and drying time to obtain a preliminary substrate and a preliminary chip. The device drying unit is preheated to obtain the preheating temperature; Compare the preheating temperature with the preset drying temperature; Once it is confirmed that the preheating temperature is equal to the drying temperature, the sample drying rate is calculated, and the sample drying time is set according to the sample drying rate. The preliminary substrate and preliminary chip are dried based on the device drying unit and the sample drying time to obtain the prepared substrate and prepared chip.

3. The chip packaging method as described in claim 2, characterized in that, The calculation of the sample drying rate includes: Obtain the substrate surface area of ​​the cleaning substrate, and obtain the chip surface area of ​​the cleaning chip; Obtain the substrate boundary thickness, chip boundary thickness, actual vapor pressure, and internal air velocity. Calculate the sample drying rate based on the substrate surface area, chip surface area, substrate boundary thickness, chip boundary thickness, actual vapor pressure, and internal air velocity. ； in, The drying rate of the sample. Refers to the surface area of ​​the chip. This refers to the preset chip diffusion coefficient. Refers to the surface area of ​​the substrate. This refers to the preset substrate diffusion coefficient. Refers to the chip boundary thickness. Refers to the thickness of the substrate boundary. Refers to the hyperbolic sine function. Refers to the preset saturated vapor pressure. Refers to actual vapor pressure. This refers to the preset pressure constant. Refers to the natural constant. Refers to the airflow speed inside the box. This refers to the preset saturation wind speed.

4. The chip packaging method as described in claim 3, characterized in that, The calculation of chip surface activity based on the processing chip includes: Obtain the total plasma power and plasma area, and calculate the plasma power density based on the total plasma power and plasma area: ； in, Plasma power density Refers to total plasma power. Refers to the area of ​​plasma action; The chip activation energy, gas constant, and plasma time of the processing chip are obtained, and the chip surface activity is calculated based on the plasma power density, chip activation energy, gas constant, and plasma time.

5. The chip packaging method as described in claim 4, characterized in that, The calculation of chip surface activity based on the plasma power density, chip activation energy, gas constant, and plasma time includes: The region temperature is obtained, and the chip surface activity is calculated based on the plasma power density, chip activation energy, gas constant, plasma time, preset gas constant, preset plasma parameters, and region temperature. ； in, Refers to the surface activity of the chip. Refers to the plasmonic parameter. Refers to isostatic time. Refers to the preset time parameters. Refers to chip activation energy, Refers to the gas constant. Refers to regional temperature. This refers to the preset temperature constant.

6. The chip packaging method as described in claim 5, characterized in that, The calculation of ideal activity includes: The active concentration and standard adhesive strength are obtained. Based on the temperature of the region, the preset ideal adhesive strength, the active concentration, the preset reference standard temperature, and the standard adhesive strength, the ideal activity of the chip is calculated. The formula for calculating the ideal activity of the chip is as follows: ； in, Refers to the ideal activity of the chip. Refers to standard bond strength. Refers to ideal bond strength. Refers to the preset bonding parameters. The hyperbolic tangent function. Refers to the reference standard temperature. The natural logarithm Refers to the active concentration. Refers to the preset gas parameters; The substrate temperature, substrate bonding strength, substrate gas parameters, and substrate bonding parameters are obtained. The ideal activity of the substrate is calculated based on the substrate temperature, ideal bonding strength, active concentration, reference standard temperature, substrate bonding strength, substrate gas parameters, and substrate bonding parameters. Ideal activity is obtained based on the ideal activity of the chip and the ideal activity of the substrate.

7. The chip packaging method as described in claim 6, characterized in that, The adjustment of substrate surface activity based on ideal substrate activity to obtain adjusted substrate activity includes: Set the activity difference threshold according to the ideal activity of the substrate; The substrate activity difference is calculated based on the ideal substrate activity and the substrate surface activity. Compare the substrate activity difference with the activity difference threshold; If the substrate activity difference is greater than the activity difference threshold, the total plasma power is adjusted to obtain a first adjusted power, the plasma time is adjusted to obtain a first adjusted time, the substrate surface activity is adjusted according to the first adjusted power and the first adjusted time to obtain a first adjusted activity, the first activity difference is calculated according to the first adjusted activity and the ideal substrate activity, the substrate activity difference is updated using the first activity difference, and the step of comparing the substrate activity difference with the activity difference threshold is returned according to the updated substrate activity difference until the substrate activity difference is not greater than the activity difference threshold. If the difference in substrate activity is not greater than the activity difference threshold, then the substrate surface activity is identified as the substrate activity to be adjusted.

8. The chip packaging method as described in claim 7, characterized in that, Before placing the processing chip onto the connection area on the coated substrate using a pre-constructed robotic arm and acquiring an image using the image acquisition unit to obtain the chip image, the process further includes: Obtain a material template, segment standard blocks based on the processing chip and the material template, identify the block center according to the standard block, and mark the standard block with features based on the block center to obtain a marked template, wherein the block center is the geometric center of the standard block; The marking template is fixed to the back of the processing chip, and a marking coordinate system is constructed based on the marking template.

9. The chip packaging method as described in claim 8, characterized in that, The calculation of alignment error based on the chip image includes: The center coordinates are obtained based on the marked coordinate system. The center of the connected region is identified from the chip image. The region coordinates are identified from the marked coordinate system based on the region center. The region center is the geometric center of the connected region. The center coordinates include: the center x-coordinate and the center y-coordinate. The region coordinates include: the region x-coordinate and the region y-coordinate. Calculate the alignment error based on the center coordinates and region coordinates: ； in, This refers to alignment error. The x-coordinate of the center. Refers to the x-coordinate of the region. The central ordinate, The vertical coordinate of the region.

10. A chip packaging process system, characterized in that, The system includes: The equipment cleaning module is used to acquire the packaging substrate and the chip to be packaged, receive the chip packaging instruction, and start the chip packaging unit based on the chip packaging instruction. The chip packaging unit includes an ultrasonic cleaning unit, a device drying unit, an image acquisition unit, and a local heating unit. The ultrasonic cleaning unit is used to clean the packaging substrate and the chip to be packaged, resulting in a cleaned substrate and a cleaned chip. An activity calculation module is used to dry the cleaning substrate and the cleaning chip using the device drying unit to obtain a preparation substrate and a preparation chip. Plasma treatment is performed on the preparation substrate and the preparation chip to obtain the processed substrate and the processed chip. The surface activity of the chip is calculated based on the processed chip, and the surface activity of the substrate is calculated based on the processed substrate. An image acquisition module is used to calculate ideal activity, which includes ideal substrate activity and ideal chip activity. Based on the ideal substrate activity, the surface activity of the substrate is adjusted to obtain adjusted substrate activity. Based on the ideal chip activity, the surface activity of the chip is adjusted to obtain adjusted chip activity. Based on the adjusted substrate activity, the adjusted chip activity, and a preset connection area, the processing substrate is coated with a solution to obtain a coated substrate. A pre-constructed robotic arm is used to place the processing chip on the connection area of ​​the coated substrate, and the image acquisition unit is used to acquire an image to obtain a chip image. The chip welding module is used to calculate the alignment error based on the chip image, adjust the processed chip according to the alignment error, and obtain the corrected position. Based on the local heating unit and the correction position, the processing chip is low-temperature welded to obtain a packaged workpiece, and the chip is packaged according to the packaged workpiece.

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