Back contact solar cell and method of manufacturing the same, photovoltaic module

Abstract

The application relates to a back contact solar cell and a manufacturing method and a photovoltaic module thereof. The back contact solar cell comprises a substrate, a back surface of which is provided with alternately arranged first doped regions and second doped regions; a first doped functional layer is located on the corresponding first doped region, and the first doped functional layer comprises a first sub-doped semiconductor layer and at least one barrier layer which are sequentially and layerwisely arranged in a direction away from the substrate; a second doped semiconductor layer is located on the corresponding second doped region; a plurality of first conductive parts and a plurality of second conductive parts, the first conductive part is arranged on the side of the first doped functional layer away from the substrate, and the second conductive part is arranged on the side of the second doped semiconductor layer away from the substrate; wherein the at least one barrier layer is provided with a plurality of first holes, and a part of the first conductive part is located in the first hole and is electrically connected with the first sub-doped semiconductor layer. The application can improve the cell efficiency reduction and the double-side rate of the solar cell.

Description

Technical Field

[0001] This application relates to the field of solar cell manufacturing technology, and in particular to a back-contact solar cell and its manufacturing method, and a photovoltaic module. Background Technology

[0002] Back-contact solar cells (BC cells) are solar cell structures with positive and negative metal electrodes arranged in an interdigital manner on the back side of the cell. BC cells use monocrystalline silicon as the substrate, and the PN junction and metal electrodes are located on the back of the cell. There are no metal electrodes on the front side to block light, which can achieve higher short-circuit current and conversion efficiency. Summary of the Invention

[0003] Therefore, it is necessary to address the problem that the passivation effect of the doped semiconductor layer and tunneling layer is destroyed during the manufacturing process of back-contact solar cells, and to provide a back-contact solar cell, its manufacturing method, and a photovoltaic module.

[0004] In a first aspect, this application provides a back-contact solar cell, comprising:

[0005] The substrate has a front side and a back side disposed opposite to each other, wherein the back side is provided with alternating first doped regions and second doped regions;

[0006] A first doped functional layer is located on the corresponding first doped region. The first doped functional layer includes a first sub-doped semiconductor layer and at least one barrier layer that are sequentially stacked along a direction away from the substrate. The first sub-doped semiconductor layer has a first doping element.

[0007] A second doped semiconductor layer is located on the corresponding second doped region, and the second doped semiconductor layer has a second doped element with a different conductivity type than the first doped element;

[0008] A transparent conductive layer includes a plurality of first conductive portions and a plurality of second conductive portions, wherein the first conductive portions are disposed on the side of the first doped functional layer away from the substrate, and the second conductive portions are disposed on the side of the second doped semiconductor layer away from the substrate;

[0009] The first electrode is located in the first doped region and is disposed on the side of the first conductive portion away from the substrate;

[0010] The second electrode is located in the second doped region and is disposed on the side of the second conductive portion away from the substrate;

[0011] The at least one barrier layer is provided with a plurality of first holes, a portion of the first conductive portion is located in the first hole and is electrically connected to the first sub-doped semiconductor layer.

[0012] In some embodiments, the first doped functional layer further includes a second sub-doped semiconductor layer disposed on the side of the at least one barrier layer away from the substrate;

[0013] The second sub-doped semiconductor layer has a plurality of second holes; the first holes are connected to the second holes in a one-to-one correspondence.

[0014] A portion of the first conductive portion is located in the first hole and the corresponding second hole, respectively, and is electrically connected to the first sub-doped semiconductor layer.

[0015] In some embodiments, the thickness of the first sub-doped semiconductor layer is 30 nanometers to 150 nanometers; and / or,

[0016] The thickness of the at least one barrier layer is 0.5 nanometers to 3 nanometers; and / or,

[0017] The thickness of the second sub-doped semiconductor layer is 10 nanometers to 60 nanometers.

[0018] In some embodiments, the concentration of the first dopant element in the first sub-doped semiconductor layer is 3 × 10⁻⁶. 19 atom / cm 3 -5×10 20 atom / cm 3 ; and / or

[0019] The concentration of the first dopant element in the second sub-doped semiconductor layer is 4 × 10⁻⁶. 19 atom / cm 3 -5×10 20 atom / cm 3 .

[0020] In some embodiments, the material of the barrier layer includes at least one of silicon oxide, silicon nitride, and silicon oxynitride.

[0021] In some implementations, it also includes:

[0022] A tunneling layer is located between the substrate and the first doped functional layer;

[0023] An intrinsic microcrystalline silicon layer is located between the substrate and the second doped semiconductor layer.

[0024] In some embodiments, the thickness of the first doped functional layer is greater than the thickness of the second doped semiconductor layer; and / or,

[0025] The thickness of the tunneling layer is 0.5 nanometers to 1.5 nanometers; and / or,

[0026] The thickness of the intrinsic microcrystalline silicon layer is 4 nanometers to 14 nanometers.

[0027] In some embodiments, the first doping element is an N-type doping element and the second doping element is a P-type doping element.

[0028] In some embodiments, the back surface is further provided with a spacer region located between the first doped region and the second doped region;

[0029] The first doped functional layer and the adjacent second doped semiconductor layer are disposed at intervals in the spacer region, and the first conductive portion and the adjacent second conductive portion are disposed at intervals in the spacer region.

[0030] Secondly, based on the same concept, this application also provides a method for manufacturing a back-contact solar cell, comprising:

[0031] A substrate is provided, the substrate having a front side and a back side disposed opposite to each other, the back side being provided with alternating first doped regions and second doped regions;

[0032] A first doped functional layer is formed in the first doped region. The first doped functional layer includes a first sub-doped semiconductor layer and at least one barrier layer that are sequentially stacked along a direction away from the substrate. The first sub-doped semiconductor layer contains a first doping element.

[0033] A second doped semiconductor layer is formed in the second doped region, wherein the second doped semiconductor layer contains a second doped element with a different conductivity type than the first doped element;

[0034] A transparent conductive layer is formed on the side of the first doped functional layer and the second doped semiconductor layer away from the substrate. The transparent conductive layer includes a plurality of first conductive portions and a plurality of second conductive portions. The first conductive portions are disposed on the side of the first doped functional layer away from the substrate, and the second conductive portions are disposed on the side of the second doped semiconductor layer away from the substrate.

[0035] A first electrode is formed on the side of the first conductive portion away from the substrate;

[0036] A second electrode is formed on the side of the second conductive portion away from the substrate;

[0037] The at least one barrier layer is provided with a plurality of first holes, a portion of the first conductive portion is located in the first hole and is electrically connected to the first sub-doped semiconductor layer.

[0038] In some embodiments, prior to the step of forming the second doped semiconductor layer in the second doped region, the method further includes:

[0039] The first doped functional layer is first cleaned with an alkaline solution and then with an acidic solution to form a plurality of first pores penetrating the at least one of the barrier layers.

[0040] In some embodiments, the step of forming a first doped functional layer in the first doped region includes:

[0041] A first initial sub-doped semiconductor layer, at least one initial barrier layer, and a second initial sub-doped semiconductor layer are sequentially formed on the back side of the substrate.

[0042] The portions of the first initial sub-doped semiconductor layer, the at least one initial barrier layer, and the second initial sub-doped semiconductor layer corresponding to the second doped region are removed to form the first doped functional layer.

[0043] Thirdly, based on the same concept, this application also provides a photovoltaic module, including:

[0044] A battery string is formed by connecting multiple back-contact solar cells as described in any one of the above descriptions or back-contact solar cells manufactured by any one of the above descriptions.

[0045] Connecting components for electrically connecting two adjacent back-contact solar cells;

[0046] An encapsulating film is used to cover the surface of the battery string;

[0047] A cover plate is used to cover the surface of the encapsulating film that faces away from the battery string.

[0048] In this embodiment, the first doped functional layer includes a first sub-doped semiconductor layer and at least one barrier layer sequentially stacked along a direction away from the substrate. The barrier layer can prevent damage from alkaline washing and hydrofluoric acid cleaning. 1) Firstly, before preparing the film layer on the second doped region, the film layer on the first doped region needs to be alkali-washed (cleaned with an alkaline solution). The barrier layer can prevent the alkaline washing from causing too many voids to form on the film layer on the first doped region, forming only a certain number of first voids. The first voids extend more along the thickness direction perpendicular to the substrate (second direction), avoiding the formation of large-area voids in the direction parallel to the plane of the substrate, thereby ensuring the passivation effect of the tunneling layer and the first sub-doped semiconductor layer, and improving the efficiency and bifaciality of the solar cell; 2) Secondly, before preparing the film layer on the second doped region, the film layer on the first doped region needs to be hydrofluoric acid-washed. The barrier layer reduces the depth of the voids extending along the thickness direction perpendicular to the substrate (second direction), that is, it prevents the hydrofluoric acid washing from etching down to the tunneling layer, improving the passivation effect of the tunneling layer, and improving the efficiency and bifaciality of the solar cell. 3) Thirdly, by controlling the thickness of the barrier layer, the depth of the first hole extending in the thickness direction perpendicular to the substrate (second direction) can be controlled, thus avoiding the first hole from damaging the tunneling layer, improving the passivation effect of the tunneling layer, and improving the efficiency and bifaciality of the solar cell. Attached Figure Description

[0049] To more clearly illustrate the technical solutions in the embodiments or exemplary embodiments of this application, the drawings used in the description of the embodiments or exemplary embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0050] Figure 1 This is a schematic diagram of a first cross-sectional structure of a back-contact solar cell provided in an embodiment of this application.

[0051] Figure 2 This is a schematic diagram of a second cross-sectional structure of a back-contact solar cell provided in an embodiment of this application.

[0052] Figure 3 This is a schematic diagram of a third cross-sectional structure of a back-contact solar cell provided in an embodiment of this application.

[0053] Figure 4 This is a schematic diagram of the first process steps of a method for manufacturing a back-contact solar cell provided in an embodiment of this application.

[0054] Figure 5This is a schematic diagram of the second process steps of a method for manufacturing a back-contact solar cell provided in an embodiment of this application.

[0055] Figure label:

[0056] Back contact solar cell 100; substrate 11; first doped functional layer 31; second doped semiconductor layer 32; transparent conductive layer 40; first electrode 51; second electrode 52; front side 111; back side 112; first sub-doped semiconductor layer 311; barrier layer 312; second sub-doped semiconductor layer 313; first conductive part 41; second conductive part 42; tunneling layer 21; intrinsic microcrystalline silicon layer 22; passivation layer 12; antireflection layer 13;

[0057] First doped region 112a; second doped region 112b; spacer region 112c; first hole 31k1; first direction X; second direction Y; second hole 31k2. Detailed Implementation

[0058] To make the above-mentioned objectives, features, and advantages of this application more apparent and understandable, the specific embodiments of this application are described in detail below with reference to the accompanying drawings. Many specific details are set forth in the following description to provide a thorough understanding of this application. However, this application can be implemented in many other ways different from those described herein, and those skilled in the art can make similar modifications without departing from the spirit of this application. Therefore, this application is not limited to the specific embodiments disclosed below.

[0059] In the description of this application, it should be understood that if terms such as "center", "longitudinal", "lateral", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", "axial", "radial", "circumferential" appear, these terms indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, and are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this application.

[0060] Furthermore, where the terms "first" and "second" appear, these terms are for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined with "first" or "second" may explicitly or implicitly include at least one of that feature. In the description of this application, where the term "multiple" appears, "multiple" means at least two, such as two, three, etc., unless otherwise explicitly specified.

[0061] In this application, unless otherwise expressly specified and limited, the terms "installation," "connection," "joining," and "fixing," etc., should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral part; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components, unless otherwise expressly limited. Those skilled in the art can understand the specific meaning of the above terms in this application based on the specific circumstances.

[0062] In this application, unless otherwise expressly specified and limited, the use of descriptions such as "above" or "below" the second feature indicates that the first and second features are in direct contact or indirect contact via an intermediate medium. Furthermore, "above," "on top of," and "over" the second feature can mean that the first feature is directly above or diagonally above the second feature, or simply that the first feature is at a higher horizontal level than the second feature. Similarly, "below," "below," and "under" the second feature can mean that the first feature is directly below or diagonally below the second feature, or simply that the first feature is at a lower horizontal level than the second feature.

[0063] It should be noted that if an element is referred to as being "fixed to" or "set on" another element, it can be directly on the other element or there may be an intervening element. If an element is considered to be "connected to" another element, it can be directly connected to the other element or there may be an intervening element. If so, the terms "vertical," "horizontal," "upper," "lower," "left," "right," and similar expressions used in this application are for illustrative purposes only and do not represent the only possible implementation.

[0064] See Figures 1 to 3 . Figure 1 This is a schematic diagram of a first cross-sectional structure of a back-contact solar cell provided in an embodiment of this application. Figure 2 This is a schematic diagram of a second cross-sectional structure of a back-contact solar cell provided in an embodiment of this application. Figure 3 This is a schematic diagram of a third cross-sectional structure of a back-contact solar cell provided in an embodiment of this application.

[0065] In a first aspect, this application provides a back-contact solar cell 100, which includes a substrate 11, a first doped functional layer 31, a second doped semiconductor layer 32, a transparent conductive layer 40, a first electrode 51, and a second electrode 52. The substrate 11 has a front side 111 and a back side 112 disposed opposite to each other. The back side 112 is provided with alternating first doped regions 112a and second doped regions 112b. The first doped functional layer 31 is located on the corresponding first doped region 112a and includes a first sub-doped semiconductor layer 311 and at least one barrier layer 312 sequentially stacked along a direction away from the substrate 11. The first sub-doped semiconductor layer 311 contains a first doped element. The second doped semiconductor layer 32 is located on the corresponding second doped region 112b and contains a second doped element with a different conductivity type than the first doped element. The transparent conductive layer 40... It includes multiple first conductive portions 41 and multiple second conductive portions 42. The first conductive portions 41 are disposed on the side of the first doped functional layer 31 away from the substrate 11, and the second conductive portions 42 are disposed on the side of the second doped semiconductor layer 32 away from the substrate 11. The first electrode 51 is located in the first doped region 112a and is disposed on the side of the first conductive portion 41 away from the substrate 11. The second electrode 52 is located in the second doped region 112b and is disposed on the side of the second conductive portion 42 away from the substrate 11. At least one barrier layer 312 is provided with multiple first holes 31k1, and a portion of the first conductive portion 41 is located in the first hole 31k1 and is electrically connected to the first sub-doped semiconductor layer 311.

[0066] For example, the substrate 11 may contain doped elements, which can be N-type or P-type. N-type elements can be Group V elements such as phosphorus (P), bismuth (Bi), antimony (Sb), or arsenic (As), while P-type elements can be Group III elements such as boron (B), aluminum (Al), gallium (Ga), or indium (In). For instance, when the substrate 11 is a P-type substrate, its internal doped element type is P-type. Similarly, when the substrate 11 is an N-type substrate, its internal doped element type is N-type.

[0067] For example, the substrate 11 has a front side 111 and a back side 112 disposed opposite to each other. The front side 111 and the back side 112 are disposed opposite to each other along the thickness direction of the substrate 11. Both the front side 111 and the back side 112 can be used to receive incident light. In the embodiments of this application, the front side 111 of the substrate 11 is the main light-receiving surface, and the back side 112 of the substrate 11 is the secondary light-receiving surface. It can be understood that the light-receiving surface and the back-lighting surface are relative. The light-receiving surface is specifically the surface on the substrate 11 in the back-contact solar cell or in the photovoltaic module that is mainly irradiated by sunlight. With the development of solar cell technology, the back-lighting surface will also receive sunlight energy, mainly from reflected or scattered light from the surrounding environment.

[0068] For example, the back surface 112 includes alternating first doped regions 112a and second doped regions 112b, each of which may include a first sub-region and a second sub-region. The first sub-region may be a region where a first electrode 51 or a second electrode 52 is disposed, and the first sub-region can be understood as a metal contact region. The second sub-region may be a region other than the first sub-region, and the second sub-region can be understood as a non-metal contact region.

[0069] For example, in some implementations, such as Figure 1 As shown, the first direction X is parallel to the plane where the substrate 11 is located, and the first doped region 112a and the second doped region 112b are arranged alternately at least in the first direction X.

[0070] For example, in some implementations, such as Figure 1 As shown, in the first direction X, the width of the metal contact area is greater than the width of the corresponding first electrode 51, and / or the width of the metal contact area is greater than the width of the corresponding second electrode 52, but is not limited thereto. For example, due to process errors, the width of the metal contact area can be set to be greater than the width of the corresponding first electrode 51 and the width of the metal contact area can be greater than the width of the corresponding second electrode 52, which can ensure that the first electrode 51 is located within the corresponding metal contact area and the second electrode 52 is located within the corresponding metal contact area.

[0071] For example, in Figure 1 In the back side 112, on the first doped region 112a, a first sub-doped semiconductor layer 311, at least one barrier layer 312, a first conductive portion 41 and a first electrode 51 are sequentially stacked.

[0072] For example, in Figure 1 In the middle, on the back side 112, on the second doped region 112b, the second doped semiconductor layer 32, the second conductive part 42 and the second electrode 52 are stacked in sequence.

[0073] For example, the first sub-doped semiconductor layer 311 contains a first doped element, and the second doped semiconductor layer 32 contains a second doped element with a different conductivity type than the first doped element. One of the first and second doped elements is an N-type doped element, and the other is a P-type doped element. This application uses an example where the first doped element is an N-type doped element and the second doped element is a P-type doped element.

[0074] For example, at least one barrier layer 312 is provided with a plurality of first holes 31k1, and a portion of the first conductive portion 41 is located within the first holes 31k1 and is electrically connected to the first sub-doped semiconductor layer 311. That is, although at least one barrier layer 312 is provided, the barrier layer 312 is provided with a plurality of first holes 31k1, and the first conductive portion 41 can be electrically connected to the first sub-doped semiconductor layer 311 through the first holes 31k1.

[0075] For example, the material of the transparent conductive layer 40 includes at least one of indium tin oxide, indium tungsten oxide, zinc aluminum oxide, titanium-doped indium oxide, and fluorine-doped tin oxide.

[0076] For example, the bifaciality and light utilization of back-contact solar cells in the prior art still need to be improved. During the manufacturing process of solar cells, there is a problem where the passivation effect of the doped semiconductor layer and tunneling layer is compromised. The inventors have found that the reasons include: 1) It is necessary to first prepare a film layer on one of the first doped region 112a and the second doped region 112b, and then prepare a film layer on the other of the first doped region 112a and the second doped region 112b. For example, it is necessary to first prepare a film layer on the first doped region 112a and then prepare a film layer on the second doped region 112b. For example, it is necessary to first prepare a film layer on the first sub-doped semiconductor layer 311 and then prepare a film layer on the second doped semiconductor layer 32. Before preparing the film layer on the second doped region 112b, it is necessary to... Alkaline washing (using an alkaline solution) is performed on the film layer of the first doped region 112a that has already been prepared. Alkaline washing can easily lead to the formation of a large number of voids in the film layer of the first doped region 112a, such as in the tunneling layer 21 and the first sub-doped semiconductor layer 311. The large number of voids reduces the passivation effect of the tunneling layer 21 and the first sub-doped semiconductor layer 311, resulting in a decrease in the efficiency and bifaciality of the solar cell. 2) Before preparing the film layer of the second doped region 112b, the film layer of the first doped region 112a that has already been prepared needs to be cleaned with hydrofluoric acid. Hydrofluoric acid cleaning can easily etch away part of the tunneling layer 21, reducing the passivation effect of the tunneling layer 21, resulting in a decrease in the efficiency and bifaciality of the solar cell.

[0077] In this embodiment, the first doped functional layer 31 includes a first sub-doped semiconductor layer 311 and at least one barrier layer 312 sequentially stacked along a direction away from the substrate 11. The barrier layer 312 can prevent damage from alkaline washing and hydrofluoric acid cleaning. 1) In a first aspect, before preparing the film layer on the second doped region 112b, the film layer on the already prepared first doped region 112a needs to be alkaline washed (cleaned with an alkaline solution). The barrier layer 312 can prevent alkaline washing from causing the film layer on the first doped region 112a to form too many voids, forming only a certain number of first holes 31k1. The first holes 31k1 extend more along the thickness direction perpendicular to the substrate 11 (second direction Y), avoiding the formation of large-area voids in the direction parallel to the plane of the substrate 11, thereby 1) The passivation effect of the tunneling layer 21 and the first sub-doped semiconductor layer 311 is ensured, thereby improving the efficiency and bifaciality of the solar cell. 2) Secondly, before preparing the film layer on the second doped region 112b, the film layer on the already prepared first doped region 112a needs to be cleaned with hydrofluoric acid. The barrier layer 312 reduces the depth of the voids extending along the thickness direction perpendicular to the substrate 11 (second direction Y), thus preventing the hydrofluoric acid from etching away into the tunneling layer 21, improving the passivation effect of the tunneling layer 21, and thus improving the efficiency and bifaciality of the solar cell. 3) Thirdly, by controlling the thickness of the barrier layer 312, the depth of the first hole 31k1 extending along the thickness direction perpendicular to the substrate 11 (second direction Y) can be controlled, thus preventing the first hole 31k1 from damaging the tunneling layer 21, improving the passivation effect of the tunneling layer 21, and thus improving the efficiency and bifaciality of the solar cell.

[0078] In some implementations, such as Figure 2 As shown, the first doped functional layer 31 further includes a second sub-doped semiconductor layer 313 disposed on the side of at least one barrier layer 312 away from the substrate 11; the second sub-doped semiconductor layer 313 is provided with a plurality of second holes 31k2; the first holes 31k1 are connected to the second holes 31k2 in a one-to-one correspondence; a portion of the first conductive part 41 is located in the first hole 31k1 and the corresponding second hole 31k2 respectively, and is electrically connected to the first sub-doped semiconductor layer 311.

[0079] For example, such as Figure 2 As shown, on the back side 112, on the first doped region 112a, a first sub-doped semiconductor layer 311, at least one barrier layer 312, a second sub-doped semiconductor layer 313, a first conductive portion 41 and a first electrode 51 are sequentially stacked.

[0080] For example, such as Figure 2As shown, the type of doped element in the second sub-doped semiconductor layer 313 is the same as the type of doped element in the first sub-doped semiconductor layer 311; for example, both the second sub-doped semiconductor layer 313 and the first sub-doped semiconductor layer 311 are doped with the first doped element; for example, the materials in the second sub-doped semiconductor layer 313 and the first sub-doped semiconductor layer 311 are the same, that is, the bulk material and the doped element are the same.

[0081] For example, such as Figure 2 As shown, the first hole 31k1 is connected to the second hole 31k2 in a one-to-one correspondence, and the first conductive part 41 is electrically connected to the first sub-doped semiconductor layer 311 through the interconnected first hole 31k1 and second hole 31k2.

[0082] For example, such as Figure 2 As shown, the second sub-doped semiconductor layer 313 can be electrically connected to the first conductive part 41. The second sub-doped semiconductor layer 313 can also play a certain role in blocking the extension of voids. That is, the setting of the second sub-doped semiconductor layer 313 improves the electrical connection performance of the film layer in the first doped region 112a and can also play a certain role in blocking the extension of voids, thereby improving the passivation effect of the first doped functional layer 31 and the tunneling layer 21, and improving the efficiency and bifaciality of the solar cell.

[0083] In some embodiments, the thickness of the first sub-doped semiconductor layer 311 is 30 nanometers to 150 nanometers; and / or, the thickness of at least one barrier layer 312 is 0.5 nanometers to 3 nanometers; and / or, the thickness of the second sub-doped semiconductor layer 313 is 10 nanometers to 60 nanometers.

[0084] For example, in the direction perpendicular to the plane of the substrate 11, i.e. in the second direction Y, the thickness of the first sub-doped semiconductor layer 311 can be any value among 30 nanometers, 50 nanometers, 70 nanometers, 90 nanometers, 100 nanometers, 120 nanometers, 140 nanometers and 150 nanometers.

[0085] For example, in the direction perpendicular to the plane of the substrate 11, i.e. in the second direction Y, the thickness of the barrier layer 312 can be any value among 0.5 nm, 1 nm, 1.5 nm, 2 nm, 2.5 nm and 3 nm.

[0086] For example, in the direction perpendicular to the plane of the substrate 11, i.e. in the second direction Y, the thickness of the second sub-doped semiconductor layer 313 can be any value among 10 nanometers, 20 nanometers, 30 nanometers, 40 nanometers, 50 nanometers, and 60 nanometers.

[0087] For example, at least one barrier layer 312 is made thinner to prevent the formation of the first hole 31k1 and / or the second hole 31k2.

[0088] For example, in some implementations, providing a thicker first sub-doped semiconductor layer 311 relative to the second sub-doped semiconductor layer 313 can enhance the passivation effect of the first sub-doped semiconductor layer 311.

[0089] In some embodiments, the concentration of the first dopant element in the first sub-doped semiconductor layer 311 is 3 × 10⁻⁶. 19 atom / cm 3 -5×10 20 atom / cm 3 ; and / or the concentration of the first dopant element in the second sub-doped semiconductor layer 313 is 4 × 10⁻⁶. 19 atom / cm 3 -5×10 20 atom / cm 3 .

[0090] For example, in some embodiments, the doping concentrations in the first sub-doped semiconductor layer 311 and the second sub-doped semiconductor layer 313 can be similar, and the thickness of at least one barrier layer 312 is relatively thin, so that the first doped functional layer 31 is a monolithic semiconductor structure.

[0091] In some embodiments, the material of the barrier layer 312 includes at least one of silicon oxide, silicon nitride, and silicon oxynitride.

[0092] For example, the material of the barrier layer 312 includes at least one of silicon oxide, silicon nitride, and silicon oxynitride, which can effectively block etching in alkaline and acidic solutions.

[0093] In some implementations, such as Figures 1 to 3 As shown, the back contact solar cell 100 also includes a tunneling layer 21 and an intrinsic microcrystalline silicon layer 22. The tunneling layer 21 is located between the substrate 11 and the first doped functional layer 31; the intrinsic microcrystalline silicon layer 22 is located between the substrate 11 and the second doped semiconductor layer 32.

[0094] For example, such as Figure 2 As shown, on the back side 112, on the first doped region 112a, a tunneling layer 21, a first sub-doped semiconductor layer 311, at least one barrier layer 312, a second sub-doped semiconductor layer 313, a first conductive portion 41 and a first electrode 51 are sequentially stacked.

[0095] For example, in Figure 2In the middle, on the back side 112, on the second doped region 112b, the intrinsic microcrystalline silicon layer 22, the second doped semiconductor layer 32, the second conductive part 42 and the second electrode 52 are sequentially stacked.

[0096] For example, the material of the first tunneling layer 21 may include silicon oxide, but is not limited to this.

[0097] For example, such as Figures 1 to 3 As shown, the back contact solar cell 100 of this application has a heterogeneous structure. An intrinsic microcrystalline silicon layer 22 and a second doped semiconductor layer 32 are sequentially disposed in the second doped region 112b. The second doped semiconductor layer 32 can be P-type amorphous silicon.

[0098] In some embodiments, the thickness of the first doped functional layer 31 is greater than the thickness of the second doped semiconductor layer 32; and / or, the thickness of the tunneling layer 21 is 0.5 nm to 1.5 nm; and / or, the thickness of the intrinsic microcrystalline silicon layer 22 is 4 nm to 14 nm.

[0099] For example, in the direction perpendicular to the plane of the substrate 11, i.e. in the second direction Y, the thickness of the first doped functional layer 31 is greater than the thickness of the second doped semiconductor layer 32.

[0100] For example, in the direction perpendicular to the plane of the substrate 11, i.e. in the second direction Y, the thickness of the tunneling layer 21 can be any value among 0.5 nm, 0.8 nm, 1 nm, 1.2 nm and 1.5 nm.

[0101] For example, in the direction perpendicular to the plane of the substrate 11, i.e. in the second direction Y, the thickness of the intrinsic microcrystalline silicon layer 22 can be any value among 4 nanometers, 6 nanometers, 8 nanometers, 10 nanometers, 12 nanometers and 14 nanometers.

[0102] In some implementations, the first dopant element is an N-type dopant element and the second dopant element is a P-type dopant element.

[0103] For example, in some embodiments, the first sub-doped semiconductor layer 311 and the second sub-doped semiconductor layer 313 are both N-type doped polycrystalline silicon. The second doped semiconductor layer 32 is P-type doped amorphous silicon.

[0104] In some implementations, such as Figure 3 As shown, the back side 112 is also provided with a spacer region 112c located between the first doped region 112a and the second doped region 112b; the first doped functional layer 31 and the adjacent second doped semiconductor layer 32 are spaced apart in the spacer region 112c, and the first conductive part 41 and the adjacent second conductive part 42 are spaced apart in the spacer region 112c.

[0105] For example, the spacer region 112c is used to space at least a portion of the film layer of the first doped region 112a and at least a portion of the film layer of the second doped region 112b apart, so as to avoid short circuits and improve battery conversion efficiency.

[0106] It should be noted that, as Figures 1 to 3 As shown, the back-contact solar cell 100 also includes a passivation layer 12 and an anti-reflection layer 13 sequentially stacked on the front side 111. The material of the passivation layer 12 can be at least one of AlOx (alumina), SiOx (silicon oxide), a-Si:H(i) (amorphous silicon), etc.; the material of the anti-reflection layer 13 can be at least one of SiNxOy (silicon oxynitride) and SiNx (silicon nitride).

[0107] Please see Figure 4 and Figure 5 . Figure 4 This is a schematic diagram of the first process steps of a method for manufacturing a back-contact solar cell provided in an embodiment of this application. Figure 5 This is a schematic diagram of the second process steps of a method for manufacturing a back-contact solar cell provided in an embodiment of this application.

[0108] Secondly, based on the same concept, this application also provides a method for manufacturing a back-contact solar cell, and the back-contact solar cell 100 of any of the above claims can be manufactured using this method. Figure 4 As shown, the manufacturing method of the back contact solar cell includes steps S100, S200, S300, S400, S500, and S600.

[0109] Step S100: A substrate is provided, the substrate having a front side and a back side disposed opposite to each other, the back side having alternating first doped regions and second doped regions disposed thereon.

[0110] For example, a substrate 11 is provided, which has a front side 111 and a back side 112 disposed opposite to each other, and the back side 112 is provided with alternating first doped regions 112a and second doped regions 112b.

[0111] Step S200: A first doped functional layer is formed in the first doped region. The first doped functional layer includes a first sub-doped semiconductor layer and at least one barrier layer stacked sequentially along a direction away from the substrate. The first sub-doped semiconductor layer contains a first doping element.

[0112] For example, a first doped functional layer 31 is formed in the first doped region 112a. The first doped functional layer 31 includes a first sub-doped semiconductor layer 311 and at least one barrier layer 312 that are sequentially stacked in a direction away from the substrate 11. The first sub-doped semiconductor layer 311 has a first doped element.

[0113] Step S300: A second doped semiconductor layer is formed in the second doped region, wherein the second doped semiconductor layer contains a second doped element with a different conductivity type than the first doped element.

[0114] For example, a second doped semiconductor layer 32 is formed in the second doped region 112b, and the second doped semiconductor layer 32 has a second doped element with a different conductivity type than the first doped element.

[0115] Step S400: A transparent conductive layer is formed on the side of the first doped functional layer and the second doped semiconductor layer away from the substrate. The transparent conductive layer includes a plurality of first conductive portions and a plurality of second conductive portions. The first conductive portions are disposed on the side of the first doped functional layer away from the substrate, and the second conductive portions are disposed on the side of the second doped semiconductor layer away from the substrate.

[0116] For example, a transparent conductive layer 40 is formed on the side of the first doped functional layer 31 and the second doped semiconductor layer 32 away from the substrate 11. The transparent conductive layer 40 includes a plurality of first conductive portions 41 and a plurality of second conductive portions 42. The first conductive portions 41 are disposed on the side of the first doped functional layer 31 away from the substrate 11, and the second conductive portions 42 are disposed on the side of the second doped semiconductor layer 32 away from the substrate 11.

[0117] In step S500, a first electrode is formed on the side of the first conductive portion away from the substrate.

[0118] For example, a first electrode 51 is formed on the side of the first conductive portion 41 away from the substrate 11.

[0119] In step S600, a second electrode is formed on the side of the second conductive portion away from the substrate.

[0120] The at least one barrier layer is provided with a plurality of first holes, a portion of the first conductive portion is located in the first hole and is electrically connected to the first sub-doped semiconductor layer.

[0121] For example, a second electrode 52 is formed on the side of the second conductive portion 42 away from the substrate 11.

[0122] In this process, at least one barrier layer 312 is provided with a plurality of first holes 31k1, a portion of the first conductive part 41 is located in the first hole 31k1 and is electrically connected to the first sub-doped semiconductor layer 311.

[0123] In some implementations, such as Figure 5As shown, before the step of forming the second doped semiconductor layer 32 in the second doped region 112b (step S300), the method further includes: step S230, first cleaning the first doped functional layer 31 with an alkaline solution and then with an acidic solution to form a plurality of first holes 31k1 penetrating at least one barrier layer 312.

[0124] For example, such as Figure 5 As shown, combined with Figure 2 and Figure 3 As shown, before the step of forming the second doped semiconductor layer 32 in the second doped region 112b (step S300), the method further includes: step S230, first using an alkaline solution and then using an acidic solution to clean the first doped functional layer 31 to form a plurality of first holes 31k1 and a plurality of second holes 31k2.

[0125] For example, the first doped functional layer 31 includes a first sub-doped semiconductor layer 311 and at least one barrier layer 312 sequentially stacked along a direction away from the substrate 11. The barrier layer 312 can prevent damage from alkaline washing and hydrofluoric acid cleaning. 1) In a first aspect, before preparing the film layer on the second doped region 112b, the film layer on the already prepared first doped region 112a needs to be alkaline washed (cleaned with an alkaline solution). The barrier layer 312 can prevent the alkaline washing from causing the film layer on the first doped region 112a to form too many voids, and only a certain number of first holes 31k1 are formed. The first holes 31k1 extend more along the thickness direction perpendicular to the substrate 11 (second direction Y), avoiding the formation of large-area voids in the direction parallel to the plane of the substrate 11, thereby 1) The passivation effect of the tunneling layer 21 and the first sub-doped semiconductor layer 311 is ensured, thereby improving the efficiency and bifaciality of the solar cell. 2) Secondly, before preparing the film layer on the second doped region 112b, the film layer on the already prepared first doped region 112a needs to be cleaned with hydrofluoric acid. The barrier layer 312 reduces the depth of the voids extending along the thickness direction perpendicular to the substrate 11 (second direction Y), thus preventing the hydrofluoric acid from etching away into the tunneling layer 21, improving the passivation effect of the tunneling layer 21, and thus improving the efficiency and bifaciality of the solar cell. 3) Thirdly, by controlling the thickness of the barrier layer 312, the depth of the first hole 31k1 extending along the thickness direction perpendicular to the substrate 11 (second direction Y) can be controlled, thus preventing the first hole 31k1 from damaging the tunneling layer 21, improving the passivation effect of the tunneling layer 21, and thus improving the efficiency and bifaciality of the solar cell.

[0126] In some embodiments, the step of forming the first doped functional layer 31 in the first doped region 112a (step S200) includes: step 210, forming a first initial sub-doped semiconductor layer, at least one initial barrier layer and a second initial sub-doped semiconductor layer sequentially on the back side 112 of the substrate 11; step 220, removing the portions of the first initial sub-doped semiconductor layer, at least one initial barrier layer and the second initial sub-doped semiconductor layer corresponding to the second doped region 112b to form the first doped functional layer 31.

[0127] For example, combined Figure 1 As shown, in some embodiments, different gas materials are sequentially introduced to form a first initial sub-doped semiconductor layer and at least one initial barrier layer on the back side 112 of the substrate 11. Then, the first sub-doped semiconductor layer 311 and at least one barrier layer 312 of the first doped functional layer 31 are formed by the same patterning process / mask, which can simplify the fabrication process.

[0128] For example, combined Figure 2 and Figure 3 As shown, in some embodiments, different gas materials are sequentially introduced to form a first initial sub-doped semiconductor layer, at least one initial barrier layer, and a second initial sub-doped semiconductor layer on the back side 112 of the substrate 11. Then, the first sub-doped semiconductor layer 311, at least one barrier layer 312, and the second sub-doped semiconductor layer 313 of the first doped functional layer 31 are formed through the same patterning process / mask, which can simplify the fabrication process.

[0129] For example, in conjunction with the above-described methods for manufacturing back-contact solar cells, a specific process for manufacturing one method of a back-contact solar cell is further described in detail, including steps 1)-17):

[0130] 1) (Step S100) Provide a substrate 11, and clean and polish the substrate 11;

[0131] 2) A preset material film layer (e.g., a SiOx material tunneling layer, i.e., the initial tunneling layer) is formed on the back side 112 to form the first tunneling layer 21.

[0132] 3) (Step S200) A first initial sub-doped semiconductor layer, at least one initial barrier layer and a second initial sub-doped semiconductor layer are sequentially formed on the back side 112 of the substrate 11, and N-type doping is performed;

[0133] 4) (Step S200) Remove the first initial sub-doped semiconductor layer, at least one initial barrier layer and the portion of the second initial sub-doped semiconductor layer corresponding to the second doped region 112b to form the first doped functional layer 31, that is, pattern the film layer of the back side 112. A SiOx / SiNx mask can be formed first and then the film layer of the back side 112 can be patterned and the mask pattern removed.

[0134] 5) The phosphosilicate glass layer (PSG) on the front side is removed by hydrofluoric acid on one side.

[0135] 6) Double-sided etching and texturing;

[0136] 7) Remove the phosphosilicate glass layer (PSG) of the first doped region 112a on the back side by hydrofluoric acid and clean;

[0137] 8) A passivation layer 12 is formed on the front side 111 (the material of the passivation layer 12 can be at least one of AlOx, SiOx, a-Si:H(i)).

[0138] 9) An anti-reflection layer 13 is formed on the front side 111 (the material of the anti-reflection layer 13 can be at least one of SiNxOy and SiNx).

[0139] 10) Chain-type back-side plating removal, removing the material of the passivation layer 12 and anti-reflection layer 13 on the back side 112;

[0140] 11) (Step S230) Cleaning (e.g., cleaning the surface of the second doped region 112b) can be performed first by alkaline washing, the cleaning agent of which includes alkaline solvents and hydrogen peroxide, and the alkaline solvent includes any one of potassium hydroxide, sodium hydroxide or ammonia; then acid washing can be performed, the cleaning agent of which includes hydrofluoric acid. In this cleaning step, the first pore 31k1 and the second pore 31k2 will also be formed.

[0141] 12), A predetermined material film layer (e.g., below 250) is formed on the entire back side 112 to form an intrinsic microcrystalline silicon layer 22. o (Deposit an amorphous silicon layer at temperature C to form an initial intrinsic microcrystalline silicon layer).

[0142] 13) (Step S300), a preset material film layer (e.g., below 250) is formed on the entire back side 112 to form the second doped semiconductor layer 32. o A p-type doped silicon thin film layer is deposited at temperature C. It can be one or more of a-Si:H(p), nc-Si:H(p), and nc-SiOx:H(p) to form a second initial doped semiconductor layer.

[0143] 14) (Step S300) The preset material film of the intrinsic microcrystalline silicon layer 22 and the preset material film of the second doped semiconductor layer 32 on the back side 112 are patterned, and only the intrinsic microcrystalline silicon layer 22 and the second doped semiconductor layer 32 of the second doped region 112b are retained.

[0144] 15)(Step S400), a preset film layer of transparent conductive layer 40 is formed on the entire back side 112;

[0145] 16) (Step S400) The transparent conductive layer 40 is patterned to form a plurality of first conductive portions 41 and a plurality of second conductive portions 42. For example, the plurality of first conductive portions 41 and a plurality of second conductive portions 42 can be formed by ink etching or laser patterning process.

[0146] 17) (Steps S500 and S600) A first electrode 51 and a second electrode 52 are formed on the back side and a light injection process is performed, for example, by screen printing.

[0147] Thirdly, based on the same concept, this application also provides a photovoltaic module, which includes a battery string, connecting components, an encapsulating film, and a cover plate. The battery string is formed by connecting a plurality of back-contact solar cells 100 as described above, or the battery string is formed by connecting back-contact solar cells 100 manufactured by the manufacturing method of back-contact solar cells as described above; the connecting components are used to electrically connect two adjacent back-contact solar cells 100; the encapsulating film is used to cover the surface of the battery string; and the cover plate is used to cover the surface of the encapsulating film facing away from the battery string.

[0148] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0149] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the patent application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this patent application should be determined by the appended claims.

Claims

1. A back-contact solar cell, characterized in that, include: The substrate has a front side and a back side disposed opposite to each other, wherein the back side is provided with alternating first doped regions and second doped regions; A first doped functional layer is located on the corresponding first doped region. The first doped functional layer includes a first sub-doped semiconductor layer and at least one barrier layer that are sequentially stacked along a direction away from the substrate. The first sub-doped semiconductor layer has a first doping element. A second doped semiconductor layer is located on the corresponding second doped region, and the second doped semiconductor layer has a second doped element with a different conductivity type than the first doped element; A transparent conductive layer includes a plurality of first conductive portions and a plurality of second conductive portions, wherein the first conductive portions are disposed on the side of the first doped functional layer away from the substrate, and the second conductive portions are disposed on the side of the second doped semiconductor layer away from the substrate; The first electrode is located in the first doped region and is disposed on the side of the first conductive portion away from the substrate; The second electrode is located in the second doped region and is disposed on the side of the second conductive portion away from the substrate; The at least one barrier layer is provided with a plurality of first holes, a portion of the first conductive part is located in the first hole and is electrically connected to the first sub-doped semiconductor layer; The first doped functional layer further includes a second sub-doped semiconductor layer disposed on the side of the at least one barrier layer away from the substrate; The second sub-doped semiconductor layer has a plurality of second holes; the first holes are connected to the second holes in a one-to-one correspondence. A portion of the first conductive portion is located in the first hole and the corresponding second hole, respectively, and is electrically connected to the first sub-doped semiconductor layer.

2. The back-contact solar cell according to claim 1, characterized in that, The thickness of the first sub-doped semiconductor layer is 30 nanometers to 150 nanometers; and / or, The thickness of the at least one barrier layer is 0.5 nanometers to 3 nanometers; and / or, The thickness of the second sub-doped semiconductor layer is 10 nanometers to 60 nanometers.

3. The back-contact solar cell according to claim 1, characterized in that, The concentration of the first doping element in the first sub-doped semiconductor layer is 3 x 1016 atom / cm3 19 atom / cm3 3 -5 x 1018 atom / cm3 20 atom / cm3 3 ; and / or, The concentration of the first dopant element in the second sub-doped semiconductor layer is 4 × 10⁻⁶. 19 atom / cm 3 -5×10 20 atom / cm 3 .

4. The back-contact solar cell according to claim 1, characterized in that, The material of the barrier layer includes at least one of silicon oxide, silicon nitride, and silicon oxynitride.

5. The back-contact solar cell according to claim 1, characterized in that, Also includes: A tunneling layer is located between the substrate and the first doped functional layer; An intrinsic microcrystalline silicon layer is located between the substrate and the second doped semiconductor layer.

6. The back-contact solar cell according to claim 5, characterized in that, The thickness of the first doped functional layer is greater than the thickness of the second doped semiconductor layer; and / or, The thickness of the tunneling layer is 0.5 nanometers to 1.5 nanometers; and / or, The thickness of the intrinsic microcrystalline silicon layer is 4 nanometers to 14 nanometers.

7. The back-contact solar cell according to claim 1, characterized in that, The first doping element is an N-type doping element, and the second doping element is a P-type doping element.

8. The back-contact solar cell according to claim 1, characterized in that, The back side is also provided with a spacer region located between the first doped region and the second doped region; The first doped functional layer and the adjacent second doped semiconductor layer are disposed at intervals in the spacer region, and the first conductive portion and the adjacent second conductive portion are disposed at intervals in the spacer region.

9. A method for manufacturing a back-contact solar cell, characterized in that, include: A substrate is provided, the substrate having a front side and a back side disposed opposite to each other, the back side being provided with alternating first doped regions and second doped regions; A first doped functional layer is formed in the first doped region. The first doped functional layer includes a first sub-doped semiconductor layer and at least one barrier layer that are sequentially stacked along a direction away from the substrate. The first sub-doped semiconductor layer contains a first doping element. A second doped semiconductor layer is formed in the second doped region, wherein the second doped semiconductor layer contains a second doped element with a different conductivity type than the first doped element; A transparent conductive layer is formed on the side of the first doped functional layer and the second doped semiconductor layer away from the substrate. The transparent conductive layer includes a plurality of first conductive portions and a plurality of second conductive portions. The first conductive portions are disposed on the side of the first doped functional layer away from the substrate, and the second conductive portions are disposed on the side of the second doped semiconductor layer away from the substrate. A first electrode is formed on the side of the first conductive portion away from the substrate; A second electrode is formed on the side of the second conductive portion away from the substrate; The at least one barrier layer is provided with a plurality of first holes, a portion of the first conductive part is located in the first hole and is electrically connected to the first sub-doped semiconductor layer; The step of forming a first doped functional layer in the first doped region includes: sequentially forming a first initial sub-doped semiconductor layer, at least one initial barrier layer, and a second initial sub-doped semiconductor layer on the back side of the substrate; and removing portions of the first initial sub-doped semiconductor layer, the at least one initial barrier layer, and the second initial sub-doped semiconductor layer corresponding to the second doped region to form the first doped functional layer.

10. The method for manufacturing a back-contact solar cell according to claim 9, characterized in that, Prior to the step of forming the second doped semiconductor layer in the second doped region, the method further includes: The first doped functional layer is first cleaned with an alkaline solution and then with an acidic solution to form a plurality of first pores penetrating at least one of the barrier layers.

11. A photovoltaic module, characterized in that, include: A battery string is formed by connecting multiple back-contact solar cells as described in any one of claims 1 to 8 or back-contact solar cells manufactured by the manufacturing method as described in any one of claims 9 and 10; Connecting components for electrically connecting two adjacent back-contact solar cells; An encapsulating film is used to cover the surface of the battery string; A cover plate is used to cover the surface of the encapsulating film that faces away from the battery string.

Images