Transistor device and method
By forming an insulating layer and contact connection strips on the semiconductor substrate of the trench gate transistor device, electrically connected to the gate electrode in the elongated trench, the problem of high gate resistance in the prior art is solved, and lower gate resistance and improved device performance are achieved.
CN120152335APending Publication Date: 2025-06-13INFINEON TECH AUSTRIA AG
Patent Information
- Application Number
- CN202411702088.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2023-12-13
- Filing Date
- 2024-11-26
- Publication Date
- 2025-06-13
Smart Images
Figure CN120152335A_ABST
Abstract
In an embodiment, a transistor device (10, 10 ') comprises a semiconductor substrate comprising at least one transistor cell (12), the transistor cell (12) comprising an elongated trench (13) and an elongated mesa (14). The elongated trench (13) is arranged in the first main surface (15) of the semiconductor substrate (11) and comprises an elongated gate electrode (16) electrically separated from the semiconductor substrate (11) by a gate dielectric (17). A first insulating layer (23) is arranged on the first main surface (15) and covers the gate trench (13), and an elongated contact connection strip (24) is arranged on the first insulating layer (23) and extends over and parallel to the elongated trench (13). The elongated contact connection strip (24) is electrically connected to the elongated gate electrode (16) in the elongated trench (13) by at least one first contact (25) extending through the first insulating layer (23).
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Citation Information
Patent Citations
Structure and method for forming trench gate transistors with low gate resistance
WO2009079473A1