Display substrate, preparation method thereof and display device

Abstract

The invention discloses a display substrate, a preparation method thereof and a display device, the display substrate comprises a plurality of sub-pixels arranged on a substrate, each sub-pixel comprises a light-emitting device, and each light-emitting device comprises a first electrode, a light-emitting function layer and a second electrode which are sequentially stacked in the direction away from the substrate; the light-emitting functional layer comprises a first auxiliary layer and a light-emitting layer which are sequentially stacked in the direction away from the substrate, the first auxiliary layer has high carrier mobility, and the thickness of the first auxiliary layer is h; the minimum distance between the outer contours of the orthographic projections of the adjacent sub-pixels on the substrate is L; the minimum distance between the thickness of the first auxiliary layer and the outer contour of the orthographic projection of the adjacent sub-pixel on the substrate meets the relational expression: L / h is greater than 75; and the electrical crosstalk between the adjacent sub-pixels is reduced.

Description

Technical Field

[0001] This application relates to, but is not limited to, the field of display technology, and particularly relates to a display substrate, a preparation method thereof, and a display device. Background Art

[0002] A micro organic light-emitting diode (Micro-OLED) display device is a micro display developed in recent years. A silicon-based organic light-emitting diode display device is one of them. The silicon-based organic light-emitting diode display device can not only achieve active addressing of pixels, but also can fabricate pixel driving circuits and other structures on a silicon-based substrate, which is beneficial to reducing the system volume and realizing lightweight. The silicon-based organic light-emitting diode display device is fabricated by using a mature complementary metal oxide semiconductor (CMOS) integrated circuit process, and has the advantages of small volume, high resolution (Pixels Per Inch, PPI), high refresh rate, etc., and is widely used in the field of near-eye display such as virtual reality (VR) or augmented reality (AR). Summary of the Invention

[0003] Embodiments of the present application provide a display substrate and a display device, which reduce the electrical crosstalk between adjacent sub-pixels.

[0004] Embodiments of the present disclosure provide a display substrate, including a plurality of sub-pixels disposed on a substrate. The sub-pixels include light-emitting devices, and the light-emitting devices include a first electrode, a light-emitting functional layer, and a second electrode stacked in sequence along a direction away from the substrate. The light-emitting functional layer includes a first auxiliary layer and a light-emitting layer stacked in sequence along a direction away from the substrate. The first auxiliary layer has a high carrier mobility, and the thickness of the first auxiliary layer is h. The display substrate further includes a pixel definition layer disposed on a side of the first electrode away from the substrate. The pixel definition layer is provided with pixel openings defining the sub-pixels. The pixel openings expose at least a part of the surface of the first electrode. The minimum distance between the outer contours of the positive projections of adjacent sub-pixels on the substrate is L. The thickness of the first auxiliary layer and the minimum distance between the outer contours of the positive projections of adjacent sub-pixels on the substrate satisfy the relationship: L / h > 75.

[0005] In an exemplary embodiment, the range of the minimum distance between the outer contours of the positive projections of adjacent sub-pixels on the substrate is: 1000 nm ≤ L ≤ 3000 nm.

[0006] In an exemplary embodiment, the maximum linear distance between any two points on the outer contour of the positive projection of the pixel opening on the substrate near the substrate side is d, and the thickness h of the first auxiliary layer and the maximum linear distance between any two points on the outer contour of the positive projection of the pixel opening on the substrate near the substrate side satisfy the relation: d / h > 140.

[0007] In an exemplary embodiment, the range of the maximum linear distance between any two points on the outer contour of the positive projection of the pixel opening on the substrate near the substrate side is: 3000 nm ≤ d ≤ 5000 nm.

[0008] In an exemplary embodiment, the first auxiliary layer includes at least one of a hole injection layer, a hole transport layer, and an interface modification layer.

[0009] In an exemplary embodiment, the first auxiliary layer includes a hole injection layer, a hole transport layer, and an interface modification layer that are sequentially stacked along a direction away from the substrate, and the thickness of at least one of the hole injection layer, the hole transport layer, and the interface modification layer is less than or equal to 10 nm.

[0010] In an exemplary embodiment, the first electrode includes a first conductive layer, a dielectric layer, and a second conductive layer that are sequentially stacked along a direction away from the substrate. The reflectivity of the first conductive layer to visible light is greater than or equal to 90%, the transmittance of the dielectric layer to visible light is greater than or equal to 90%, and the transmittance of the second conductive layer to visible light is greater than or equal to 90%.

[0011] In an exemplary embodiment, the plurality of sub-pixels include a first sub-pixel that emits red light, a second sub-pixel that emits green light, and a third sub-pixel that emits blue light. The thickness of the dielectric layer of the first sub-pixel is greater than the thickness of the dielectric layer of the second sub-pixel, and the thickness of the dielectric layer of the second sub-pixel is greater than the thickness of the dielectric layer of the third sub-pixel.

[0012] In an exemplary embodiment, the thickness of the dielectric layer of the first sub-pixel is greater than or equal to 150 nm and less than or equal to 230 nm, the thickness of the dielectric layer of the second sub-pixel is greater than or equal to 95 nm and less than or equal to 145 nm, and the thickness of the dielectric layer of the third sub-pixel is greater than or equal to 50 nm and less than or equal to 110 nm.

[0013] In an exemplary embodiment, the dielectric layer is a conductive material, and the first conductive layer and the second conductive layer are electrically connected through the dielectric layer.

[0014] In an exemplary embodiment, the dielectric layer is an insulating material, and a bridging electrode is disposed in the dielectric layer. The second conductive layer is connected to the first conductive layer through the bridging electrode.

[0015] In an exemplary embodiment, the light-emitting layer is a fluorescent material, and the thickness of the light-emitting layer is greater than or equal to 10 nanometers and less than or equal to 25 nanometers; or, the light-emitting layer is a phosphorescent material, and the thickness of the light-emitting layer is greater than or equal to 20 nanometers and less than or equal to 50 nanometers.

[0016] In an exemplary embodiment, the light-emitting functional layer further includes a second auxiliary layer disposed on a side of the light-emitting layer away from the substrate. The second auxiliary layer includes at least one of an electron blocking layer, an electron transport layer, and an electron injection layer.

[0017] An embodiment of the present disclosure further provides a display device including the foregoing display substrate.

[0018] An embodiment of the present disclosure further provides a method for manufacturing a display substrate, including: Forming a plurality of sub-pixels on a substrate; Wherein, the sub-pixel includes a light-emitting device, and the light-emitting device includes a first electrode, a light-emitting functional layer, and a second electrode stacked in sequence along a direction away from the substrate; the light-emitting functional layer includes a first auxiliary layer and a light-emitting layer stacked in sequence along a direction away from the substrate. The first auxiliary layer has a high carrier mobility, and the thickness of the first auxiliary layer is h; The method further includes a pixel definition layer disposed on a side of the first electrode away from the substrate. A pixel opening for defining the sub-pixel is disposed in the pixel definition layer. The pixel opening exposes at least a part of the surface of the first electrode. The minimum distance between the outer contours of the orthographic projections of adjacent sub-pixels on the substrate is L; The thickness of the first auxiliary layer and the minimum distance between the outer contours of the orthographic projections of adjacent sub-pixels on the substrate satisfy the relational expression: L / h > 75.

[0019] Other features and advantages of the present application will be described in the following specification, and will, in part, become apparent from the specification or be understood by implementing the present application. Other advantages of the present application can be realized and obtained by the solutions described in the specification and the drawings. Description of the Drawings

[0020] The drawings are used to provide an understanding of the technical solutions of the present application, and constitute a part of the specification. They are used together with the embodiments of the present application to explain the technical solutions of the present application, and do not constitute a limitation to the technical solutions of the present application.

[0021] Figure 1It is a schematic cross-sectional structure diagram of a related display substrate; Figure 2 It is a schematic cross-sectional structure diagram of another related display substrate; Figure 3 It is a schematic plan view of a display substrate according to an embodiment of the present disclosure; Figure 4 It is a schematic cross-sectional structure diagram of a display substrate according to an embodiment of the present disclosure; Figure 5 It is a schematic cross-sectional structure diagram of a light-emitting device of a display substrate according to an embodiment of the present disclosure; Figure 6 It is a schematic cross-sectional structure diagram of another display substrate according to an embodiment of the present disclosure; Figure 7a It is a schematic diagram after forming a first conductive film in the preparation process of a first electrode of another display substrate according to an embodiment of the present disclosure; Figure 7b It is a schematic diagram after forming a first dielectric film in the preparation process of a first electrode of another display substrate according to an embodiment of the present disclosure; Figure 7c It is a schematic diagram after forming a first dielectric pattern in the preparation process of a first electrode of another display substrate according to an embodiment of the present disclosure; Figure 7d It is a schematic diagram after forming a second dielectric film in the preparation process of a first electrode of another display substrate according to an embodiment of the present disclosure; Figure 7e It is a schematic diagram after forming a second dielectric pattern in the preparation process of a first electrode of another display substrate according to an embodiment of the present disclosure; Figure 7f It is a schematic diagram after forming a third dielectric film in the preparation process of a first electrode of another display substrate according to an embodiment of the present disclosure; Figure 7g It is a schematic diagram after forming a first conductive layer and a dielectric layer in the preparation process of a first electrode of another display substrate according to an embodiment of the present disclosure; Figure 7h It is a schematic diagram after forming a second conductive film in the preparation process of a first electrode of another display substrate according to an embodiment of the present disclosure; Figure 7i It is a schematic diagram after forming a third conductive film in the preparation process of a first electrode of another display substrate according to an embodiment of the present disclosure; Figure 7j It is a schematic diagram after forming an overlapping electrode and a second conductive layer in the preparation process of a first electrode of another display substrate according to an embodiment of the present disclosure; Figure 7k It is a schematic diagram after forming a pixel definition layer in the preparation process of another display substrate according to an embodiment of the present disclosure. Detailed implementation manners

[0022] This application describes multiple embodiments, but the description is exemplary rather than restrictive, and it will be apparent to those of ordinary skill in the art that there can be more embodiments and implementation solutions within the scope encompassed by the embodiments described in this application. Although many possible combinations of features are shown in the drawings and discussed in the detailed description, many other combinations of the disclosed features are also possible. Unless specifically restricted, any feature or element of any embodiment can be used in combination with any other feature or element in any other embodiment, or can replace any other feature or element in any other embodiment.

[0023] This application includes and contemplates combinations with features and elements known to those of ordinary skill in the art. The embodiments, features, and elements disclosed in this application can also be combined with any conventional features or elements to form a unique inventive solution. Any feature or element of any embodiment can also be combined with features or elements from other inventive solutions to form another unique inventive solution. Therefore, it should be understood that any feature shown and / or discussed in this application can be implemented alone or in any suitable combination. Therefore, the embodiments are not subject to other limitations except those made in accordance with the appended claims and their equivalents. In addition, various modifications and changes can be made within the scope of the appended claims.

[0024] In addition, when describing representative embodiments, the specification may have presented the method and / or process as a specific sequence of steps. However, to the extent that the method or process does not depend on the specific order of the steps described herein, the method or process should not be limited to the specific order of steps described. As will be understood by those of ordinary skill in the art, other step orders are possible. Therefore, the specific order of steps set forth in the specification should not be construed as a limitation on the claims. In addition, the claims directed to the method and / or process should not be limited to performing their steps in the order written, and those skilled in the art can readily understand that these orders can vary and still remain within the spirit and scope of the embodiments of this application.

[0025] Figure 1 It is a schematic cross-sectional structure diagram of a related display substrate. As Figure 1As shown, in the related art, the red (R) sub-pixels, green (G) sub-pixels, and blue (B) sub-pixels in the display substrate are arranged in a side-by-side manner to improve the light extraction efficiency of the sub-pixels. The sub-pixels of the related art display substrate include a light-emitting device and a pixel definition layer 21'. The light-emitting device includes a first electrode 11', a light-emitting functional layer 13', and a second electrode 12' that are sequentially stacked along the direction away from the substrate. The light-emitting functional layer 13' includes a first auxiliary layer 132' and a light-emitting layer 131' that are sequentially stacked along the direction away from the substrate. The first auxiliary layer 132' may include at least one of a hole injection layer (HIL), a hole transport layer (HTL), and an interface modification layer (prime). The hole injection layer (HIL) and the hole transport layer (HTL) may be a common layer connected together. The interface modification layers (prime) of adjacent sub-pixels may be connected to each other. The pixel definition layer 21' is disposed on the first electrode 11', and the pixel definition layer 21' is provided with a pixel opening exposing the surface of the first electrode 11'.

[0026] Through the research of the inventors of the present application, it is found that when the pitch d1 between adjacent sub-pixels is between 15,000 nanometers and 20,000 nanometers, and the sum of the thicknesses d2 of the hole injection layer (HIL), the hole transport layer (HTL), and the interface modification layer (prime) is between 180 nanometers and 200 nanometers, and the pitch d1 of the sub-pixels and the sum of the thicknesses d2 satisfy the relationship: d1 / d2 > 75, crosstalk between adjacent sub-pixels can be reduced. However, in a display substrate with an ultra-high pixel density (Pixels Per Inch), the pitch d1 between adjacent sub-pixels will decrease. When the pitch d1 between adjacent sub-pixels is between 1,000 nanometers and 3,000 nanometers, and the sum of the thicknesses d2 of the hole injection layer (HIL), the hole transport layer (HTL), and the interface modification layer (prime) is between 180 nanometers and 200 nanometers, and the pitch d1 of the sub-pixels and the sum of the thicknesses d2 satisfy the relationship: 5 < d1 / d2 < 17, carrier high-mobility film layers such as the hole injection layer (HIL), the hole transport layer (HTL), and the interface modification layer (prime) will cause crosstalk between adjacent sub-pixels, affecting the display effect.

[0027] By reducing the thicknesses of the hole injection layer (HIL), the hole transport layer (HTL), and the interface modification layer (prime) of the related display substrate, although the crosstalk between adjacent sub-pixels can be reduced, it will affect the optical microcavity size of the sub-pixels and reduce the light-emitting efficiency of the light-emitting devices of the sub-pixels.

[0028] The related art display substrate can physically isolate the first auxiliary layer in the light-emitting functional layer, for example, by using structures such as holes, undercuts, and folds to isolate the first auxiliary layer and reduce the crosstalk between adjacent sub-pixels. However, physical isolation will cause the light-emitting functional layer to be distorted, and the distorted area of ​​the light-emitting functional layer has abnormal electrical and optical properties compared to other areas of the light-emitting functional layer, which affects the display effect of the related art display substrate.

[0029] Figure 2 FIG. 1 is a schematic diagram of a cross-sectional structure of another related display substrate. Figure 2 As shown, the pixel definition layer 21' of the relevant display substrate is provided with an undercut structure 22', and the undercut structure 22' can isolate part of the film layer of the light-emitting functional layer 13' above it, reducing the crosstalk of adjacent sub-pixels. However, the light-emitting functional layer 13' will form a distortion area 23' at the undercut structure 22' of the pixel definition layer 21', and the distortion area 23' makes the morphology of the light-emitting functional layer 13' irregular, resulting in carrier accumulation and abnormal transmission, which easily causes leakage of abnormal carrier transmission on the display substrate, and carrier accumulation causing life attenuation and other undesirable "edge effects".

[0030] The embodiment of the present disclosure provides a display substrate, comprising a plurality of sub-pixels arranged on a substrate, wherein the sub-pixels include a light-emitting device, wherein the light-emitting device includes a first electrode, a light-emitting functional layer, and a second electrode sequentially stacked in a direction away from the substrate; the light-emitting functional layer includes a first auxiliary layer and a light-emitting layer sequentially stacked in a direction away from the substrate, wherein the first auxiliary layer has high carrier mobility, and the thickness of the first auxiliary layer is h; It also includes a pixel definition layer, the pixel definition layer is arranged on a side of the first electrode away from the substrate, a pixel opening defining the sub-pixel is arranged in the pixel definition layer, the pixel opening exposes at least a portion of the surface of the first electrode, and the minimum distance between the outer contours of the orthographic projections of adjacent sub-pixels on the substrate is L; The thickness of the first auxiliary layer and the minimum distance between the outer contours of the orthographic projections of adjacent sub-pixels on the substrate satisfy the relationship: L / h>75.

[0031] The display substrate of the present disclosure is described below by way of some exemplary embodiments.

[0032] Figure 3 FIG. 1 is a schematic diagram of a planar structure of a display substrate according to an embodiment of the present disclosure. In an exemplary embodiment, Figure 3As shown, in a plane parallel to the plane where the display substrate is located, the display substrate according to an embodiment of the present disclosure may include a plurality of pixel units P disposed on a substrate. At least one of the plurality of pixel units P includes a first sub-pixel P1 that emits first-color light, a second sub-pixel P2 that emits second-color light, and a third sub-pixel P3 that emits third-color light. The shapes of the first sub-pixel P1, the second sub-pixel P2, and the third sub-pixel P3 may all be rectangular. The first sub-pixel P1 and the second sub-pixel P2 may be arranged at intervals along the second direction Y, and the third sub-pixel P3 may be located on one side of the first sub-pixel P1 and the second sub-pixel P2 in the first direction X. Wherein, the first direction X and the second direction Y intersect each other. Exemplarily, the first direction X and the second direction Y are perpendicular to each other.

[0033] In some embodiments, the shape of the sub-pixel may be any one or more of a circle, an ellipse, a rhombus, a trapezoid, a parallelogram, a pentagon, a hexagon, and other polygons, and may be arranged in a vertical juxtaposition, an X shape, a cross shape, a pin shape, a square shape, a diamond shape, or a delta shape, etc. The present disclosure does not make a limitation herein.

[0034] In an exemplary embodiment, the first sub-pixel P1 may be a red sub-pixel that emits red (R) light, the second sub-pixel P2 may be a green sub-pixel that emits green (G) light, and the third sub-pixel P3 may be a blue sub-pixel that emits blue (B) light.

[0035] In an exemplary embodiment, the display substrate according to an embodiment of the present disclosure further includes a pixel definition layer. Pixel openings for defining sub-pixels are provided in the pixel definition layer, and the area defined by the pixel openings is the area of the sub-pixels. The maximum linear distance between any two points on the outer contour of the positive projection of the side of the pixel opening close to the substrate on the substrate is d, and the maximum linear distance between any two points on the outer contour of the positive projection of the side of the pixel opening close to the substrate on the substrate is the maximum size of the positive projection of the sub-pixel on the substrate. Wherein, the maximum linear distance d may be the length of the diagonal in the sub-pixel.

[0036] In an exemplary embodiment, the range of the maximum linear distance d between any two points on the outer contour of the positive projection of the side of the pixel opening close to the substrate on the substrate may be: 1000 nm ≤ d ≤ 8000 nm. For example, the range of the maximum linear distance between any two points on the outer contour of the positive projection of the side of the pixel opening close to the substrate on the substrate may be: 3000 nm ≤ d ≤ 5000 nm.

[0037] In some embodiments, when the shape of the sub-pixel is circular, the maximum distance between any two points on the outer contour of the positive projection of the pixel opening on the substrate near the substrate side is the length of the sub-pixel diameter; when the shape of the sub-pixel is elliptical, the maximum linear distance between any two points on the outer contour of the positive projection of the pixel opening on the substrate near the substrate side is the length of the major axis of the sub-pixel; when the shape of the sub-pixel is any one or more of a rhombus, trapezoid, parallelogram, pentagon, hexagon, and other polygons, the maximum linear distance between any two points on the outer contour of the positive projection of the pixel opening on the substrate near the substrate side is the length of the diagonal of the sub-pixel or the length of the longest side of the sub-pixel.

[0038] In an exemplary embodiment, the outer contour of the positive projection of the pixel opening on the substrate near the substrate side is the outer contour of the positive projection of the corresponding sub-pixel on the substrate. The minimum distance between the outer contours of the positive projections of adjacent sub-pixels on the substrate is L. For example, the range of the minimum distance L is: 1000 nanometers ≤ L ≤ 3000 nanometers.

[0039] Figure 4 This is a schematic cross-sectional structure diagram of a display substrate according to an embodiment of the present disclosure. Among them, Figure 4 It can be Figure 3 The cross-sectional view in the A-A' direction in. In an exemplary embodiment, as Figure 4 shown, in a plane perpendicular to the plane where the display substrate is located, the sub-pixels of the display substrate according to the embodiment of the present disclosure may include a driving circuit layer 102 provided on a substrate 101 and a light-emitting functional layer provided on a side of the driving circuit layer 102 away from the substrate 101. In some possible implementation manners, the display substrate may include other film layers, for example, a packaging structure layer, a color film structure layer, a touch control structure layer, etc., which are not limited in the present disclosure.

[0040] In an exemplary embodiment, the substrate 101 may be a bulk substrate or a silicon-on-insulator (SOI) substrate. The driving circuit layer 102 may be prepared on the substrate 101 by a silicon semiconductor process (such as a CMOS process). The driving circuit layer 102 may include pixel driving circuits, and the pixel driving circuits may include a plurality of transistors and storage capacitors.

[0041] In an exemplary embodiment, the light-emitting functional layer may include a plurality of light-emitting devices. The light-emitting device may at least include a first electrode 11, a light-emitting functional layer 13, and a second electrode 12 that are sequentially stacked along a direction away from the substrate 101. The first electrode 11 may be connected to a transistor of the pixel driving circuit. The light-emitting functional layer 13 is connected to the first electrode 11, and the second electrode 12 is connected to the light-emitting functional layer 13. The light-emitting functional layer 13 emits light under the drive of the first electrode 11 and the second electrode 12. Among them, the first electrode 11 may be referred to as an anode, and the second electrode may be referred to as a cathode.

[0042] In an exemplary embodiment, the first electrode 11 may be a total reflection electrode, and the first electrode 11 may be prepared by a sputtering process.

[0043] In an exemplary embodiment, the first electrode 11 may be a strong microcavity structure. The first electrode 11 may include a first conductive layer 11-1, a dielectric layer 11-2, and a second conductive layer 11-3 that are sequentially stacked along a direction away from the substrate 101. The first conductive layer 11-1 may serve as a light reflection layer of the first electrode 11, and the first conductive layer 11-1 is configured to reflect the light emitted by the light-emitting functional layer 13. For example, the reflectivity of the first conductive layer 11-1 to visible light is greater than or equal to 90%. The dielectric layer 11-2 is configured to adjust the length of the optical microcavity of the light-emitting device in the direction perpendicular to the substrate and improve the light-emitting efficiency of the light-emitting device. The second conductive layer 11-3 may serve as a contact layer of the first electrode 11, and the second conductive layer 11-3 is configured to be connected to the light-emitting functional layer 13.

[0044] In an exemplary embodiment, the first conductive layer 11-1 may be a single-film layer structure, and the first conductive layer 11-1 may include metal materials or alloy materials such as silver, aluminum, and copper; or the first conductive layer 11-1 may be a multi-film layer stack structure. For example, the first conductive layer 11-1 may be a stack structure of titanium / aluminum / titanium or titanium nitride / aluminum / titanium nitride.

[0045] In an exemplary embodiment, the dielectric layer 11-2 is disposed on a side of the first conductive layer 11-1 away from the substrate 101 and covers the side surface and the surface on the side away from the substrate 101 of the first conductive layer 11-1. The dielectric layer 11-2 may be a single-film layer structure, and the dielectric layer 11-2 may be a conductive material. For example, the dielectric layer 11-2 may be a conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO). The first conductive layer 11-1 and the second conductive layer 11-3 may be electrically connected through the dielectric layer 11-2.

[0046] In some embodiments, the dielectric layer of at least one of the first sub-pixel, the second sub-pixel, and the third sub-pixel may be an insulating material. For example, the dielectric layer may be an inorganic material, such as silicon oxide or silicon nitride. A bridging electrode is disposed in the dielectric layer, and the second conductive layer is connected to the first conductive layer through the bridging electrode.

[0047] In an exemplary embodiment, in the first sub-pixel P1, the transmittance of the dielectric layer 11-2 to red light is greater than or equal to 90%; in the second sub-pixel P2, the transmittance of the dielectric layer 11-2 to green light is greater than or equal to 90%; in the third sub-pixel P3, the transmittance of the dielectric layer 11-2 to blue light is greater than or equal to 90%.

[0048] In an exemplary embodiment, the thicknesses of the dielectric layers 11-2 in the first sub-pixel P1, the second sub-pixel P2, and the third sub-pixel P3 may be different. For example, the thickness of the dielectric layer 11-2 in the first sub-pixel P1 is greater than the thickness of the dielectric layer 11-2 in the second sub-pixel P2, and the thickness of the dielectric layer 11-2 in the second sub-pixel P2 is greater than the thickness of the dielectric layer 11-2 in the third sub-pixel P3.

[0049] In an exemplary embodiment, the thickness of the dielectric layer 11-2 of the light-emitting device in the first sub-pixel P1 is greater than or equal to 150 nanometers and less than or equal to 230 nanometers. The thickness of the dielectric layer 11-2 of the light-emitting device in the second sub-pixel P2 is greater than or equal to 95 nanometers and less than or equal to 145 nanometers. The thickness of the dielectric layer 11-2 of the light-emitting device in the third sub-pixel P3 is greater than or equal to 50 nanometers and less than or equal to 90 nanometers. Herein, the thickness of the dielectric layer 11-2 refers to the vertical distance between the surface of the dielectric layer 11-2 away from the substrate and the surface of the first conductive layer 11-1 away from the substrate 101.

[0050] In the embodiment of the present disclosure, the display substrate can adjust the length of the optical microcavity of the light-emitting device of the sub-pixel through the dielectric layer 11-2, thereby improving the light extraction efficiency of the sub-pixel. For example, the light-emitting devices of the first sub-pixel P1 and the second sub-pixel P1 form a first-period optical microcavity or a second-period optical microcavity through the dielectric layer 11-2 therein, and the light-emitting device of the third sub-pixel P3 forms a first-period optical microcavity, a second-period optical microcavity, a third-period optical microcavity, or a fourth-period optical microcavity through the dielectric layer 11-2 therein. Herein, the length of the optical microcavity is the vertical distance between the surface of the first electrode close to the second electrode and the surface of the second electrode close to the first electrode.

[0051] In an exemplary embodiment, the second conductive layer 11-3 is disposed on a side of the dielectric layer 11-2 away from the substrate 101, and covers the side surface of the dielectric layer 11-2 and the surface on the side away from the substrate 101. The second conductive layer 11-3 may have a single-layer structure, and the transmittance of the second conductive layer 11-3 to visible light is greater than or equal to 90%. The second conductive layer 11-3 may include conductive materials such as indium tin oxide (ITO) and indium zinc oxide (IZO).

[0052] In some embodiments, the first electrode may include a number of conductive layers other than two layers. For example, the first electrode may include three, four, five, six, or other numbers of conductive layers, which are not limited in the present disclosure.

[0053] In an exemplary embodiment, the present disclosure shows that the substrate further includes a pixel definition layer 21. The pixel definition layer 21 is disposed on a side of the first electrode 11 away from the substrate 101. The pixel definition layer 21 is provided with pixel openings that define sub-pixels. The pixel openings expose at least a part of the surface of the first electrode 11. The light-emitting functional layer 13 covers the pixel openings and is connected to the first electrode 11 exposed by the pixel openings.

[0054] In an exemplary embodiment, the light-emitting functional layer 13 includes a first auxiliary layer 131, a light-emitting layer 132, and a second auxiliary layer 133 that are sequentially stacked along a direction away from the substrate 101. The material of the first auxiliary layer 131 has a high carrier mobility and can quickly transport carriers. For example, the mobility of the first auxiliary layer 131 may be greater than or equal to 10 -4 cm 2 / vs and less than or equal to 10 -2 cm 2 / vs.

[0055] In an exemplary embodiment, the first auxiliary layer 131 includes at least one of a hole injection layer (HIL), a hole transport layer (HTL), and an interface modification layer (Prime). The second auxiliary layer 133 includes at least one of an electron blocking layer (EBL), an electron transport layer (ETL), and an electron injection layer (EIL). Among them, at least a part of the film layers in the first auxiliary layer 131 of at least two sub-pixels may be a common layer connected together; at least a part of the film layers in the second auxiliary layer 133 of at least two sub-pixels may be a common layer connected together.

[0056] The present disclosure shows that the charge generation layer is cancelled in the light-emitting functional layer 13 of the substrate, reducing the electrical crosstalk between adjacent sub-pixels.

[0057] In an exemplary embodiment, the thickness of the first auxiliary layer 131 is h, and the minimum distance between the outer contours of the orthographic projections of adjacent sub-pixels on the substrate is L. The thickness h of the first auxiliary layer 131 and the minimum distance L between the outer contours of the orthographic projections of adjacent sub-pixels on the substrate satisfy the relationship: L / h > 75.

[0058] The embodiment of the present disclosure shows that the ratio of the thickness h of the first auxiliary layer 131 to the minimum distance L between the outer contours of the orthographic projections of adjacent sub-pixels on the substrate of the display substrate is greater than 75, reducing the electrical crosstalk between adjacent sub-pixels.

[0059] In an exemplary embodiment, the maximum straight-line distance between any two points on the outer contour of the orthographic projection of the pixel opening on the substrate near the substrate side is d. The thickness h of the first auxiliary layer 131 and the maximum straight-line distance d between any two points on the outer contour of the orthographic projection of the pixel opening on the substrate near the substrate side satisfy the relationship: d / h > 140.

[0060] The embodiment of the present disclosure shows that the ratio of the thickness h of the first auxiliary layer 131 to the maximum straight-line distance d between any two points on the outer contour of the orthographic projection of the pixel opening on the substrate near the substrate side of the display substrate is greater than 140, reducing the electrical crosstalk between adjacent sub-pixels.

[0061] Figure 5 It is a schematic cross-sectional structure diagram of a light-emitting device of a display substrate according to an embodiment of the present disclosure. Among them, Figure 5 The shown light-emitting device may be Figure 4 the light-emitting device in. In an exemplary embodiment, as Figure 5 shown, in a plane perpendicular to the plane where the display substrate is located, the light-emitting device of the display substrate according to the embodiment of the present disclosure includes a first electrode 11, a light-emitting functional layer 13, and a second electrode 12 stacked in sequence along the direction away from the substrate 101.

[0062] In an exemplary embodiment, the light-emitting functional layer 13 includes a first auxiliary layer 131, a light-emitting layer 132, and a second auxiliary layer 133 that are sequentially stacked along a direction away from the substrate 101. The first auxiliary layer 131 includes a hole injection layer 131-1, a hole transport layer 131-2, and an interface modification layer 131-3 that are sequentially stacked along a direction away from the substrate 101. The first auxiliary layer 131 formed by sequentially stacking the hole injection layer 131-1, the hole transport layer 131-2, and the interface modification layer 131-3 has a high carrier mobility. The thickness h of the first auxiliary layer 131 is the sum of the thickness of the hole injection layer 131-1, the thickness of the hole transport layer 131-2, and the thickness of the interface modification layer 131-3. Among them, the hole injection layers 131-1 and the hole transport layers 131-2 of at least two sub-pixels are common layers connected together, and the interface modification layers 131-3 of adjacent sub-pixels can be connected to each other.

[0063] In an exemplary embodiment, the thickness of the hole injection layer 131-1 is less than or equal to 10 nanometers. For example, the thickness of the hole injection layer 131-1 is greater than or equal to 3 nanometers and less than or equal to 7 nanometers. The thickness of the hole transport layer 131-2 is less than or equal to 10 nanometers. For example, the thickness of the hole transport layer 131-2 is greater than or equal to 5 nanometers and less than or equal to 10 nanometers. The thickness of the interface modification layer 131-3 is less than or equal to 10 nanometers. For example, the thickness of the interface modification layer 131-3 is greater than or equal to 2 nanometers and less than or equal to 5 nanometers.

[0064] In the embodiment of the present disclosure, it is shown that the substrate reduces the electrical crosstalk between adjacent sub-pixels by the thickness of the hole injection layer 131-1 being less than or equal to 10 nanometers, the thickness of the hole transport layer 131-2 being less than or equal to 10 nanometers, and the thickness of the interface modification layer 131-3 being less than or equal to 10 nanometers.

[0065] In the embodiment of the present disclosure, it is shown that the substrate controls the thickness of the interface modification layer 131-3 to be less than or equal to 10 nanometers, increases the thickness of the dielectric layer in the first electrode, keeps the length of the optical microcavity of the light-emitting device unchanged, and can reduce the area of the distortion region of the light-emitting functional layer 13 in the light-emitting device, increase the effective light-emitting area of the light-emitting device, and improve the light-emitting efficiency of the light-emitting device.

[0066] In an exemplary embodiment, the light-emitting layer 132 can be a fluorescent material or a phosphorescent material. When the light-emitting layer 132 is a fluorescent material, the thickness of the light-emitting layer 132 is greater than or equal to 10 nanometers and less than or equal to 25 nanometers; when the light-emitting layer 132 is a phosphorescent material, the thickness of the light-emitting layer 132 is greater than or equal to 20 nanometers and less than or equal to 50 nanometers.

[0067] In the embodiments of the present disclosure, the display substrate reduces the thickness of the light-emitting layer 132 and increases the thickness of the dielectric layer in the first electrode, so as to keep the length of the optical microcavity of the light-emitting device unchanged, and can reduce the operating voltage of the light-emitting device and the energy consumption.

[0068] In an exemplary embodiment, the second auxiliary layer 133 includes an electron blocking layer 133-1, an electron transport layer 133-2, and an electron injection layer 133-3 that are sequentially stacked along the direction away from the substrate 101.

[0069] Figure 6 It is a schematic cross-sectional structure diagram of another display substrate according to an embodiment of the present disclosure. Among them, Figure 6 It can be Figure 3 A cross-sectional view in the direction of A-A' in Figure 6 As shown, the structure of the display substrate of this exemplary embodiment is basically the same as that of the display substrate of the embodiment shown in Figure 4 The difference is that the structure of the first electrode 11 in the display substrate of this exemplary embodiment is different from that of the first electrode of the display substrate of the embodiment shown in Figure 4 The first electrode 11 in the display substrate of this exemplary embodiment may include a first conductive layer 11-1, a dielectric layer 11-2, and a second conductive layer 11-3 that are sequentially stacked along the direction away from the substrate 101. The dielectric layer 11-2 of at least one of the first sub-pixel P1, the second sub-pixel P2, and the third sub-pixel P3 may be an insulating material. For example, the dielectric layer 11-2 may be an inorganic material, such as silicon oxide or silicon nitride. A lap electrode 11-4 connected to the side of the first conductive layer 11-1 is provided in the dielectric layer 11-2, and the second conductive layer 11-3 is connected to the first conductive layer 11-1 through the lap electrode 11-4.

[0070] The following is an exemplary description through the preparation process of the first electrode of the display substrate. The "patterning process" mentioned in the present disclosure, for metal materials, inorganic materials, or transparent conductive materials, includes processes such as coating photoresist, mask exposure, development, etching, and photoresist stripping. For organic materials, it includes processes such as coating organic materials, mask exposure, and development. Deposition can be any one or more of sputtering, evaporation, and chemical vapor deposition. Coating can be any one or more of spraying, spin coating, and inkjet printing. Etching can be any one or more of dry etching and wet etching. The present disclosure does not make a limitation. A "thin film" refers to a thin film made of a certain material on a substrate by using deposition, coating, or other processes. If the "thin film" does not require a patterning process during the entire manufacturing process, the "thin film" can also be called a "layer". If the "thin film" requires a patterning process during the entire manufacturing process, it is called a "thin film" before the patterning process and a "layer" after the patterning process. The "layer" after the patterning process contains at least one "pattern".

[0071] In an exemplary embodiment, the preparation process of the first electrode of the substrate in this embodiment may include the following operations.

[0072] (1) Form a first conductive thin film. In an exemplary embodiment, forming the first conductive thin film may include: depositing a layer of the first conductive thin film 30 on the substrate 101, as Figure 7a shown.

[0073] (2) Form a first dielectric thin film. In an exemplary embodiment, forming the first dielectric thin film may include: depositing a layer of the first dielectric thin film 31 on the first conductive thin film 30 on the substrate on which the foregoing pattern is formed, as Figure 7b shown.

[0074] (3) Form a first dielectric pattern. In an exemplary embodiment, forming the first dielectric pattern may include: patterning the first dielectric thin film by a patterning process on the substrate on which the foregoing pattern is formed, so that the first dielectric thin film forms a first dielectric pattern 41 disposed on the first conductive thin film 30, as Figure 7c shown.

[0075] (4) Form a second dielectric thin film. In an exemplary embodiment, forming the second dielectric thin film may include: depositing a layer of the second dielectric thin film 32 covering the first dielectric pattern 41 on the first conductive thin film 30 on the substrate on which the foregoing pattern is formed, as Figure 7d shown.

[0076] (5) Form a second dielectric pattern. In an exemplary embodiment, forming the second dielectric pattern may include: patterning the second dielectric thin film by a patterning process on the substrate on which the foregoing pattern is formed, so that the second dielectric thin film forms a second dielectric pattern 42 disposed on the first conductive thin film 30 and the first dielectric pattern 41, as Figure 7e shown.

[0077] (6) Form a third dielectric thin film. In an exemplary embodiment, forming the third dielectric thin film may include: depositing a layer of the third dielectric thin film 33 covering the second dielectric pattern 42 on the first conductive thin film 30 on the substrate on which the foregoing pattern is formed, as Figure 7f shown.

[0078] (7) Form a first conductive layer and a dielectric layer. In an exemplary embodiment, forming the first conductive layer and the dielectric layer may include: on the substrate on which the foregoing pattern is formed, patterning a stacked film layer formed by a first conductive thin film, a first dielectric pattern, a second dielectric pattern, and a third dielectric thin film through a patterning process to form a first conductive layer 11-1 and a dielectric layer 11-2 in the first sub-pixel P1, a first conductive layer 11-1 and a dielectric layer 11-2 in the second sub-pixel P2, and a first conductive layer 11-1 and a dielectric layer 11-2 in the third sub-pixel P3. A first via 51 is provided between a first stacked layer formed by the first conductive layer 11-1 and the dielectric layer 11-2 in the first sub-pixel P1 and a second stacked layer formed by the first conductive layer 11-1 and the dielectric layer 11-2 in the second sub-pixel P2. The first via 51 exposes the sides of the first conductive layer 11-1 and the dielectric layer 11-2 in the first sub-pixel P1 and the sides of the first conductive layer 11-1 and the dielectric layer 11-2 in the second sub-pixel P2 respectively; a second via 52 is provided between a second stacked layer formed by the first conductive layer 11-1 and the dielectric layer 11-2 in the second sub-pixel P2 and a third stacked layer formed by the first conductive layer 11-1 and the dielectric layer 11-2 in the third sub-pixel P3. The second via 52 exposes the sides of the first conductive layer 11-1 and the dielectric layer 11-2 in the second sub-pixel P2 and the sides of the first conductive layer 11-1 and the dielectric layer 11-2 in the third sub-pixel P3 respectively; as Figure 7g shown.

[0079] In an exemplary embodiment, the dielectric layer 11-2 in the first sub-pixel P1 includes a first dielectric pattern, a second dielectric pattern, and a third dielectric pattern formed by a third dielectric thin film that are sequentially stacked along the direction away from the substrate; the dielectric layer 11-2 in the second sub-pixel P2 includes a second dielectric pattern and a third dielectric pattern formed by a third dielectric thin film that are sequentially stacked along the direction away from the substrate; the dielectric layer 11-2 in the third sub-pixel P3 includes a third dielectric pattern formed by a third dielectric thin film.

[0080] In an exemplary embodiment, the dielectric patterns in the dielectric layer 11-2 may be made of the same insulating material or different insulating materials. For example, the first dielectric pattern, the second dielectric pattern, and the third dielectric pattern may all be made of silicon oxide or silicon nitride.

[0081] (8) Form a second conductive thin film. In an exemplary embodiment, forming the second conductive thin film may include: on the substrate on which the foregoing pattern is formed, depositing a layer of a second conductive thin film 34 that fills the first via and the second via on the substrate 101, as Figure 7h shown.

[0082] In an exemplary embodiment, the second conductive thin film 34 in the first vias is respectively connected to the side surfaces of the first conductive layer 11-1 of the first sub-pixel P1 and the side surfaces of the first conductive layer 11-1 of the second sub-pixel P2, and the second conductive thin film 34 in the second vias is respectively connected to the side surfaces of the first conductive layer 11-1 of the second sub-pixel P2 and the side surfaces of the first conductive layer 11-1 of the third sub-pixel P3.

[0083] (9) Form a third conductive thin film. In an exemplary embodiment, forming the third conductive thin film may include: depositing a layer of the third conductive thin film 35 on the substrate on which the foregoing pattern is formed, on the dielectric layer 11-2 of the first sub-pixel P1, on the dielectric layer 11-2 of the second sub-pixel P2, on the dielectric layer 11-2 of the third sub-pixel P3, and on the second conductive thin film 34, as Figure 7i shown.

[0084] (10) Form a lap electrode and a second conductive layer. In an exemplary embodiment, forming the lap electrode and the second conductive layer may include: patterning the third conductive thin film and the second conductive thin film by a patterning process on the substrate on which the foregoing pattern is formed, so that the third conductive thin film 35 respectively forms the second conductive layer 11-3 of the first sub-pixel P1, the second conductive layer 11-3 of the second sub-pixel P2, and the second conductive layer 11-3 of the third sub-pixel P3, and making the second conductive thin film 34 in the first vias form the lap electrode 11-4 of the first sub-pixel P1, and the lap electrode 11-4 of the first sub-pixel P1 is connected to the side surfaces of the first conductive layer 11-1 and the dielectric layer 11-2 of the first sub-pixel P1; making the second conductive thin film 34 in the second vias form the lap electrodes 11-4 of the second sub-pixel P2 and the third sub-pixel P3, the lap electrode 11-4 of the second sub-pixel P2 is connected to the side surfaces of the first conductive layer 11-1 and the dielectric layer 11-2 of the second sub-pixel P2, and the lap electrode 11-4 of the third sub-pixel P3 is connected to the side surfaces of the first conductive layer 11-1 and the dielectric layer 11-2 of the third sub-pixel P3, as Figure 7j shown.

[0085] In an exemplary embodiment, the first conductive layer 11-1, the dielectric layer 11-2, and the second conductive layer 11-3 of the first sub-pixel P1 form the first electrode of the first sub-pixel P1; the first conductive layer 11-1, the dielectric layer 11-2, and the second conductive layer 11-3 of the second sub-pixel P2 form the first electrode of the second sub-pixel P2; the first conductive layer 11-1, the dielectric layer 11-2, and the second conductive layer 11-3 of the third sub-pixel P3 form the first electrode of the third sub-pixel P3.

[0086] In an exemplary embodiment, the second conductive layer 11-3 located in the first sub-pixel P1 is connected to the side surface of the first conductive layer 11-1 located in the first sub-pixel P1 through the overlapping electrode 11-4 located in the first sub-pixel P1; the second conductive layer 11-3 located in the second sub-pixel P2 is connected to the side surface of the first conductive layer 11-1 located in the second sub-pixel P2 through the overlapping electrode 11-4 located in the second sub-pixel P2; the second conductive layer 11-3 located in the third sub-pixel P3 is connected to the side surface of the first conductive layer 11-1 located in the third sub-pixel P3 through the overlapping electrode 11-4 located in the third sub-pixel P3.

[0087] (11) Form a pixel definition layer. In an exemplary embodiment, forming the pixel definition layer may include: forming a pixel definition layer 21 on the substrate on which the foregoing pattern is formed. The pixel definition layer 21 is disposed on the side of the first electrode 11 of the first sub-pixel P1, the second sub-pixel P2, and the third sub-pixel P3 away from the substrate. Pixel openings exposing the first electrode 11 are provided in the pixel definition layer 21, as Figure 7k shown.

[0088] Thus, the first electrode of the display substrate of this embodiment is fabricated on the substrate. In an exemplary embodiment, after the first electrode is fabricated, a light-emitting functional layer and a second electrode may be sequentially fabricated on the first electrode, which will not be elaborated here.

[0089] The display substrate of the embodiment of the present disclosure reduces the electrical crosstalk between adjacent sub-pixels by increasing the thickness of the dielectric layer in the first electrode and reducing the thickness of some layers in the light-emitting functional layer (such as the hole injection layer, the hole transport layer, the interface modification layer, and the light-emitting layer, etc.), while keeping the length of the optical microcavity of the light-emitting device unchanged; and can reduce the area of the distortion region in the light-emitting functional layer of the light-emitting device, increase the effective light-emitting area of the light-emitting device, improve the light-emitting efficiency of the light-emitting device, and reduce the operating voltage of the light-emitting device.

[0090] The embodiment of the present disclosure also provides a method for fabricating a display substrate, including: Forming a plurality of sub-pixels on a substrate; Wherein, the sub-pixel includes a light-emitting device, and the light-emitting device includes a first electrode, a light-emitting functional layer, and a second electrode stacked in sequence along a direction away from the substrate; the light-emitting functional layer includes a first auxiliary layer and a light-emitting layer stacked in sequence along a direction away from the substrate, the first auxiliary layer has a high carrier mobility, and the thickness of the first auxiliary layer is h; It further includes a pixel definition layer, the pixel definition layer is disposed on the side of the first electrode away from the substrate, pixel openings defining the sub-pixels are provided in the pixel definition layer, the pixel openings expose at least a part of the surface of the first electrode, and the minimum distance between the outer contours of the orthographic projections of adjacent sub-pixels on the substrate is L; The minimum distance between the thickness of the first auxiliary layer and the outer contour of the orthographic projection of the adjacent sub-pixel on the substrate satisfies the relation: L / h > 75.

[0091] The embodiment of the present disclosure further provides a display device, which includes the aforementioned display substrate. The display device may be: an AR / VR display device, a mobile phone, a tablet computer, a television, a monitor, a laptop computer, a digital photo frame, a navigator, or any other product or component with a display function. The embodiments of the present invention are not limited thereto.

[0092] In the description of the present application, it should be understood that the terms "center", "longitudinal", "transverse", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", "axial", "radial", "circumferential", etc. indicate the orientation or positional relationship based on the orientation or positional relationship shown in the drawings. They are only for the convenience of describing the present application and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation. Therefore, it should not be construed as a limitation to the present application.

[0093] In addition, the terms "first", "second", etc. are only used for descriptive purposes and cannot be understood as indicating or implying relative importance or implicitly specifying the quantity of the indicated technical features. Thus, the features defined with "first", "second", etc. may explicitly or implicitly include at least one of such features.

[0094] In the description of the present application, the meaning of "a plurality" is at least two, such as two, three, etc., unless otherwise specifically and clearly defined.

[0095] In the present application, unless otherwise clearly specified and limited, the terms "mounted", "connected", "coupled", "fixed", etc. should be understood in a broad sense. For example, "connected" may be a fixed connection, a detachable connection, or an integral body; it may be a mechanical connection or an electrical connection; it may be directly connected or indirectly connected through an intermediate medium, and it may be the internal communication of two elements or the interaction relationship between two elements, unless otherwise clearly limited. For those of ordinary skill in the art, the specific meanings of the above terms in the present application can be understood according to specific circumstances.

[0096] In this application, unless otherwise clearly specified or limited, the first feature being "on" or "under" the second feature may mean that the first and second features are in direct contact, or the first and second features are indirectly in contact through an intermediate medium. Moreover, the first feature being "above", "over" and "on top of" the second feature may mean that the first feature is directly above or obliquely above the second feature, or simply means that the horizontal height of the first feature is higher than that of the second feature. The first feature being "under", "below" and "beneath" the second feature may mean that the first feature is directly below or obliquely below the second feature, or simply means that the horizontal height of the first feature is less than that of the second feature.

[0097] In the description of this specification, the description with reference to terms such as "one embodiment", "some embodiments", "example", "specific example" or "some examples" means that the specific features, structures, materials or characteristics described in connection with the embodiment or example are included in at least one embodiment or example of this application. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner. In addition, without contradiction, those skilled in the art may combine and combine the different embodiments or examples described in this specification and the features of the different embodiments or examples.

[0098] Although the embodiments of this application have been shown and described above, it can be understood that the above embodiments are exemplary and should not be construed as limiting this application. Those of ordinary skill in the art can make changes, modifications, substitutions and variations to the above embodiments within the scope of this application.

Claims

1. A display substrate, characterized in that: The invention comprises a plurality of sub-pixels arranged on a substrate, wherein the sub-pixels comprise a light-emitting device, wherein the light-emitting device comprises a first electrode, a light-emitting functional layer, and a second electrode sequentially stacked in a direction away from the substrate; the light-emitting functional layer comprises a first auxiliary layer and a light-emitting layer sequentially stacked in a direction away from the substrate, wherein the first auxiliary layer has high carrier mobility, and the thickness of the first auxiliary layer is h; It also includes a pixel definition layer, the pixel definition layer is arranged on a side of the first electrode away from the substrate, a pixel opening defining the sub-pixel is arranged in the pixel definition layer, the pixel opening exposes at least a portion of the surface of the first electrode, and the minimum distance between the outer contours of the orthographic projections of adjacent sub-pixels on the substrate is L; The thickness of the first auxiliary layer and the minimum distance between the outer contours of the orthographic projections of adjacent sub-pixels on the substrate satisfy the relationship: L / h>75.

2. The display substrate according to claim 1, characterized in that: The minimum distance between the outer contours of the orthographic projections of adjacent sub-pixels on the substrate is in the range of 1000 nanometers ≤ L ≤ 3000 nanometers.

3. The display substrate according to claim 1, characterized in that: The maximum straight-line distance between any two points on the outer contour of the orthographic projection of the pixel opening close to the substrate is d, and the thickness of the first auxiliary layer and the maximum straight-line distance between any two points on the outer contour of the orthographic projection of the pixel opening close to the substrate satisfy the relationship: d / h﹥140.

4. The display substrate according to claim 3, characterized in that: The maximum straight-line distance between any two points on the outer contour of the orthographic projection of the pixel opening close to the substrate on the substrate is in the range of 3000 nanometers ≤ d ≤ 5000 nanometers.

5. The display substrate according to any one of claims 1 to 4, characterized in that: The first auxiliary layer includes at least one of a hole injection layer, a hole transport layer and an interface modification layer.

6. The display substrate according to claim 5, characterized in that: The first auxiliary layer includes a hole injection layer, a hole transport layer and an interface modification layer stacked in sequence along a direction away from the substrate, and a thickness of at least one of the hole injection layer, the hole transport layer and the interface modification layer is less than or equal to 10 nanometers.

7. The display substrate according to any one of claims 1 to 4, characterized in that: The first electrode includes a first conductive layer, a dielectric layer, and a second conductive layer stacked in sequence along a direction away from the substrate, the reflectivity of the first conductive layer to visible light is greater than or equal to 90%, the transmittance of the dielectric layer to visible light is greater than or equal to 90%, and the transmittance of the second conductive layer to visible light is greater than or equal to 90%.

8. The display substrate according to claim 7, characterized in that: The multiple sub-pixels include a first sub-pixel that emits red light, a second sub-pixel that emits green light, and a third sub-pixel that emits blue light. The thickness of the dielectric layer of the first sub-pixel is greater than the thickness of the dielectric layer of the second sub-pixel, and the thickness of the dielectric layer of the second sub-pixel is greater than the thickness of the dielectric layer of the third sub-pixel.

9. The display substrate according to claim 8, characterized in that: The thickness of the dielectric layer of the first sub-pixel is greater than or equal to 150 nanometers and less than or equal to 230 nanometers, the thickness of the dielectric layer of the second sub-pixel is greater than or equal to 95 nanometers and less than or equal to 145 nanometers, and the thickness of the dielectric layer of the third sub-pixel is greater than or equal to 50 nanometers and less than or equal to 110 nanometers.

10. The display substrate according to claim 7, characterized in that: The dielectric layer is a conductive material, and the first conductive layer and the second conductive layer are electrically connected through the dielectric layer.

11. The display substrate according to claim 7, characterized in that: The dielectric layer is made of insulating material, a bridging electrode is provided in the dielectric layer, and the second conductive layer is connected to the first conductive layer via the bridging electrode.

12. The display substrate according to any one of claims 1 to 4, characterized in that: The light-emitting layer is a fluorescent material, and the thickness of the light-emitting layer is greater than or equal to 10 nanometers and less than or equal to 25 nanometers; or, the light-emitting layer is a phosphorescent material, and the thickness of the light-emitting layer is greater than or equal to 20 nanometers and less than or equal to 50 nanometers.

13. The display substrate according to any one of claims 1 to 4, characterized in that: The light-emitting functional layer further includes a second auxiliary layer disposed on a side of the light-emitting layer away from the substrate, wherein the second auxiliary layer includes at least one of an electron blocking layer, an electron transport layer and an electron injection layer.

14. A display device, characterized in that: The display substrate comprises any one of claims 1 to 13.

15. A method for preparing a display substrate, characterized in that: include: forming a plurality of sub-pixels on a substrate; The sub-pixel includes a light-emitting device, which includes a first electrode, a light-emitting functional layer, and a second electrode stacked in sequence along a direction away from the substrate; the light-emitting functional layer includes a first auxiliary layer and a light-emitting layer stacked in sequence along a direction away from the substrate, the first auxiliary layer has high carrier mobility, and the thickness of the first auxiliary layer is h; It also includes a pixel definition layer, the pixel definition layer is arranged on a side of the first electrode away from the substrate, a pixel opening defining the sub-pixel is arranged in the pixel definition layer, the pixel opening exposes at least a portion of the surface of the first electrode, and the minimum distance between the outer contours of the orthographic projections of adjacent sub-pixels on the substrate is L; The thickness of the first auxiliary layer and the minimum distance between the outer contours of the orthographic projections of adjacent sub-pixels on the substrate satisfy the relationship: L / h>75.

Images