A data transmission method and receiving device for LED backlight display devices

Abstract

This invention discloses a data transmission method and receiving device for LED backlight display devices. The method includes: outputting a data frame, the data frame including at least a constant sequence, a device address, a register address, a number of data items, and display data; acquiring and analyzing the data frame; initiating data communication when the constant sequence is measured; enabling a specific differential data line based on the device address; and receiving the data frame from a slave device corresponding to the specific differential data line. Thus, by setting a constant sequence to enable a specific differential data line, in conjunction with the device address, the master control device can communicate only with the designated LED backlight display device in the current communication, providing high flexibility and avoiding bandwidth and power consumption waste. Furthermore, the master control device does not need to be wired independently for each slave device, significantly reducing the requirement for the number of differential interfaces on the master control device, greatly increasing redundancy margin, and effectively reducing equipment costs.

Description

Technical Field

[0001] This invention relates to the field of data transmission technology, and in particular to a data transmission method and receiving device for LED backlight display devices. Background Technology

[0002] For a long time, main control devices have primarily transmitted data to LED backlight display devices via SPI (Serial Peripheral Interface), I2C (Inter-Integrated Circuit), or parallel interfaces. These transmission schemes all employ traditional single-ended transmission methods, suitable for short-distance wired transmission within a one-meter range. However, with the rapid development of LED backlight display devices in terms of panel specifications, resolution, and refresh rates, these transmission schemes have further exposed their limitations, such as low bandwidth and difficulty in adapting to high-resolution / high-refresh-rate LED backlight display devices. Furthermore, parallel interfaces involve multiple wires, and the data transmission process requires strict constraints on data timing to avoid out-of-order transmission, increasing the implementation difficulty and cost on the hardware side.

[0003] Therefore, the existing Mini-LVDS (Mini LowVoltage Differential Signaling) technology, which uses one or more pairs of differential data lines to transmit data, has good low power consumption and anti-interference performance, as well as high bandwidth. As a result, it is widely used for data transmission between various terminal devices and LED backlight display devices.

[0004] However, Mini-LVDS is still in the process of iterative improvement and currently has the following shortcomings: 1. During data transmission, differential data lines can only communicate with a fixed number of pairs, resulting in wasted bandwidth and power consumption when the amount of data transmitted is small; 2. It is impossible to specifically enable specific differential data lines or specify the data flow of each pair of differential data lines. Data transmission can only be performed in a pre-allocated communication mode. When the amount of data is large, time-division transmission may be required, followed by data alignment; 3. Existing Mini-LVDS is mostly used for point-to-point connections, with a one-to-one correspondence between the differential interfaces on the master device and the differential interfaces on the slave device. It does not support connecting multiple slave devices to a single differential interface on the master device, which places high demands on the number of differential interfaces on the master device, making it difficult to balance device scale and device cost. Summary of the Invention

[0005] The first aspect of this invention discloses a data transmission method for an LED backlight display device, specifically including:

[0006] Output a data frame, the data frame including at least a constant sequence, device address, register address, number of data items and display data;

[0007] Acquire and analyze data frames;

[0008] When a constant sequence is detected in the data frame, data communication is initiated.

[0009] Based on the device address in the data frame, select the slave device that the master device needs to connect to in this communication;

[0010] The device receives data frames.

[0011] In a preferred embodiment, the constant sequence is used to identify the operating state of the differential data line transmitting this data frame;

[0012] The device address includes a broadcast mode and a one-way mode. The broadcast mode is used to communicate data with all slave devices, and the one-way mode is used to communicate data with a slave device at a specific address.

[0013] The register address is used to identify the starting register address accessed by the current data transmission;

[0014] The number of data items is used to identify the number of display data items transmitted in the current data frame. If the number of display data items is i, then the display data is represented as: Data_i (i = 0, 1, 2, ..., i-1).

[0015] In a preferred embodiment, when multiple pairs of differential data lines are used for data communication, the constant sequence, device address and register address contained in the data frames transmitted by each pair of differential data lines are the same.

[0016] A second aspect of the present invention discloses a receiving device, comprising:

[0017] A receiving module, corresponding one-to-one with each pair of differential data lines, is used to convert serially input data frames into parallel data;

[0018] A multiplexer electrically connected to each receiving module is used to sequentially receive display data from the data frame;

[0019] The first-in-first-out queue is used to relay the multiplexer and the external data processing module, and to output the sequentially input parallel data in sequence.

[0020] In a preferred embodiment, each of the receiving modules includes a sequence detector, a shift register, and a finite state machine;

[0021] The sequence detector is used to detect constant sequences in the data frame. When the sequence detector detects the presence of a constant sequence in the data frame, the shift register and the finite state machine are activated, and the sequence detector goes into sleep mode.

[0022] Furthermore, when the sequence detector fails to detect a constant sequence, the shift register and the finite state machine go into sleep mode.

[0023] As a preferred implementation, based on the data volume and bandwidth requirements of the current data communication, a specific logarithmic number of differential data lines is enabled to perform data communication;

[0024] In addition, constant sequences are not transmitted on unused differential data lines.

[0025] In a preferred embodiment, the shift register is used to convert the register addresses contained in the data frame into a parallel format and outputs them as a reg_addr signal as the starting address for writing to the register;

[0026] Additionally, the displayed data is converted to a parallel format and output as the wr_data signal.

[0027] In a preferred embodiment, when the receiving module receives the device address, the finite state machine pulls the level of the pair_vld signal high, and outputs a wr_data_rdy pulse signal indicating that the data is valid when each display data is received;

[0028] Additionally, when the current data frame transmission is complete, the level of the pair_vld signal is pulled low.

[0029] In a preferred embodiment, when the external data processing module detects the rising edge of the pair_vld signal pulled high by the finite state machine, the reg_addr signal is latched into the external data processing module as the starting address for writing the register;

[0030] In addition, each time a piece of display data is read from the first-in-first-out queue, the external data processing module incrementally updates the reg_addr signal in the write register.

[0031] In a preferred embodiment, the receiving device performs overall timing control based on the finite state machine, which includes at least 5 operating states, corresponding to the undetected constant sequence, the receiving device address, the receiving register address, the number of data being received, and the receiving display data.

[0032] A third aspect of this invention discloses a master control device, comprising:

[0033] Memory containing executable program code;

[0034] A processor coupled to the memory;

[0035] The processor calls the executable program code stored in the memory to execute a data transmission method for an LED backlight display device disclosed in the first aspect of the present invention.

[0036] Compared with the prior art, the embodiments of the present invention have the following beneficial effects:

[0037] In this embodiment of the invention, by setting a constant sequence for data frames, specific differential data lines can be enabled. Combined with the device address, this allows the master control device to communicate only with the LED backlight display device corresponding to the specified device address in each independent communication process. This provides high flexibility and avoids bandwidth and power consumption waste. Furthermore, the device address ensures that display data is transmitted to a specific slave device, eliminating the need for independent wiring from different differential interfaces on the master control device. This significantly reduces the requirement for the number of differential interfaces on the master control device, greatly increasing redundancy and effectively reducing equipment costs. Attached Figure Description

[0038] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0039] Figure 1 This is a schematic flowchart of a data transmission method for an LED backlight display device disclosed in an embodiment of the present invention;

[0040] Figure 2 This is a schematic diagram of the structure for transmitting data frames using multiple pairs of differential data lines, as disclosed in an embodiment of the present invention.

[0041] Figure 3 This is a schematic diagram of the structure of a receiving device disclosed in an embodiment of the present invention;

[0042] Figure 4 This is a schematic diagram of the structure of a receiving module in a receiving device disclosed in an embodiment of the present invention;

[0043] Figure 5 This is a timing diagram of a data frame transmission using four pairs of differential data lines disclosed in an embodiment of the present invention. Detailed Implementation

[0044] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0045] It should be noted that the terms "first," "second," "third," "fourth," etc., in the specification and claims of this invention are used to distinguish different objects, not to describe a specific order. The terms "comprising" and "having," and any variations thereof, in the embodiments of this invention are intended to cover non-exclusive inclusion. For example, a process, method, system, product, or device that includes a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to these processes, methods, products, or devices.

[0046] Example 1

[0047] Please see Figures 1-2 ,like Figure 1 As shown in the figure, a data transmission method for an LED backlight display device disclosed in an embodiment of the present invention includes the following steps:

[0048] 101. Output data frame.

[0049] In typical application scenarios, the main control device outputs display data to the LED backlight display device via signal cables, and the LED backlight display device adjusts the color and brightness of each LED string accordingly to achieve image output.

[0050] In this embodiment, the display data and the frame header are combined into a data frame, which is then transmitted from the main control device to the LED backlight display device through several pairs of differential data lines.

[0051] Specifically, a data frame includes at least a constant sequence Header, a device address DevAddr, a register address RegAddr, a data count DataNum, and display data.

[0052] In this embodiment, the constant sequence Header is used to identify the operating status of the differential data line transmitting this data frame.

[0053] As an optional implementation, the differential data line is activated only when a constant sequence header is present in the data frame.

[0054] As can be seen, the constant sequence header serves as a handshake signal to initiate data communication. The master device can construct data frames with or without the constant sequence header and output them to different differential data lines. Only differential data lines with the constant sequence header in the transmitted data frame are enabled, allowing selection of a specific pair of differential data lines for data communication among multiple pairs. Therefore, when the data load is low, it is not necessary to use all differential data lines; only a portion of the differential data lines and their corresponding receiving devices are needed to complete data communication, effectively reducing power consumption during long-term, high-frequency transmission tasks. When the data load is high, redundant differential data lines can be enabled, avoiding bandwidth waste.

[0055] In this embodiment, the register address RegAddr is used to identify the starting register address accessed by the current data transmission.

[0056] Specifically, in scenarios with multiple pairs of differential data lines, after the display data is output separately, it is necessary to collect the data before sending it to the LED backlight display device to drive the LED light string. Therefore, it is necessary to determine the starting register address RegAddr during the data collection process so as to read and collect the data according to the transmission order and avoid display data being out of order.

[0057] In this embodiment, the number of data items, DataNum, is used to identify the number of display data items transmitted in the current data frame. If the number of display data items is i, then the display data is represented as: Data_i (i = 0, 1, 2, ..., i-1).

[0058] Specifically, data frames transmitted via different differential data lines can be as follows: Figure 2 Characterize it.

[0059] In this embodiment, when multiple pairs of differential data lines are enabled for data communication, the constant sequence, device address and register address contained in the data frames transmitted by each pair of differential data lines are the same.

[0060] Understandably, in a single data transmission process, the master control device establishes a data link with a single LED backlight display device only based on the device address DevAddr. Under this premise, the constant sequence Header, the device address DevAddr, and the register address RegAddr remain consistent to ensure that the display data is accessed sequentially in the register.

[0061] 102. Acquire and analyze data frames.

[0062] In this embodiment, the constant sequence Header and device address DevAddr in the data frame are obtained and analyzed to determine whether the data to be displayed needs to be received.

[0063] 103. When a constant sequence is detected in the data frame, data communication is initiated.

[0064] In this embodiment, the constant sequence Header is a handshake signal. When the constant sequence Header is detected in the data frame, the main control device and the LED backlight display device achieve data connection and start data communication.

[0065] 104. Based on the device address in the data frame, select the slave device that the master device needs to connect to in this communication.

[0066] In this embodiment, the device address DevAddr is used to declare the specific LED backlight display device that the master control device needs to connect to in this data communication. Only the specific LED backlight display device corresponding to the device address DevAddr can receive display data from the master control device.

[0067] In this embodiment, the device address DevAddr includes a broadcast mode and a one-way mode. The broadcast mode is used to communicate data with all slave devices, while the one-way mode is used to communicate data with a slave device at a specific address.

[0068] It is understandable that in the above-mentioned scenario with multiple pairs of differential data lines, a single main control device can connect to multiple LED backlight display devices at the same time.

[0069] As an optional implementation, if each LED backlight display device is used to display the same synchronized image, the device address DevAddr can be broadcast. In this case, the device address DevAddr does not need to carry the device code of each LED backlight display device. The master control device communicates with each LED backlight display device in the communication link.

[0070] As another optional implementation, if the images displayed by different LED backlight display devices are different, the main control device needs to adopt a single transmission mode. In this case, the device address DevAddr carries a specific device code. During a single data transmission, the main control device only communicates with the corresponding LED backlight display device to ensure that the specific display data is transmitted to the corresponding LED backlight display device for display.

[0071] As can be seen, when the main control device is connected to multiple LED backlight display devices at the same time, by setting the constant sequence Header of the data frame and the device address DevAddr, the main control device can communicate with the LED backlight display device corresponding to the device address DevAddr only in each independent communication process.

[0072] Furthermore, by alternating the device address DevAddr during different data communication processes, display data can be transmitted to different LED backlight display devices in a time-sharing and batch-based manner in a "one master, multiple slave" scenario where the master control device is simultaneously connected to multiple LED backlight display devices, providing high flexibility.

[0073] Furthermore, by setting the device address DevAddr to ensure directional transmission of display data, the master control device can use one or more differential data lines in a "one master, multiple slaves" scenario, without having to draw independent differential data lines from different differential interfaces on the master control device to connect to each slave device. This significantly reduces the requirement for the number of differential interfaces on the master control device, greatly increases redundancy margin, and effectively reduces equipment costs.

[0074] Here, assuming there is a large display panel composed of multiple LED backlight display devices, the main control device can be connected via a one-to-many differential data line. By alternately changing the device address DevAddr during data communication, display data is transmitted to each LED backlight display device in a time-division manner. Under high-frequency transmission, a visual effect of synchronous and smooth playback of each LED backlight display device can be obtained without configuring an independent main control device for each LED backlight display device, thus reducing equipment costs and eliminating the signal synchronization problem that exists with multiple main control devices.

[0075] 105. Receive data frames from the device.

[0076] In this embodiment, after the master device and the specific slave device have established a data transmission channel, the display data is transmitted to the specific slave device via a specific differential data line.

[0077] Therefore, the master device does not need to connect a differential data line separately for each slave device, but instead uses the device address DevAddr to achieve slave device authentication and communication.

[0078] In summary, by setting a constant sequence header for the data frame, specific differential data lines can be enabled. Combined with the device address DevAddr, this allows the master device to communicate only with the LED backlight display device corresponding to the DevAddr in each independent communication process. This provides high flexibility and avoids bandwidth and power waste. Furthermore, the DevAddr ensures that display data is transmitted to a specific slave device, eliminating the need for independent wiring from different differential interfaces on the master device. This significantly reduces the requirement for a large number of differential interfaces on the master device, greatly increasing redundancy and effectively reducing equipment costs.

[0079] Example 2

[0080] Please see Figures 3-5 .like Figure 3As shown, the receiving device may include:

[0081] A receiving module, corresponding one-to-one with each pair of differential data lines, is used to convert serially input data frames into parallel data;

[0082] A multiplexer electrically connected to each receiving module is used to sequentially receive display data from the data frame;

[0083] The first-in-first-out queue is used to relay the multiplexer and the external data processing module, and outputs the parallel data that is input sequentially in sequence.

[0084] like Figure 4 As shown, in this embodiment, each receiving module includes a sequence detector, a shift register, and a finite state machine;

[0085] The sequence detector is used to detect constant sequences in the data frame. When the sequence detector detects the presence of a constant sequence in the data frame, it activates the shift register and the finite state machine, while the sequence detector goes into sleep mode.

[0086] Additionally, when the sequence detector fails to detect a constant sequence, the shift register and finite state machine go to sleep.

[0087] Specifically, the sequence detector is used to detect whether its corresponding differential data line is input with a constant sequence header, and after the constant sequence header is detected, it activates the shift register and finite state machine to receive the data frame and the display data it contains.

[0088] That is, if the sequence detector fails to detect the constant sequence Header, the corresponding differential data line will not be enabled, and other functional modules in the corresponding receiving device will not be activated.

[0089] In other words, the master device can selectively send a constant sequence header to specific differential data lines to enable those lines. This allows for flexible adjustment of the number of enabled differential data lines based on actual traffic load, reducing power consumption and improving bandwidth utilization. Alternatively, it can enable differential data lines corresponding to specific slave devices to achieve targeted transmission to those slave devices.

[0090] As an optional implementation, based on the data volume and bandwidth requirements of the current data communication, a specific number of differential data lines are enabled to perform data communication;

[0091] In addition, constant sequences are not transmitted on unused differential data lines.

[0092] As can be seen, when the master control device is connected to different slave devices via multiple lines, the constant sequence header setting provides diverse transmission modes and control schemes. When the traffic load is low, only some differential data lines can be used, while redundant differential data lines can be used when the traffic load is high, thereby improving bandwidth utilization and reducing device power consumption.

[0093] As an alternative implementation, the sequence checker will automatically go into sleep mode while the shift register and finite state machine are activated.

[0094] Understandably, after the sequence detector detects the constant sequence header, the shift register will receive the display data contained in this data communication. If the value of the display data is equal to the value of the constant sequence header at this time, the display data will falsely trigger the sequence detector, thereby generating two activation signals in a single data communication, affecting the normal operation of the shift register and the finite state machine, and causing the buffer sequence and display data to be disordered.

[0095] Therefore, the sequence detector will immediately go into sleep mode after measuring the constant sequence header to avoid the above situation. It will not be activated again until the shift register has finished receiving and displaying the data and the data communication ends.

[0096] As an optional implementation, the shift register is used to convert the register addresses contained in the data frame into a parallel format and output them as the reg_addr signal, which serves as the starting address for writing to the register.

[0097] Additionally, the displayed data is converted to a parallel format and output as the wr_data signal.

[0098] Here, the multiplexer sorts the wr_data signals generated by each receiving module according to the number of each receiving module, and the parallel format wr_data signals are written into the first-in-first-out queue according to the number order of the receiving modules.

[0099] As an optional implementation, when the receiving module receives the device address, the finite state machine pulls the level of the pair_vld signal high, and outputs a wr_data_rdy pulse signal indicating that the data is valid when each display data is received;

[0100] Additionally, when the current data frame transmission is complete, the level of the pair_vld signal is pulled low.

[0101] Here, the finite state machine adjusts the level of the pair_vld signal to output the reception and access status of display data to the external data processing module, so that the external data processing module can cooperate to perform display data reading.

[0102] As an optional implementation, when the external data processing module detects the rising edge of the pair_vld signal pulled high by the finite state machine, the reg_addr signal is latched into the external data processing module as the starting address for writing to the register;

[0103] Additionally, each time a piece of display data is read from the first-in-first-out queue, the external data processing module incrementally updates the reg_addr signal in the write register.

[0104] Specifically, the external data processing module will also trigger incremental updates of its internal write register for the read operation of display data. Thus, the external data processing module reads and writes the display data sequentially, which can read the display data transmitted through multiple pairs of differential data lines in sequence and avoid out-of-order reading.

[0105] Here, assuming that the main control device uses 4 pairs of differential data lines in this data communication and transmits in single-transmission mode, then each data frame can be as follows: Figure 5 Characterize it.

[0106] During data communication, after each receiving module completes the reception of one data segment, it generates four wr_data_rdy pulse signals indicating valid data and inputs them to the multiplexer, such as... Figure 5 As shown, the multiplexer assigns 0-beat, 1-beat, 2-beat, and 3-beat delays to the four wr_data_rdy pulse signals, respectively, denoted as data_rdy0_dd0, data_rdy1_dd1, data_rdy2_dd2, and data_rdy3_dd3. Thus, when data_rdy0_dd0 is high, the display data received by its corresponding differential data line is written into the first-in-first-out queue. When data_rdy1_dd1 is high, the display data received by its corresponding differential data line is written into the first-in-first-out queue, and so on. The display data of each pair of differential data lines will be written into the first-in-first-out queue in sequence.

[0107] Subsequently, each receiving module continues to receive the next display data and performs the above sorting and writing operation via a multiplexer until each receiving module has finished receiving the display data for the DataNum quantity, at which point the data communication ends.

[0108] In this embodiment, the receiving device performs overall timing control based on a finite state machine, which includes at least 5 working states, corresponding to the unmeasured constant sequence Header, the receiving device address DevAddr, the receiving register address RegAddr, the number of data being received DataNum, and the receiving display data.

[0109] Specifically, the transition conditions for the above working states are as follows:

[0110] (a) The constant sequence Header was not measured;

[0111] (b) Measure the constant sequence Header and start receiving the device address DevAddr;

[0112] (c) Receiving device address DevAddr;

[0113] (d) After receiving the device address DevAddr, start receiving the register address RegAddr;

[0114] (e) Receiving register address RegAddr;

[0115] (f) After the register address RegAddr has been received, start receiving the number of data items DataNum;

[0116] (g) The number of data being received, DataNum;

[0117] (h) Once the DataNum data has been received, begin receiving and displaying data;

[0118] (i) Receiving display data;

[0119] (j) DataNum data have been received.

[0120] Thus, in the above cycle, the display data transmitted synchronously through each differential data line is read by the receiving module and written sequentially into the first-in-first-out queue under the timing control of the multiplexer. The external data processing module reads the display data sequentially according to the order in the first-in-first-out queue to realize image output.

[0121] Those skilled in the art will understand that all or part of the steps in the various methods of the above embodiments can be implemented by a program instructing related hardware. The program can be stored in a computer-readable storage medium, including read-only memory (ROM), random access memory (RAM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), one-time programmable read-only memory (OTPROM), electrically-Erasable Programmable Read-Only Memory (EEPROM), compact disc read-only memory (CD-ROM) or other optical disc storage, disk storage, magnetic tape storage, or any other computer-readable medium capable of carrying or storing data.

[0122] The foregoing has provided a detailed description of a data transmission method and receiving device for an LED backlight display device disclosed in the embodiments of the present invention. Specific examples have been used to illustrate the principles and implementation methods of the present invention. The descriptions of the above embodiments are only for the purpose of helping to understand the method and core ideas of the present invention. At the same time, for those skilled in the art, there will be changes in the specific implementation methods and application scope based on the ideas of the present invention. Therefore, the content of this specification should not be construed as a limitation of the present invention.

Claims

1. A data transmission method for an LED backlight display device, characterized in that, The method includes: Output a data frame, the data frame including at least a constant sequence, device address, register address, number of data items and display data; Acquire and analyze data frames; When a constant sequence is detected in the data frame, data communication is initiated. Based on the device address in the data frame, select the slave device that the master device needs to connect to in this communication; The data frame is received from the device; The sequence detector is used to detect constant sequences in the data frame. When the sequence detector detects the presence of a constant sequence in the data frame, it activates the shift register and the finite state machine, and the sequence detector goes into sleep mode. Additionally, when the sequence detector fails to detect a constant sequence, the shift register and finite state machine go to sleep. After the sequence detector measures the constant sequence, the shift register will receive the display data contained in this data communication; The receiving device performs overall timing control based on a finite state machine, which includes at least 5 operating states, corresponding to the unmeasured constant sequence Header, the receiving device address DevAddr, the receiving register address RegAddr, the number of data being received DataNum, and the receiving display data.

2. The data transmission method for an LED backlight display device according to claim 1, characterized in that, include: The constant sequence is used to identify the operating status of the differential data line transmitting this data frame; The device address includes a broadcast mode and a one-way mode. The broadcast mode is used to communicate data with all slave devices, and the one-way mode is used to communicate data with a slave device at a specific address. The register address is used to identify the starting register address accessed by the current data transmission; The number of data items is used to identify the number of display data items transmitted in the current data frame. If the number of display data items is i, then the display data is represented as: Data_i (i=0,1,2,...,i-1).

3. The data transmission method for an LED backlight display device according to claim 1, characterized in that, include: When multiple pairs of differential data lines are used for data communication, the constant sequence, device address and register address contained in the data frames transmitted by each pair of differential data lines are the same.

4. A receiving device employing the data transmission method for an LED backlight display device according to any one of claims 1 to 3, characterized in that, The receiving device includes: A receiving module, corresponding one-to-one with each pair of differential data lines, is used to convert serially input data frames into parallel data; A multiplexer electrically connected to each receiving module is used to sequentially receive display data from the data frame; The first-in-first-out queue is used to relay the multiplexer and the external data processing module, and to output the sequentially input parallel data in sequence.

5. A receiving device according to claim 4, characterized in that, include: Each of the receiving modules includes a sequence detector, a shift register, and a finite state machine; The sequence detector is used to detect constant sequences in the data frame. When the sequence detector detects the presence of a constant sequence in the data frame, the shift register and the finite state machine are activated, and the sequence detector goes into sleep mode. Furthermore, when the sequence detector fails to detect a constant sequence, the shift register and the finite state machine go into sleep mode.

6. A receiving device according to claim 5, characterized in that, include: Based on the data volume and bandwidth requirements of the current data communication, a specific number of differential data lines are used to perform data communication; In addition, constant sequences are not transmitted on unused differential data lines.

7. A receiving device according to claim 5, characterized in that, include: The shift register is used to convert the register addresses contained in the data frame into parallel format and outputs them as the reg_addr signal, which serves as the starting address for writing to the register. Additionally, the displayed data is converted to a parallel format and output as the wr_data signal.

8. A receiving device according to claim 7, characterized in that, include: When the receiving module receives the device address, the finite state machine pulls the level of the pair_vld signal high, and outputs a wr_data_rdy pulse signal indicating that the data is valid when each display data is received; Additionally, when the current data frame transmission is complete, the level of the pair_vld signal is pulled low.

9. A receiving device according to claim 8, characterized in that, include: When the external data processing module detects the rising edge of the pair_vld signal pulled high by the finite state machine, it latches the reg_addr signal into the external data processing module as the starting address for writing to the register. In addition, each time a piece of display data is read from the first-in-first-out queue, the external data processing module incrementally updates the reg_addr signal in the write register.

10. A receiving device according to claim 8, characterized in that, include: The receiving device performs overall timing control based on the finite state machine, which includes at least 5 working states, corresponding to the undetected constant sequence, the receiving device address, the receiving register address, the number of data being received, and the receiving display data.

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