Transmission of time sensitive signals

Abstract

Implementations of the invention relate to a system for transmitting a time sensitive signal between an access point (AP) and a universal serial bus (USB) dongle device plugged into the AP. The AP is configured to generate a time sensitive signal and includes a modulator configured to obtain the TSS and two power voltages and to modulate the TSS using the two power voltages to generate a modulated TSS. The USB dongle device operates at the same frequency as the AP and includes a demodulator to demodulate the modulated TSS to obtain a demodulated TSS, wherein the modulated TSS is transmitted via a power supply pin at a USB interface of the AP and a power reception pin of the USB dongle device. In this way, the latency of the demodulated TSS relative to the original TSS can be low, fixed and measurable.

Description

Background Technology

[0001] Recently, an increasing number of different types of communication devices (e.g., Wi-Fi devices, Bluetooth devices, 4G and 5G devices) are located in the same place, such as in the same room. These co-located devices may be designed to operate on the same frequency, and therefore may interfere with each other.

[0002] With the development of communication technology, these different types of communication devices can also be designed to support Time-Sensitive Networking (TSN). In this case, Time-Sensitive Signals (TSS) need to be transmitted between these devices with the same operating frequency band, so that these devices can operate according to the TSS and meet the time requirements of the relevant TSN protocol. Attached Figure Description

[0003] When read in conjunction with the accompanying drawings, various implementations of this disclosure can be understood in light of the following specific embodiments. The various features are not drawn to scale according to standard industry practice. In fact, the dimensions of the various features can be arbitrarily increased or decreased for clarity of discussion. Some examples of this disclosure are described with reference to the following drawings.

[0004] Figure 1 This is a schematic diagram illustrating an example environment in which an example implementation of the present disclosure can be carried out;

[0005] Figure 2A This is a schematic diagram illustrating the connection between the modulator and demodulator according to an implementation of the present disclosure;

[0006] Figure 2B It is a schematic diagram illustrating the circuitry of a modulator and demodulator according to an implementation of the present disclosure;

[0007] Figure 3 This is a schematic diagram illustrating the time delay between the demodulated time-sensitive signal and the original time-sensitive signal according to an implementation of this disclosure;

[0008] Figure 4A This is a schematic diagram illustrating an example of an application scenario to which the implementation method of this disclosure is applicable;

[0009] Figure 4B This is a schematic diagram illustrating another example of an application scenario to which the implementation of this disclosure applies; and

[0010] Figure 5 This is a schematic diagram illustrating another example of an application scenario to which the implementation of this disclosure applies. Detailed Implementation

[0011] Time-Sensitive Networking (TSN) is a network protocol used to connect industrial equipment to ensure time synchronization and real-time performance for accurate and efficient control and monitoring in manufacturing, energy, and transportation. TSN optimizes network transmission and processing mechanisms to ensure fast, real-time, and accurate transmission of time-sensitive data (such as video, audio, and sensor data) across the network. It employs a range of technologies, including time synchronization, flow control, and priority scheduling, to achieve this. Wireless access points (APs) can support the TSN protocol for transmitting time-sensitive data in wireless environments.

[0012] In some scenarios, different types of communication devices (e.g., Wi-Fi devices, Bluetooth devices, fourth-generation (4G) communication devices, and fifth-generation (5G) communication devices) are located in the same place. For example, Universal Serial Bus (USB) dongle devices are typically plugged into the USB interface on an access point (AP) for extended functionality. A USB dongle device can be extended to function as a Bluetooth device, a Wi-Fi device, or even a microtransmitter base station (e.g., a 4G or 5G base station). Bluetooth devices typically operate at 2.4 GHz. Wi-Fi devices can operate at 2.4 GHz, 5 GHz, or 6 GHz. For example, a USB dongle device can be used as a USB-adapted radio frequency (RF) scanner or a USB-adapted ultra-wideband device.

[0013] In this scenario, the USB dongle device acts as the slave device, while the access point (AP) acts as the master device. If different communication devices need to support Time Sensitive Signals (TSS), then a time-sensitive signal (TSS) needs to be transmitted between the two communication systems (or two communication devices) with low latency without affecting other data transmissions. For example, the TSS can be used as a control signal from the master device to the slave device. Additionally, the TSS can be used as a time synchronization signal between the master and slave devices.

[0014] USB interfaces on an access point (AP) typically include Type A and Type B, both comprising four pins: a power pin (V+), a ground pin (GND), and two data pins (D+ and D-) for data transmission. Similarly, USB dongle devices include the same type of USB interface. Traditionally, the data pins D+ and D- are used to transfer data between the AP and the USB dongle device. The data pins D+ and D- on the AP's USB interface require a specific protocol to modulate the signal representing serial data. Then, the corresponding data pins D+ and D- on the USB dongle device's interface also require the same specific protocol to demodulate the signal. When using a specific protocol to modulate and demodulate the signal, extracting the Transmission Sequence (TSS) from the serial data transmitted via the data pins D+ and D- requires operation at the MAC layer or even higher. Therefore, the latency of TSS transmission is uncertain or variable, and can be quite high. Furthermore, the serial-to-parallel conversion time is also uncertain. Therefore, the serial data path including the data pins D+ and D- is unsuitable for transmitting TSS.

[0015] When the TSS is used as the control signal for a USB dongle device, according to the IEEE 802.11 standard, the transmission power-on ramp measurement verifies that the transmission power reaches 90% of the maximum power within a 2-microsecond envelope. According to the IEEE 802.11 standard, the transmission power-off ramp measurement verifies that the transmission power drops to 10% of the maximum power within a 2-microsecond envelope. The protocol standard requires that the transmission power-on ramp and power-off ramp not exceed 2 microseconds. This ensures that burst power is turned on / off at an appropriate rate. For LTE, according to the 3GPP TS36.104 standard, the rise and fall times should not exceed 17 microseconds. In time-division duplex mode, fast rise and fall times are required; therefore, the control signal of the USB dongle device is time-sensitive, ensuring fast data transmission and reception at the USB dongle device.

[0016] For example, in an implementation where the USB dongle device is a USB RF scanner and needs to notify the master device (e.g., an access point, where the USB RF scanner is plugged into the AP) of its real-time status, it is necessary to reduce the latency of control signal transmission from the AP to the USB RF scanner to achieve synchronization between the AP and the USB RF scanner. The USB RF scanner uses the rising or falling edge of the control signal to demodulate 1 and 0 digital signals. If a serial data path including data pins D+ and D- is used to modulate and demodulate the TSS-type control signal, it may alter the rising or falling slope or the amplitude of the TSS-type control signal, causing these TSS-type control signals to fail to meet the rising and falling edge timing requirements specified in the aforementioned communication standards. Therefore, using existing serial data paths to transmit TSS is not feasible.

[0017] Therefore, various implementations of this disclosure provide a scheme for transmitting time-sensitive signals between an access point (AP) and a USB dongle device plugged therein. The AP includes a modulator for modulating the time-sensitive signal (TSS) and two power voltages, and transmits the modulated TSS to the USB dongle device via a power pin. The USB dongle device includes a demodulator for demodulating the modulated TSS to obtain the original TSS. In the system for transmitting TSS according to this disclosure, the modulated TSS is transmitted and received via power pins on the USB interface of the AP and on the USB dongle device, respectively, and the modulated TSS signal is demodulated and extracted on the USB dongle device. Since the power pin is a physical component and located in the physical layer, signals can be transmitted in real time without the need for higher layers such as the Media Access Control (MAC) layer, transport layer, or application layer to participate in signal modulation and demodulation. Therefore, no special protocol is required, and the delay or latency of the demodulated TSS relative to the original TSS is fixed and low. Furthermore, the latency can also be measured, allowing it to be compensated for subsequent operations.

[0018] Figure 1 This is a schematic diagram illustrating an example environment in which an example implementation of this disclosure can be carried out. For example... Figure 1 As shown, system 100 includes an access point (AP) 101 and a USB dongle device 102 adapted to be directly plugged into a USB interface on the AP. In some implementations, the USB dongle device 102 may be a USB-adapted RF scanner or a USB-adapted ultra-wideband device. The USB dongle device 102 operates at the same operating frequency as the AP 101. Figure 1 As shown, the USB interface on the AP includes four pins: 1V+, 1D+, 1D-, and 1GND. The 1V+ pin is used for power supply, the 1D+ and 1D- pins are used to transmit serial data (e.g., differential signals), and the 1GND pin is used for grounding. Correspondingly, the USB interface on the USB dongle device also includes four corresponding pins: 2V+, 2D+, 2D-, and 2GND.

[0019] In some implementations, the AP may include a wireless transmitter that transmits a signal in response to a high level of the TSS and receives a signal in response to a low level of the TSS. The TSS may be generated by the AP's control unit to control the transmission and reception of the wireless transmitter. In this implementation, the USB dongle device may include a USB RF scanner, which can be disabled when the AP transmits a signal and enabled when the AP receives a signal and receives a low level of the TSS. Since close proximity between the AP and the USB RF scanner can easily cause channel congestion, the USB RF scanner needs to be disabled once the AP begins transmitting a signal to prevent receiving the transmitted signal from the AP. Additionally, after the AP receives a signal from another device, the USB RF scanner needs to be enabled so that it can also receive signals from other devices and diagnose the received signals to determine if they are network-attack signals, thereby protecting the TSN. Therefore, in the above application scenarios, the required fixed delay between the TSS signal generated by the AP and the TSS signal received by the USB dongle device is relatively small.

[0020] In another implementation, the AP includes a GNSS receiver capable of obtaining accurate time based on satellite signals. As a device in the TSN, the AP is required to be precisely time-synchronized with a USB dongle device connected to it, preferably in the sub-microsecond range, i.e., less than 1 microsecond.

[0021] like Figure 1 As shown, AP 101 includes a modulator 111 for acquiring a Time-Sensitive Signal (TSS) and two power voltages VCC1 and VCC2. The first power voltage VCC1 may be generated by a first power supply 112, while the second power voltage VCC2 may be generated by a second power supply 113. Modulator 111 is configured to modulate the TSS and the two power voltages VCC1 and VCC2 to produce a modulated TSS. Then, when a USB dongle device 102 is plugged into AP 101, the modulated TSS is transmitted from the 1V+ pin to the 2V+ pin, where the 1V+ pin is an example of a power supply pin and the 2V+ pin is an example of a power receive pin. In some implementations, the TSS may be a sawtooth wave comprising both a first level and a second level. In some implementations, the first level may be high and the second level may be low. In this case, the modulated TSS is a sawtooth wave comprising alternating first power voltage VCC1 and second power voltage VCC2. In some implementations, the first power voltage may be higher than the second power voltage.

[0022] like Figure 1As shown, the USB dongle device 102 includes a demodulator 121 that demodulates the modulated TSS to obtain the original TSS. The demodulated TSS is transmitted to a system-on-chip (SoC) 123 as a control signal for the SoC 123, which then processes the data based on the TSS. As can be seen from the above description, the modulated TSS is transmitted from the modulator 111 to the demodulator 121 via the AP and the power pins on the USB dongle device.

[0023] like Figure 1 As shown, a power regulator 122 is provided on the USB dongle device 102 and is configured to receive a modulated TSS signal. Since the modulated TSS signal includes alternating first power voltage VCC1 and second power voltage VCC2, the power regulator 122 can regulate the alternating voltage to a constant voltage, which can then be supplied to the SoC 123 to power it. In other words, the power regulator 122 can adjust the voltage supplied to the SoC 123 to stabilize the power supply voltage of the SoC 123, ensuring that the SoC 123 can function properly. In some implementations, the power regulator 122 can be, for example, a low-dropout linear regulator (LDO). In another implementation, the power regulator 122 can be, for example, a DC-DC converter. Neither a low-dropout linear regulator nor a DC-DC converter affects the accuracy and ripple of its output power. The input voltage range of the power regulator 122 can be wide. For example, power regulator 122 is capable of stabilizing high (e.g., 5.1V) and low (e.g., 4.9V) levels to a stable voltage of 5V and supplying 5V of power to SoC 123.

[0024] In the system 100 of this disclosure, the power pin used for transmitting the TSS is a physical component, and the modulator and demodulator used for respectively modulating and demodulating the signals are also physical components. This ensures that the transmission, modulation, and demodulation of the signals do not involve the Media Access Control (MAC) layer or higher layers (e.g., network layer, transport layer, application layer, etc.), but only the lowest physical layer (e.g., via the power pin). Therefore, they are not limited by any specific protocol, and no time delay caused by the MAC layer or even higher layers (e.g., software) is introduced in the process. Consequently, the delay of the demodulated TSS relative to the original TSS is fixed, low, and even measurable, and is compensated for in subsequent operations. Compared to transmitting the TSS signal via a serial data path, the system according to this disclosure, by transmitting the TSS via the power pin, can obtain a demodulated TSS with fixed and low delay.

[0025] Figure 2A This is a schematic diagram illustrating the connection between the modulator and demodulator according to an implementation of the present disclosure. Modulator 211 corresponds to... Figure 1 The modulator 111 and demodulator 221 correspond to Figure 1 The demodulator 121, the first power supply 212 corresponds to Figure 1 The first power supply 112 and the second power supply 213 correspond to Figure 1 The second power supply 113.

[0026] like Figure 2A As shown, modulator 211 includes a first circuit and a second circuit. The first circuit is adapted to receive TSS and a first power voltage VCC1 of two power voltages, and is configured to provide the first power voltage VCC1 to the power supply pin 1V+ when TSS is at a first level, for example, at a high level. The second circuit is adapted to receive TSS and a second power voltage VCC2 of two power voltages, and is configured to provide the second power voltage VCC2 to the power supply pin 1V+ when TSS is at a second level (for example, at a low level).

[0027] Therefore, the modulated TSS includes alternating voltages VCC1 and VCC2 corresponding to the first and second levels of the original TSS, respectively. That is, since voltage VCC1 follows the first level and voltage VCC2 follows the second level, the modulated TSS has the same period or frequency as the original TSS. The modulated TSS is supplied to the power supply pin 1V+, and then supplied to the power receive pin 2V+ via a physical connection between the two pins. Figure 2A As shown, a demodulator 221 is provided to receive a modulated TSS at one of its inputs and a Vref at its other input, with the Vref located between VCC1 and VCC2.

[0028] In some implementations, the input voltage range of 4.75V to 5.25V conforms to the USB 2.0 standard. VCC1 can be 4.9V, VCC2 can be 5.1V, and Vref can be 5V. In this implementation, the modulated TSS signal has a high level of 5.1V and a low level of 4.9V, enabling high-low voltage switching at the power supply pin 1V+ and the power receive pin 2V+.

[0029] like Figure 2AAs shown, demodulator 221 can be implemented using a comparator. Demodulator 221 is provided to receive the modulated TSS at one input and Vref at the other input, Vref being between VCC1 and VCC2. That is, one input of the comparator receives the modulated TSS (e.g., a sawtooth wave signal alternating between high and low voltages) from pin 2V+. The other input of the comparator receives a reference voltage Vref. In some implementations, Vref can be 5V; for example, the comparator outputs a low level when the voltage of the modulated TSS is below 5V (e.g., 4.9V) and a high level when the voltage of the modulated TSS is above 5V (e.g., 5.1V), thereby demodulating and extracting the original TSS. The 5V reference voltage threshold of the comparator has sufficient margin for demodulating both high and low levels.

[0030] like Figure 2A As shown, the first circuit includes a first switch 21 and a first switch control unit 22. The first switch 21 is electrically connected between a first power supply 212 and a power supply pin 1V+. The first switch control unit 22 is connected to the first switch 21 to control it. When TSS is at a first level (e.g., high level), the first switch control unit 22 can receive TSS and control the first switch 21 to turn on to provide a first power voltage VCC1 to the power supply pin 1V+. That is, when TSS is at a second level (e.g., low level), the first switch control unit 22 can control the first switch 21 to turn off, so that the first power voltage VCC1 is not supplied to the power supply pin 1V+.

[0031] like Figure 2A As shown, the second circuit includes a second switch 23 and a second switch control unit 24. The second switch 23 is electrically connected between the second power supply 213 and the power supply pin 1V+. The second switch control unit 24 is connected to the second switch 23 to control it. When TSS is at a second level (e.g., low level), the second switch control unit 24 can receive TSS and control the second switch 23 to turn on to provide a second power voltage VCC2 to the power supply pin 1V+. That is, when TSS is at a first level (e.g., high level), the second switch control unit 24 can control the second switch 23 to turn off, so that the second power voltage VCC2 is not supplied to the power supply pin 1V+.

[0032] It should be understood that any circuit that can achieve the functions mentioned above (i.e., supplying a first power voltage to the power supply pin when the TSS is at the first level, and supplying a second power voltage to the power supply pin when the TSS is at the second level) falls within the protection scope of this disclosure. In the following, references are made to... Figure 2B The detailed structures of the first and second circuits are described.

[0033] Figure 2B This is a schematic diagram illustrating the circuitry of a modulator and demodulator according to an implementation of this disclosure. Figure 2B As shown, the first switch 21 is a P-channel metal-oxide-semiconductor (i.e., PMOS1), the first switch control unit 22 includes a first resistor R1, a second resistor R2, and an N-channel metal-oxide-semiconductor (i.e., NMOS1); the second switch 23 is a PMOS2, and the second switch control unit 24 includes a third resistor R3, a fourth resistor R4, NMOS2, and an inverter. Figure 2B As shown, for the first switch 21, the gate of PMOS1 is connected between the first resistor R1 and the second resistor R2, the source of PMOS1 is connected to the first power supply 212, and the drain of PMOS1 is connected to the power supply pin 1V+. Figure 2B As shown, for the second switch 23, the gate of PMOS2 is connected between the third resistor R3 and the fourth resistor R4, the source of PMOS2 is connected to the second power supply 213, and the drain of PMOS2 is connected to the power supply pin 1V+.

[0034] like Figure 2B As shown, for the first switch control unit 22, a first resistor R1, a second resistor R2, and an NMOS1 are connected in series between the first power supply 212 and ground. The gate of the NMOS1 receives TSS, the drain of the NMOS1 is connected to the second resistor R2, and the source of the NMOS1 is connected to ground. When TSS is high, the NMOS1 is turned on, so current flows through the first resistor R1 and the second resistor R2. At this time, the voltage VCC1 at the source of the PMOS1 is higher than the voltage at the gate of the PMOS1, which is the voltage at the point between the first resistor R1 and the second resistor R2. Therefore, the PMOS1 is turned on to provide the first power voltage VCC1 to the power supply pin 1V+. When TSS is low, the NMOS1 is turned off, causing the PMOS1 to also turn off, and then the first power voltage VCC1 can be stopped from being supplied to the power supply pin 1V+.

[0035] like Figure 2B As shown, for the second switch control unit 22, the third resistor R3, the fourth resistor R4, and NMOS2 are connected in series between the second power supply 213 and ground. The gate of NMOS2 receives TSS, the drain of NMOS2 is connected to the third resistor R3, and the source of NMOS2 is connected to ground. Figure 2BAs shown, inverter 214 is connected between the TSS signal source and the gate of NMOS2. When TSS is high, the gate of NMOS2 receives a low level due to inverter 214 and is turned off, causing PMOS2 to also turn off, thus preventing the supply of the second power voltage VCC2 to the power supply pin 1V+. When TSS is low, the gate of NMOS2 receives a high level due to inverter 214 and is turned on, allowing current to flow through the third resistor R3 and the fourth resistor R4. At this time, the voltage VCC2 at the source of PMOS2 is higher than the voltage at the gate of PMOS2, which is the voltage at the point between the third resistor R3 and the fourth resistor R4. Therefore, PMOS2 is turned on to supply the second power voltage VCC2 to the power supply pin 1V+.

[0036] In the system for transmitting TSS according to this disclosure, modulated TSS is transmitted and received via power pins of the USB interface on the AP and power pins on the USB dongle device, respectively, and the modulated TSS signal is demodulated and extracted on the USB dongle device. Since the power pin is a physical component, it resides in the physical layer, where signals can be transmitted in real time without the need for higher layers such as the MAC layer, transport layer, or application layer to participate in signal modulation and demodulation. Therefore, the modulation of TSS by the modulator, the transmission of the modulated TSS via the power pin, and the demodulation of the modulated TSS by the demodulator are all implemented through physical components, and no special protocol is required for transmitting, modulating, and demodulating signals. Therefore, the delay of the demodulated TSS relative to the original TSS is fixed, low, and measurable.

[0037] like Figure 3 As shown, the delay d1 between the demodulated TSS from the demodulator and the original TSS input from the modulator can be measured. This delay can be compensated for in subsequent applications and processing. Figure 3 As shown, in one example, the latency is approximately 100 ns, which is much less than the 2 microseconds or 17 microseconds specified in the protocol, and the demodulated TSS can be used in the time-sensitive network described above, enabling the USB dongle device to be essentially synchronized with the AP.

[0038] Figure 4A This is a schematic diagram illustrating an application scenario applicable to the implementation method of this disclosure, and Figure 4BThis is a schematic diagram illustrating another example of an application scenario to which the implementation of this disclosure applies. In these examples, AP 401 may include a wireless transmitter, and USB dongle device 402 may include a USB RF scanner. The USB RF scanner is plugged into the wireless transmitter, and the wireless transmitter and USB RF scanner operate in the same frequency band, such as the same 5.5 GHz frequency. When the wireless transmitter transmits a signal at the 5.5 GHz frequency or channel, TSS goes high, causing the USB RF scanner to stop operating and unable to receive signals from the same frequency band or channel; that is, it does not receive signals from the wireless transmitter closest to the USB RF scanner, thus preventing scanner congestion. In other words, when the wireless transmitter transmits a signal, the USB RF scanner does not receive signals from adjacent wireless transmitters to avoid congestion.

[0039] In another implementation, the USB RF scanner can be adapted to receive signals from other devices, rather than the wireless transmitter, at a frequency or channel of 5.5 GHz, and analyze these signals to determine if they constitute an attack signal intruding into the network, thus enabling network protection. In other words, the USB RF scanner can receive signals from remote devices in the same frequency band or channel to analyze whether the received signals are intrusive. When the wireless transmitter receives signals at a frequency or channel of 5.5 GHz, the TSS goes low, allowing the USB RF scanner to operate and receive signals in the same frequency band or channel from other devices, rather than the wireless transmitter. That is, both the wireless transmitter and the USB RF scanner can receive signals in the same frequency band or channel from other devices, and the USB RF scanner can identify whether the received signals are attack signals.

[0040] According to the disclosed system, the TSS (Transmission Signal Set) can be transmitted from the AP (Access Point) to the USB RF scanner with very low latency. This allows a high level of the TSS to promptly disable the USB RF scanner, preventing channel congestion once a nearby AP begins transmitting signals, as the USB RF scanner immediately stops receiving signals from that AP. Conversely, a low level of the TSS promptly enables the USB RF scanner, allowing it to immediately receive signals from other devices after a nearby AP begins receiving signals, analyze them, and determine whether these signals are malicious, thus protecting the network in a timely manner.

[0041] Figure 5This is a schematic diagram illustrating another example of an application scenario to which the implementation of this disclosure applies. Recently, 5G and Wi-Fi 7 applications are driving the evolution of TSN networks from wired to wireless networks. Currently, time synchronization between wireless devices typically involves MAC or higher-level protocols, and commercial baseband chips help achieve accurate synchronization between APs and USB dongle devices within approximately 10 microseconds. This approximately 10-microsecond accuracy will limit many Wi-Fi 7 and TSN-related applications, which require accuracy of less than 1 microsecond.

[0042] like Figure 5 As shown, AP 501 is equipped with an outdoor-based Global Navigation Satellite System (GNSS) receiver (not shown) for positioning in Wi-Fi 6E products and IEEE 1588 to improve positioning accuracy. AP 501 with the GNSS receiver can be deployed in a strategic location with clear satellite visibility to acquire satellite signals from satellite 503. The GNSS receiver utilizes signals from a Global Navigation Satellite System such as GPS to determine its precise location and time. The GNSS receiver can then extract highly accurate time information from the acquired satellite signals and can share this precise time with a USB dongle device plugged into the AP. The USB dongle device 502 can then adjust its local clock based on the GNSS reference time.

[0043] According to the system of this disclosure, AP 501 can obtain the raw pulses per second (PPS) signal as TSS and generate a modulated signal based on the raw PPS signal using a modulator. AP 501 can then transmit the modulated signal to USB dongle device 502 via a power pin. Upon receiving the modulated signal, USB dongle device 502 can demodulate the received modulated signal and obtain the target PPS signal for time synchronization. In this way, wireless devices that cannot receive GPS signals (such as USB dongle devices) can synchronize their clocks with host wireless devices (such as APs) even without supporting the PTP protocol. Devices in networks supporting the 1588 protocol (i.e., the PTP protocol) are quite expensive, and the synchronization delay between the AP and USB dongle device using the PTP protocol is approximately 10 microseconds, which is significantly greater than the 100 ns achieved by the system of this disclosure. The system of this disclosure improves the accuracy of time synchronization and reduces the overall cost of the network.

[0044] Because the operation of this disclosure does not involve MAC or upper-layer latency, it is a purely physical method and requires no software, thus enabling sub-microsecond accuracy (e.g., 100 ns). This invention transmits information solely through hardware and achieves sub-microsecond accuracy, such as a delay of approximately 100 ns between the demodulated TSS or PPS signal and the received original TSS or PPS signal, making it suitable for most time-sensitive networks.

[0045] In the context of this disclosure, although the operations are depicted in a specific order, this should not be construed as requiring that these operations be performed in the specific order shown or in sequential order, or that all illustrated operations be performed to achieve the desired result. In some cases, multitasking and parallel processing may be advantageous. Certain features described in the context of separate implementations may also be implemented in combination in a single implementation. Conversely, various features described in the context of a single implementation may also be implemented individually or in any suitable sub-combination in multiple implementations.

[0046] In the foregoing specific embodiments of this disclosure, reference is made to the accompanying drawings, which form a part thereof, and examples of how this disclosure may be practiced are illustrated in the drawings. These examples have been described in sufficient detail to enable those skilled in the art to practice the invention, and it is to be understood that other examples may be utilized, and process, electrical, and / or structural changes may be made without departing from the scope of the invention.

Claims

1. A system for transmitting a time-sensitive signal (TSS), comprising: An access point (AP) is configured to generate the time-sensitive signal (TSS). The AP includes a modulator configured to obtain the TSS and two power voltages, and to use the two power voltages to modulate the TSS to generate a modulated TSS. as well as A Universal Serial Bus (USB) dongle device, operating at the same frequency as the AP and configured to be inserted into the AP's USB port, includes a demodulator configured to demodulate the modulated TSS to obtain a demodulated TSS. The modulated TSS is transmitted from the modulator to the demodulator via the power supply pin at the USB interface of the AP and the power receive pin of the USB dongle device.

2. The system according to claim 1, wherein the TSS includes a first level and a second level, and The modulator includes: A first circuit is configured to receive the TSS and a first power voltage of the two power voltages, and to provide the first power voltage to the power supply pin in response to the first level of the TSS; as well as The second circuit is configured to receive the TSS and the second power voltage of the two power voltages, and to provide the second power voltage to the power supply pin in response to the second level of the TSS.

3. The system of claim 2 further includes a first power source for providing the first power voltage and a second power source for providing the second power voltage.

4. The system according to claim 3, wherein The first circuit includes: A first switch is connected between the first power source and the power supply pin; as well as A first switch control unit is configured to receive the TSS and, in response to the first level of the TSS, turn on the first switch to provide the first power voltage to the power supply pin; as well as The second circuit includes: A second switch is connected between the second power source and the power supply pin; as well as The second switch control unit is configured to receive the TSS and, in response to the second level of the TSS, turn on the second switch to provide the second power voltage to the power supply pin.

5. The system of claim 4, wherein the first switch control unit comprises a first resistor, a second resistor, and a first control switch connected in series between the first power supply and ground, wherein the first switch is connected between the first resistor and the second resistor to the first switch control unit, and the first control switch is configured to receive the TSS and be turned on in response to the first level of the TSS; and The second switch control unit includes a third resistor, a fourth resistor, and a second control switch connected in series between the second power source and the ground, wherein the second switch is connected between the third resistor and the fourth resistor, and the second control switch is configured to receive the TSS and be turned on in response to the second level of the TSS.

6. The system of claim 5, wherein the first control switch comprises a first N-channel metal-oxide-semiconductor (NMOS), and the second control switch comprises a second NMOS and an inverter connected to the gate of the second NMOS.

7. The system of claim 4, wherein the first switch comprises a first P-channel metal-oxide-semiconductor (PMOS) and the second switch comprises a second PMOS.

8. The system of claim 2, wherein the AP is configured to transmit a signal to a third device in response to the first level of the TSS, and to receive a signal from the third device in response to the second level of the TSS; and The USB dongle device includes a USB radio frequency scanner, wherein the USB radio frequency scanner is configured to be disabled in response to the first level of the demodulated TSS to prevent receiving signals from the AP, and to be enabled in response to the second level of the demodulated TSS to receive signals from the third device.

9. The system of claim 2, wherein the demodulator includes a comparator, a first input of the comparator being connected to the power receive pin, and a second input of the comparator being connected to a reference voltage, and The reference voltage is between the first power voltage and the second power voltage.

10. The system of claim 2, further comprising a voltage regulator on the USB dongle device, the voltage regulator being connected to the power receive pin to receive the modulated TSS and configured to regulate the first power voltage and the second power voltage to a constant voltage.

11. The system of claim 10, further comprising a system-on-a-chip (SoC) configured to be powered by the constant voltage and to receive the demodulated TSS.

12. The system of claim 1, wherein the USB dongle device comprises at least one of the following: a USB radio frequency scanner, or a USB ultra-wideband device.

13. The system of claim 1, wherein the TSS includes a pulses per second (PPS) signal to be transmitted from the AP to the USB dongle device for time synchronization.

14. An electronic device comprising: A modulator is configured to obtain a time-sensitive signal (TSS) and two power voltages, and to use the two power voltages to modulate the TSS to generate a modulated TSS. as well as A demodulator is configured to receive and demodulate the modulated TSS to obtain a demodulated TSS. The modulator is adapted to be mounted on a first device for providing the TSS and the two power voltages, and the demodulator is adapted to be mounted on a second device inserted into the first device, and the modulated TSS is transmitted from the modulator to the demodulator via a first power pin of the first device and a second power pin of the second device.

15. The electronic device of claim 14, wherein the first device comprises an access point (AP), and the second device comprises a USB dongle device inserted into a Universal Serial Bus (USB) interface of the AP, and The first power pin includes the power supply pin of the USB interface, and the second power pin includes the power receiving pin of the USB dongle device.

16. The electronic device of claim 14, wherein the TSS comprises a first level and a second level, and The modulator includes: A first circuit is configured to receive the TSS and a first power voltage of the two power voltages, and to provide the first power voltage to the first power pin in response to the first level of the TSS; as well as The second circuit is configured to receive the TSS and the second power voltage of the two power voltages, and to provide the second power voltage to the first power pin in response to the second level of the TSS.

17. The electronic device of claim 16, wherein The first circuit includes: A first switch is connected to the first power pin and is configured to receive the first power voltage; as well as A first switch control unit is configured to receive the TSS and, in response to the first level of the TSS, turn on the first switch to provide the first power voltage to the first power pin; as well as The second circuit includes: A second switch is connected to the first power pin and is configured to receive the second power voltage; as well as The second switch control unit is configured to receive the TSS and, in response to the second level of the TSS, turn on the second switch to provide the second power voltage to the first power pin.

18. The electronic device of claim 17, wherein the first switch control unit comprises a first resistor, a second resistor, and a first control switch connected in series, wherein the first switch is connected between the first resistor and the second resistor to the first switch control unit, and the first control switch is configured to receive the TSS and be turned on in response to the first level of the TSS; and The second switch control unit includes a third resistor, a fourth resistor, and a second control switch connected in series, wherein the second switch is connected between the third resistor and the fourth resistor, and the second control switch is configured to receive the TSS and be turned on in response to the second level of the TSS.

19. The electronic device of claim 18, wherein the first switch comprises a first P-channel metal-oxide-semiconductor (PMOS), and the second switch comprises a second PMOS; and The first control switch includes a first N-channel metal-oxide-semiconductor (NMOS), and the second control switch includes a second NMOS and an inverter connected to the gate of the second NMOS.

20. The electronic device of claim 14, wherein the demodulator includes a comparator, a first input of the comparator being connected to the second power pin, and a second input of the comparator being connected to a reference voltage, and The reference voltage is between the first power voltage and the second power voltage of the two power voltages.

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