Chip packaging structure, single board and network equipment
By using a sealing structure and waterproof layer of metal or inorganic non-metallic materials, combined with an annular structure and sealing ring, the problem of coolant leakage during jet cooling is solved, and high reliability and stable heat dissipation effect is achieved.
Patent Information
- Application Number
- CN202311862481.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2023-12-29
- Publication Date
- 2025-07-01
Smart Images

Figure CN120237103A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the technical field of semiconductor devices, and particularly to a chip packaging structure, a single board, and a network device. Background Art
[0002] With the increasingly multifunctional development of network devices, the integration level and assembly density of chips have been continuously improved. While the chips have powerful usage functions, it has also led to a sharp increase in the working power consumption and heat generation of the chips.
[0003] Currently, the common air-cooling heat dissipation technology can no longer meet the heat dissipation requirements of the chips. Therefore, the jet liquid-cooling heat dissipation method has gradually been widely used. However, in the current jet liquid-cooling heat dissipation method, the risk of coolant leakage is relatively high, and the reliability of the heat dissipation module is poor. Summary of the Invention
[0004] The purpose of this application is to provide a chip packaging structure, a single board, and a network device, which are used to improve the sealing reliability of the chip packaging structure and prevent coolant leakage.
[0005] In the first aspect of the embodiments of this application, a chip packaging structure is provided. The chip packaging structure includes a packaging substrate, a heat dissipation cover, a chip, and a sealing structure. The heat dissipation cover covers the packaging substrate, and the heat dissipation cover and the packaging substrate enclose a heat dissipation cavity. The chip is located in the heat dissipation cavity and is disposed on the packaging substrate. At least a part of the sealing structure is located in the heat dissipation cavity. The sealing structure is disposed on the packaging substrate. The sealing structure is disposed around the periphery of the chip and is connected to the chip. The sealing structure is also hermetically connected to the heat dissipation cover, and the part of the sealing structure hermetically connected to the heat dissipation cover is made of a metal material or an inorganic non-metallic material.
[0006] As described above, the heat dissipation cover and the packaging substrate enclose a heat dissipation cavity, and the chip is located in the heat dissipation cavity. By introducing the coolant into the heat dissipation cavity, the coolant can absorb and carry away the heat dissipated by the chip, thereby completing the heat dissipation work of the chip. In the related art, the heat dissipation cover is bonded to the organic polymer on the periphery of the chip. However, during the operation of the chip, the temperature of the coolant around the chip is generally higher than the normal temperature. In a warm coolant environment, the organic polymer will age and deform or crack on the surface. When the organic polymer deforms or cracks at the connection with the heat dissipation cover, a gap will be generated between the organic polymer and the heat dissipation cover, thereby reducing the sealing performance at the connection between the heat dissipation cover and the organic polymer, and further causing the coolant to leak at this location. In the chip packaging structure provided by the embodiment of the present application, the connection between the sealing structure and the heat dissipation cover is made of a metal material or an inorganic non-metallic material. In a warm coolant environment, neither the metal material nor the inorganic non-metallic material is prone to aging, avoiding deformation or surface cracking of the part where the sealing structure is hermetically connected to the heat dissipation cover due to material aging. Furthermore, it is possible to avoid the generation of gaps between the sealing structure and the heat dissipation cover, which may affect the sealing performance, and further prevent the coolant from leaking between the sealing structure and the heat dissipation cover. To achieve the purpose of improving the sealing reliability of the chip packaging structure and preventing the coolant from leaking.
[0007] In some embodiments of the present application, the sealing structure includes a first annular structure and a second annular structure. The first annular structure is hermetically connected to the heat dissipation cover, and the first annular structure is made of a metal material or an inorganic non-metallic material. The second annular structure is located in the hollow area of the first annular structure, and the chip is located in the hollow area of the second annular structure, that is, the first annular structure, the second annular structure, and the chip are nested in sequence. The side of the second annular structure facing the chip is connected to the chip, and the side of the second annular structure facing away from the chip is connected to the first annular structure. The first annular structure is made of a metal material or an inorganic non-metallic material, and the first annular structure is not prone to aging, avoiding deformation or surface cracking due to material aging, which may cause a gap to be generated between the sealing structure and the heat dissipation cover, and further causing the coolant to leak from the gap. To achieve the purpose of ensuring the sealing performance at the connection between the first annular structure and the heat dissipation cover and preventing the coolant from leaking. In addition, the side of the second annular structure facing the chip is connected to the chip, and the side of the second annular structure facing away from the chip is connected to the first annular structure, thereby ensuring the relative fixation of the first annular structure, the second annular structure, and the chip, and ensuring the connection stability between the sealing structure and the chip.
[0008] In some embodiments of the present application, the chip packaging structure further includes a sealing ring. The sealing ring is disposed between the first annular structure and the heat dissipation cover. The first annular structure is hermetically connected to the heat dissipation cover through the sealing ring. By providing the sealing ring between the first annular structure and the heat dissipation cover, the sealing performance between the first annular structure and the heat dissipation cover is ensured, and the coolant is prevented from leaking between the first annular structure and the heat dissipation cover.
[0009] In some embodiments of the present application, the first annular structure includes a first annular portion and a first extension portion. The first annular portion is arranged on the packaging substrate and connected to the packaging substrate. The first annular portion is connected to the second annular structure on the side facing the chip. The first annular portion is also sealed and connected to the heat dissipation cover. The first extension portion is arranged on the packaging substrate and is located on the side of the first annular portion facing away from the chip. The first extension portion is connected to the packaging substrate. The first extension portion is connected to the first annular portion on the side facing the chip. The first annular portion is connected to the first extension portion, and the first annular portion and the first extension portion are both connected to the packaging substrate, thereby increasing the connection area between the first annular structure and the packaging substrate, and improving the connection reliability between the first annular structure and the packaging substrate.
[0010] In some embodiments of the present application, the second annular structure includes a second annular portion and a second extension portion. The second annular portion is disposed on the packaging substrate and connected to the packaging substrate. The second annular portion is connected to the first annular structure on the side facing away from the chip, and the second annular portion is connected to the chip on the side facing the chip. The second extension portion is located on the side of the second annular portion facing away from the packaging substrate, and the second extension portion is connected to the first annular structure. The second annular portion is connected to the second extension portion, and both the second annular portion and the second extension portion are connected to the first annular structure, thereby increasing the connection area between the second annular structure and the first annular structure, and improving the connection reliability between the second annular structure and the first annular structure.
[0011] In some embodiments of the present application, the heat dissipation cover includes a top cover and a side portion. The side portion is located on the side of the top cover facing the package substrate and is connected to the top cover. The inner side wall of the side portion is connected to the sealing structure. During operation, the hydraulic pressure of the heat dissipation cavity is high, and the coolant will exert a force on the top cover and the side portion. In the related art, the connection between the heat dissipation cover and other structures is parallel to the surface of the chip away from the package substrate. When the heat dissipation cover is subjected to a force perpendicular to the surface of the chip facing the heat dissipation cavity due to the hydraulic pressure of the heat dissipation cavity, only the connection force at the connection counteracts the force generated by the hydraulic pressure, and a gap is easily generated, resulting in leakage of the coolant. In the chip packaging structure provided in the embodiment of the present application, the inner side wall of the side portion is connected to the sealing structure. At this time, the connection position of the heat dissipation cover and the sealing structure is located on the inner side wall of the side portion. When the heat dissipation cover is subjected to a force perpendicular to the surface of the chip facing the heat dissipation cavity due to the hydraulic pressure of the heat dissipation cavity, under the joint action of the connection force at the connection between the inner side wall of the side portion and the sealing structure and the friction between the inner side wall of the heat dissipation cover and the sealing structure, it is possible to prevent the heat dissipation cover from being separated from the sealing structure and generating a gap, thereby avoiding leakage of the coolant. When the heat sink cover is subjected to a force parallel to the surface of the chip toward the heat sink cavity due to the hydraulic pressure of the heat sink cavity, the forces between the inner side walls of the symmetrical sides are in opposite directions and thus cancel each other out, thereby preventing the heat sink cover from detaching from the sealing structure due to excessive force and causing a gap, thereby avoiding coolant leakage.
[0012] In some embodiments of the present application, the chip packaging structure further includes a waterproof layer. The waterproof layer is located in the heat dissipation cavity and on the side of the chip facing away from the packaging substrate. The waterproof layer at least covers the connection between the sealing structure and the chip. At this time, the waterproof layer can prevent the connection between the sealing structure and the chip from directly contacting the coolant, thereby preventing a part of the sealing structure facing the chip from aging, and further preventing the sealing performance from being affected due to material aging. This aims to improve the sealing reliability of the chip packaging structure and prevent coolant leakage.
[0013] In some embodiments of the present application, the waterproof layer covers the surface of the side of the chip facing away from the packaging substrate, and the waterproof layer also covers the surface of the side of the sealing structure facing away from the packaging substrate. At this time, the waterproof layer can prevent the entire sealing structure from directly contacting the coolant, further preventing the sealing structure from aging and affecting the sealing performance. In addition, the waterproof layer can also prevent water vapor in the heat dissipation cavity from entering the packaging substrate through the sealing structure or the chip, affecting the normal operation of the circuits arranged on the packaging substrate.
[0014] In some embodiments of the present application, the waterproof layer includes at least one of a metal coating or an inorganic coating. Exemplarily, the waterproof layer includes at least one of a copper coating, a nickel coating, a chromium coating, a vitreous coating, a ceramic coating, a cermet coating, or an intermetallic compound coating. Both the metal coating and the inorganic coating are not easily aged, ensuring the anti-aging performance of the waterproof layer in a warm coolant immersion environment and preventing the waterproof performance of the waterproof layer from decreasing due to aging.
[0015] In some embodiments of the present application, the thickness of the waterproof layer is 5 μm to 100 μm. Exemplarily, the thickness of the waterproof layer is 5 μm, 10 μm, 20 μm, 30 μm, 40 μm, 50 μm, 60 μm, 70 μm, 80 μm, 90 μm, 100 μm, etc. The thickness of the waterproof layer is greater than or equal to 5 μm, which can ensure the rigidity of the waterproof layer and avoid the coolant entering the side of the waterproof layer facing the packaging substrate due to the rupture of the waterproof layer, thereby avoiding a part of the sealing structure facing the chip from directly contacting the coolant and aging, and further affecting the sealing performance. In addition, the thickness of the waterproof layer is less than or equal to 100 μm. At this time, while ensuring the rigidity of the waterproof layer, the cost of the waterproof layer can be reduced.
[0016] In some embodiments of the present application, the chip packaging structure further includes a fixing plate. The fixing plate is disposed on the side of the packaging substrate away from the chip, and the fixing plate is connected to the packaging substrate, and the heat dissipation cover is connected to the fixing plate. Both the packaging substrate and the heat dissipation cover are connected to the fixing plate. The fixing plate can support the packaging substrate and the heat dissipation cover, thereby ensuring the structural stability of the chip packaging structure. In the related art, the heat dissipation cover is connected to the organic polymer on the periphery of the chip, and the organic polymer is adhered to the packaging substrate and fixedly connected to the chip. During normal operation, after the heat dissipation cover is subjected to a hydraulic force, a large force will be generated on the packaging substrate and the chip through the organic polymer. When the force is large, it may affect the working performance of the packaging substrate and the chip. In the chip packaging structure provided by the embodiments of the present application, after the heat dissipation cover is connected to the fixing plate, the connecting force directly acts on the fixing plate. At this time, it is possible to avoid applying a large force to the packaging substrate and the chip, and improve the reliability of the chip packaging structure.
[0017] In some embodiments of the present application, the heat dissipation cover is provided with a jet hole and a return hole communicating with the heat dissipation cavity. The coolant enters the heat dissipation cavity through the jet hole. After the coolant absorbs heat, it then flows out of the heat dissipation cavity through the return hole to complete the heat dissipation of the chip.
[0018] In some embodiments of the present application, the distance from the outlet end of the jet hole facing the chip to the chip is h; where 0 < h ≤ 1 mm. Exemplarily, the distance h from the outlet end of the jet hole facing the chip to the chip is 0.1 mm, 0.2 mm, 0.4 mm, 0.6 mm, 0.8 mm, 1 mm, etc. The distance h from the outlet end of the jet hole facing the chip to the chip is greater than 0, ensuring that after the coolant flows from the jet hole into the heat dissipation cavity, it can flow through the gap between the heat dissipation cover and the chip to the return hole and finally flow out of the heat dissipation cavity. In addition, the flow rate of the coolant flowing out of the jet hole will change under the action of gravity. When the distance h from the outlet end of the jet hole facing the chip to the chip is less than or equal to 1 mm, the change in the flow rate of the coolant flowing out of the jet hole is small. Therefore, it will not cause the flow rate of the coolant to be too large due to the action of gravity, resulting in a large impact on the chip and causing the chip to be damaged. Or, it will not cause the flow rate of the coolant to be too small due to the action of gravity, and the injected coolant cannot directly impact the chip, affecting the chip heat dissipation effect.
[0019] In the second aspect of the embodiments of the present application, a single board is provided. The single board includes the above-mentioned chip packaging structure and the liquid path system. The liquid path system is connected to the heat dissipation cover of the chip packaging structure and is in communication with the heat dissipation cavity. The above single board has the same technical effects as the chip packaging structure provided in the foregoing embodiments, which will not be elaborated here. In addition, the liquid path system is used to inject the coolant into the heat dissipation cavity. After the coolant absorbs the heat dissipated by the chip in the heat dissipation cavity, it then flows back into the liquid path system. After the returned coolant is cooled in the liquid path system, it is injected into the heat dissipation cavity again. In this way, the cycle continues, continuously absorbing and taking away the heat dissipated by the chip to complete the heat dissipation of the chip.
[0020] In the third aspect of the embodiments of the present application, a network device is provided. The network device includes the above-mentioned single board and a cabinet. The single board is disposed in the cabinet and is connected to the cabinet. The above network device has the same technical effects as the single board provided in the foregoing embodiments, which will not be elaborated here. Description of the Drawings
[0021] Figure 1 It is a schematic structural diagram of a communication system provided by an embodiment of the present application;
[0022] Figure 2 It is a schematic structural diagram of a single board provided by an embodiment of the present application;
[0023] Figure 3 It is a schematic structural diagram of the first chip packaging structure provided by an embodiment of the present application;
[0024] Figure 4 It is a schematic structural diagram of the second chip packaging structure provided by an embodiment of the present application;
[0025] Figure 5 It is a schematic structural diagram of the third chip packaging structure provided by an embodiment of the present application;
[0026] Figure 6 It is a schematic structural diagram of the fourth chip packaging structure provided by an embodiment of the present application;
[0027] Figure 7 It is a schematic structural diagram of the fifth chip packaging structure provided by an embodiment of the present application;
[0028] Figure 8 It is a schematic structural diagram of the sixth chip packaging structure provided by an embodiment of the present application;
[0029] Figure 9 It is a schematic structural diagram of the seventh chip packaging structure provided by an embodiment of the present application.
[0030] Reference Signs:
[0031] 01 - Communication system; 02 - Network device; 03 - First access device; 04 - Second access device; 10 - Single board; 20 - Cabinet; 11 - Chip packaging structure; 111 - Heat dissipation cavity; 112 - Chip; 12 - Liquid path system; 1201 - Coolant tank; 1202 - First liquid flow channel; 1203 - Second liquid flow channel; 1204 - Hydraulic pump; 1205 - Sideway return flow channel; 1206 - Sideway valve; 1207 - First flowmeter; 1208 - Visual mirror; 1209 - Second flowmeter; 1210 - Stop valve; 1211 - Flow valve; 1212 - Pressure protector; 1213 - Filter; 1214 - Preheater; 1215 - Refrigerator; 113 - Packaging substrate; 114 - Heat dissipation cover; 115 - Sealing structure; A - Part where the sealing structure is hermetically connected to the heat dissipation cover; 1151 - First annular structure; 1152 - Second annular structure; 116 - Sealing ring; 11511 - First annular part; 11512 - First extension part; 11521 - Second annular part; 11522 - Second extension part; 1141 - Top cover; 1142 - Side part; 1143 - Jet hole; 1144 - Return hole. 117 - Fixed plate; 118 - Connector; 119 - Circuit board; 120 - Waterproof layer. Detailed implementation manners
[0032] Next, the technical solutions in the embodiments of the present application will be described with reference to the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments.
[0033] Hereinafter, terms such as "first" and "second" are only used for convenience of description, and cannot be understood as indicating or implying relative importance or implicitly specifying the quantity of the indicated technical features. Thus, features defined with "first", "second", etc. may explicitly or implicitly include one or more of such features. In the description of the present application, unless otherwise stated, the meaning of "a plurality" is two or more.
[0034] In the present application, unless otherwise clearly defined and limited, the term "connection" should be understood in a broad sense. For example, "connection" may be a fixed mechanical connection, a detachable mechanical connection, or integrated; or, "connection" may be directly connected, or indirectly connected through an intermediate medium.
[0035] In the embodiments of the present application, words such as "exemplarily" are used to represent examples, illustrations or explanations. Any embodiment or design solution described as "exemplarily" in the embodiments of the present application should not be construed as being more preferred or having more advantages than other embodiments or design solutions. Exactly, using words such as "exemplarily" is intended to present relevant concepts in a specific manner.
[0036] In the accompanying drawings of the embodiments of the present application, components are represented by guiding lines with arrows; parts are only represented by guiding lines; hollow structures such as cavities and openings are represented by guiding lines with wavy lines.
[0037] A communication system 01 provided by an embodiment of the present application, as Figure 1 shown, the communication system 01 may include a network device 02 and a first access device 03 connected to the network device 02. Among them, the above-mentioned network device 02 may be a data center, a server, an optical access terminal device, a switch, etc. The first access device 03 may send a signal to the network device 02, and the network device 02 processes or stores the received signal. Or, the network device 02 may send a signal to the first access device 03. To achieve signal exchange between the network device 02 and the first access device 03.
[0038] Continuing as Figure 1 shown, the communication system 01 may further include a plurality of second access devices 04 connected to the network device 02. Similar to the above-mentioned first receiving device 03, signal exchange can also be performed between the second access device 04 and the network device 02. Exemplarily, the network device 02 may receive the signal sent by the first access device 03, and after processing and distribution, send the signal to different second access devices 04. Or, the network device 02 may receive the signal sent by the second access device 04 and send it to the first access device 03.
[0039] In addition, continuing as Figure 1 shown, the network device 02 includes a single board 10 and a cabinet 20. The single board 10 is arranged in the cabinet 20 and is connected to the cabinet 20. The cabinet 20 can protect the single board 10. At the same time, the cabinet 20 can also supply power to the single board 10 to ensure the normal operation of the single board 10.
[0040] The above embodiments, as Figure 1 shown, take the communication system 01 including 1 network device 02, 1 first access device 03 and 2 second access devices 04, and 1 network device 02 including 1 cabinet 20 and 5 single boards 10 as an example. In other embodiments of the present application, the numbers of the network device 02, the first access device 03 and the second access device 04 may all be other numbers, and the numbers of the cabinet 20 and the single boards 10 included in 1 network device 02 may also be other numbers.
[0041] Based on this, since the chip will generate heat due to working power consumption during operation, which will in turn cause an increase in circuit delay and affect the normal working performance of the chip. Therefore, in some embodiments of the present application, in order to dissipate heat from the chip, as Figure 2As shown, the above-mentioned single board 10 may include a chip packaging structure 11 and a liquid path system 12. The chip packaging structure 11 has a heat dissipation cavity 111 and a chip 112 disposed within the heat dissipation cavity 111. The liquid path system 12 is in communication with the heat dissipation cavity 111 of the chip packaging structure 11. The liquid path system 12 is configured to inject a coolant into the heat dissipation cavity 111 of the chip packaging structure 11. After the coolant absorbs the heat dissipated by the chip 112, it then flows back into the liquid path system 12. The returned coolant is cooled in the liquid path system 12 and then injected into the heat dissipation cavity 111 again. In this cycle, the heat dissipated by the chip 112 is continuously absorbed and carried away to complete the heat dissipation of the chip 112.
[0042] The above embodiments, for Figure 2 example, take the single board 10 including 1 chip packaging structure 11 and 1 liquid path system 12 as an example. In other embodiments of the present application, the numbers of the chip packaging structure 11 and the liquid path system 12 may both be other numbers, and 1 liquid path system 12 may also be in communication with the heat dissipation cavities 111 of multiple chip packaging structures 11.
[0043] Continuing as Figure 2 shown, the liquid path system 12 may include a coolant tank 1201, a first liquid flow path 1202, a second liquid flow path 1203, and a hydraulic pump 1204 disposed on the first liquid flow path 1202. One end of the first liquid flow path 1202 is in communication with the water tank, and the other end of the first liquid flow path 1202 is in communication with the heat dissipation cavity 111 of the chip packaging structure 11. By providing a circulating power through the hydraulic pump 1204, the coolant circulates between the first liquid flow path 1202, the heat dissipation cavity 111, the second liquid flow path 1203, and the coolant tank 1201 to complete the heat dissipation work of the chip packaging structure 11.
[0044] In addition, continuing as Figure 2 shown, the liquid path system 12 may further include a side path return flow path 1205 and a side path valve 1206 disposed on the side path return flow path 1205. One end of the side path return flow path 1205 is in communication with the first liquid flow path 1202, and the other end of the side path return flow path 1205 is in communication with the coolant tank 1201. When the first liquid flow path 1202 is blocked, the side path valve 1206 opens, allowing the coolant to directly flow back into the coolant tank 1201, thereby preventing the hydraulic pressure in the first liquid flow path 1202 from continuously increasing and causing leakage of the first liquid flow path 1202 when the first liquid flow path 1202 is blocked.
[0045] Continuing as Figure 2As shown, the liquid path system 12 may further include a first flow meter 1207 and a sight glass 1208 provided on the first liquid flow path 1202. The coolant flow rate on the first liquid flow path 1202 is monitored by the first flow meter 1207. Whether the coolant flows normally in the first liquid flow path 1202 can be observed through the sight glass 1208. The liquid path system 12 may further include a second flow meter 1209 provided on the second liquid flow path 1203. The coolant flow rate on the second liquid flow path 1203 is monitored by the second flow meter 1209.
[0046] Continuing as Figure 2 As shown, the liquid path system 12 may further include a stop valve 1210 provided on the first liquid flow path 1202. The opening or cutting off of the first liquid flow path 1202 can be controlled through the stop valve 1210. The liquid path system 12 may further include a flow valve 1211 provided on the first liquid flow path 1202. The coolant flow rate flowing from the first liquid flow path 1202 into the heat dissipation chamber 111 is adjusted through the flow valve 1211, so that the coolant flow rate flowing into the heat dissipation chamber 111 meets the heat dissipation requirements of the chip 112.
[0047] Continuing as Figure 2 As shown, the liquid path system 12 may further include a pressure protector 1212 communicating with a portion of the first liquid flow path 1202 close to the chip packaging structure 11. At this time, the pressure protector 1212 can boost or reduce the pressure of the coolant in the first liquid flow path 1202, so as to ensure that the hydraulic pressure flowing to the chip packaging structure 11 is relatively constant. To achieve the purpose of avoiding damage to the chip packaging structure 11 caused by excessive hydraulic pressure impacting the chip packaging structure 11 while ensuring that the coolant flow rate and flow meet the heat dissipation requirements of the chip 112.
[0048] Continuing as Figure 2 As shown, the liquid path system 12 may further include a filter 1213 provided on the first liquid flow path 1202. The impurities mixed in the circulating coolant are filtered through the filter 1213, so as to ensure that the impurities mixed in the coolant do not enter the heat dissipation chamber 111, and further prevent the impurities from depositing in the heat dissipation chamber 111 and affecting the heat dissipation effect.
[0049] Continuing as Figure 2 As shown, the liquid path system 12 may further include a preheater 1214 provided on the first liquid flow path 1202. When the single board is at a relatively low operating temperature, the liquid in the liquid path system 12 may freeze. At this time, the coolant is preheated through the preheater 1214 to prevent the coolant from freezing and ensure that the coolant can flow to the heat dissipation chamber 111 for heat dissipation work.
[0050] In addition, continuing as Figure 2As shown, the liquid path system 12 may further include a cooler 1215 disposed on the second liquid flow path 1203. When the coolant absorbs heat and flows through the second liquid flow path 1203 to the cooler 1215, the cooler 1215 can cool down the coolant, so that the temperature of the coolant flowing through the coolant tank 1201 and the first liquid flow path 1202 to the heat dissipation cavity 111 again is relatively low, improving the heat dissipation effect.
[0051] The structure of the above chip packaging structure 11 will be described in detail with examples below. In some embodiments of the present application, the above chip packaging structure 11 is as Figure 3 shown and may include a packaging substrate 113, a heat dissipation cover 114 disposed on the packaging substrate 113, and a chip 112. The heat dissipation cover 114 and the packaging substrate 113 enclose a heat dissipation cavity 111. The chip 112 is located in the heat dissipation cavity 111, and the liquid path system 12 (as Figure 2 shown) introduces the coolant into the heat dissipation cavity 111. After the coolant absorbs the heat dissipated by the chip 112, it flows back to the liquid path system 12, thereby completing the heat dissipation of the chip 112.
[0052] In the related art, the heat dissipation cover is bonded to the organic polymer on the periphery of the chip. However, during the operation of the chip, the temperature of the coolant around the chip is generally higher than the normal temperature. In a warm coolant environment, the organic polymer will age and deform or crack on the surface. When the organic polymer deforms or cracks at the connection with the heat dissipation cover, a gap will be generated between the organic polymer and the heat dissipation cover, thereby reducing the sealing performance at the connection between the heat dissipation cover and the organic polymer, and further causing the coolant to leak at this place.
[0053] To solve the above problems, continue as Figure 3 shown, the above chip packaging structure 11 may further include a sealing structure 115 disposed on the packaging substrate 113. At least a part of the sealing structure 115 is located in the heat dissipation cavity 111. The sealing structure 115 is disposed around the periphery of the chip 112 and is connected to the chip 112. The sealing structure 115 is also hermetically connected to the heat dissipation cover 114, and the part A where the sealing structure 115 is hermetically connected to the heat dissipation cover 114 is made of a metal material or an inorganic non-metallic material. Both metal materials and inorganic non-metallic materials are not easily aged, avoiding deformation or surface cracking of the part where the sealing structure 115 is hermetically connected to the heat dissipation cover 114 due to material aging. Further, a gap between the sealing structure 115 and the heat dissipation cover 114 is avoided, ensuring the sealing performance at the connection between the heat dissipation cover 114 and the sealing structure 115. Further, the leakage of the coolant from between the sealing structure 115 and the heat dissipation cover 114 is prevented. To achieve the purpose of improving the sealing reliability of the chip packaging structure 11 and preventing the leakage of the coolant.
[0054] As described above, the portion A where the sealing structure 115 is sealingly connected to the heat dissipation cover 114 is made of a metal material or an inorganic non-metallic material. The following is an example of the portion of the sealing structure 115 that is sealingly connected to the heat dissipation cover 114. In some embodiments of the present application, as Figure 4 shown, the sealing structure 115 may include a first annular structure 1151. The first annular structure 1151 is sealingly connected to the heat dissipation cover 114, so that the coolant cannot pass through the connection between the first annular structure 1151 and the heat dissipation cover 114. In addition, the first annular structure 1151 is made of a metal material or an inorganic non-metallic material. At this time, the first annular structure 1151 is not prone to aging, avoiding deformation or surface cracking due to material aging, and causing a gap between the sealing structure 115 and the heat dissipation cover 114, and then causing the coolant to leak from the gap. In order to improve the sealing reliability of the chip package structure 11 and prevent the coolant from leaking.
[0055] Continuing as Figure 4 shown, the sealing structure 115 may further include a second annular structure 1152. The second annular structure 1152 is located in the hollow region of the first annular structure 1151, and the chip 112 is located in the hollow region of the second annular structure 1152. One side of the second annular structure 1152 facing the chip 112 is connected to the chip 112, and the side of the second annular structure 1152 facing away from the chip 112 is connected to the first annular structure 1151. That is, the first annular structure 1151, the second annular structure 1152, and the chip 112 are nested in sequence, and the first annular structure 1151, the second annular structure 1152, and the chip 112 are relatively fixed to ensure the connection stability between the first annular structure 1151, the second annular structure 1152, and the chip 112.
[0056] Exemplarily, as Figure 4 shown, the second annular structure 1152 is an injection-molded structure. In some embodiments of the present application, the first annular structure 1151 and the chip 112 may be respectively disposed on the packaging substrate 113 first. Then, the second annular structure 1152 is injection-molded between the first annular structure 1151 and the chip 112, so that the first annular structure 1151 and the second annular structure 1152 can be connected into an integral structural member. At this time, the second annular structure 1152 can fill the gap between the first annular structure 1151 and the chip 112 to ensure that there is no gap between the second annular structure 1152 and the chip 112, and between the first annular structure 1151 and the second annular structure 1152. In order to ensure the sealing performance between the first annular structure 1151, the second annular structure 1152, and the chip 112 and prevent the coolant from leaking.
[0057] Further, to ensure the sealing performance between the first annular structure 1151 and the second annular structure 1152, and between the second annular structure 1152 and the chip 112. In some embodiments of the present application, a glue layer (not shown in the figure) can be provided between the first annular structure 1151 and the second annular structure 1152 as shown in Figure 4 by means of dispensing. A glue layer can also be provided between the second annular structure 1152 and the chip 112 by means of dispensing. Thus, the purpose of preventing the coolant from leaking can be achieved. In addition, a glue layer (not shown in the figure) can also be provided between the first annular structure 1151 and the packaging substrate 113 to ensure the relative fixation between the first annular structure 1151 and the packaging substrate 113.
[0058] On this basis, to ensure the sealing performance between the first annular structure 1151 and the heat dissipation cover 114, continue as shown in Figure 4 The chip packaging structure 11 may further include a sealing ring 116. The sealing ring 116 is provided between the first annular structure 1151 and the heat dissipation cover 114. At this time, the first annular structure 1151 can be hermetically connected to the heat dissipation cover 114 through the sealing ring 116 to ensure the sealing performance between the first annular structure 1151 and the heat dissipation cover 114 and prevent the coolant from leaking between the first annular structure 1151 and the heat dissipation cover 114.
[0059] In the above embodiments, as shown in Figure 4 taking the example of providing 1 sealing ring 116 between the first annular structure 1151 and the heat dissipation cover 114, the sealing connection between the first annular structure 1151 and the heat dissipation cover 114 is realized. In other embodiments of the present application, the sealing connection between the first annular structure 1151 and the heat dissipation cover 114 can also be realized by providing a plurality of sealing rings 116 between the first annular structure 1151 and the heat dissipation cover 114. Alternatively, the sealing connection between the first annular structure 1151 and the heat dissipation cover 114 can also be realized by applying a sealing glue between the first annular structure 1151 and the heat dissipation cover 114.
[0060] Further, as shown in Figure 5As shown in the figure, the first annular structure 1151 may include a first annular portion 11511 and a first extension portion 11512. One side of the first annular portion 11511 facing the chip 112 is connected to the second annular structure 1152. At this time, it can be ensured that the first annular structure 1151 is connected to the second annular structure 1152. The first annular portion 11511 is also hermetically connected to the heat dissipation cover 114 to ensure that the coolant does not leak between the first annular portion 11511 and the heat dissipation cover 114. In addition, both the first annular portion 11511 and the first extension portion 11512 are disposed on the packaging substrate 113. The first extension portion 11512 is located on the side of the first annular portion 11511 away from the chip 112. The first annular portion 11511 is connected to the first extension portion 11512, and both the first annular portion 11511 and the first extension portion 11512 are connected to the packaging substrate 113, thereby increasing the connection area between the first annular structure 1151 and the packaging substrate 113 and improving the connection reliability between the first annular structure 1151 and the packaging substrate 113.
[0061] Continue as Figure 5 As shown in the figure, in some embodiments of the present application, the first annular portion 11511 and the first extension portion 11512 may be an integral structural member. Exemplarily, during the production process of the first annular portion 11511 and the first extension portion 11512, the first annular portion 11511 and the first extension portion 11512 that are connected to each other as an integral body can be directly formed in a single mold. The integral structural member has good structural stability, ensuring the internal structure stability of the first annular structure 1151.
[0062] In addition, continue as Figure 5 As shown in the figure, the second annular structure 1152 may include a second annular portion 11521 and a second extension portion 11522. The second annular portion 11521 is disposed on the packaging substrate 113 and is connected to the packaging substrate 113. One side of the second annular portion 11521 away from the chip 112 is connected to the first annular structure 1151, and one side of the second annular portion 11521 facing the chip 112 is connected to the chip 112. The second extension portion 11522 is located on the side of the second annular portion 11521 away from the packaging substrate 113, and the second extension portion 11522 is connected to the first annular structure 1151. At this time, both the second annular portion 11521 and the second extension portion 11522 are connected to the first annular structure 1151, thereby increasing the connection area between the second annular structure 1152 and the first annular structure 1151 and improving the connection reliability between the second annular structure 1152 and the first annular structure 1151.
[0063] Continue as Figure 5As shown, in some embodiments of the present application, the second annular portion 11521 and the second extension portion 11522 may be an integrally injection-molded structural member. The first annular structure 1151 and the chip 112 may be respectively disposed on the encapsulation substrate 113 first. Then, the second annular portion 11521 and the second extension portion 11522 are integrally injection-molded between the first annular structure 1151 and the chip 112. So that there is no gap between the first annular structure 1151, the second annular portion 11521, the second extension portion 11522, and the chip 112. To ensure the sealing performance between the first annular structure 1151, the second annular portion 11521, the second extension portion 11522, and the chip 112, and prevent the coolant from leaking.
[0064] In the related art, the connection portion of the heat dissipation cover 114 and other structures is parallel to the surface of the chip 112 facing away from the encapsulation substrate 113. During operation, the hydraulic pressure in the heat dissipation cavity 111 is relatively high. At this time, the coolant will exert a force on the top cover 1141 and the side portion 1142. When the heat dissipation cover 114 is subjected to a force perpendicular to the surface of the chip 112 facing the heat dissipation cavity 111 due to the hydraulic pressure in the heat dissipation cavity 111, only the connection force at the connection portion counteracts the force generated by the hydraulic pressure. At this time, it is easy to generate a gap at the connection portion due to the connection force at the connection portion being less than the force generated by the hydraulic pressure, resulting in coolant leakage.
[0065] To solve the above problems, continue as Figure 5 As shown, the above heat dissipation cover 114 may include a top cover 1141 and a side portion 1142. The side portion 1142 is located on the side of the top cover 1141 facing the encapsulation substrate 113 and is connected to the top cover 1141. The inner side wall of the side portion 1142 is connected to the sealing structure 115. At this time, the connection position of the heat dissipation cover 114 and the sealing structure 115 is on the inner side wall of the side portion 1142. When the heat dissipation cover 114 is subjected to a force perpendicular to the surface of the chip 112 facing the heat dissipation cavity 111 due to the hydraulic pressure in the heat dissipation cavity 111, under the combined action of the connection force at the connection portion between the inner side wall of the side portion 1142 and the sealing structure 115 and the frictional force between the inner side wall of the heat dissipation cover 114 and the sealing structure 115, it can prevent the heat dissipation cover 114 and the sealing structure 115 from separating to generate a gap, thereby avoiding coolant leakage. When the heat dissipation cover 114 is subjected to a force parallel to the surface of the chip 112 facing the heat dissipation cavity 111 due to the hydraulic pressure in the heat dissipation cavity 111, the acting force directions between the inner side walls of the side portions 1142 at symmetric positions are opposite, and thus cancel each other out, preventing the heat dissipation cover 114 and the sealing structure 115 from separating to generate a gap due to excessive force, thereby avoiding coolant leakage.
[0066] Continue as Figure 5As shown, jet holes 1143 and return holes 1144 communicating with the heat dissipation cavity 111 are formed in the top cover 1141 of the heat dissipation cover 114. The liquid path system 12 (as Figure 2 shown) allows the coolant to enter the heat dissipation cavity 111 through the jet holes 1143. After absorbing heat, the coolant flows back to the liquid path system 12 through the return holes 1144 to complete the heat dissipation of the chip 112.
[0067] Further, as Figure 5 shown, the distance from the outlet end of the jet hole 1143 facing the chip 112 to the chip 112 is h; where 0 < h ≤ 1 mm. Exemplarily, the distance h from the outlet end of the jet hole 1143 facing the chip 112 to the chip 112 is 0.1 mm, 0.2 mm, 0.4 mm, 0.6 mm, 0.8 mm, 1 mm, etc. The distance h from the outlet end of the jet hole 1143 facing the chip 112 to the chip 112 is greater than 0, ensuring that after the coolant flows from the jet hole 1143 into the heat dissipation cavity 111, it can flow through the gap between the heat dissipation cover 114 and the chip 112 to the return hole 1144 and finally flow out of the heat dissipation cavity 111.
[0068] In addition, under the action of gravity, the flow rate of the coolant ejected from the jet hole 1143 will change. When the flow direction of the coolant ejected from the jet hole 1143 faces the ground, the flow rate of the coolant will gradually increase. At this time, if h > 1 mm, the flow rate of the coolant increases relatively much, which will have a greater impact on the chip 112 and may cause damage to the chip 112. When the flow direction of the coolant ejected from the jet hole 1143 deviates from the ground, the flow rate of the coolant will gradually decrease. At this time, if h > 1 mm, the flow rate of the coolant decreases relatively much, and it may not be able to directly impact the chip 112, affecting the heat dissipation effect of the chip 112. When the flow direction of the coolant ejected from the jet hole 1143 is parallel to the ground, the flow direction of the coolant will gradually change towards the ground direction. If h > 1 mm, the change in the flow direction of the coolant is relatively large, resulting in the coolant may not be able to directly impact the part of the chip 112 away from the ground, resulting in a poor heat dissipation effect of the part of the chip 112 away from the ground and uneven heat dissipation of the chip 112.
[0069] Therefore, when the distance h between the jet hole 1143 and the outlet end of the chip 112 facing the chip 112 is h ≤ 1 mm, the change in the flow velocity of the coolant flowing out of the jet hole 1143 is small. Therefore, due to the action of gravity, the flow velocity of the coolant will not be too large, resulting in a large impact force on the chip 112. Furthermore, it prevents the chip 112 from being damaged due to excessive impact force. Or, due to the action of gravity, the flow velocity of the coolant will not be too small, and the injected coolant cannot directly impact the chip 112. Furthermore, it ensures the heat dissipation effect of the chip 112. Or, due to the action of gravity, the degree of change in the flow direction of the coolant will not be too large. Furthermore, it prevents the part of the chip 112 away from the ground from being impacted by the coolant, ensuring uniform heat dissipation of all parts of the chip 112.
[0070] In some embodiments of the present application, continuing as Figure 5 shown, the chip package structure 11 may further include a fixing plate 117. The fixing plate 117 is disposed on the side of the package substrate 113 away from the chip 112, and the fixing plate 117 is connected to the package substrate 113, and the heat dissipation cover 114 is connected to the fixing plate 117. Both the package substrate 113 and the heat dissipation cover 114 are connected to the fixing plate 117. The fixing plate 117 can support the package substrate 113 and the heat dissipation cover 114, thereby ensuring the structural stability of the chip package structure 11. In addition, the sealing structure 115 may be connected to the package substrate 113, the package substrate 113 is connected to the fixing plate 117, and the fixing plate 117 is connected to the heat dissipation cover 114, thereby ensuring that the sealing structure 115 can be connected to the heat dissipation cover 114. At the same time, after the heat dissipation cover 114 is connected to the fixing plate 117, a force is generated on the heat dissipation cover 114 close to the fixing plate 117, thereby causing the sealing ring 116 between the heat dissipation cover 114 and the sealing structure 115 to be in a compressed state to ensure the sealing performance between the heat dissipation cover 114 and the sealing structure 115.
[0071] In the related art, the heat dissipation cover 114 is connected to the organic polymer on the periphery of the chip 112, and the organic polymer is adhered to the package substrate 113 and fixedly connected to the chip 112. During normal operation, after the heat dissipation cover 114 is subjected to a hydraulic force, a large force will be generated on the package substrate 113 and the chip 112 through the organic polymer. When the force is large, it may affect the working performance of the package substrate 113 and the chip 112. In the chip package structure 11 provided by the embodiments of the present application, after the heat dissipation cover 114 is connected to the fixing plate 117, the connecting force directly acts on the fixing plate 117. Avoid generating a large force on the package substrate 113 and the chip 112, and improve the reliability of the chip package structure 11.
[0072] Exemplarily, continuing as Figure 5As shown, the chip packaging structure 11 may further include a connecting member 118. The heat dissipation cover 114 and the fixing plate 117 are connected by the connecting member 118. In some embodiments of the present application, the connecting member 118 is a screw or a bolt. The screw or bolt passes through the connecting hole formed in the fixing plate 117 and is threadedly connected to the threaded hole formed in the heat dissipation cover 114. Alternatively, the connecting member 118 is a pin. The pin passes through the connecting hole formed in the fixing plate 117 and is connected to the pin hole formed in the heat dissipation cover 114 by interference fit.
[0073] Or, in other embodiments of the present application, Figure 5 the heat dissipation cover 114 and the fixing plate 117 in may also be connected by a bolt (not shown in the figure) and a nut (not shown in the figure). The bolt sequentially passes through the connecting hole formed in the fixing plate 117, the through hole (not shown in the figure) formed in the heat dissipation cover 114 and is threadedly connected to the nut provided on the side of the heat dissipation cover 114 facing away from the fixing plate 117.
[0074] Of course, continuing as Figure 5 shown, the sealing structure 115 and the heat dissipation cover 114 may also be directly bonded to ensure the relative fixation of the sealing structure 115 and the heat dissipation cover 114.
[0075] Furthermore, continuing as Figure 5 shown, in some embodiments of the present application, the chip packaging structure 11 further includes a circuit board 119. The fixing plate 117, the circuit board 119 and the packaging substrate 113 are sequentially stacked. The circuit board 119 is electrically connected to the chip 112 and is also electrically connected to other devices of the single board. The circuit board 119 can transmit signals between the chip 112 and other devices.
[0076] In the related art, the chip 112 is bonded to the organic polymer provided on the periphery of the chip 112. When the organic polymer comes into direct contact with the coolant, it will age and deform or crack on the surface. When the connection between the organic polymer and the chip 112 deforms or cracks, a gap will be generated between the organic polymer and the chip 112, thereby causing the sealing performance at the connection between the chip 112 and the organic polymer to decrease, and further causing the coolant to leak at this place.
[0077] To solve the above problems, as Figure 6As shown, the chip packaging structure 11 may further include a waterproof layer 120 located within the heat dissipation cavity 111. The waterproof layer 120 is located on the side of the chip 112 facing away from the packaging substrate 113. The waterproof layer 120 at least covers the connection between the sealing structure 115 and the chip 112. At this time, the waterproof layer 120 can prevent the connection between the sealing structure 115 and the chip 112 from coming into direct contact with the coolant, thereby preventing a part of the sealing structure 115 facing the chip 112 from aging, and further preventing the sealing performance from being affected due to material aging of this part. To achieve the purpose of improving the sealing reliability of the chip packaging structure 11 and preventing coolant leakage.
[0078] Furthermore, as Figure 7 shown, the waterproof layer 120 may also cover the connection between the first annular structure 1151 and the second annular structure 1152. At this time, the waterproof layer 120 can also prevent the coolant from entering the connection between the first annular structure 1151 and the second annular structure 1152, further improving the sealing performance of the connection between the first annular structure 1151 and the second annular structure 1152, and preventing coolant leakage.
[0079] On this basis, as Figure 8 shown, the waterproof layer 120 may cover the surface of the side of the chip 112 facing away from the packaging substrate 113. At this time, the waterproof layer 120 can prevent the water vapor in the heat dissipation cavity 111 from passing through the chip 112 and entering the packaging substrate 113, affecting the normal operation of the circuits arranged on the packaging substrate 113.
[0080] In some embodiments of the present application, continuing as Figure 8 shown, the waterproof layer 120 may also cover the surface of the second annular structure 1152. When the material of the second annular structure 1152 is an organic material, the waterproof layer 120 can prevent the entire second annular structure 1152 from coming into direct contact with the coolant, further preventing the second annular structure 1152 from aging and affecting the sealing performance. In addition, the waterproof layer 120 can also prevent the water vapor in the heat dissipation cavity 111 from passing through the second annular structure 1152 and entering the packaging substrate 113, affecting the normal operation of the circuits arranged on the packaging substrate 113.
[0081] In some other embodiments of the present application, as Figure 9 shown, the waterproof layer 120 may cover the surface of the side of the sealing structure 115 facing away from the packaging substrate 113. Among them, the surface of the side of the sealing structure 115 facing away from the packaging substrate 113 refers to all other surfaces of the sealing structure 115 except for the surface of the side of the sealing structure 115 facing the packaging substrate 113 and the end face of the side of the sealing structure 115 facing the chip 112. At this time, the waterproof layer 120 can play the same role as Figure 8The same technical effects as those of the illustrated embodiments. Additionally, during the encapsulation process, after assembling the sealing structure 115 and the chip 112 onto the encapsulation substrate 113, a waterproof layer 120 can be plated or coated at one time on the surface of the assembled structure of the sealing structure 115 and the chip 112 facing away from the encapsulation substrate 113, facilitating the plating or coating of the waterproof layer 120.
[0082] Among them, as Figure 6 , Figure 7 , Figure 8 or Figure 9 shown in any of the illustrated embodiments, the waterproof layer 120 can include at least one of a metal coating or an inorganic coating. Exemplarily, the waterproof layer 120 includes at least one of a copper coating, a nickel coating, a chromium coating, a vitreous coating, a ceramic coating, a cermet coating, or an intermetallic compound coating. Both the metal coating and the inorganic coating are not easily aged, ensuring the anti-aging performance of the waterproof layer 120 in a warm coolant immersion environment and preventing the waterproof layer 120 from reducing its waterproof performance due to aging.
[0083] In the above-mentioned embodiments, as Figure 6 , Figure 7 , Figure 8 or Figure 9 shown, it is taken as an example that the chip encapsulation structure 11 includes 1 layer of the waterproof layer 120. In other embodiments of the present application, the number of the waterproof layers 120 can be other numbers.
[0084] Furthermore, as Figure 6 , Figure 7 , Figure 8 or Figure 9 shown in any of the illustrated embodiments, the thickness of the waterproof layer 120 can be 5 μm to 100 μm. Exemplarily, the thickness of the waterproof layer 120 is 5 μm, 10 μm, 20 μm, 30 μm, 40 μm, 50 μm, 60 μm, 70 μm, 80 μm, 90 μm, 100 μm, etc. The thickness of the waterproof layer 120 is greater than or equal to 5 μm, which can ensure the rigidity of the waterproof layer 120 and avoid the coolant from entering the side of the waterproof layer 120 facing the encapsulation substrate 113 due to the rupture of the waterproof layer 120. Furthermore, it can avoid the part of the sealing structure 115 facing the chip 112 from directly contacting the coolant and aging, thereby affecting the sealing performance. Additionally, the thickness of the waterproof layer 120 is less than or equal to 100 μm. At this time, while ensuring the rigidity of the waterproof layer 120, the cost of the waterproof layer 120 can be reduced.
[0085] The above is only the specific implementation manner of the present application, but the protection scope of the present application is not limited thereto. Any changes or substitutions within the technical scope disclosed in the present application should be covered within the protection scope of the present application. Therefore, the protection scope of the present application should be subject to the protection scope of the claimed rights.
Claims
1. A chip packaging structure, characterized in that, Comprising: An encapsulation substrate; A heat dissipation cover, covering the encapsulation substrate, and a heat dissipation cavity is defined between the heat dissipation cover and the encapsulation substrate; A chip, located in the heat dissipation cavity and disposed on the encapsulation substrate; A sealing structure, at least a part of which is located in the heat dissipation cavity, and the sealing structure is disposed on the encapsulation substrate; the sealing structure is arranged around the periphery of the chip and is connected to the chip; the sealing structure is also hermetically connected to the heat dissipation cover, and the part of the sealing structure hermetically connected to the heat dissipation cover is made of a metal material or an inorganic non-metallic material.
2. The chip packaging structure according to claim 1, wherein The sealing structure includes: A first annular structure, hermetically connected to the heat dissipation cover, and the first annular structure is made of a metal material or an inorganic non-metallic material; A second annular structure, located in the hollow area of the first annular structure, and the chip is located in the hollow area of the second annular structure; the side of the second annular structure facing the chip is connected to the chip, and the side of the second annular structure facing away from the chip is connected to the first annular structure.
3. The chip packaging structure according to claim 2, characterized in that, The chip packaging structure further includes: A sealing ring, disposed between the first annular structure and the heat dissipation cover, and the first annular structure is hermetically connected to the heat dissipation cover through the sealing ring.
4. The chip packaging structure according to claim 2, wherein, The first annular structure includes: A first annular portion, disposed on the encapsulation substrate and connected to the encapsulation substrate; the side of the first annular portion facing the chip is connected to the second annular structure; the first annular portion is also hermetically connected to the heat dissipation cover; A first extension portion, disposed on the encapsulation substrate and located on the side of the first annular portion facing away from the chip, and the first extension portion is connected to the encapsulation substrate; the side of the first extension portion facing the chip is connected to the first annular portion.
5. The chip packaging structure according to claim 2, wherein The second annular structure includes: A second annular portion, disposed on the encapsulation substrate and connected to the encapsulation substrate; the side of the second annular portion facing away from the chip is connected to the first annular structure, and the side of the second annular portion facing the chip is connected to the chip; A second extension portion, located on the side of the second annular portion facing away from the encapsulation substrate, and the second extension portion is connected to the first annular structure.
6. The chip package structure according to any one of claims 1-5, characterized in that The heat dissipation cover includes: A top cover; A side portion, located on the side of the top cover facing the encapsulation substrate and connected to the top cover; the inner side wall of the side portion is connected to the sealing structure.
7. The chip packaging structure according to any one of claims 1-5, characterized in that, The chip packaging structure further includes: A waterproof layer, located in the heat dissipation cavity, on the side of the chip facing away from the encapsulation substrate, and the waterproof layer at least covers the connection portion between the sealing structure and the chip.
8. The chip packaging structure according to claim 7, wherein The waterproof layer covers the surface of the side of the chip facing away from the encapsulation substrate, and the waterproof layer also covers the surface of the side of the sealing structure facing away from the encapsulation substrate.
9. The chip packaging structure according to claim 7, wherein, The waterproof layer includes at least one of a metal coating or an inorganic coating.
10. The chip packaging structure according to claim 7, characterized in that, The thickness of the waterproof layer is 5μm to 100μm.
11. The chip packaging structure according to claim 1, characterized in that, The chip packaging structure further includes: A fixed plate, the fixed plate is disposed on a side of the encapsulation substrate away from the chip, and the fixed plate is connected to the encapsulation substrate, and the heat dissipation cover is connected to the fixed plate.
12. The chip packaging structure according to claim 1, wherein, Jet holes and return holes communicating with the heat dissipation cavity are formed in the heat dissipation cover.
13. The chip packaging structure according to claim 12, wherein The distance from the outlet end of the jet hole facing the chip to the chip is h; where 0 < h ≤ 1 mm.
14. A single board, characterized in that, Comprising: The chip packaging structure according to any one of claims 1-13; A liquid path system, connected to the heat dissipation cover of the chip packaging structure, and the liquid path system is communicated with the heat dissipation cavity.
15. A network device, characterized in that, Comprising: The single board according to claim 14; A cabinet, the single board is disposed in the cabinet and connected to the cabinet.