Solar cell, forming method thereof and photovoltaic module

Abstract

The embodiment of the invention relates to the photovoltaic field, and provides a solar cell piece and a forming method thereof, and a photovoltaic module, the solar cell piece comprises a substrate, the substrate comprises a first surface and a second surface which are opposite, and the second surface comprises N regions and P regions which are alternately arranged; the first tunneling layer covers the surface of the N region; the first doped conductive layer covers the surface of the first tunneling layer; the first work function layer covers part of the surface of the first doped conductive layer; the passivation layer at least covers the surface of the P region; the second doped conductive layer covers the surface of the passivation layer; the second work function layer covers part of the surface of the second doped conductive layer, the second work function layer and the first work function layer are spaced, and the work function of the second work function layer is larger than that of the first work function layer. And the performance of the solar cell can be improved.

Description

Technical Field

[0001] The present disclosure relates to the field of photovoltaics, and particularly to a solar cell and a method for forming the same, and a photovoltaic module. Background Art

[0002] Crystalline silicon solar cells have evolved from BSF and PERC to PERC+. Through continuous technological iteration and upgrading, the conversion efficiency of crystalline silicon solar cells has become higher and higher. Currently, the mass production efficiency of PERC+ reaches about 23.45%, which is close to its theoretical limit efficiency of 24.5%. The subsequent efficiency improvement is more difficult and the improvement space is limited. Nowadays, TOPcon cells, HJT cells, back-contact cells, etc. have become new development trends of crystalline silicon solar cells and are at the forefront of current international research and industrialization.

[0003] Among them, a back-contact cell is a crystalline silicon solar cell in which both the emitter electrode and the base electrode of the cell are located on the back surface of the cell. The back-contact cell has no metal grid electrode blocking on the front surface, increasing the light absorption efficiency and greatly improving the short-circuit current. At the same time, the back-contact cell uses amorphous silicon or microcrystalline silicon and its doping method to passivate the cell surface, improving the open-circuit voltage. The above factors effectively increase the conversion efficiency of the back-contact cell, making the back-contact cell have good development prospects.

[0004] There is still a need to improve the performance of solar cells. Summary of the Invention

[0005] Embodiments of the present disclosure provide a solar cell and a method for forming the same, and a photovoltaic module, which can at least improve the performance of the solar cell.

[0006] According to some embodiments of the present disclosure, on the one hand, an embodiment of the present disclosure provides a solar cell, including: a substrate, the substrate includes opposite first and second surfaces, and the second surface includes alternately arranged N regions and P regions; a first tunneling layer, the first tunneling layer covers the surface of the N region; a first doped conductive layer, the first doped conductive layer covers the surface of the first tunneling layer; a first work function layer, the first work function layer covers a part of the surface of the first doped conductive layer; a passivation layer, the passivation layer at least covers the surface of the P region; a second doped conductive layer, the second doped conductive layer covers the surface of the passivation layer; a second work function layer, the second work function layer covers a part of the surface of the second doped conductive layer, the second work function layer is spaced from the first work function layer, and the work function of the second work function layer is greater than the work function of the first work function layer.

[0007] In some embodiments, the work function of the first work function layer is less than or equal to 4.9 eV, and the work function of the second work function layer is greater than or equal to 4.9 eV.

[0008] In some embodiments, the material of the first doped conductive layer is doped polysilicon, the material of the passivation layer is intrinsic amorphous silicon, and the sidewalls of the passivation layer are in contact with the sidewalls of the first doped conductive layer.

[0009] In some embodiments, in the direction from the second surface towards the first surface, the bottom surface of the P region is higher than the bottom surface of the N region, and the surface of the second doped conductive layer close to the substrate is lower than the surface of the first doped conductive layer away from the substrate.

[0010] In some embodiments, the first work function layer further covers the surface of the second work function layer, and the first work function layer covering the surface of the second work function layer is spaced apart from the first work function layer located in the N region.

[0011] In some embodiments, the thickness of the first work function layer located in the N region is greater than that of the first work function layer covering the surface of the second work function layer.

[0012] In some embodiments, the thickness of the first work function layer is 30 nm to 80 nm, and the thickness of the second work function layer is 5 nm to 40 nm.

[0013] According to some embodiments of the present disclosure, on the other hand, an embodiment of the present disclosure further provides a method for forming a solar cell chip, including: providing a substrate, the substrate including opposite first and second surfaces, the second surface including alternately arranged N regions and P regions; forming a first tunneling layer, the first tunneling layer covering the surface of the N region; forming a first doped conductive layer, the first doped conductive layer covering the surface of the first tunneling layer; forming a passivation layer, the passivation layer covering the surface of the P region; forming a second doped conductive layer, the second doped conductive layer covering the surface of the passivation layer; forming a second work function layer, the second work function layer covering the surface of the second doped conductive layer; forming a first work function layer, the first work function layer covering the surface of the first doped conductive layer, the second work function layer being spaced apart from the first work function layer, and the work function of the second work function layer being greater than the work function of the first work function layer.

[0014] In some embodiments, the method for forming the first work function layer includes: forming a first initial work function layer, the first initial work function layer covering the surfaces of the first doped conductive layer and the second work function layer; using a laser process to remove a part of the first initial work function layer at a position corresponding to the junction of the N region and the P region, and the remaining first initial work function layer serves as the first work function layer.

[0015] According to some embodiments of the present disclosure, on the other hand, an embodiment of the present disclosure further provides a photovoltaic module, including: a battery string, the battery string includes: a plurality of solar cells as described above, or solar cells formed by the forming method of the solar cells as described above; a welding strip, the welding strip is electrically connected to at least two of the solar cells to serially connect adjacent solar cells; an encapsulation film, the encapsulation film is used to cover the surface of the battery string; a cover plate, the cover plate is used to cover the surface of the encapsulation film away from the battery string.

[0016] The technical solution provided by the embodiment of the present disclosure has at least the following advantages: a low work function layer is arranged at the corresponding position of the N region, and a high work function layer is arranged at the corresponding position of the P region. For the N region, the energy bands between the low work function layer and the first doped conductive layer are similar, and the barrier height is low, which can reduce the contact resistance between the first work function layer and the first doped conductive layer and improve the fill factor of the solar cell. For the P region, the energy bands between the high work function layer and the second doped conductive layer are similar, and the barrier height is low, which can reduce the contact resistance between the second work function layer and the second doped conductive layer, thereby improving the fill factor of the solar cell. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] One or more embodiments are exemplarily illustrated by the pictures in the corresponding drawings. These exemplary illustrations do not constitute a limitation on the embodiments. Unless otherwise stated, the figures in the drawings do not constitute a proportional limitation; in order to more clearly illustrate the technical solutions in the embodiments of the present disclosure or the prior art, the following will briefly introduce the drawings required to be used in the embodiments. Obviously, the following described drawings are only some embodiments of the present disclosure. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts.

[0018] Figure 1 It is a schematic structural diagram of a solar cell provided by an embodiment of the present disclosure;

[0019] Figures 2 to 9 It is a schematic structural diagram corresponding to each step of a forming method of a solar cell provided by an embodiment of the present disclosure;

[0020] Figure 10 It is a schematic structural diagram of a photovoltaic module provided by an embodiment of the present disclosure;

[0021] Figure 11 It is a sectional view of a photovoltaic module provided by an embodiment of the present disclosure. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0022] As can be seen from the background art, it is necessary to further improve the performance of current solar cells.

[0023] In the embodiments of the present disclosure, a low work function layer is disposed at a corresponding position in the N region, and a high work function layer is disposed at a corresponding position in the P region. For the N region, the energy bands between the low work function layer and the first doped conductive layer are similar, and the barrier height is low, which can reduce the contact resistance between the first work function layer and the first doped conductive layer, and improve the fill factor of the solar cell. For the P region, the energy bands between the high work function layer and the second doped conductive layer are similar, and the barrier height is low, which can reduce the contact resistance between the second work function layer and the second doped conductive layer, thereby improving the fill factor of the solar cell.

[0024] In the description of the embodiments of the present disclosure, technical terms such as "first" and "second" are only used to distinguish different objects, and cannot be understood as indicating or implying relative importance or implicitly indicating the quantity, specific order or primary-secondary relationship of the indicated technical features. In the description of the embodiments of the present disclosure, the meaning of "a plurality" is more than two, unless otherwise specifically defined.

[0025] Reference to "embodiments" in this text means that a particular feature, structure, or characteristic described in connection with the embodiments can be included in at least one embodiment of the present disclosure. The phrase appears in various places in the specification and does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment mutually exclusive with other embodiments. Those skilled in the art will explicitly and implicitly understand that the embodiments described herein can be combined with other embodiments.

[0026] In the description of the embodiments of the present disclosure, the term "and / or" is merely a description of the association relationship of associated objects, indicating that there can be three relationships. For example, A and / or B can represent: the existence of A, the simultaneous existence of A and B, and the existence of B. In addition, the character " / " in this text generally represents an "or" relationship between the associated objects before and after.

[0027] In the description of the embodiments of the present disclosure, the term "a plurality" refers to more than two (including two). Similarly, "a plurality of groups" refers to more than two groups (including two groups), and "a plurality of sheets" refers to more than two sheets (including two sheets).

[0028] In the description of the embodiments of the present disclosure, technical terms such as "center", "longitudinal", "transverse", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", "axial", "radial", "circumferential", etc. indicate the orientation or positional relationship based on the orientation or positional relationship shown in the drawings. It is only for the convenience of describing the embodiments of the present disclosure and simplifying the description, and does not indicate or imply that the indicated device or element must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the embodiments of the present disclosure.

[0029] In the description of the embodiments of the present disclosure, unless otherwise clearly defined and limited, technical terms such as "installation", "connection", "connection", "fixation", etc. should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or integrated; it can also be a mechanical connection or an electrical connection; it can be directly connected or indirectly connected through an intermediate medium, and can be the communication inside two components or the interaction relationship between two components. For those of ordinary skill in the art, the specific meanings of the above terms in the embodiments of the present disclosure can be understood according to specific circumstances.

[0030] In the corresponding drawings of the embodiments of the present disclosure, for better understanding and convenience of description, the thickness and area of the layers are enlarged. When describing a component (such as a layer, film, region, or substrate) on or on the surface of another component, the component can be "directly" on the surface of the other component, or there can be a third component between the two components. On the contrary, when describing a component on the surface of another component or when another component is formed or provided on the surface of a component, it means that there is no third component between the two components. In addition, when describing a component "substantially" formed on another component, it means that the component is not formed on the entire surface (or front surface) of the other component, nor on a partial edge of the entire surface.

[0031] In the description of the embodiments of the present disclosure, when a certain component "includes" another component, unless otherwise specified, other components are not excluded, and other components may further be included. In addition, when components such as layers, films, regions, or plates are referred to as "on / at" another component, it can be "directly on" the other component (that is, on the surface of the other component and there are no other components between them), or there can be another component between them. In addition, when components such as layers, films, regions, plates, etc. are "directly located on" another component, or when components such as layers, films, regions, plates, etc. are located on the surface of another component, it means that there are no other components between them.

[0032] The terms used in the description of the various embodiments herein are only for describing specific embodiments and are not intended to be limiting. As used in the description of the various embodiments and the appended claims, "the component" is also intended to include the plural form unless the context clearly indicates otherwise. Among them, the component includes components such as layers, films, regions, or plates.

[0033] The following will elaborate on the embodiments of the present disclosure in conjunction with the drawings. However, those of ordinary skill in the art can understand that in the embodiments of the present disclosure, many technical details are provided for readers to better understand the present disclosure. However, even without these technical details and various changes and modifications based on the following embodiments, the technical solutions claimed by the present disclosure can still be implemented.

[0034] Reference Figure 1 , Figure 1 is a schematic structural view of a solar cell provided by an embodiment of the present disclosure.

[0035] In some embodiments, the solar cell may include: a substrate 100, the substrate 100 includes opposite first and second surfaces 110 and 120, and the second surface 120 includes alternately arranged N regions 130 and P regions 140.

[0036] The solar cell may further include: a first tunneling layer 101, the first tunneling layer 101 covers the surface of the N region 130.

[0037] The solar cell may further include: a first doped conductive layer 102, the first doped conductive layer 102 covers the surface of the first tunneling layer 101.

[0038] The solar cell may further include: a first work function layer 103, the first work function layer 103 covers a part of the surface of the first doped conductive layer 102.

[0039] The solar cell may further include: a passivation layer 104, the passivation layer 104 covers at least the surface of the P region 140.

[0040] The solar cell may further include: a second doped conductive layer 105, the second doped conductive layer 105 covers the surface of the passivation layer 104.

[0041] The solar cell may further include: a second work function layer 106, the second work function layer 106 covers a part of the surface of the second doped conductive layer 105, the second work function layer 106 is spaced from the first work function layer 103, and the work function of the second work function layer 106 is less than the work function of the first work function layer 103.

[0042] In the embodiment of the present disclosure, by providing a low work function layer at the corresponding position of the N region 130 and a high work function layer at the corresponding position of the P region 140, for the N region 130, the energy bands between the low work function layer and the first doped conductive layer 102 are similar, and the barrier height is low, which can reduce the contact resistance between the first work function layer 103 and the first doped conductive layer 102 and improve the fill factor of the solar cell. For the P region 140, the energy bands between the high work function layer and the second doped conductive layer 105 are similar, and the barrier height is low, which can reduce the contact resistance between the second work function layer 106 and the second doped conductive layer 105, thereby improving the fill factor of the solar cell.

[0043] The substrate 100 is used to receive incident light and generate photo-generated carriers. In some embodiments, the substrate 100 may be a semiconductor substrate 100, for example, it may be silicon, germanium, germanium-silicon, or silicon-on-insulator.

[0044] In some embodiments, the material of the substrate 100 may be an elemental semiconductor material. Specifically, the elemental semiconductor material is composed of a single element, such as silicon or germanium. Among them, the elemental semiconductor material may be in single crystal state, polycrystalline state, amorphous state or microcrystalline state (a state with both single crystal state and amorphous state is called microcrystalline state). For example, silicon may be at least one of single crystal silicon, polycrystalline silicon, amorphous silicon or microcrystalline silicon. If the material of the substrate 100 is silicon, the material of the substrate 100 may include at least one of single crystal silicon, polycrystalline silicon, amorphous silicon or microcrystalline silicon.

[0045] The substrate 100 may be an N-type semiconductor substrate or a P-type semiconductor substrate. The N-type semiconductor substrate is doped with an N-type doping element, and the N-type doping element may be any one of Group V elements such as phosphorus (P), bismuth (Bi), antimony (Sb) or arsenic (As). The P-type semiconductor substrate is doped with a P-type element, and the P-type doping element may be any one of Group III elements such as boron (B), aluminum (Al), gallium (Ga) or indium (In).

[0046] The first surface 110 and the second surface 120 of the substrate 100 are respectively the front and back of the corresponding substrate 100. If the solar cell is a single-sided cell, the first surface 110 of the substrate 100 serves as the light-receiving surface for receiving incident light, and the back surface of the substrate 100 serves as the backlight surface.

[0047] In some embodiments, the front surface of the substrate 100 has a textured structure, and the textured structure may include a pyramidal textured structure with regular shape and black silicon with irregular shape. The inclined surface of the textured structure can increase the internal reflection of incident light, thereby improving the absorption and utilization rate of the substrate 100 for incident light, and further improving the cell efficiency of the solar cell.

[0048] In some embodiments, the solar cell further includes: a front passivation layer 107, which is located on the first surface 110. The front passivation layer 107 may be a single-layer structure or a stacked structure. In the figure, it is shown as a two-layer stack. In other embodiments, the front passivation layer 107 may also be a stack with other numbers of layers.

[0049] The front passivation layer 107 may include: a first passivation layer 117, which covers the first surface 110; a second passivation layer 127, which covers the surface of the first passivation layer 117 away from the substrate 100. Among them, the material of the first passivation layer 117 may be aluminum oxide or intrinsic amorphous silicon, and the material of the second passivation layer 127 may be silicon oxide, silicon nitride, silicon oxynitride, carbon oxynitride, titanium oxide, hafnium oxide or aluminum oxide and other materials. Among them, the first passivation layer 117 can play a passivation role, and the second passivation layer 127 can play an antireflection role.

[0050] The N region 130 of the second side 120 is the region doped with N-type ions, and the P region 140 is the region doped with P-type ions. If the substrate 100 is an N-type substrate 100, a PN junction is formed between the P region 140 and the substrate 100 to effectively shunt the carriers. The doping ion concentration in the N region 130 will be greater than the doping ion concentration in the substrate 100, thereby forming a high-low junction in the N region 130 and enhancing the carrier separation ability.

[0051] In some embodiments, there is a gap or isolation structure between the N region 130 and the P region 140 to achieve isolation between regions of different conduction types, which can eliminate the leakage current generated by the formation of a tunnel junction between the heavily doped P region 140 and the N region 130 on the back of the solar cell chip and affect the battery efficiency.

[0052] In some embodiments, the material of the first tunneling layer 101 can be silicon oxide, silicon nitride, silicon oxynitride, etc. The first tunneling layer 101 is used to passivate the substrate 100 on the one hand, and does not affect the carrier transport on the other hand, and can buffer the interfacial tension between the substrate 100 and the first doped conductive layer 102, thereby reducing the loss in carrier transport.

[0053] The first doped conductive layer 102 can be a doped polysilicon layer. The type of doping ions in the first doped conductive layer 102 is the same as that in the N region 130. Through the first doped conductive layer 102, the carriers in the N region 130 can be collected and transmitted to the first work function layer 103.

[0054] In some embodiments, the first work function layer 103 can be a TCO (Transparent Conductive Oxides) layer, and the materials of the first work function layer 103 can include: indium tungsten oxide (IWO), indium tin oxide (ITO), GaInO (GIO), GaInSnO (GITO), ZnInO (ZIO), ZnInSnO (ZITO), WO x 、ITiO、MnO x 、InO、CeO x and their combinations.

[0055] In some embodiments, the work function of the first work function layer 103 may be less than or equal to 4.9 eV. It can be understood that for the first doped conductive layer 102, it is usually made by doping donor impurities (such as phosphorus, arsenic), and its Fermi level is close to the bottom of the conduction band (CBM). For silicon materials, the energy level of the bottom of the conduction band is about 4.2 eV. In order to improve the contact performance between the first work function layer 103 and the first doped conductive layer 102, it is necessary to control the work function of the first work function layer 103 to be close to or lower than 4.9 eV to ensure Fermi level alignment and reduce the electron injection barrier. If the work function is too high (>4.9 eV), a large barrier will be formed at the interface, hindering electron flow and increasing the contact resistance.

[0056] In some embodiments, the thickness of the first work function layer 103 may be 30 nm to 80 nm, such as 35 nm, 38 nm, 42 nm, 44 nm, 49 nm, 58 nm, 67 nm, or 77 nm, etc. For the first work function layer 103, the first work function layer 103 is used to collect electrons in the N region 130. The mobility of electrons is high, but a long diffusion path is required to reach the back electrode. Therefore, setting the thickness of the first work function layer 103 to be 30 nm to 80 nm can provide sufficient space to ensure efficient electron transmission to the electrode, avoiding electron accumulation and transmission bottlenecks caused by the too thin first work function layer 103. Moreover, for the first work function layer 103, the resistivity of the material of the first work function layer 103 is usually high. Setting the thickness of the first work function layer 103 to be 30 nm to 80 nm can also reduce the lateral resistance, thereby improving the fill factor of the solar cell.

[0057] If the thickness of the first work function layer 103 is less than 30 nm, the formed first work function layer 103 may be discontinuous (such as forming an island structure), resulting in a significant increase in resistance and even causing local heating. If the thickness of the first work function layer 103 is greater than 80 nm, the cost of the solar cell will increase.

[0058] The passivation layer 104 may be intrinsic amorphous silicon. Utilizing the excellent surface passivation characteristics of intrinsic amorphous silicon itself can significantly reduce carrier recombination on the back surface. Moreover, the hydrogen atoms in the intrinsic amorphous silicon passivate the dangling bonds, reducing the surface state density, thereby reducing recombination and improving the open-circuit voltage and fill factor. Secondly, the intrinsic amorphous silicon layer has low absorption of visible light, especially in the long-wavelength range.

[0059] In some embodiments, the sidewall of the passivation layer 104 is in contact with the sidewall of the first doped conductive layer 102. For intrinsic amorphous silicon, the lateral transport ability of carriers in intrinsic amorphous silicon is poor. Therefore, even if the sidewall of the passivation layer 104 is in contact with the sidewall of the first doped conductive layer 102, a large amount of carrier recombination does not occur at the contact interface, nor does a large amount of leakage occur. Therefore, the sidewall of the passivation layer 104 can be directly set to be in contact with the sidewall of the first doped conductive layer 102, thereby reducing the process of forming a groove or an isolation layer on the back surface, and thus improving the reliability of the formed solar cell.

[0060] It can be understood that when both the first doped conductive layer 102 and the second doped conductive layer 105 are made of polycrystalline silicon materials, an isolation layer must be provided between the first doped conductive layer 102 and the second doped conductive layer 105. To set the isolation, the contact interface must be etched. On the one hand, the etching process cannot ensure that each contact interface is etched clean. If the etching is not clean, local leakage structures will be formed at a large number of positions on the solar cell, resulting in a reduction in the performance of the solar cell. On the other hand, the etching process will inevitably damage the first doped conductive layer 102, the second doped conductive layer 105, and even the substrate 100, which will affect the carrier collection performance of the solar cell.

[0061] The second doped conductive layer 105 can be an amorphous silicon layer doped with P-type (a-Si:H(p)), a doped nanocrystalline silicon doped with P-type (nc-Si:H(p)), or a hydrogenated nanocrystalline silicon oxide doped with P-type (nc-SiO x :H(p)), or one or more of them.

[0062] On the one hand, the second doped conductive layer 105 needs to be in contact with the passivation layer 104. When the passivation layer 104 is intrinsic amorphous silicon, setting the second doped conductive layer 105 to be an amorphous silicon layer doped with P-type (a-Si:H(p)), a doped nanocrystalline silicon doped with P-type (nc-Si:H(p)), or a hydrogenated nanocrystalline silicon oxide doped with P-type (nc-SiOx:H(p)), or one or more of them, can reduce the lattice difference between the second doped conductive layer 105 and the passivation layer 104, reduce the resistance of carrier transport, and thus improve the performance of the solar cell. On the other hand, the second doped conductive layer 105 needs to have good carrier collection ability and conductivity. Setting the second doped conductive layer 105 to be an amorphous silicon layer doped with P-type (a-Si:H(p)), a doped nanocrystalline silicon doped with P-type (nc-Si:H(p)), or a hydrogenated nanocrystalline silicon oxide doped with P-type (nc-SiOx:H(p)), or one or more of them can also improve the transport performance of the second doped conductive layer 105.

[0063] In some embodiments, in the direction where the second surface 120 points to the first surface 110, the bottom surface of the P region 140 is higher than the bottom surface of the N region 130, and the surface of the second doped conductive layer 105 close to the substrate 100 is lower than the surface of the first doped conductive layer 102 away from the substrate 100. It can be understood that the bottom surface of the P region 140 being higher than the bottom surface of the N region 130 means that the distance between the second surface 120 corresponding to the P region 140 and the first surface 110 is less than the distance between the second surface 120 corresponding to the N region 130 and the first surface 110. That is to say, the thickness of the substrate 100 corresponding to the P region 140 is less than the thickness of the substrate 100 corresponding to the N region 130. The surface of the second doped conductive layer 105 close to the substrate 100 being lower than the surface of the first doped conductive layer 102 away from the substrate 100 means that the distance between the surface of the second doped conductive layer 105 close to the substrate 100 and the second surface 120 is greater than the distance between the surface of the first doped conductive layer 102 away from the substrate 100 and the second surface 120. That is to say, the thickness of the passivation layer 104 is greater than the sum of the thicknesses of the first tunneling layer 101 and the first doped conductive layer 102.

[0064] Setting the surface of the second doped conductive layer 105 close to the substrate 100 to be lower than the surface of the first doped conductive layer 102 away from the substrate 100 can prevent contact between the second doped conductive layer 105 and the first doped conductive layer 102, thereby avoiding carrier recombination between the first doped conductive layer 102 and the second doped conductive layer 105 and preventing leakage in the solar cell.

[0065] In some embodiments, by controlling the thickness of the passivation layer 104, it is possible to achieve that while the bottom surface of the P region 140 is higher than the bottom surface of the N region 130, the surface of the formed second doped conductive layer 105 close to the substrate 100 is lower than the surface of the first doped conductive layer 102 away from the substrate 100.

[0066] In some embodiments, the second work function layer 106 can be a TCO (Transparent Conductive Oxides) layer, and the material of the second work function layer 106 can include: ITO, IWO, ICO, SnO x or a stack of one or more of TCO materials such as AZO.

[0067] In some embodiments, the work function of the second work function layer 106 is greater than or equal to 4.9 eV. It can be understood that for the second doped conductive layer 105, it is usually made by doping acceptor impurities (such as boron), and its Fermi level is close to the valence band top (VBM). For amorphous silicon materials, the valence band top energy level is usually between 5.0 and 5.2 eV. In order to form a good ohmic contact with the second doped conductive layer 105, the work function of the work function layer needs to be close to or higher than 4.9 eV to ensure Fermi level alignment and reduce the hole injection barrier. If the work function is too low (<4.9 eV), a large barrier will be formed at the interface, hindering hole flow and increasing the contact resistance.

[0068] In some embodiments, the first work function layer 103 also covers the surface of the second work function layer 106, and the first work function layer 103 covering the surface of the second work function layer 106 is spaced apart from the first work function layer 103 located in the N region 130. It can be understood that setting the first work function layer 103 covering the surface of the second work function layer 106 to be spaced apart from the first work function layer 103 located in the N region 130 can prevent the carriers transmitted in the N region 130 from recombining with the carriers transmitted in the P region 140 within the first work function layer 103, thereby avoiding carrier loss within the first work function layer 103.

[0069] In some embodiments, the thickness of the first work function layer 103 located in the N region 130 is greater than that of the first work function layer 103 covering the surface of the second work function layer 106. It can be understood that the surface of the second doped conductive layer 105 close to the substrate 100 is lower than the surface of the first doped conductive layer 102 away from the substrate 100, that is, the thickness of the solar cell at the corresponding position in the P region 140 is thicker. If the thicknesses of the first work function layers 103 in the N region 130 and the P region 140 are set to be the same, it will cause the thickness of the solar cell at the corresponding position in the P region 140 to be much greater than that at the corresponding position in the N region 130. Especially, there is also a second work function layer 106 formed at the corresponding position in the P region 140, which will further increase the thickness of the solar cell at the corresponding position in the P region 140, further resulting in a height difference between the N region 130 and the P region 140 of the solar cell, which may affect the subsequent assembly of the solar cell into a photovoltaic module. Therefore, the thickness of the first work function layer 103 located in the N region 130 is set to be greater than that of the first work function layer 103 covering the surface of the second work function layer 106 to reduce the height difference between the N region 130 and the P region 140 of the solar cell and improve the reliability of the solar cell.

[0070] In some embodiments, the difference between the thickness of the first work function layer 103 located in the N region 130 and the thickness of the first work function layer 103 covering the surface of the second work function layer 106 may be a first difference, and the height difference between the bottom surface of the second work function layer 106 and the bottom surface of the first doped conductive layer 102 is a second difference. The first difference may be equal to the second difference. In this way, the back surface of the solar cell can be controlled to be relatively flat, thereby improving the reliability of the solar cell.

[0071] In some embodiments, the first work function layer 103 may also only cover the surface of the first doped conductive layer 102, and the second work function layer 106 may also only cover the surface of the second doped conductive layer 105.

[0072] In some embodiments, the thickness of the second work function layer 106 is 5 nm to 40 nm, such as 10 nm, 15 nm, 18 nm, 23 nm, 27 nm, 36 nm, or 39 nm, etc. The thickness of 5 nm to 40 nm can ensure effective transmission while avoiding an increase in resistance caused by excessive thickness. Moreover, within this thickness range, light reflection and absorption losses can be reduced, ensuring that more photons enter the substrate 100 and improving the photoelectric conversion efficiency of the solar cell. Again, the second work function layer 106 needs to have a certain mechanical strength to withstand the stress in subsequent process steps (such as metal electrode formation), and it is also necessary to avoid the problem of mismatched thermal expansion coefficients caused by an overly thick second work function layer 106. Based on this, the thickness of the second work function layer 106 is set to 5 nm to 40 nm.

[0073] If the thickness of the second work function layer 106 is less than 5 nm, the process difficulty of forming the second work function layer 106 will increase, which may cause uneven coverage of the second work function layer 106, forming pinholes or defects and affecting device performance. If the thickness of the second work function layer 106 is greater than 40 nm, additional defects may be introduced at the contact interface, resulting in an increase in carrier recombination.

[0074] In some embodiments, the thickness of the first work function layer 103 can be greater than that of the second work function layer 106. For the N region 130, the majority carriers are electrons, and the diffusion length of electrons in the substrate 100 is relatively long. Sufficient thickness is required to ensure the effective transmission of electrons to the electrode. The thicker first work function layer 103 can reduce the resistance in the electron transmission path and improve the electron collection efficiency. Moreover, the thicker first work function layer 103 can form a stronger built-in electric field at the corresponding position of the N region 130 to accelerate the transmission of electrons to the electrode. For the P region 140, the majority carriers are holes. The mobility of holes is usually lower than that of electrons, but the transmission path of holes is shorter (mainly near the surface). Therefore, a thinner high work function layer can meet the hole collection requirements. Moreover, the thinner second work function layer 106 can form an appropriate electric field in the P region 140 while avoiding excessive interference with the electric field to ensure the efficient collection of holes.

[0075] For a solar cell, the N region 130 and the P region 140 are usually arranged alternately. Therefore, the formed first work function layer 103 and the second work function layer 106 are also arranged alternately. Setting the first work function layer 103 to be thicker can balance the requirements of both in terms of lateral conductivity and light reflection. For example, increasing the thickness of the first work function layer 103 can compensate for its higher resistance, while the thinner second work function layer 106 (such as ITO) utilizes its low resistance characteristic to achieve efficient hole collection.

[0076] In some embodiments, the solar cell further includes: a first electrode 108, the first electrode 108 being electrically connected to the first work function layer 103; a second electrode 109, the second electrode 109 being electrically connected to the second work function layer 106, and the first electrode 108 and the second electrode 109 being spaced apart.

[0077] For the first electrode 108 and the second electrode 109, generally both the first electrode 108 and the second electrode 109 are metal electrodes. If the first electrode 108 is in direct contact with the first doped conductive layer 102 and the second electrode 109 is in direct contact with the second doped conductive layer 105, then there will be a relatively high contact resistance between the first electrode 108 and the first doped conductive layer 102, and there will be a relatively high contact resistance between the second electrode 109 and the second doped conductive layer 105. Therefore, the first work function layer 103 is further provided. The first work function layer 103 spaces the first electrode 108 from the first doped conductive layer 102, and the second work function layer 106 spaces the second electrode 109 from the second doped conductive layer 105. It can also play a transitional role between the first doped conductive layer 102 and the first electrode 108 and between the second doped conductive layer 105 and the second electrode 109, thereby reducing interface defects and improving the transmission of carriers.

[0078] In the embodiments of the present disclosure, a low work function layer is disposed at a corresponding position of the N region 130, and a high work function layer is disposed at a corresponding position of the P region 140. For the N region 130, the energy bands between the low work function layer and the first doped conductive layer 102 are similar, and the barrier height is low, which can reduce the contact resistance between the first work function layer 103 and the first doped conductive layer 102, and improve the fill factor of the solar cell. For the P region 140, the energy bands between the high work function layer and the second doped conductive layer 105 are similar, and the barrier height is low, which can reduce the contact resistance between the second work function layer 106 and the second doped conductive layer 105, thereby improving the fill factor of the solar cell.

[0079] Another embodiment of the present disclosure further provides a method for forming a solar cell. This forming method can be used to form the solar cell in some or all of the above embodiments. It should be noted that the same or corresponding parts as the above embodiments can be referred to the above embodiments, and will not be described in detail below.

[0080] Reference Figures 2 to 9 and Figure 1 , Figures 2 to 9 and Figure 1 are schematic structural diagrams corresponding to each step of a method for forming a solar cell provided by the embodiments of the present disclosure.

[0081] In some embodiments, the method for forming a solar cell may include: providing a substrate 100, the substrate 100 includes opposite first surface 110 and second surface 120, and the second surface 120 includes alternately arranged N regions 130 and P regions 140.

[0082] The method for forming a solar cell may further include: forming a first tunneling layer 101, the first tunneling layer 101 covers the surface of the N region 130.

[0083] The method for forming a solar cell may further include: forming a first doped conductive layer 102, the first doped conductive layer 102 covers the surface of the first tunneling layer 101.

[0084] The method for forming a solar cell may further include: forming a passivation layer 104, the passivation layer 104 at least covers the surface of the P region 140.

[0085] The method for forming a solar cell may further include: forming a second doped conductive layer 105, the second doped conductive layer 105 covers the surface of the passivation layer 104.

[0086] The method for forming a solar cell may further include: forming a second work function layer 106, the second work function layer 106 covers a part of the surface of the second doped conductive layer 105.

[0087] The method for forming a solar cell may further include: forming a first work function layer 103, the first work function layer 103 covering a partial surface of the first doped conductive layer 102, the second work function layer 106 being spaced apart from the first work function layer 103, and the work function of the second work function layer 106 being greater than that of the first work function layer 103.

[0088] By forming the first work function layer 103 at a position corresponding to the N region 130, the contact resistance between the first work function layer 103 and the first doped conductive layer 102 is reduced, and the carrier collection ability of the solar cell is improved. Similarly, by forming the second work function layer 106 at a position corresponding to the P region 140, the contact resistance between the second work function layer 106 and the second doped conductive layer 105 is reduced, thereby improving the carrier collection ability of the solar cell.

[0089] Reference Figure 2 , a substrate 100 is provided.

[0090] The substrate 100 may be a silicon wafer. After obtaining the silicon wafer, the silicon wafer may be cleaned and polished to remove impurities on the surface of the substrate 100, so as to improve the reliability of forming a solar cell subsequently.

[0091] Reference Figure 3 , a first tunneling layer 101 and a first doped conductive layer 102 are formed.

[0092] In some embodiments, the first tunneling layer 101 may be formed by deposition. In other embodiments, the first tunneling layer 101 may also be formed by oxidizing a part of the substrate 100.

[0093] The first doped conductive layer 102 may be formed by first forming an amorphous silicon layer on the surface of the substrate 100 and then converting the amorphous silicon layer into the first doped conductive layer 102 by doping.

[0094] While forming the amorphous silicon layer, an amorphous silicon layer is simultaneously formed on the first surface 110 of the substrate 100. During the process of converting the amorphous silicon layer into the first doped conductive layer 102, a first glass layer is formed. Among them, the doping method is by phosphorus diffusion, and the formed first glass layer is a phosphosilicate glass layer.

[0095] Reference Figure 4 , a part of the first glass layer is removed.

[0096] In some embodiments, the second surface 120 is patterned, and the first glass layer corresponding to the P region 140 can be removed through the patterning process.

[0097] The first surface 110 is etched to remove the first glass layer located on the first surface 110.

[0098] Reference Figure 5, the texturing process is carried out.

[0099] The texturing process can be carried out by wet etching. Through wet etching, the first doped conductive layer 102 located on the first surface 110 is removed, and a textured surface structure is formed on the first surface 110. At the same time, through wet etching, the first doped conductive layer 102 and the first tunneling layer 101 corresponding to the P region 140 are removed, and a textured surface structure is formed at the position corresponding to the P region 140.

[0100] Inevitably during the etching process, part of the substrate 100 at the position corresponding to the P region 140 will be etched. Therefore, the thickness of the substrate 100 at the position corresponding to the P region 140 will also be less than the thickness of the substrate 100 at the position corresponding to the N region 130.

[0101] It can be understood that since the first glass layer is retained in the N region 130, the first doped conductive layer 102 and the first tunneling layer 101 corresponding to the N region 130 are protected and not etched during the texturing process.

[0102] Reference Figure 6 , the first glass layer corresponding to the N region 130 is removed, and a cleaning process is carried out. Through the cleaning process, on the one hand, the impurities generated during the etching process are cleaned to avoid affecting subsequent process steps. On the other hand, the etching reagent used in the texturing process is cleaned to avoid the residue of impurity ions.

[0103] Continue to refer to Figure 6 , the method for forming a solar cell also includes: forming a front passivation layer 107.

[0104] Among them, the front passivation layer 107 can include a two-layer structure. Therefore, the first passivation layer 117 can be formed on the first surface 110 by deposition first, and then the second passivation layer 127 can be formed by deposition.

[0105] In some embodiments, a front passivation layer 107 is also formed on the second surface 120 during the formation of the front passivation layer 107. Therefore, the front passivation layer 107 located on the second surface 120 can also be removed by a chain cleaning method. After removing the front passivation layer 107 located on the second surface 120, a cleaning process can also be carried out to remove the impurities generated by the chain cleaning, so as to improve the reliability of subsequent process steps.

[0106] Reference Figure 7 , a passivation layer 104 and a second doped conductive layer 105 are formed.

[0107] In some embodiments, the passivation layer 104 can be formed by deposition. The passivation layer 104 can be formed by deposition in a low-temperature environment, where the low-temperature environment refers to an environmental temperature less than 250 °C.

[0108] After that, the second doped conductive layer 105 can also be formed by deposition. The second doped conductive layer 105 can be formed in a low-temperature environment, where the low-temperature environment refers to an environmental temperature less than 250°C. The second doped conductive layer 105 can be formed using the environment for forming the passivation layer 104 after the passivation layer 104 is formed.

[0109] Remove the passivation layer 104 and the second doped conductive layer 105 corresponding to the N region 130.

[0110] The passivation layer 104 and the second doped conductive layer 105 can be removed by patterning. A mask is formed at the position corresponding to the P region 140, and then the passivation layer 104 and the second doped conductive layer 105 located in the N region 130 are removed by etching through the mask.

[0111] In some other embodiments, the passivation layer 104 and the second doped conductive layer 105 can also be removed by laser patterning.

[0112] Refer to Figure 8 , and form the second work function layer 106.

[0113] In some embodiments, the second work function layer 106 can be deposited on the entire second surface 120 by deposition, and then the second work function layer 106 corresponding to the N region 130 is removed by ink etching or laser patterning.

[0114] Among them, ink etching means that ink is coated on the surface of the second work function layer 106 at the position corresponding to the P region 140, and the ink is used to protect the second work function layer 106 from the influence of chemical etchants; the laser patterning method is to remove the second work function layer 106 at the position corresponding to the P region 140 by using a laser.

[0115] Refer to Figure 9 , and form the first work function layer 103.

[0116] In some embodiments, the method for forming the first work function layer 103 includes: forming a first initial work function layer that covers the surfaces of the first doped conductive layer 102 and the second work function layer 106; using a laser process to remove part of the first initial work function layer at the position corresponding to the junction of the N region 130 and the P region 140, and the remaining first initial work function layer serves as the first work function layer 103. Forming the first work function layer by first forming the first initial work function layer and then using the laser process can ensure the contact area between the first work function layer and the first doped conductive layer 102, thereby reducing the contact area between the first work function layer and the first doped conductive layer 102.

[0117] In some embodiments, the first work function layer 103 can be deposited on the entire second surface 120 by deposition, and then the first work function layer 103 corresponding to the P region 140 is removed by ink etching or laser patterning.

[0118] The ink etching or laser patterning can refer to the process of forming the second work function layer 106 described above, which will not be elaborated here.

[0119] It can be understood that the reason for forming the second work function layer 106 first and then the first work function layer 103 is as follows: The second work function layer 106 cannot be retained at the position corresponding to the N region 130, while the first work function layer 103 can be retained at the position corresponding to the P region 140. The N region 130 needs to be in contact with a low work function layer, and the P region 140 needs to be in contact with a high work function layer. Therefore, retaining the first work function layer 103 in the P region 140 will not affect the barrier of the P region 140, but retaining the second work function layer 106 in the N region 130 will affect the barrier of the N region 130. By forming the second work function layer 106 first, it can ensure that the second work function layer 106 in the N region 130 is removed completely and will not affect the performance of the first work function layer 103 and the second work function layer 106. If the first work function layer 103 is formed first and then the second work function layer 106 is formed, then in order to completely remove the second work function layer 106 corresponding to the N region 130, it will inevitably affect the first work function layer 103 and cause damage to the first work function layer 103.

[0120] Refer to Figure 1 to form the first electrode 108 and the second electrode 109.

[0121] The first electrode 108 and the second electrode 109 can be formed by screen printing in batches respectively.

[0122] Another embodiment of the present disclosure further provides a photovoltaic module, which may include the solar cell wafers in some or all of the above embodiments, or the solar cell wafers formed by the solar cell wafer forming method in some or all of the above embodiments. It should be noted that the same or corresponding parts as those in the above embodiments can refer to the above embodiments and will not be elaborated below.

[0123] In some embodiments, the photovoltaic module includes: a battery string, and the battery string includes: a plurality of solar cell wafers 40 in some or all of the above embodiments, or solar cell wafers 40 formed by the forming method of the solar cell wafers as described above; a welding ribbon 43, and the welding ribbon 43 is electrically connected to at least two solar cell wafers 40 to serially connect adjacent solar cell wafers 40.

[0124] The photovoltaic module further includes: an encapsulation glue film 41, and the encapsulation glue film 41 is used to cover the surface of the battery string.

[0125] The photovoltaic module further includes: a cover plate 42 for covering the surface of the encapsulation adhesive film 41 away from the battery string.

[0126] Wherein, Figure 10 FIG. is a partial three-dimensional schematic diagram of a photovoltaic module provided by another embodiment of the present disclosure, Figure 11 is Figure 10 a partial cross-sectional schematic diagram along the first cross-sectional direction AA1.

[0127] In some embodiments, the encapsulation adhesive film 41 includes a first encapsulation layer and a second encapsulation layer. The first encapsulation layer covers one of the front or back surfaces of the solar cell, and the second encapsulation layer covers the other of the front or back surfaces of the solar cell. Specifically, at least one of the first encapsulation layer or the second encapsulation layer may be an organic encapsulation adhesive film such as a polyvinyl butyral (PVB) adhesive film, an ethylene-vinyl acetate copolymer (EVA) adhesive film, a polyethylene octene copolymer (POE) adhesive film, or a polyethylene terephthalate (PET) adhesive film. Alternatively, at least one of the first encapsulation layer or the second encapsulation layer may also be an adhesive film such as an EP adhesive film, an EPE adhesive film, or a PVP adhesive film. Among them, the EP adhesive film refers to a co-extruded adhesive film composed of an EVA adhesive film and a POE adhesive film stacked, the EPE adhesive film refers to a co-extruded adhesive film formed by sequentially stacking an EVA adhesive film + a POE adhesive film + an EVA adhesive film, and the PVP adhesive film refers to a co-extruded adhesive film formed by stacking a POE adhesive film + an EVA adhesive film + a POE adhesive film. The co-extruded adhesive film can be prepared by extruding one or more raw materials onto another already formed adhesive film in sequence during the adhesive film processing, or by bonding different types of already formed adhesive films together.

[0128] In some cases, there is a demarcation line between the first encapsulation layer and the second encapsulation layer before lamination. After the lamination treatment, there will no longer be the concept of the first encapsulation layer and the second encapsulation layer in the formed photovoltaic module, that is, the first encapsulation layer and the second encapsulation layer have formed an integral encapsulation adhesive film 41.

[0129] In some embodiments, the cover plate 42 can be a cover plate with a light-transmitting function such as a glass cover plate or a plastic cover plate. Specifically, the surface of the cover plate 42 facing the encapsulation adhesive film 41 can be a concave-convex surface or a velvet surface including a plurality of protruding structures, so as to increase the utilization rate of incident light. The cover plate 42 includes a first cover plate and a second cover plate. The first cover plate is opposite to the first encapsulation layer, and the second cover plate is opposite to the second encapsulation layer.

[0130] Those of ordinary skill in the art can understand that the above-described embodiments are specific examples for implementing the present disclosure. In actual applications, various changes can be made to them in form and details without departing from the spirit and scope of the embodiments of the present disclosure. Any person skilled in the art can make various changes and modifications without departing from the spirit and scope of the embodiments of the present disclosure. Therefore, the protection scope of the embodiments of the present disclosure should be subject to the scope defined by the claims.

Claims

1. A solar cell, characterized in that, Comprising: A substrate, the substrate comprising opposite first and second surfaces, the second surface comprising alternately arranged N regions and P regions; A first tunneling layer, the first tunneling layer covering the surface of the N regions; A first doped conductive layer, the first doped conductive layer covering the surface of the first tunneling layer; A first work function layer, the first work function layer covering a part of the surface of the first doped conductive layer; A passivation layer, the passivation layer covering at least the surface of the P regions; A second doped conductive layer, the second doped conductive layer covering the surface of the passivation layer; A second work function layer, the second work function layer covering a part of the surface of the second doped conductive layer, the second work function layer being spaced from the first work function layer, and the work function of the second work function layer being greater than the work function of the first work function layer.

2. The solar cell according to claim 1, characterized in that, The work function of the first work function layer is less than or equal to 4.9 eV, and the work function of the second work function layer is greater than or equal to 4.9 eV.

3. The solar cell according to claim 1, characterized in that, The material of the first doped conductive layer is doped polysilicon, the material of the passivation layer is intrinsic amorphous silicon, and the sidewalls of the passivation layer are in contact with the sidewalls of the first doped conductive layer.

4. The solar cell according to claim 1 or 3, characterized in that, In the direction from the second surface to the first surface, the bottom surface of the P regions is higher than the bottom surface of the N regions, and the surface of the second doped conductive layer close to the substrate is lower than the surface of the first doped conductive layer away from the substrate.

5. The solar cell according to claim 4, characterized in that, The first work function layer also covers the surface of the second work function layer, and the first work function layer covering the surface of the second work function layer is spaced from the first work function layer located in the N regions.

6. The solar cell according to claim 5, characterized in that, The thickness of the first work function layer located in the N regions is greater than the first work function layer covering the surface of the second work function layer.

7. The solar cell according to claim 1, wherein The thickness of the first work function layer is 30 nm to 80 nm, and the thickness of the second work function layer is 5 nm to 40 nm.

8. A method for forming a solar cell chip, characterized in that, Comprising: Providing a substrate, the substrate comprising opposite first and second surfaces, the second surface comprising alternately arranged N regions and P regions; Forming a first tunneling layer, the first tunneling layer covering the surface of the N regions; Forming a first doped conductive layer, the first doped conductive layer covering the surface of the first tunneling layer; Forming a passivation layer, the passivation layer covering at least the surface of the P regions; Forming a second doped conductive layer, the second doped conductive layer covering a part of the surface of the passivation layer; Forming a second work function layer, the second work function layer covering the surface of the second doped conductive layer; Forming a first work function layer, the first work function layer covering a part of the surface of the first doped conductive layer, the second work function layer being spaced from the first work function layer, and the work function of the second work function layer being greater than the work function of the first work function layer.

9. The method for forming a solar cell according to claim 8, wherein The method for forming the first work function layer comprises: Forming a first initial work function layer, the first initial work function layer covering the surface of the first doped conductive layer and the second work function layer; Using a laser process to remove a part of the first initial work function layer at the position corresponding to the junction of the N regions and the P regions, and the remaining first initial work function layer is used as the first work function layer.

10. A photovoltaic module, characterized in that, Comprising: A battery string, the battery string comprising: a plurality of solar cells as described in any one of claims 1 to 7, or solar cells formed by a forming method of solar cells as described in any one of claims 8 to 9; a welding strip, the welding strip being electrically connected to at least two of the solar cells to serially connect adjacent solar cells; An encapsulation film, the encapsulation film being used to cover the surface of the battery string; A cover plate, the cover plate being used to cover the surface of the encapsulation film away from the battery string.

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