Unconditionally stable two-way amplifier based on negative feedback technique

Abstract

The application discloses a kind of unconditional stable bidirectional amplifier based on negative feedback technology, including: amplification circuit, switch control circuit, and amplification circuit is connected with switch control circuit, solve the related problems of the stability of existing bidirectional amplifier insufficient.This bidirectional amplifier introduces negative feedback, effectively suppresses the interference in amplification process, ensures the stability and accuracy of output signal, only a single amplifier is used to complete the bidirectional amplification function, compared with the existing technology using two amplifiers and adopting single-pole double-throw switch switching, the bidirectional amplifier of the application can reduce the chip size to about 1 / 2, and since the chip has only a single amplifier, the power consumption can be reduced compared with the existing bidirectional amplifier structure, and the absolute stability and reverse isolation can also be guaranteed in the process of forming the amplifier switching loop, and the single-amplifier scheme in the application does not need switch power supply control, so the speed of bidirectional switching is also greatly enhanced.

Description

Technical Field

[0001] This invention belongs to the field of wireless communication technology, specifically relating to an unconditionally stable bidirectional amplifier based on negative feedback technology. Background Technology

[0002] In recent years, with the development of wireless communication systems, the requirements for components have gradually increased, especially in terms of miniaturization. As an important component of wireless communication systems, amplifiers are used to amplify signals to meet communication standards. Typically, the receiving and transmitting paths use independent amplification circuits, which not only increases the system size but also introduces high complexity. Therefore, bidirectional amplifiers have attracted the attention of many researchers.

[0003] A bidirectional amplifier is an active radio frequency (RF) device widely used in various communication, radar, and other RF sensing applications to enhance signal strength and ensure signal integrity during long-distance transmission or through complex networks. When selecting the transmit and receive functions of existing bidirectional amplifiers, various transient impedances and parasitic effects may occur, leading to overloading of the power amplifier or overload of the low-noise amplifier, causing component damage or oscillation.

[0004] Therefore, existing bidirectional amplifier designs still need to be improved in terms of stability, and there is an urgent need for a bidirectional amplifier design that can balance wide bandwidth, high power and dynamic stability. Summary of the Invention

[0005] To address the aforementioned technical problems, this invention provides an unconditionally stable bidirectional amplifier based on negative feedback technology. By introducing negative feedback, interference during the amplification process is effectively suppressed, ensuring the stability and accuracy of the output signal.

[0006] The technical solution adopted in this invention is: an unconditionally stable bidirectional amplifier based on negative feedback technology, comprising: an amplification circuit and a switching control circuit. The amplification circuit and the switching control circuit are connected.

[0007] The amplifier circuit adopts a JFET cascaded amplifier structure.

[0008] The amplifier circuit includes: a DC bias port VD, a first JFET1, a second JFET2, a third JFET3, a fourth JFET4, resistors R1, R2, R4, and R5, capacitors C1, C2, C3, C4, C5, and C6, and inductors L1, L2, L3, L4, L5, and L6.

[0009] In this configuration, the source of the first JFET1 and the drain of the second JFET2 are connected. The drain of the first JFET1 is connected to the first terminal of inductor L1, and the gate of the first JFET1 is connected to the first terminal of resistor R1. The source of the second JFET2 is grounded, and the gate of the second JFET2 is connected to the first terminal of resistor R2. The second terminal of resistor R1 is connected to the first terminal of capacitor C1, and the second terminal of capacitor C1 is grounded. The second terminal of resistor R2 is connected to the first terminal of capacitor C2, and the second terminal of capacitor C2 is connected to the second terminal of inductor L1. The second terminal of inductor L1 is connected to the first terminal of inductor L2, and the second terminal of inductor L2 is connected to the first terminals of capacitors C4 and L5, respectively. The second terminal of capacitor C4 is connected to the switch control circuit. The second terminal of inductor L5 is connected to the first terminal of inductor L6, and the second terminal of inductor L6 is connected to the first terminal of capacitor C6, and the second terminal of capacitor C6 is grounded. The two terminals are also connected to the DC bias port VD; the first terminal of resistor R2 is also connected to the first terminal of resistor R4, the second terminal of resistor R4 is connected to the first terminals of resistor R1 and resistor R5 respectively, the second terminal of resistor R5 is connected to the first terminal of capacitor C6; the first terminal of resistor R4 is also connected to the drain of the third JFET3 and the first terminal of inductor L3 respectively, the drain of the third JFET3 is also connected to the gate of the third JFET3, the source of the third JFET3 is connected to the drain of the fourth JFET4, the drain of the fourth JFET3 is also connected to the gate of the fourth JFET4, and the source of the fourth JFET4 is grounded; the second terminal of inductor L3 is connected to the first terminal of capacitor C3, and the second terminal of capacitor C3 is grounded; the first terminal of capacitor C3 is also connected to the first terminal of inductor L4, the second terminal of inductor L4 is connected to the first terminal of capacitor C5, and the second terminal of capacitor C5 is connected to the switch control circuit.

[0010] The switch control circuit includes: an input terminal RF1, an output terminal RF2, and switching switches MS1_1, MS1_2, MS2_1, and MS2_2. Specifically, input terminal RF1 is connected to the first terminals of switching switches MS1_1 and MS2_2 respectively; the second terminal of switching switch MS1_1 is connected to the second terminals of capacitor C4 and MS1_2 respectively; and the second terminal of switching switch MS2_2 is connected to the second terminals of capacitor C5 and MS2_1 respectively. Similarly, input terminal RF2 is connected to the first terminals of switching switches MS1_2 and MS2_1 respectively; the second terminal of switching switch MS1_2 is connected to the second terminals of capacitor C4 and MS1_1 respectively; and the second terminal of switching switch MS2_1 is connected to the second terminals of capacitor C5 and MS2_2 respectively.

[0011] Furthermore, in the switch control circuit, the input terminal RF1 inputs a single-ended radio frequency signal, the output terminal RF2 outputs a single-ended radio frequency signal, and the two ends of the switching switches MS1_1, MS1_2, MS2_1, and MS22_2 are each connected to the closed end of a switch SW1. The open end of switch SW1 is connected to the amplifier circuit, and the closed end of switch SW1 is also connected to the open end of switch SW2. The closed end of switch SW2 is grounded.

[0012] Furthermore, in the unconditionally stable bidirectional amplifier, the switching states of switches SW1 and SW2 are controlled by a TTL circuit control signal input of 0V or 5V, and all SW1s are closed.

[0013] When the two grounded switches SW2 connected to the two switches SW1 at both ends of switch MS1_1 are open, and the two grounded switches SW2 connected to the two switches SW1 at both ends of switch MS2_1 are also open, the function is to amplify the signal input at input terminal RF1 and output it from output terminal RF2, while all other switches SW2 are closed. When the two grounded switches SW2 connected to the two switches SW1 at both ends of switch MS1_2 are open, and the two grounded switches SW2 connected to the two switches SW1 at both ends of switch MS2_2 are also open, the function is to amplify the signal input at output terminal RF2 and output it from input terminal RF1, while all other switches SW2 are closed.

[0014] In one of the functions, the other two switches that do not participate in the amplification, together with other circuit structures, form a negative feedback loop between the input terminal RF1 and the output terminal RF2.

[0015] The beneficial effects of this invention are as follows: The unconditionally stable bidirectional amplifier of this invention includes an amplification circuit and a switching control circuit, with the amplification circuit and the switching control circuit connected, thus solving the problem of insufficient stability in existing bidirectional amplifiers. By introducing negative feedback, the bidirectional amplifier of this invention effectively suppresses interference during the amplification process, ensuring the stability and accuracy of the output signal. It uses only a single amplifier to complete the bidirectional amplification function. Compared to existing technologies that use two amplifiers and a single-pole double-throw switch, the bidirectional amplifier of this invention can reduce the chip size to about half. Furthermore, since the chip has only a single amplifier, power consumption can be reduced compared to existing bidirectional amplifier structures. Absolute stability and reverse isolation can be guaranteed during the formation of the amplifier switching loop. Moreover, the single-amplifier solution of this invention does not require switching power supply control, thus significantly increasing the bidirectional switching speed. Attached Figure Description

[0016] Figure 1 This is a structural diagram of an unconditionally stable bidirectional amplifier based on negative feedback technology according to the present invention.

[0017] Figure 2 This is the actual layout of the bidirectional amplifier described in this embodiment of the invention. Detailed Implementation

[0018] The present invention will be further described below with reference to the accompanying drawings and embodiments.

[0019] like Figure 1 As shown, an unconditionally stable bidirectional amplifier based on negative feedback technology includes: an amplification circuit and a switching control circuit. The amplification circuit and the switching control circuit are connected.

[0020] The amplifier circuit adopts a JFET cascaded amplifier structure.

[0021] The amplifier circuit includes: a DC bias port VD, a first JFET1, a second JFET2, a third JFET3, a fourth JFET4, resistors R1, R2, R4, and R5, capacitors C1, C2, C3, C4, C5, and C6, and inductors L1, L2, L3, L4, L5, and L6.

[0022] In this configuration, the source of the first JFET1 and the drain of the second JFET2 are connected. The drain of the first JFET1 is connected to the first terminal of the inductor L1, and the gate of the first JFET1 is connected to the first terminal of the resistor R1. The source of the second JFET2 is grounded, and the gate of the second JFET2 is connected to the first terminal of the resistor R2. The second terminal of the resistor R1 is connected to the first terminal of the capacitor C1, and the second terminal of the capacitor C1 is grounded.

[0023] The second terminal of resistor R2 is connected to the first terminal of capacitor C2, and the second terminal of capacitor C2 is connected to the second terminal of inductor L1. The second terminal of inductor L1 is connected to the first terminal of inductor L2, and the second terminal of inductor L2 is connected to the first terminals of capacitors C4 and L5 respectively. The second terminal of capacitor C4 is connected to the switch control circuit. The second terminal of inductor L5 is connected to the first terminal of inductor L6, and the second terminal of inductor L6 is connected to the first terminal of capacitor C6. The second terminal of capacitor C6 is grounded. The second terminal of inductor L6 is also connected to the DC bias port VD.

[0024] The first terminal of resistor R2 is also connected to the first terminal of resistor R4. The second terminal of resistor R4 is connected to the first terminals of resistors R1 and R5 respectively. The second terminal of resistor R5 is connected to the first terminal of capacitor C6. The first terminal of resistor R4 is also connected to the drain of the third JFET3 and the first terminal of inductor L3 respectively. The drain of the third JFET3 is also connected to the gate of the third JFET3. The source of the third JFET3 is connected to the drain of the fourth JFET4. The drain of the fourth JFET3 is also connected to the gate of the fourth JFET4. The source of the fourth JFET4 is grounded. The second terminal of inductor L3 is connected to the first terminal of capacitor C3. The second terminal of capacitor C3 is grounded. The first terminal of capacitor C3 is also connected to the first terminal of inductor L4. The second terminal of inductor L4 is connected to the first terminal of capacitor C5. The second terminal of capacitor C5 is connected to the switch control circuit.

[0025] The switch control circuit includes: a switching switch MS1_1, a switching switch MS1_2, a switching switch MS2_1, a switching switch MS2_2, an input terminal RF1, and an output terminal RF2. Specifically, the input terminal RF1 is connected to the first terminals of both switching switches MS1_1 and MS2_2; the second terminal of switching switch MS1_1 is connected to the second terminals of capacitor C4 and MS1_2; and the second terminal of switching switch MS2_2 is connected to the second terminals of capacitor C5 and MS2_1. Similarly, the input terminal RF2 is connected to the first terminals of both switching switches MS1_2 and MS2_1; the second terminal of switching switch MS1_2 is connected to the second terminals of capacitor C4 and MS1_1; and the second terminal of switching switch MS2_1 is connected to the second terminals of capacitor C5 and MS2_2.

[0026] In this embodiment, in the switch control circuit, the input terminal RF1 inputs a single-ended radio frequency signal, the output terminal RF2 outputs a single-ended radio frequency signal, and the two ends of the switching switches MS1_1, MS1_2, MS2_1, and MS22_2 are each connected to the closed end of a switch SW1. The open end of switch SW1 is connected to the amplifier circuit, and the closed end of switch SW1 is also connected to the open end of switch SW2. The closed end of switch SW2 is grounded.

[0027] In this embodiment, the unconditionally stable bidirectional amplifier uses a TTL circuit to control the switching states of switches SW1 and SW2 by inputting a 0V or 5V control signal, with all SW1 switches closed.

[0028] This embodiment employs negative feedback technology, utilizing a switching switch to form a negative feedback loop within the bidirectional amplifier structure to enhance circuit stability. When the two grounded switches SW2 connected to the two switches SW1 at both ends of switching switch MS1_1 are open, and the two grounded switches SW2 connected to the two switches SW1 at both ends of switching switch MS2_1 are also open, the function is to amplify the signal input at input terminal RF1 and output it from output terminal RF2, while all other switches SW2 are closed. When the two grounded switches SW2 connected to the two switches SW1 at both ends of switching switch MS1_2 are open, and the two grounded switches SW2 connected to the two switches SW1 at both ends of switching switch MS2_2 are also open, the function is to amplify the signal input at output terminal RF2 and output it from input terminal RF1, while all other switches SW2 are closed.

[0029] In implementing one of the functions, the other two switches, which are not involved in amplification, together with other circuit components, form a negative feedback loop between input RF1 and output RF2. This ensures that the circuit impedance remains stable when the switch control circuit switches at the TTL control level VCT, thus providing unconditional stability to the entire circuit and improving the stability of the bidirectional amplifier. By appropriately setting the values ​​of resistors and capacitors, good gain flatness is achieved across the entire frequency band, while also ensuring that noise levels are kept low throughout the band.

[0030] In this embodiment, the bidirectional amplifier HMF033 chip is manufactured using GaAs. Figure 2 This is the actual layout of the bidirectional amplifier HMF033 chip. Figure 2 In the diagram, 1 is the RF input terminal (RF1), 2 is the RF output terminal (RF2), 3 is the VD input point, 4 is the VEE input point, 5 is the VCT input point, and 6 is the ground point. The bidirectional amplifier HMF033 chip operates with smooth gain within the 1-12GHz frequency band, exhibiting excellent return loss and isolation, and a low noise figure. The specific parameters of the HMF033 chip used in this embodiment are: amplifier operating voltage +5V, operating current 48mA, TTL control circuit operating voltage -5V, and TTL control voltage 0V / +5V. The final specifications achievable by the chip under these parameters are: 13dB small-signal gain and 14dBm 1dB gain compression point output power at a +5V operating voltage; gain flatness better than ±0.8dB; typical noise figure 3.5dB; input return loss better than -10dB; output return loss better than -15dB; and isolation better than 25dB.

[0031] In summary, the bidirectional amplifier of this invention effectively suppresses interference during the amplification process by introducing negative feedback, ensuring the stability and accuracy of the output signal. It completes the bidirectional amplification function using only a single amplifier. Compared with the existing technology that uses two amplifiers and a single-pole double-throw switch for switching, the bidirectional amplifier of this invention can reduce the chip size to about 1 / 2. At the same time, since the chip has only a single amplifier, the power consumption can also be reduced compared with the existing bidirectional amplifier structure. Absolute stability and reverse isolation can also be guaranteed during the formation of the amplifier switching loop. Furthermore, the single amplifier scheme of this invention does not require switching power supply control, so the bidirectional switching speed is also greatly enhanced.

[0032] Those skilled in the art will recognize that the embodiments described herein are intended to help the reader understand the principles of the invention, and should be understood that the scope of protection of the invention is not limited to such specific statements and embodiments. Various modifications and variations can be made to the invention by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the invention should be included within the scope of the claims of the invention.

Claims

1. An unconditionally stable bidirectional amplifier based on negative feedback technology, comprising: Amplifier circuits, switch control circuits; The amplifier circuit is connected to the switch control circuit; The amplifier circuit adopts a JFET cascaded amplifier structure. The amplifier circuit includes: a DC bias port VD, a first JFET1, a second JFET2, a third JFET3, a fourth JFET4, resistors R1, R2, R4, and R5, capacitors C1, C2, C3, C4, C5, and C6, and inductors L1, L2, L3, L4, L5, and L6. In this configuration, the source of the first JFET1 and the drain of the second JFET2 are connected. The drain of the first JFET1 is connected to the first terminal of inductor L1, and the gate of the first JFET1 is connected to the first terminal of resistor R1. The source of the second JFET2 is grounded, and the gate of the second JFET2 is connected to the first terminal of resistor R2. The second terminal of resistor R1 is connected to the first terminal of capacitor C1, and the second terminal of capacitor C1 is grounded. The second terminal of resistor R2 is connected to the first terminal of capacitor C2, and the second terminal of capacitor C2 is connected to the second terminal of inductor L1. The second terminal of inductor L1 is connected to the first terminal of inductor L2, and the second terminal of inductor L2 is connected to the first terminals of capacitors C4 and L5, respectively. The second terminal of capacitor C4 is connected to the switch control circuit. The second terminal of inductor L5 is connected to the first terminal of inductor L6, and the second terminal of inductor L6 is connected to the first terminal of capacitor C6, and the second terminal of capacitor C6 is grounded. The two terminals are also connected to the DC bias port VD; the first terminal of resistor R2 is also connected to the first terminal of resistor R4, the second terminal of resistor R4 is connected to the first terminals of resistor R1 and resistor R5 respectively, the second terminal of resistor R5 is connected to the first terminal of capacitor C6; the first terminal of resistor R4 is also connected to the drain of the third JFET3 and the first terminal of inductor L3 respectively, the drain of the third JFET3 is also connected to the gate of the third JFET3, the source of the third JFET3 is connected to the drain of the fourth JFET4, the drain of the fourth JFET3 is also connected to the gate of the fourth JFET4, and the source of the fourth JFET4 is grounded; the second terminal of inductor L3 is connected to the first terminal of capacitor C3, and the second terminal of capacitor C3 is grounded; the first terminal of capacitor C3 is also connected to the first terminal of inductor L4, the second terminal of inductor L4 is connected to the first terminal of capacitor C5, and the second terminal of capacitor C5 is connected to the switch control circuit; The switch control circuit includes: an input terminal RF1, an output terminal RF2, a switching switch MS1_1, a switching switch MS1_2, a switching switch MS2_1, and a switching switch MS2_2; wherein, the input terminal RF1 is connected to the first terminals of switching switches MS1_1 and MS2_2 respectively, the second terminal of switching switch MS1_1 is connected to the second terminal of capacitor C4 and the second terminal of switching switch MS1_2 respectively, and the second terminal of switching switch MS2_2 is connected to the second terminal of capacitor C5 and the second terminal of switching switch MS2_1 respectively; the input terminal RF2 is connected to the first terminals of switching switches MS1_2 and MS2_1 respectively, the second terminal of switching switch MS1_2 is connected to the second terminal of capacitor C4 and the second terminal of switching switch MS1_1 respectively, and the second terminal of switching switch MS2_1 is connected to the second terminal of capacitor C5 and the second terminal of switching switch MS2_2 respectively.

2. The unconditionally stable bidirectional amplifier based on negative feedback technology according to claim 1, characterized in that, In the switch control circuit, the input terminal RF1 inputs a single-ended radio frequency signal, and the output terminal RF2 outputs a single-ended radio frequency signal. The two ends of the switching switches MS1_1, MS1_2, MS2_1, and MS2_2 are each connected to the closed end of a switch SW1. The open end of switch SW1 is connected to the amplifier circuit, and the closed end of switch SW1 is also connected to the open end of switch SW2. The closed end of switch SW2 is grounded.

3. The unconditionally stable bidirectional amplifier based on negative feedback technology according to claim 2, characterized in that, In the unconditionally stable bidirectional amplifier, the switching states of switches SW1 and SW2 are controlled by a TTL circuit control signal input of 0V or 5V, and all SW1s are closed. When the two grounded switches SW2 connected to the two switches SW1 at both ends of the switching switch MS1_1 are open, and the two grounded switches SW2 connected to the two switches SW1 at both ends of the switching switch MS2_1 are also open, the function is to amplify the signal input at the input terminal RF1 and output it from the output terminal RF2, while all other switches SW2 are closed; when the two grounded switches SW2 connected to the two switches SW1 at both ends of the switching switch MS1_2 are open, and the two grounded switches SW2 connected to the two switches SW1 at both ends of the switching switch MS2_2 are also open, the function is to amplify the signal input at the output terminal RF2 and output it from the input terminal RF1, while all other switches SW2 are closed. In one of the functions, the other two switches that do not participate in the amplification, together with other circuit structures, form a negative feedback loop between the input terminal RF1 and the output terminal RF2.

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