A standard cell aging test circuit and test control method

Abstract

The application discloses a standard cell aging test circuit and a test control method. According to the scheme provided by the application, the aging stress application and test action switching of each monitor module are accurately controlled by a state machine through the cooperative architecture of the state machine, a difference frequency counting module and a monitor module, so that the to-be-tested standard cell continuously bears stress when not measuring and quickly generates stress frequency when measuring. The difference frequency counting module converts the frequency difference caused by aging into a quantitative result by comparing the stress frequency with a reference frequency, provides high-precision data for aging evaluation, realizes the deep fusion of the difference frequency principle and the standard cell aging measurement process, and improves the accuracy of the standard cell aging test. Meanwhile, the temperature information of the standard cell is more accurately monitored by combining the frequency difference between the stress frequency signal and the reference frequency signal and the frequency-temperature characteristic curve calibrated in advance.

Description

Technical Field

[0001] This application relates to the field of electronic information technology, and in particular to a standard cell aging test circuit and test control method. Background Technology

[0002] As integrated circuit manufacturing processes continue to advance to the nanometer scale, circuit reliability issues are becoming increasingly prominent. At deep submicron process nodes, transistor device characteristics degrade significantly with increasing usage time; this phenomenon is known as device aging. Device aging leads to a decline in digital circuit performance, severely impacting the reliability and lifespan of integrated circuits. Therefore, reliability assessment of digital circuits, especially measuring and predicting their performance degradation during the aging process, has become particularly important.

[0003] Existing testing methods often rely on external temperature sensors placed at specific locations on the chip. These solutions have slow response times and are easily affected by sensor layout and heat conduction paths, resulting in a difference between the actual operating temperature of the standard cell and the measured value. Ultimately, they are unable to accurately reflect instantaneous temperature changes under dynamic loads, thus affecting the accuracy of aging assessment and easily leading to inaccurate testing. Summary of the Invention

[0004] This application provides a standard cell aging test circuit and test control method to solve the technical problem of inaccurate testing in existing standard cell aging tests.

[0005] To address the aforementioned technical problems, the first aspect of this application provides a standard cell aging test circuit, comprising: a state machine, a difference frequency counting module, and several monitoring modules;

[0006] The state machine is connected to the monitor module and is used to respond to the test start command, apply aging stress to the standard unit under test in the monitor module according to the clock signal and the preset test configuration information, and output control signals. The control signals are used to control the monitor module to perform test actions.

[0007] The monitoring module includes several test standard units, which are used to output the stress frequency of the test standard unit to the difference frequency counting module in response to the control signal. The stress frequency is the ring oscillator frequency of the test standard unit after being affected by the aging stress.

[0008] The difference frequency counting module is connected to the monitoring module and is used to receive the stress frequency. Then, based on the difference between the stress frequency and the reference frequency, the aging test result of the standard unit under test is determined. The reference frequency is the ring oscillator frequency generated by the reference standard unit, and the reference standard unit is a standard unit of the same type as the standard unit under test.

[0009] Preferably, the monitor module specifically includes: multiple test standard units and a multiplexer;

[0010] The test standard units are connected in series to form a closed loop with the first end connected in series, and the output of each test standard unit is a controllable load structure based on a transmission gate and a MOS capacitor.

[0011] A multiplexer is configured between every two adjacent test standard units.

[0012] Preferably, the state machine is specifically used to: respond to a test start command, and output a first control signal and a second control signal according to a clock signal, wherein the first control signal corresponds to a monitor module and is used to trigger the corresponding monitor module to establish a communication connection with the difference frequency counting module, and the second control signal corresponds to a standard unit under test and is used to trigger the stress frequency output of the corresponding standard unit under test.

[0013] The second aspect of this application provides a standard cell aging test control method, applied to a standard cell aging test circuit as provided in the first aspect of this application, comprising:

[0014] In response to the received test start command, according to the clock signal and the preset test configuration information, aging stress is applied to the test standard unit in the monitoring module and a control signal is output. The control signal is used to control the monitoring module to perform test actions.

[0015] When the control signal is received, in response to the control signal, the monitor module outputs the stress frequency of the standard unit under test to the difference frequency counting module, wherein the stress frequency is: the ring oscillator frequency of the standard unit under test after being affected by the aging stress;

[0016] The stress frequency is received, and the aging test result of the standard unit under test is determined based on the difference between the stress frequency and the reference frequency. The reference frequency is the ring oscillator frequency generated by the reference standard unit, and the reference standard unit is a standard unit of the same type as the standard unit under test.

[0017] Preferably, the control signal includes: a first control signal and a second control signal, wherein the first control signal corresponds to the monitor module and is used to trigger the corresponding monitor module to establish a communication connection with the difference frequency counting module, and the second control signal corresponds to the standard unit under test and is used to trigger the stress frequency output of the corresponding standard unit under test.

[0018] Preferably, the step of responding to the control signal by causing the monitoring module to output the stress frequency of the standard unit under test to the difference frequency counting module specifically includes:

[0019] Based on the first control signal, establish a data transmission connection between the monitor module corresponding to the first control signal and the difference frequency counting module;

[0020] After the monitoring module establishes a data transmission connection, it determines the test standard unit inside the monitoring module that corresponds to the second control signal according to the second control signal. By controlling the multiplexer in the monitoring module, the test standard unit forms a ring oscillator so as to output the stress frequency of the test standard unit to the difference frequency counting module.

[0021] Preferably, when there are multiple monitoring modules, the step of establishing a data transmission connection between the monitoring module corresponding to the first control signal and the difference frequency counting module according to the first control signal specifically includes:

[0022] Based on the correspondence between each monitoring module and the first control signal, and in accordance with the preset connection order, each monitoring module is sequentially connected to the difference frequency counting module to establish a data transmission connection.

[0023] Preferably, when the number of test standard units contained in the monitoring module is multiple, the test standard unit inside the monitoring module corresponding to the second control signal is determined according to the second control signal. By controlling the multiplexer in the monitoring module, the test standard units form a ring oscillator so as to output the stress frequency of the test standard unit to the difference frequency counting module. Specifically, this includes:

[0024] Based on the correspondence between each test standard unit and the second control signal, the multiplexer in the control monitor module sequentially constructs a ring oscillator for each test standard unit, so as to output the stress frequency of the target test standard unit to the difference frequency counting module. Specifically, the target test standard unit is the test standard unit currently constituting the ring oscillator.

[0025] Preferably, determining the aging test result of the standard unit under test based on the difference between the stress frequency and the reference frequency specifically includes:

[0026] Based on the stress frequency and reference frequency, and combined with a preset clock pulse count formula, a clock pulse count value is obtained. The aging test result of the standard unit under test is determined based on the change of the clock pulse count value with the aging test time.

[0027] Preferably, it further includes:

[0028] Based on the frequency difference between the stress frequency and the reference frequency, and in conjunction with a preset frequency-temperature characteristic curve, the temperature monitoring data of the standard unit under test is determined. The frequency-temperature characteristic curve is a characteristic curve used to reflect the relationship between the frequency difference and the temperature change. The frequency difference is the frequency difference between the stress frequency of the standard unit under test and the reference frequency of the reference standard unit.

[0029] As can be seen from the above technical solutions, this application has the following advantages:

[0030] The solution provided in this application utilizes a collaborative architecture of a state machine, a frequency difference counting module, and a monitoring module. The state machine precisely controls the application of aging stress and the switching of test actions for each monitoring module, ensuring that the standard unit under test continuously bears stress when not being measured. During measurement, the stress frequency is rapidly generated. The frequency difference counting module compares the stress frequency with the reference frequency, converting the frequency difference caused by aging into a quantitative result, providing high-precision data for aging assessment. This achieves a deep integration of the frequency difference principle and the aging measurement process of the standard unit, improving the accuracy of the aging test of the standard unit. At the same time, by using the frequency difference between the stress frequency signal and the reference frequency signal, combined with the pre-calibrated frequency-temperature characteristic curve, the temperature information of the standard unit can be monitored more accurately. Attached Figure Description

[0031] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0032] Figure 1 This is a schematic diagram of a standard unit aging test circuit embodiment provided in this application.

[0033] Figure 2 A schematic diagram of a standard unit ring chain structure inside the monitor module of the standard unit aging test circuit provided in this application.

[0034] Figure 3 This is a flowchart illustrating an embodiment of a standard unit aging test control method provided in this application.

[0035] Figure 4 This is a test flow logic block diagram of an embodiment of a standard unit aging test control method provided in this application. Detailed Implementation

[0036] This application provides a standard cell aging test circuit and test control method to solve the technical problem of inaccurate testing in existing standard cell aging tests.

[0037] To make the inventive objectives, features, and advantages of this application more apparent and understandable, the technical solutions in the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the embodiments described below are only some embodiments of this application, and not all embodiments. Based on the embodiments in this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0038] Please see Figure 1 The present application provides a standard cell aging test circuit, which includes: a state machine, a difference frequency counting module, and several monitoring modules;

[0039] The state machine is connected to the monitor module and is used to respond to the test start command, apply aging stress to the standard unit under test in the monitor module according to the clock signal and the preset test configuration information, and output control signals. The control signals are used to control the monitor module to perform test actions.

[0040] The monitoring module contains several test standard units, used to monitor the aging stress data of the test standard units, and in response to the control signal, output the stress frequency of the test standard units to the difference frequency counting module, wherein the stress frequency is: the ring oscillator frequency of the test standard unit after being affected by aging stress.

[0041] The difference frequency counting module is connected to the monitoring module to receive the stress frequency and then determine the aging test result of the standard unit under test based on the difference between the stress frequency and the reference frequency. The reference frequency is the ring oscillator frequency generated by the reference standard unit, and the reference standard unit is a standard unit of the same type as the standard unit under test.

[0042] It should be noted that the standard unit aging test circuit provided in this embodiment mainly includes a state machine, several monitor units, and a difference frequency counter. Measurement is controlled by the state machine; the user only needs to provide a rising edge signal START to start a set of measurements. The difference frequency counter is shared by all monitor units and can be connected via a tri-state buffer. The monitor module can control the capacitance load size via control signals issued by the state machine, which in turn controls the input / output path of the standard unit in the ring oscillation chain (e.g., a two-input NAND gate has two inputs A1 and A2; a switching signal controls whether the ring oscillation chain is composed of A1 or A2), thus controlling the input aging waveform.

[0043] More specifically, such as Figure 2 As shown, the monitor module specifically includes: multiple test standard units and a multiplexer;

[0044] The standard units under test are connected in series to form a closed loop with the first end connected in series, and the output of each standard unit under test is a controllable load structure based on a transmission gate and a MOS capacitor.

[0045] A multiplexer is configured between every two adjacent test standard units.

[0046] It should be noted that the monitor module in this embodiment is specifically composed of multiple standard unit ring chains of different types. This circuit employs a reconfigurable hybrid cascade architecture, using alternating connections between odd-numbered standard unit chains and data selectors. Its core topology is characterized by a closed loop of 2N+1 level standard units connected end-to-end, with a multiplexer inserted between every two adjacent standard units. Furthermore, the control ports of all multiplexers are controlled by control signals issued by the state machine, enabling rapid switching between two operating states for the monitor module.

[0047] When the system operates in ring oscillation mode (CTRL<0:1>=01-11), each multiplexer directly connects the input and output of adjacent standard cells, forming a closed ring oscillation loop. In this mode, the oscillation frequency is inversely proportional to the gate propagation delay (the time required for a signal to pass through each circuit cell). Real-time detection of process parameters can be achieved using a high-precision difference frequency counter, with measurement resolution reaching the picosecond level. The reference frequency data established in this mode provides a quantitative reference for subsequent aging analysis.

[0048] When switching to accelerated aging mode (CTRL<0:1>=00), the circuit topology changes: the multiplexer cuts off the loop feedback path and instead applies abnormal operating conditions (such as voltage increased to 1.8V and temperature increased to 80°C) to the standard cell under test in the monitor module through an external programmable stress excitation source or a stress source output module integrated with a state machine. This causes the standard cell under test to enter an overvoltage stress state, accelerating the device aging test mode. This dual stress loading mechanism (topology isolation and overvoltage bias) serves two purposes: 1. Ensuring stress consistency among all units in the loop chain; 2. Accelerating the simulation of circuit aging failure processes by accelerating degradation mechanisms such as hot carrier injection and negative bias temperature instability (NBTI). The external stress source generally consists of two parts: an input signal source and a power supply voltage source. The input signal source generates a controllable stress signal, whose waveform, toggle rate, and duty cycle are configurable, allowing researchers to analyze the impact of different input signal modes on the aging of the standard cell. The power supply voltage source provides a high voltage of 1.8V in stress mode to accelerate aging through voltage acceleration.

[0049] Each standard cell's output is designed with a controllable load structure based on a transmission gate and a MOS capacitor. This load circuit dynamically adjusts the equivalent capacitance value through independent control signals, thereby changing the load capacitance at the standard cell's output. When the standard cell output flips, a larger load capacitance leads to a more significant hot carrier injection (HCI) effect; by adjusting the load control signal, the aging behavior of the standard cell under different HCI / BTI ratios can be studied.

[0050] More specifically, the state machine is used to: respond to the test start command and output a first control signal and a second control signal according to the clock signal, wherein the first control signal corresponds to the monitor module and is used to trigger the corresponding monitor module to establish a communication connection with the difference frequency counting module, and the second control signal corresponds to the standard unit under test and is used to trigger the stress frequency output of the corresponding standard unit under test.

[0051] It should be noted that this embodiment uses a state machine to achieve fully automatic control of the test process, which includes four states: initialization, stress loading, differential frequency measurement, and data output. The first control signal Ci controls the operation of the monitors at different positions, and the second control signal Sj controls the testing of different standard units. When Ci and Sj are both 1, it indicates that the standard unit j in monitor i enters the ring vibration state and its delay is measured. The time required is 1 microsecond. At other times, the standard unit is under stress aging, and when the standard unit is tested, all other standard units are under stress aging, so as to avoid the adverse effect of aging recovery effect caused by stress removal on the measurement results.

[0052] The solution provided in this application utilizes a collaborative architecture of a state machine, a frequency counter module, and a monitor module. The state machine precisely controls the application of aging stress and the switching of test actions for each monitor module, ensuring that the standard cell under test continuously bears stress when not being measured. During measurement, the stress frequency is rapidly generated. The frequency counter module compares the stress frequency with the reference frequency, converting the frequency difference caused by aging into a quantitative result, providing high-precision data for aging assessment. This achieves a deep integration of the frequency counter principle and the standard cell aging measurement process, improving the accuracy of standard cell aging testing. Simultaneously, the monitor module can integrate multiple standard cells under test, enabling time-sharing or parallel testing under state machine control. It covers multiple cell measurements in a single cycle, significantly improving on-chip resource utilization and adapting to the testing needs of large-scale standard cell libraries, thus enhancing testing efficiency.

[0053] The above is a detailed description of an embodiment of a standard cell aging test circuit provided in this application. The following is a detailed description of an embodiment of a standard cell aging test control method provided in this application.

[0054] Please see Figure 3The present application provides a standard cell aging test control method, which can be applied to the standard cell aging test circuit provided in the above embodiments. The control method of this embodiment includes:

[0055] Step 101: In response to the received test start command, apply aging stress and output control signals to the test standard unit in the monitor module according to the clock signal and the preset test configuration information;

[0056] The control signal is used to control the monitor module to perform test actions.

[0057] Step 102: Monitor the aging stress data of the standard unit under test, and when a control signal is received, respond to the control signal by causing the monitor module to output the stress frequency of the standard unit under test to the difference frequency counting module.

[0058] Among them, the stress frequency is the frequency of the ring oscillator of the standard unit under test after being affected by aging stress.

[0059] Step 103: Receive the stress frequency and determine the aging test result of the standard unit under test based on the difference between the stress frequency and the reference frequency.

[0060] The reference frequency is the frequency of the ring oscillator generated by the reference standard unit, and the reference standard unit is a standard unit of the same type as the standard unit under test.

[0061] More specifically, step 103, which determines the aging test result of the standard unit under test based on the difference between the stress frequency and the reference frequency, may include the following steps:

[0062] Based on the stress frequency and reference frequency, and combined with the preset clock pulse count formula, the clock pulse count value is obtained. The aging test result of the standard unit under test is determined according to the change of the clock pulse count value with the aging test time.

[0063] The difference frequency counter compares the frequency of a reference oscillator (f) to the frequency of the reference oscillator. ref ) and the frequency of the oscillator under test (f stress This is used to quantify the aging effect. The core processing method is to use a phase comparator (composed of D flip-flops) to generate a beat frequency signal (f) whose frequency is equal to the difference between the two input frequencies. beat Then, a counter is used to calculate the reference oscillator (f) within one complete cycle of the beat frequency signal. ref The number of clock pulses (N) output. This final output digital count value N directly reflects the number of clock pulses (N) of f. ref with f stressThe frequency difference between the two frequencies is inversely proportional to this frequency difference. That is, the smaller the frequency difference, the longer the beat period, and the larger the output count value N; conversely, the larger the frequency difference, the smaller the output count value N. By monitoring the change of this count value N with aging time, the frequency drift of the oscillator under test due to aging can be quantified with high precision, thereby assessing the degree of device degradation. The specific calculation expression is as follows:

[0064]

[0065] In the formula, N is the clock pulse count value. For reference frequency, For stress frequency, This refers to the beat frequency signal frequency.

[0066] It should be noted that, as Figure 4 As shown, the standard unit aging test control method provided in this embodiment can be referred to in the following example for its specific implementation process:

[0067] 1. Initialization: When the tester sends a rising edge pulse representing the START signal to the "state machine" through human-computer interaction, the "state machine" can be triggered to start the test process.

[0068] 2. Stress Application: Before and between measurements, the state machine ensures that appropriate stress conditions (e.g., an increased voltage VDD_STRESS, a specific input signal pattern applied via INPUT<0:2>, a specific load set via CAP<0:1>, and a specific path selected via CTRL<0:1>) are applied to the standard cells within the selected monitor, as defined by the overall test plan. In the default state or stress phase, CTRL<0:1> is set to '00' to isolate the ring chain and apply stress.

[0069] 3: Measurement Cycle Start: Upon receiving the START pulse, the state machine begins a measurement cycle. It systematically selects each monitor and each standard unit within it for brief measurements.

[0070] 4: Monitor Selection: The state machine sets one of the Ci signals (e.g., C1 goes high) and holds it for a period of time (8µs). This will select the first "Aging and Temperature Monitor" (Monitor 1), which will output its value through a tri-state buffer. , The input to the "difference frequency counter" is connected. Other monitors (C2, C3, C4 low level) remain disconnected from the counter and continue to withstand stress.

[0071] 5: Standard cell selection within the monitor: During the period when C1 is high, the state machine sequentially sets the Sj signal (e.g., S1 high for 1µs, then S2 high for 1µs, ..., until S8 high for 1µs). When a specific Sj signal is high (e.g., S1 high) and Ci is high (e.g., C1 high), the standard cell corresponding to monitor 1 (a NAND gate when C1 and S1 are 1) forms a ring oscillator and generates its output frequency.

[0072] 6: Differential Frequency Measurement: When C1 and S1 are set (for 1µs), the "Differential Frequency Counter" measures... and The difference between them. A counter calculates a value N representing this difference.

[0073] 7: Storage / Output Results: The calculated value N corresponding to the aging of unit S1 in monitor 1 is output on the Q<0:7> bus.

[0074] Furthermore, when there are multiple monitor modules, the process may further include step 8:

[0075] 8: Traverse the unit: The state machine cancels the setting of S1 and sets S2 (lasts 1µs), repeating steps 5-7 for the second standard unit / chain in monitor 1. Repeat this process for all Sj signals (S1 to S8).

[0076] Furthermore, when there are multiple monitor modules, the process may further include the following steps 9 to 10:

[0077] 9: Traverse the monitors: After completing the loop for all Sj in monitor 1 (total 8µs), the state machine de-sets C1 and sets C2 (within the next 8µs). Then repeat steps 5-8 for all standard cells (Sj) in monitor 2. Repeat this process for all monitors (C1 to C4).

[0078] 10: Return to default state: Once all selected units in all selected monitors have been measured, the state machine completes the cycle and returns the unit to the default state, waiting for the next START pulse to perform subsequent measurements.

[0079] Furthermore, it also includes:

[0080] Based on the frequency difference between the stress frequency and the reference frequency, and in conjunction with a preset frequency-temperature characteristic curve, the temperature monitoring data of the standard unit under test is determined. The frequency-temperature characteristic curve is a characteristic curve used to reflect the relationship between the frequency difference and the temperature change. The frequency difference is the frequency difference between the stress frequency of the standard unit under test and the reference frequency of the reference standard unit.

[0081] It should be noted that the test standard unit of each monitoring module and the reference standard unit form a dual-ring oscillation structure. The output of the reference standard unit is connected to F_REF, and the output of the test standard unit is connected to F_STRESS. The difference frequency counting module obtains a set of digital codes representing the frequency difference between the two. The magnitude of this digital code has a one-to-one mapping relationship with the temperature. Therefore, based on this digital code and the mapping relationship contained in the frequency-temperature characteristic curve, the temperature monitoring data of the test standard unit can be calculated.

[0082] The temperature measurement principle of this embodiment is based on a fundamental physical phenomenon: the performance of transistors constituting standard cells in integrated circuits, especially their switching speed, is highly sensitive to temperature. Typically, increased temperature affects carrier mobility and threshold voltage, leading to increased propagation delay in the standard cell. Since the oscillation frequency of a ring oscillator directly depends on the average propagation delay of the logic gates that constitute it, the oscillator's oscillation frequency changes with temperature. By pre-calibrating a specifically designed oscillator and establishing an accurate frequency-temperature characteristic curve, the frequency reading can be used to infer the local temperature at the corresponding location on the chip in subsequent measurements. Furthermore, this circuit employs a dual-ring oscillator structure, with these two oscillators specifically designed to have different sensitivities to temperature and aging effects. By measuring the frequency difference between their output signals and combining it with the pre-calibrated characteristic curve, the system can extract temperature information more accurately. This difference-frequency measurement technique not only improves measurement speed but also helps eliminate common-mode noise interference, thereby ensuring high accuracy and reliability of the final temperature measurement results.

[0083] This embodiment utilizes a temperature and aging monitoring mechanism based on the difference frequency principle, simultaneously fulfilling the dual requirements of on-chip temperature measurement and aging monitoring within a single circuit structure. By analyzing the frequency differences between two oscillators with different sensitivities, the system can accurately identify and distinguish the impact of temperature changes and aging effects on circuit performance, improving the utilization of on-chip resources and enhancing the reliability and accuracy of measurement data. The integrated temperature monitoring unit eliminates dependence on external temperature measurement equipment, simplifies the testing process, and provides more precise environmental parameter control. This dual-functional integrated design not only saves chip area but also improves the timeliness and accuracy of measurements, providing more reliable data support for circuit aging characteristic research. Simultaneously, a dynamic and seamless switching between stress mode and ring oscillator mode is achieved through a dual-mode switching mechanism based on a multiplexer. This switching mechanism ensures the stability of the circuit state during mode transitions by precisely controlling the signal path, while significantly reducing aging recovery effects, thereby enabling the acquisition of accurate delay aging data of standard cells under actual operating conditions. This fast mode switching design establishes a precise mapping relationship between aging stress conditions and delay degradation, providing a solid foundation for integrated circuit reliability assessment. The advantage of this mechanism is that it can maintain the continuity of the circuit state during the measurement process, avoiding the state loss caused by mode switching in traditional methods, thereby improving the accuracy and reliability of the measurement.

[0084] In the description of this application, it should be noted that the terms "center," "upper," "lower," "left," "right," "vertical," "horizontal," "inner," and "outer," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are used only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this application. Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and should not be construed as indicating or implying relative importance.

[0085] Unless otherwise expressly specified and limited, the terms "installation," "connection," and "linking" should be interpreted broadly. For example, they can refer to fixed connections, detachable connections, or integral connections; they can refer to mechanical connections or electrical connections; they can refer to direct connections or indirect connections through an intermediate medium; and they can refer to the internal connection between two components. Those skilled in the art can understand the specific meaning of the above terms in this application based on the specific circumstances.

[0086] It should be understood that in this application, "at least one (item)" means one or more, and "more than" means two or more. "And / or" is used to describe the relationship between related objects, indicating that three relationships can exist. For example, "A and / or B" can represent three cases: only A exists, only B exists, and both A and B exist simultaneously, where A and B can be singular or plural. The character " / " generally indicates that the preceding and following related objects are in an "or" relationship. "At least one (item) of the following" or similar expressions refer to any combination of these items, including any combination of single or plural items. For example, at least one (item) of a, b, or c can represent: a, b, c, "a and b", "a and c", "b and c", or "a and b and c", where a, b, and c can be single or multiple.

[0087] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0088] Furthermore, the functional units in the various embodiments of the present invention can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit.

[0089] If the integrated unit is implemented as a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, in essence, or the part that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of the present invention. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0090] The above-described embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this application.

Claims

1. A standard cell aging test circuit, characterized in that, include: The system includes a state machine, a frequency counter module, and several monitoring modules. The monitoring modules specifically include multiple test standard units and multiplexers. The test standard units are connected in series to form a closed loop with the first end connected in series, and the output of each test standard unit is a controllable load structure based on a transmission gate and a MOS capacitor. A multiplexer is configured between every two adjacent test standard units; The state machine is connected to the monitor module and is used to respond to the test start command and output a first control signal and a second control signal according to the clock signal. The first control signal corresponds to the monitor module and is used to trigger the corresponding monitor module to establish a communication connection with the difference frequency counting module. The second control signal corresponds to the standard unit under test and is used to trigger the stress frequency output of the corresponding standard unit under test. The monitoring module includes several test standard units, which are used to output the stress frequency of the test standard unit to the difference frequency counting module in response to the control signal. The stress frequency is the ring oscillator frequency of the test standard unit after being affected by aging stress. The difference frequency counting module is connected to the monitoring module and is used to receive the stress frequency. Then, based on the difference between the stress frequency and the reference frequency, the aging test result of the standard unit under test is determined. The reference frequency is the ring oscillator frequency generated by the reference standard unit, and the reference standard unit is a standard unit of the same type as the standard unit under test.

2. A standard cell aging test control method, applied to the standard cell aging test circuit as described in claim 1, characterized in that, include: In response to the received test start command, according to the clock signal and preset test configuration information, aging stress is applied to the test standard unit in the monitoring module and a control signal is output. The control signal is used to control the monitoring module to perform test actions. The control signal includes: a first control signal and a second control signal, wherein the first control signal corresponds to the monitoring module and is used to trigger the corresponding monitoring module to establish a communication connection with the difference frequency counting module, and the second control signal corresponds to the test standard unit and is used to trigger the stress frequency output of the corresponding test standard unit. When the control signal is received, in response to the control signal, the monitor module outputs the stress frequency of the standard unit under test to the difference frequency counting module, wherein the stress frequency is: the ring oscillator frequency of the standard unit under test after being affected by the aging stress; The stress frequency is received, and the aging test result of the standard unit under test is determined based on the difference between the stress frequency and the reference frequency. The reference frequency is the ring oscillator frequency generated by the reference standard unit, and the reference standard unit is a standard unit of the same type as the standard unit under test.

3. The standard unit aging test control method according to claim 2, characterized in that, The step of responding to the control signal by causing the monitoring module to output the stress frequency of the standard unit under test to the difference frequency counting module specifically includes: Based on the first control signal, establish a data transmission connection between the monitor module corresponding to the first control signal and the difference frequency counting module; After the monitoring module establishes a data transmission connection, it determines the test standard unit inside the monitoring module that corresponds to the second control signal according to the second control signal. By controlling the multiplexer in the monitoring module, the test standard unit forms a ring oscillator so as to output the stress frequency of the test standard unit to the difference frequency counting module.

4. The standard unit aging test control method according to claim 3, characterized in that, When there are multiple monitoring modules, establishing a data transmission connection between the monitoring module corresponding to the first control signal and the difference frequency counting module according to the first control signal specifically includes: Based on the correspondence between each monitoring module and the first control signal, and in accordance with the preset connection order, each monitoring module is sequentially connected to the difference frequency counting module to establish a data transmission connection.

5. The standard unit aging test control method according to claim 3, characterized in that, When the number of test standard units contained in the monitoring module is multiple, the test standard unit corresponding to the second control signal is determined according to the second control signal inside the monitoring module. By controlling the multiplexer in the monitoring module, the test standard units form a ring oscillator so as to output the stress frequency of the test standard unit to the difference frequency counting module. Specifically, this includes: Based on the correspondence between each test standard unit and the second control signal, the multiplexer in the control monitor module sequentially constructs a ring oscillator for each test standard unit, so as to output the stress frequency of the target test standard unit to the difference frequency counting module. Specifically, the target test standard unit is the test standard unit currently constituting the ring oscillator.

6. The standard unit aging test control method according to claim 2, characterized in that, The step of determining the aging test result of the standard unit under test based on the difference between the stress frequency and the reference frequency specifically includes: Based on the stress frequency and reference frequency, and combined with a preset clock pulse count formula, a clock pulse count value is obtained. The aging test result of the standard unit under test is determined based on the change of the clock pulse count value with the aging test time.

7. The standard unit aging test control method according to claim 2, characterized in that, Also includes: Based on the frequency difference between the stress frequency and the reference frequency, and in conjunction with a preset frequency-temperature characteristic curve, the temperature monitoring data of the standard unit under test is determined. The frequency-temperature characteristic curve is a characteristic curve used to reflect the relationship between the frequency difference and the temperature change. The frequency difference is the frequency difference between the stress frequency of the standard unit under test and the reference frequency of the reference standard unit.

Images