Focus ring voltage control method and apparatus, and semiconductor process equipment

Abstract

The application provides a focusing ring voltage control method and device and a semiconductor process equipment. The method comprises the following steps: in response to a control instruction of loading a radio frequency signal to a lower electrode, a sampling process is performed based on a sampling period; each sampling period comprises a sampling stage and an application stage which are performed in sequence; in the sampling stage, a direct current power source for loading voltage to the focusing ring is controlled to be closed, and the voltage of the focusing ring is sampled to obtain a sampling voltage, and a target voltage is obtained according to the sampling voltage; in the application stage, the voltage loaded to the focusing ring by the direct current power source is controlled to be equal to the target voltage; the actual voltage of the focusing ring is collected, and the actual voltage is compared with the target voltage; the target voltage is adjusted and updated according to the comparison result, and the voltage loaded to the focusing ring by the direct current power source is controlled to be equal to the updated target voltage in the application stage of the current sampling period or the application stage of the next sampling period. The scheme can continuously reduce the deviation between the actual voltage and the target voltage, and improve the accuracy of the process result.

Description

Technical Field

[0001] This invention relates to the field of semiconductor manufacturing, and more specifically, to a focusing loop voltage control method, a focusing loop voltage control device, and semiconductor process equipment. Background Technology

[0002] In semiconductor etching processes, to improve wafer utilization, it is necessary to maximize the etching quality of the wafer edge region. Therefore, a focusing ring made of conductive or semiconductor material is placed on the outer side of the wafer to adjust the plasma density and sheath thickness above the wafer edge region. By applying a negative DC voltage to the focusing ring, the shape and thickness of the plasma sheath above the focusing ring and the wafer edge region can be controlled. The accuracy of the applied DC voltage affects the consistency of the process results.

[0003] However, in related technologies, due to changes in plasma characteristics, the output voltage of the DC power supply is inconsistent with the actual voltage on the focusing ring surface, resulting in a deviation that affects the accuracy of the process results. Summary of the Invention

[0004] The present invention aims to solve at least one of the technical problems existing in the prior art, and proposes a focusing loop voltage control method, device and semiconductor process equipment, which can improve the accuracy of process results.

[0005] To achieve the objective of this invention, a focusing loop voltage control method is provided, comprising:

[0006] In response to a control command to apply an RF signal to the downward electrode, a sampling process is executed based on a sampling period; each sampling period includes a sampling phase and an application phase executed sequentially.

[0007] During the sampling phase, the DC power supply used to apply voltage to the focusing ring is turned off, the voltage of the focusing ring is sampled to obtain a sampled voltage, and the target voltage is obtained based on the sampled voltage.

[0008] During the application phase, the voltage applied to the focusing ring by the DC power supply is controlled to be equal to the target voltage; the actual voltage of the focusing ring is acquired and compared with the target voltage; the target voltage is adjusted and updated according to the comparison result, and during the application phase of the current sampling period or the application phase of the next sampling period, the voltage applied to the focusing ring by the DC power supply is controlled to be equal to the updated target voltage.

[0009] In some embodiments, when the radio frequency signal is a first pulse signal, the duration of each sampling period is equal to the sum of the durations of N pulse periods of the first pulse signal, where N is an integer greater than or equal to 2; the start time and end time of each sampling period are the same as the start time of the first pulse period of the first pulse signal and the end time of the Nth pulse period of the first pulse signal, respectively.

[0010] The duration of the sampling phase is the same as the duration of the radio frequency activation period of the pulse period of the first pulse signal, and the start and end times of the sampling phase are the same as the start and end times of the radio frequency activation period of the first pulse period of the first pulse signal, respectively.

[0011] In some embodiments, the voltage signal output by the DC power supply during the application phase is a second pulse signal; the duration of the application phase is equal to the sum of the durations of the M pulse cycles of the second pulse signal, where M is an integer greater than or equal to 2; the start time and end time of the application phase are the same as the start time of the first pulse cycle of the second pulse signal and the end time of the Mth pulse cycle of the second pulse signal, respectively.

[0012] The pulse period of the second pulse signal is the same as the pulse period of the first pulse signal, and the rising edge and falling edge of the second pulse signal are executed synchronously with the rising edge and falling edge of the first pulse signal, respectively.

[0013] In some embodiments, corresponding to each sampling period, in the i-th pulse period of the first pulse signal, i = 2, 3, ... N, the actual voltage is acquired and compared with the target voltage in the current pulse period; the target voltage is adjusted and updated according to the comparison result, and in the (i+1)-th pulse period of the first pulse signal, the voltage applied by the DC power supply to the focusing ring is controlled to be equal to the updated target voltage.

[0014] In some embodiments, comparing the actual voltage with the current target voltage; adjusting and updating the target voltage based on the comparison result, and controlling the voltage applied to the focusing ring by the DC power supply to be equal to the updated target voltage within the (i+1)th pulse period of the first pulse signal, includes:

[0015] Within the i-th pulse period of the first pulse signal, calculate the absolute value of the difference between the actual voltage and the target voltage;

[0016] In response to the absolute value of the difference being greater than a preset error voltage, the target voltage is adjusted and updated, and within the (i+1)th pulse period of the first pulse signal, the voltage applied by the DC power supply to the focusing ring is controlled to be equal to the updated target voltage;

[0017] In response to the absolute value of the difference not exceeding the preset error voltage, the target voltage remains unchanged.

[0018] In some embodiments, when the radio frequency signal is a first continuous signal, a sampling process of at least two sampling cycles is performed from the start time to the end time of the first continuous signal.

[0019] The voltage signal output by the DC power supply during the application phase is a second continuous signal.

[0020] In some embodiments, the control command that responds to the downward electrode loading radio frequency signal, performing a sampling process based on a sampling period, includes:

[0021] In response to a control command that applies a radio frequency signal to the downward electrode, the DC power supply is kept off for a preset delay period.

[0022] At the end of the preset delay period, the sampling process begins to be executed based on the sampling period.

[0023] In some embodiments, the duration of the first continuous signal from its start time to its end time is equal to the sum of the durations of K sampling periods, where K is an integer greater than or equal to 2; the start time and end time of the first continuous signal are the same as the start time of the first sampling period and the end time of the Kth sampling period, respectively.

[0024] During the application phase of the j-th sampling period (j = 1, 2, ... K), the actual voltage is acquired and compared with the target voltage during the current application phase; the target voltage is adjusted and updated based on the comparison result; and during the application phase of the (j+1)-th sampling period, the voltage applied by the DC power supply to the focusing ring is controlled to be equal to the updated target voltage.

[0025] In some embodiments, comparing the actual voltage with the target voltage during the current application phase; adjusting and updating the target voltage based on the comparison result; and controlling the voltage applied to the focusing ring by the DC power supply to be equal to the updated target voltage during the application phase of the (j+1)th sampling period includes:

[0026] During the application phase of the j-th sampling period, the absolute value of the difference between the actual voltage and the target voltage is calculated;

[0027] In response to the absolute value of the difference being greater than a preset error voltage, the target voltage is adjusted and updated, and during the application phase of the (j+1)th sampling period, the voltage applied by the DC power supply to the focusing ring is controlled to be equal to the updated target voltage;

[0028] In response to the absolute value of the difference not exceeding the preset error voltage, the target voltage remains unchanged.

[0029] In some embodiments, the sampling phase includes a delayed sub-phase and an acquisition sub-phase executed sequentially;

[0030] During the delay sub-stage, the DC power supply is controlled to be turned off;

[0031] In the acquisition sub-stage, the voltage of the focusing ring is sampled to obtain the sampled voltage, and the target voltage is obtained based on the sampled voltage.

[0032] In some embodiments, the step of sampling the voltage of the focusing ring in the acquisition sub-stage to obtain a sampled voltage, and obtaining a target voltage based on the sampled voltage, includes:

[0033] In the acquisition sub-stage, the voltage of the focusing ring is sampled multiple times to obtain multiple sampled voltages;

[0034] The average voltage is obtained by averaging the multiple sampled voltages.

[0035] The sum of the average voltage and the preset voltage difference is calculated as the target voltage.

[0036] In some embodiments, adjusting and updating the target voltage based on the comparison result, and controlling the voltage applied to the focusing ring by the DC power supply to be equal to the updated target voltage during the application phase of the current sampling period or the application phase of the next sampling period, includes:

[0037] The difference voltage is adjusted and updated based on the comparison results, and the sum of the average voltage and the updated difference voltage is recalculated as the new target voltage.

[0038] During the application phase of the current sampling period or the application phase of the next sampling period, the voltage applied by the DC power supply to the focusing ring is controlled to be equal to the new target voltage.

[0039] As another technical solution, this embodiment of the invention also provides a focusing ring voltage control device, including a controller, the controller including at least one processor and at least one memory, the memory storing a computer program, the computer program being executed by the processor to implement the above-described method provided in this embodiment of the invention.

[0040] As another technical solution, this embodiment of the invention also provides a semiconductor process apparatus, including a lower electrode, a focusing ring, and a controller. The lower electrode is used to be electrically connected to an RF power supply; the focusing ring is used to be electrically connected to a DC power supply; the controller includes at least one processor and at least one memory, the memory storing a computer program, which, when executed by the processor, implements the method provided in this embodiment of the invention.

[0041] The present invention has the following beneficial effects:

[0042] In the focusing ring voltage control method and semiconductor process equipment provided by this invention, the actual voltage of the focusing ring is acquired during the application phase of each sampling cycle, and the actual voltage is compared with the target voltage. The target voltage is adjusted and updated according to the comparison result. During the application phase of the current sampling cycle or the application phase of the next sampling cycle, the voltage applied to the focusing ring by the DC power supply is controlled to be equal to the updated target voltage. The target voltage can be continuously adjusted throughout the entire process of loading the radio frequency signal to continuously reduce the deviation between the actual voltage and the target voltage, thereby improving the accuracy of the process results. Attached Figure Description

[0043] Figure 1 This is a waveform diagram of the DC voltage applied to the focusing ring during stages S1 to S6 of each pulse cycle in the relevant technology when the radio frequency signal is a pulse signal.

[0044] Figure 2 The waveforms of the RF signal output from the RF power supply, the DC signal output from the DC power supply, and the total voltage of the focusing ring are shown in the relevant technology.

[0045] Figure 3 This is a schematic diagram of the structure of a semiconductor process equipment provided in an embodiment of the present invention;

[0046] Figure 4 This is a circuit diagram of the DC power supply used in an embodiment of the present invention.

[0047] Figure 5 A flowchart illustrating the sampling phase and application phase of each sampling cycle of the focusing loop voltage control method provided in this embodiment of the invention;

[0048] Figure 6The waveforms of the radio frequency signal output by the radio frequency power supply, the DC signal output by the DC power supply, and the total voltage of the focusing ring used in the embodiments of the present invention are shown.

[0049] Figure 7 This is a waveform diagram of the target voltage during a portion of the sampling period in an embodiment of the present invention, when the radio frequency signal is a pulse signal.

[0050] Figure 8 This is a waveform diagram of the target voltage during a portion of the sampling period in an embodiment of the present invention, when the radio frequency signal is a continuous signal. Detailed Implementation

[0051] To enable those skilled in the art to better understand the technical solutions of the present invention, the focusing ring voltage control method, apparatus and semiconductor process equipment provided by the present invention will be described in detail below with reference to the accompanying drawings.

[0052] In the deep-hole etching process of 3D NAND flash memory, the wafer includes at least amorphous carbon masks, silicon nitride / silicon oxide, and other process layers. During the etching process of the silicon nitride / silicon oxide process layers, if the plasma sheath thickness is uneven, etched holes may tilt, resulting in abnormal etching morphology. To address this issue, a focusing ring made of conductive or semiconductor material is placed on the outer side of the wafer to adjust the plasma density and sheath thickness in the wafer edge region. By applying a negative DC voltage to the focusing ring, the shape and thickness of the plasma sheath above the focusing ring and the wafer edge region can be controlled, thereby improving the process results.

[0053] In related technologies, during the etching process, when the radio frequency signal applied to the downward electrode by the radio frequency power supply is a pulse signal, such as... Figure 1 and Figure 2 As shown, each pulse period T of the pulse signal includes stages S1 to S4. In stage S1, the RF power supply is off (i.e., RF is on), the process chamber is in a plasma-free state, and the DC power supply is off (i.e., de-energized). In stage S2, the RF power supply is on, and the process chamber is in a state of plasma ignition and sheath formation. This stage is... Figure 2 During the sampling phase shown, the DC power supply remains off, and the voltage of the focusing loop is detected; in phase S3, the RF power supply remains on, at which point the RF voltage reaches its maximum value V. s The process chamber is in a stable plasma state; this stage is... Figure 2 During the application phase shown, the DC power supply is turned on, and a DC voltage V is applied to the focusing ring. targetThis is equal to the sum of the absolute value of the voltage V1 detected in stage S2 and ΔV. ΔV is a set value, which the user can select appropriately based on the process results. ΔV not only allows the etching hole tilt angle to achieve the ideal effect, but also affects parameters such as etching rate uniformity, etching selectivity, and etching hole size. In stage S4, the RF power supply is gradually turned off (i.e., RF is disconnected), and the process chamber is in a state where the plasma has disappeared. During this stage, the DC power supply is turned off. This is easy to understand. Figure 1 The S5 and S6 phases in the pulse cycle T are the S1 and S2 phases in the next pulse cycle T.

[0054] However, in the aforementioned related technologies, ΔV within the application phase (i.e., S3 phase) of each pulse period T is a set value that remains constant throughout the entire process of loading the RF signal. Due to changes in plasma characteristics, the output voltage of the DC power supply may not be consistent with the actual voltage on the focusing ring surface, resulting in a deviation between the two and thus affecting the accuracy of the process results.

[0055] To address the above problems, embodiments of the present invention provide a method for controlling the focusing loop voltage, comprising:

[0056] In response to the control command of the downward electrode loading radio frequency signal, the sampling process is executed based on the sampling period.

[0057] That is, the RF power supply is turned on at the same time as the start of the first sampling cycle of the sampling process.

[0058] In some embodiments, such as Figure 3As shown, the semiconductor process equipment provided in this embodiment of the invention includes a process chamber 1, an inlet assembly 2, a lower electrode, and a focusing ring 4. The inlet assembly 2 is disposed at the top of the process chamber 1 and is used to introduce process gas into the process chamber 1. The inlet assembly 2 includes, for example, a showerhead (SHD) for uniformly delivering the process gas into the process chamber 1. The lower electrode is disposed below the inlet assembly 2 within the process chamber 1. The lower electrode includes, for example, a ceramic layer 5 for supporting the wafer and an electrostatic chuck 6 disposed below the ceramic layer 5 for supporting the ceramic layer 5. The electrostatic chuck 6 is electrically connected to an RF power supply 12 via an RF feed post 7 and a matching unit 11. The RF power supply 12 applies an RF voltage to the lower electrode through the matching unit 11 to excite the process gas in the process chamber 1 to form plasma. The focusing ring 4 is disposed around the wafer 3 and is made of conductive or semiconductor material, used to adjust the plasma density and sheath thickness above the edge region of the wafer 3. The focusing ring 4 is electrically connected to a DC power supply 14 via a filter 13. DC power supply 14 applies a negative DC voltage to focusing ring 4 through filter 13. By applying a DC voltage to focusing ring 4, the shape and thickness of the plasma sheath layer above the edge region of focusing ring 4 and wafer 3 can be controlled, thereby improving process results. Filter 13 is used to reduce RF energy leakage within process chamber 1. RF power supply 12 is turned on upon receiving a control command from controller (not shown), while the controller executes a sampling process based on the sampling period.

[0059] In some embodiments, please refer to Figure 4 The DC power supply 14 includes a switching circuit. The DC voltage output by the DC power supply 14 is applied to capacitor C1 in the switching circuit and output from the right end of resistor R4. Except for resistor R5, which is used as a voltage divider and has a low resistance value (<1MΩ), all other resistors are high resistance resistors (>1MΩ). This switching circuit can switch between a sampling phase, an application phase, and a discharge phase. During the sampling phase, switches S1 and S2 are both open, and the DC power supply 14 does not output power but instead acquires the voltage on the surface of the focusing ring 4 through a voltage detection device. During the application phase, switch S1 is closed while switch S2 is open, and the DC power supply 14 outputs DC voltage to the surface of the focusing ring 4. During the discharge phase, switches S1 and S2 are both closed, and the DC power supply 14 outputs DC voltage to ground. It should be noted that this embodiment of the invention is not limited to using the above-described switching circuit; other switching circuits capable of achieving the above functions can also be used.

[0060] Please refer to the following: Figure 5 and Figure 6 The aforementioned periodic sampling process includes a sampling phase S101 and an application phase S102 that are executed sequentially in each sampling period.

[0061] During the sampling phase S101, the DC power supply 14 used to apply voltage to the focusing ring 4 is turned off, and the voltage of the focusing ring 4 is sampled to obtain the sampled voltage. The target voltage V is then obtained based on the sampled voltage. target ;

[0062] During the application phase S102, the voltage applied by the control DC power supply 14 to the focusing ring 4 is equal to the target voltage V. target ; Collect the actual voltage V of focusing ring 4 real And compare the actual voltage V real With target voltage V target Adjust and update the target voltage V based on the comparison results. target And in the application phase S102 of the current sampling period Ts or the application phase S102 of the next sampling period Ts, the voltage applied by the DC power supply 14 to the focusing ring 4 is equal to the updated target voltage V. target .

[0063] Specifically, during the sampling phase S101, the aforementioned switching circuit switches to the sampling phase. At this time, switches S1 and S2 are both open, the DC power supply 14 does not output power externally, and the voltage on the surface of the focusing ring 4 is collected by the voltage detection device; this is the aforementioned sampling voltage. Based on this sampling voltage, the target voltage V can be obtained. target Obtain the target voltage V. target This is to determine the magnitude of the voltage applied by the DC power supply 14 to the focusing ring 4 in the subsequent application phase S102. In the application phase S102, the aforementioned switching circuit switches to the application phase; at this time, switch S1 is closed, and switch S2 is open, and the DC power supply 14 applies a voltage to the focusing ring 4, equal to the target voltage V. target The actual voltage V of the focusing ring 4 is collected by a voltage detection device. real It is easy to understand that both the sampling phase S101 and the application phase S102 affect the actual voltage V of the focusing ring 4. real Data is collected, but no DC voltage is applied during the sampling phase S101, while a DC voltage is applied during the application phase S102.

[0064] The actual voltage V of focusing ring 4 real After data acquisition, compare the actual voltage V. real With target voltage V target Adjust and update the target voltage V based on the comparison results. target And in the application phase S102 of the current sampling period Ts or the application phase S102 of the next sampling period Ts, the voltage applied by the DC power supply 14 to the focusing ring 4 is equal to the updated target voltage V. targetSo that during the application phase S102 of the current sampling period Ts or the application phase S102 of the next sampling period Ts, the actual voltage V of the focusing ring 4 is made... real Closer to the updated target voltage V target It is easy to understand that, during the application phase S102 of the current sampling period Ts, the voltage applied by the control DC power supply 14 to the focusing ring 4 is equal to the updated target voltage V. target Under the condition that the target voltage V of the current sampling period Ts during the application phase S102 is... target It is variable. In the application phase S102 of the next sampling period Ts, the voltage applied by the control DC power supply 14 to the focusing ring 4 is equal to the updated target voltage V. target Under the condition that the target voltage V of the current sampling period Ts during the application phase S102 is... target It remains unchanged, while the target voltage V in the application phase S102 of the next sampling period Ts is... target The target voltage V of the application phase S102 relative to the current sampling period Ts target change.

[0065] During the application phase S102 of each sampling period Ts, the actual voltage V of the focusing ring 4 is acquired. real And compare the actual voltage V real With target voltage V target Adjust and update the target voltage V based on the comparison results. target And in the application phase S102 of the current sampling period Ts or the application phase S102 of the next sampling period Ts, the voltage applied by the DC power supply 14 to the focusing ring 4 is equal to the updated target voltage V. target The target voltage V can be continuously adjusted throughout the entire process of loading the radio frequency signal (the maximum value of the radio frequency voltage is Vs). target To continuously reduce the actual voltage V real With target voltage V target This can reduce deviations and thus improve the accuracy of process results.

[0066] The radio frequency (RF) signal output by the aforementioned RF power supply 12 can be a pulse signal or a continuous signal. When the RF signal is a first pulse signal, the duration of each sampling period Ts is equal to the sum of the durations of the N pulse periods T of the first pulse signal, where N is an integer greater than or equal to 2. The start and end times of each sampling period Ts are the same as the start time of the first pulse period T and the end time of the Nth pulse period of the first pulse signal, respectively. Specifically, the duration of the sampling phase S101 is the same as the duration of the RF on-time of the pulse period T of the first pulse signal, and the start and end times of the sampling phase S101 are the same as the start and end times of the RF on-time of the first pulse period T of the first pulse signal, respectively. In other words, the sampling phase S101 of each sampling period Ts is the same time period as the RF on-time of the first pulse period T of the first pulse signal. Each pulse period T of the first pulse signal includes an RF on-time phase and an RF off-time phase. During the RF on-time phase, the RF power supply 12 is turned on and outputs an RF voltage to the downward electrode; during the RF off-time phase, the RF power supply 12 is turned off.

[0067] In related technologies, such as Figure 2 As shown, when the radio frequency signal is a pulse signal, the plasma repeatedly ignites and extinguishes within the process chamber 1. This results in instability of the plasma sheath during phase S2 of each pulse cycle T. Since the relevant technology acquires the voltage of the focusing ring 4 during phase S2, the voltage measurement value acquired at this time is also unstable, thus affecting the accuracy of the process results. Moreover, the duration of the aforementioned phase S2 is extremely short (approximately 5-10 microseconds), and the manufacturing difficulty and cost of a withstand voltage switching device capable of switching between phases S2 and S3 in a short time are relatively high.

[0068] To address the aforementioned problems, this embodiment of the invention makes the sampling phase S101 of each sampling period Ts coincide with the radio frequency activation period of the first pulse period T of the first pulse signal contained within that sampling period Ts, which is equivalent to... Figure 2 During the S2 and S3 phases (20 to 100 microseconds), a suitable time period is selected to sample the voltage of the focusing ring 4. Preferably, the voltage of the focusing ring 4 is sampled during the S3 phase when the process chamber 1 is in a plasma stable state. This eliminates the need for a voltage-resistant switching device that can switch between the S2 and S3 phases in a short time, thus reducing costs. Furthermore, sampling the voltage of the focusing ring 4 while the process chamber 1 is in a plasma stable state improves measurement stability and consequently, the accuracy of the process results.

[0069] In some embodiments, to achieve the goal of sampling the voltage of the focusing ring 4 while the process chamber 1 is in a plasma stable state during stage S3, the sampling stage S101 includes a delay sub-stage and an acquisition sub-stage executed sequentially. During the delay sub-stage, the DC power supply 14 is turned off; during the acquisition sub-stage, the voltage of the focusing ring 4 is sampled to obtain a sampled voltage, and the target voltage is obtained based on the sampled voltage. By setting the aforementioned delay sub-stage, it is possible to ensure that the voltage of the focusing ring 4 is sampled while the process chamber 1 is in a plasma stable state, thereby improving measurement stability and ultimately improving the accuracy of the process results.

[0070] Furthermore, within each sampling period Ts, the start time of the aforementioned delay sub-stage is the same as the start time of the first pulse period T of the first pulse signal. The duration Td of the delay sub-stage can satisfy the following relationship: Td = T × r1, where T is the duration of the pulse period T of the first pulse signal; r1 is the delay ratio, which is a set value. Based on this, the duration Tw of the acquisition sub-stage can satisfy the following relationship: Tw = T × r2, where r2 is the sampling window ratio, which is a set value, and r1 + r2 < 1.

[0071] In some embodiments, to further improve measurement accuracy, the voltage of the focusing ring 4 is sampled during the acquisition sub-stage to obtain the sampled voltage, and the target voltage V is obtained based on the sampled voltage. target Specifically, it includes:

[0072] During the acquisition sub-stage, the voltage of focusing ring 4 is sampled multiple times to obtain multiple sampled voltages;

[0073] The average voltage V0 is obtained by averaging multiple sampled voltages.

[0074] The sum of the average voltage V0 and the preset voltage difference ΔV is used as the target voltage V. target .

[0075] In some embodiments, the aforementioned average voltage V0 can be an algebraic average, geometric average, etc. In practical applications, the averaging method can be selected according to specific needs, and the embodiments of the present invention do not impose any particular limitations on this.

[0076] The aforementioned differential voltage ΔV is a set value. Users can select an appropriate ΔV based on the process results. ΔV can not only achieve the ideal effect of the etching hole tilt angle, but also affect parameters such as etching rate uniformity, etching selectivity, and etching hole size.

[0077] When the radio frequency signal is the first pulse signal, during the application phase S102 of each sampling period Ts, the voltage signal output by the DC power supply 14 is the second pulse signal, and the duration of the application phase S102 is equal to the sum of the durations of the M pulse periods of the second pulse signal, where M is an integer greater than or equal to 2. The start and end times of the application phase S102 are the same as the start time of the first pulse period of the second pulse signal and the end time of the Mth pulse period of the second pulse signal, respectively. M can be set according to specific needs. Furthermore, the pulse period of the second pulse signal is the same as the duration of the pulse period T of the first pulse signal, and the rising and falling edges of the second pulse signal are synchronized with the rising and falling edges of the first pulse signal, respectively. That is, the DC turn-on period of the pulse period of the second pulse signal is the same as the radio frequency turn-on period of the corresponding pulse period T of the first pulse signal, and the DC turn-off period of the pulse period of the second pulse signal is the same as the radio frequency turn-off period of the corresponding pulse period T of the first pulse signal.

[0078] In some embodiments, a pulse synchronization device can be used to send a pulse synchronization signal to the DC power supply 14 at the beginning of the second pulse period T of the first pulse signal. When the DC power supply 14 receives the pulse synchronization signal, it starts to output the second pulse signal, thereby achieving the effect that the rising edge and falling edge of the second pulse signal are synchronized with the rising edge and falling edge of the first pulse signal, respectively.

[0079] In some embodiments, the deviation between the actual voltage and the target voltage can be continuously reduced as the number of pulse periods T of the first pulse signal increases within the same sampling period Ts. Specifically, as shown in the figure... Figure 6 and Figure 7 As shown, corresponding to each sampling period Ts, the RF activation period of the first pulse period T of the first pulse signal coincides with the sampling phase S101. Within the i-th pulse period T(i) of the first pulse signal, i = 2, 3, ... N, the actual voltage V is sampled. real (i), and compare the actual voltage V real (i) and the target voltage V within the current pulse period T(i) target (i); Adjust and update the target voltage based on the comparison result, and within the (i+1)th pulse period T(i+1) of the first pulse signal, control the voltage applied to the focusing ring by the DC power supply to be equal to the updated target voltage, i.e., V target (i+1) compared to V target (i) A change occurs. Specifically, in each application phase S102, the actual voltage V is applied to each pulse period T of the first pulse signal. real Acquisition, comparison, and target voltage V targetThe process of adjustment and updating allows the actual voltage V to continuously decrease as the number of pulse periods T of the first pulse signal increases within the same sampling period Ts. real With target voltage V target The deviation.

[0080] Furthermore, corresponding to each sampling period Ts, within the second pulse period T (i=2) of the first pulse signal, the actual voltage V is collected. real (i=2), and compare with the actual voltage V real (i=2) and the target voltage V within the second pulse period T (i=2) target (i=2); Adjust and update the target voltage according to the comparison result, and the target voltage V within the third pulse period T (i=3) of the first pulse signal. target (i=3) equals the updated target voltage; then, within the third pulse period T (i=3) of the first pulse signal, the actual voltage V is acquired. real (i=3), and compare with the actual voltage V real (i=3) and the target voltage V within the 3rd pulse period T (i=3) target (i=3); Adjust and update the target voltage again based on the comparison result, and the target voltage V within the 4th pulse period T of the first pulse signal. target (i=4) equals the target voltage after the update; and so on.

[0081] Furthermore, in some embodiments, the target voltage V may be applied only if the comparison result meets certain update conditions. target The adjustment and update are performed, while the target voltage V is maintained if the comparison result does not meet the update condition. target Unchanged. This update condition can be set according to specific process conditions.

[0082] Specifically, within the same sampling period Ts, the actual voltage V decreases continuously as the number of pulse periods T of the first pulse signal increases. real (i) with target voltage V target Taking the deviation of (i) as an example, compare the actual voltage V real (i) and the current target voltage V target (i) Adjust and update the target voltage based on the comparison result, and within the (i+1)th pulse period T of the first pulse signal, control the voltage applied to the focusing ring by the DC power supply to be equal to the updated target voltage, that is, the target voltage V target (i+1) equals the updated target voltage. This step specifically includes:

[0083] Calculate the actual voltage V during the i-th pulse period T(i) of the first pulse signal.real (i) with target voltage V target The absolute value V of the difference (i) delta (i), that is, V delta (i)=|V target (i)-V real (i)|;

[0084] Response to the absolute value of the difference V delta (i) Greater than the preset error voltage V error The target voltage is adjusted and updated, and within the (i+1)th pulse period T(i+1) of the first pulse signal, the voltage applied by the DC power supply to the focusing ring is controlled to be equal to the updated target voltage, i.e., the target voltage V. target (i+1) equals the updated target voltage;

[0085] Response to the absolute value of the difference V delta (i) Not exceeding the preset error voltage V error If the target voltage remains unchanged, that is, the target voltage V during the (i+1)th pulse period T remains unchanged. target (i+1) equals the target voltage V within the i-th pulse period T. target (i).

[0086] In other words, the above update condition is V delta (i) Greater than the preset error voltage V error In this case, if the process conditions are relatively stable, a smaller error voltage V can be used. error This increases the number of times the target voltage is updated, making the actual voltage closer to the target voltage; conversely, if the process conditions are more complex, a larger error voltage V can be used. error To avoid V delta (i) It can never be less than the error voltage V error The situation.

[0087] In an embodiment where the target voltage equals the sum of the average voltage and the preset difference voltage, the target voltage V is adjusted and updated based on the comparison result. target And in the application phase S102 of the current sampling period Ts or the application phase S102 of the next sampling period Ts, the voltage applied by the DC power supply 14 to the focusing ring 4 is equal to the updated target voltage V. target Specifically, it includes:

[0088] Based on the comparison results, adjust and update the difference voltage ΔV, and recalculate the sum of the average voltage V0 and the updated difference voltage ΔV as the new target voltage V. target ;

[0089] During the application phase S102 of the current sampling period Ts or the application phase S102 of the next sampling period Ts, the voltage applied by the DC power supply to the focusing ring is equal to the new target voltage V. target .

[0090] Specifically, such as Figure 7 As shown, during the application phase S102 of each sampling period Ts, the target voltage V of the second pulse period T (i=2) of the first pulse signal is... target (i=2) = Average voltage V0 (i=2) + Difference voltage ΔV (i=2). Based on this, if V delta (i=2) is greater than the preset error voltage V error Then, update the difference voltage ΔV(i=3) within the third pulse period T (i=3) of the first pulse signal. Where ΔV(i=3) = ΔV(i=2) + V delta (i=2). Then, recalculate the sum of the average voltage V0 and the updated difference voltage ΔV, and use this sum as the new target voltage V. target That is, V target (i=3)=V0+ΔV(i=3)=V0+ΔV(i=2)+V delta (i = 2). If V delta (i=3) is less than or equal to the error voltage V error Therefore, within the fourth pulse period T (i=4) of the first pulse signal, the difference voltage ΔV remains constant, i.e., ΔV(i=4) = ΔV(i=3). Consequently, the target voltage also remains constant, i.e., V target (i=4)=V target (i=3), and so on.

[0091] In other embodiments, the target voltage can be updated once every preset number (e.g., greater than 1) pulse periods T of the first pulse signal within the same sampling period Ts. That is, within the preset number of pulse periods T of the first pulse signal, the target voltage of each application stage remains unchanged, and the actual voltage is collected, compared, and the target voltage of the application stage is adjusted and updated in the next pulse period T after the preset number of pulse periods T.

[0092] In some other embodiments, the target voltage can be continuously updated as the number of sampling periods Ts increases, while the target voltage during the application phase of the same sampling period Ts remains unchanged. That is, within the current sampling period Ts, the target voltage of the current application phase is kept constant, and a process of acquiring and comparing the actual voltage and adjusting and updating the target voltage for the application phase of the next sampling period Ts is performed.

[0093] In the case of a continuous RF signal, related technologies only sample the voltage of the focusing ring 4 (i.e., the initial voltage) at the rising edge of the continuous signal. However, the voltage on the focusing ring 4 changes continuously during the process, and simply measuring the initial voltage of the focusing ring 4 is insufficient to accurately adjust its voltage, thus affecting the accuracy of the process results. To solve this problem, this embodiment of the invention performs a sampling process of at least two sampling periods Ts from the start to the end of the continuous signal. During this process, the target voltage can be adjusted at least twice, thereby continuously reducing the deviation between the actual voltage and the target voltage, and thus improving the accuracy of the process results.

[0094] Specifically, please refer to Figure 8 When the radio frequency signal is a first continuous signal, a sampling process of at least two sampling periods Ts is executed from the start time to the end time of the first continuous signal. Each sampling period Ts includes a sampling phase S101 and an application phase S102 executed sequentially. During the application phase S102, the voltage signal output by the DC power supply 14 is a second continuous signal.

[0095] In some embodiments, to avoid the voltage of the focusing ring 4 acquired in the initial stage of the first continuous signal being unstable and thus affecting the accuracy of the process results, in response to the control command of the downward electrode loading RF signal, a sampling process is executed based on the sampling period Ts, specifically including:

[0096] In response to the control command of loading the radio frequency signal to the downward electrode, the DC power supply is kept off for a preset delay period, that is, before the sampling period Ts, there is also a delay period Tv; during the delay period Tv, the DC power supply 14 is kept off.

[0097] At the end of the preset delay duration (i.e., the delay period Tv), the sampling process begins based on the sampling period Ts.

[0098] By setting the aforementioned delay period Tv, it is possible to ensure that the voltage of the focusing ring 4 is sampled while the process chamber 1 is in a stable plasma state, thereby improving measurement stability and ultimately enhancing the accuracy of the process results.

[0099] The duration of the aforementioned delay period Tv is, for example, equal to the duration of the sampling period Ts. During this delay period Tv, the DC power supply 14 is turned off, and the voltage of the focusing ring 4 is not sampled.

[0100] In some embodiments, when the RF power supply 12 receives a start communication command from the controller, the controller starts timing the delay period Tv; when the end of the delay period Tv is reached, the controller starts executing the sampling process within the first sampling period Ts.

[0101] In some embodiments, to further improve measurement stability, the sampling phase S101 of each sampling period Ts includes a delay sub-phase and an acquisition sub-phase executed sequentially. During the delay sub-phase, the DC power supply is turned off; during the acquisition sub-phase, the voltage of the focusing ring is sampled to obtain a sampled voltage, and the target voltage is obtained based on the sampled voltage. The setting of the delay sub-phase ensures that the voltage of the focusing ring 4 is sampled when the process chamber 1 is in a plasma stable state, thereby improving measurement stability and ultimately improving the accuracy of the process results. The duration Td of the delay sub-phase and the duration Tw of the acquisition sub-phase can be set according to specific needs.

[0102] Furthermore, in some embodiments, to further improve measurement accuracy, the voltage of the focusing ring 4 is sampled during the acquisition sub-stage to obtain a sampled voltage, and the target voltage V is obtained based on the sampled voltage. target Specifically, it includes:

[0103] During the acquisition sub-stage, the voltage of focusing ring 4 is sampled multiple times to obtain multiple sampled voltages;

[0104] The average voltage V0 is obtained by averaging multiple sampled voltages.

[0105] The sum of the average voltage V0 and the preset voltage difference ΔV is used as the target voltage V. target .

[0106] In some embodiments, the aforementioned average voltage value can be an algebraic average, geometric average, etc. In practical applications, the averaging method can be selected according to specific needs, and the embodiments of the present invention do not impose any particular restrictions on this.

[0107] When the radio frequency signal is a first continuous signal, the duration of the first continuous signal from its start time to its end time is equal to the sum of the durations of K sampling periods Ts, where K is an integer greater than or equal to 2; the start time and end time of the first continuous signal are the same as the start time of the first sampling period Ts (j=1) and the end time of the Kth sampling period (j=K), respectively; during the application phase S102 of the jth sampling period, j=1,2,...K, the actual voltage V is collected. real (j), and compare with the actual voltage V real (j) and the target voltage V during the current application phase S102 target (j); Adjust and update the target voltage based on the comparison result, and during the application phase S102 of the (j+1)th sampling period, control the voltage applied by the DC power supply to the focusing ring to be equal to the updated target voltage, that is, the target voltage V target (j+1) compared to the target voltage V target (j) Changes occur.

[0108] Furthermore, during the application phase S102 of the first sampling period Ts (j=1), the actual voltage V is collected. real (j=1), and compare with the actual voltage V real (j=1) and the target voltage V of the first sampling period Ts (j=1) target (j=1); Adjust and update the target voltage based on the comparison result, and during the application phase S102 of the second sampling period Ts (j=2), control the voltage applied by the DC power supply to the focusing ring to be equal to the updated target voltage, that is, the target voltage V target (j=2) equals the updated target voltage; then, during the application phase S102 of the second sampling period Ts (j=2), the actual voltage V is acquired. real (j=2), and compare with the actual voltage V real (j=2) and the target voltage V within the second sampling period Ts (j=2) target (j=2); Adjust and update the target voltage again based on the comparison result, and during the application phase S102 of the third sampling period Ts (j=3), control the voltage applied by the DC power supply to the focusing ring to be equal to the updated target voltage, that is, the target voltage V target (j=3) equals the target voltage after the update; and so on.

[0109] In some embodiments, the actual voltage V is compared real (j) and the target voltage V during the current application phase S102 target (j); Adjust and update the target voltage based on the comparison result, and control the voltage applied by the DC power supply to the focusing ring to be equal to the updated target voltage during the application phase S102 of the (j+1)th pulse period T(j+1), including:

[0110] During the application phase S102 of the j-th sampling period Ts(j), the actual voltage V is calculated. real (j) and target voltage V target The absolute value V of the difference (j) delta (j), that is, V delta (j)=|V target (j)-V real (j)|;

[0111] Response to the absolute value of the difference V delta (j) is greater than the preset error voltage V error The target voltage is adjusted and updated, and during the application phase S102 of the (j+1)th pulse period T(j+1), the voltage applied by the DC power supply to the focusing ring is controlled to be equal to the updated target voltage, i.e., the target voltage V. target(j+1) equals the updated target voltage;

[0112] Response to the absolute value of the difference V delta (j) Not exceeding the preset error voltage V erro Keep the target voltage constant, i.e., V target (j+1)=V target (j).

[0113] In an embodiment where the target voltage equals the sum of the average voltage and the preset difference voltage, the target voltage is adjusted and updated based on the comparison result. In the application phase S102 of the (j+1)th pulse period T, the voltage applied by the DC power supply to the focusing ring is controlled to equal the updated target voltage. Specifically, this includes:

[0114] Adjust and update the difference voltage ΔV based on the comparison results, and recalculate the sum of the average voltage and the updated difference voltage as the new target voltage;

[0115] During the application phase S102 of the (j+1)th pulse cycle T, the voltage applied by the DC power supply to the focusing ring is equal to the new target voltage.

[0116] Specifically, the target voltage V in the first sampling period Ts (j=1) target (j=1) = average voltage V0 + differential voltage ΔV(j=1), where the differential voltage ΔV(j=1) is a set value. Based on this, if V delta (j=1) is greater than the preset error voltage V error Then, update the difference voltage ΔV(j=2) within the second sampling period Ts(j=2). Where ΔV(j=2) = ΔV(j=1) + V delta (j=1). Then, the sum of the average voltage and the updated difference voltage is recalculated and used as the new target voltage, i.e., V. target (j=2)=V0+ΔV(j=2)=V0+ΔV(j=1)+V delta (j=1). If V delta (j=2) is less than or equal to the preset error voltage V error Therefore, during the third sampling period Ts (j=3), the difference voltage ΔV remains unchanged, that is, the difference voltage ΔV(j=3) = ΔV(j=2). Consequently, the target voltage also remains unchanged, that is, V target (j=3)=V target (j=2), and so on.

[0117] As another technical solution, this embodiment of the invention also provides a focusing ring voltage control device, which includes a controller, the controller including at least one processor and at least one memory, the memory storing a computer program, and the computer program being executed by the processor to implement the method of any of the above embodiments.

[0118] As another technical solution, embodiments of the present invention also provide a semiconductor process apparatus, which, for example, employs... Figure 3 Based on the structure shown, semiconductor process equipment also includes a controller ( Figure 3 (Not shown in the diagram). The controller includes at least one processor and at least one memory, in which a computer program is stored, which, when executed by the processor, implements the method of any of the above embodiments.

[0119] For example, the controller can be a host computer or a slave computer. The controller can open the valve of the air inlet assembly 2 to introduce the corresponding process gas into the process chamber 1; the controller can also control the opening and closing degree of the valve of the air inlet assembly 2 to control the flow rate of the process gas. The controller can also control the air extraction assembly 10 to extract air from the process chamber 1, thereby controlling the pressure inside the process chamber 1 and removing reaction byproducts.

[0120] The controller is also used to control the RF power supply 12 to provide RF power to the lower electrode through the matching unit 11 to excite the process gas inside the process chamber 1 to generate plasma.

[0121] The controller is also used to control the DC power supply 14 to apply DC voltage to the focusing ring 4 through the filter 13.

[0122] In the focusing ring voltage control method and semiconductor process equipment provided by the embodiments of the present invention, the actual voltage of the focusing ring is acquired during the application phase of each sampling cycle, and the actual voltage is compared with the target voltage; the target voltage is adjusted and updated according to the comparison result; and the voltage applied to the focusing ring by the DC power supply is controlled to be equal to the updated target voltage during the application phase of the current sampling cycle or the application phase of the next sampling cycle. The target voltage can be continuously adjusted throughout the entire process of loading the radio frequency signal to continuously reduce the deviation between the actual voltage and the target voltage, thereby improving the accuracy of the process results.

[0123] According to embodiments of this disclosure, a computer-readable medium is also provided. This computer-readable medium stores a computer program, which, when executed by a processor, implements the steps of any of the methods described in the above embodiments.

[0124] In particular, according to embodiments of this disclosure, the processes described above with reference to the flowcharts can be implemented as computer software programs. For example, embodiments of this disclosure include a computer program product comprising a computer program carried on a machine-readable medium, the computer program containing program code for performing the methods shown in the flowcharts. In such embodiments, the computer program can be downloaded and installed from a network via a communication component, and / or installed from a removable medium. When the computer program is executed by a central processing unit (CPU), it performs the functions defined above in the system of this disclosure.

[0125] It should be noted that the computer-readable medium disclosed herein may be a computer-readable signal medium or a computer-readable storage medium, or any combination thereof. A computer-readable storage medium may be, for example,—but not limited to—an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any combination thereof. More specific examples of a computer-readable storage medium may include, but are not limited to: an electrical connection having one or more wires, a portable computer disk, a hard disk, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fiber, portable compact disk read-only memory (CD-ROM), optical storage device, magnetic storage device, or any suitable combination thereof. In this disclosure, a computer-readable storage medium may be any tangible medium containing or storing a program that can be used by or in conjunction with an instruction execution system, apparatus, or device. In this disclosure, a computer-readable signal medium may include a data signal propagated in baseband or as part of a carrier wave, carrying computer-readable program code. Such propagated data signals may take various forms, including but not limited to electromagnetic signals, optical signals, or any suitable combination thereof. Computer-readable signal media can also be any computer-readable medium other than computer-readable storage media, which can send, propagate, or transmit a program for use by or in connection with an instruction execution system, apparatus, or device. The program code contained on the computer-readable medium can be transmitted using any suitable medium, including but not limited to: wireless, wire, optical fiber, RF, etc., or any suitable combination thereof.

[0126] The flowcharts and block diagrams in the accompanying drawings illustrate the architecture, functionality, and operation of possible implementations of systems, methods, and computer program products according to various embodiments of this disclosure. In this regard, each block in a flowchart or block diagram may represent a module, segment, or portion of code containing one or more executable instructions for implementing a specified logical function. It should also be noted that in some alternative implementations, the functions indicated in the blocks may occur in a different order than those indicated in the drawings. For example, two consecutively indicated blocks may actually be executed substantially in parallel, and they may sometimes be executed in reverse order, depending on the functions involved. It should also be noted that each block in the block diagrams and / or flowcharts, and combinations of blocks in the block diagrams and / or flowcharts, can be implemented using a dedicated hardware-based system that performs the specified function or operation, or using a combination of dedicated hardware and computer instructions.

[0127] It is understood that the above embodiments are merely exemplary implementations used to illustrate the principles of the present invention, and the present invention is not limited thereto. For those skilled in the art, various modifications and improvements can be made without departing from the spirit and essence of the present invention, and these modifications and improvements are also considered to be within the scope of protection of the present invention.

Claims

1. A focusing loop voltage control method, characterized in that, include: In response to a control command to apply an RF signal to the downward electrode, a sampling process is executed based on a sampling period; each sampling period includes a sampling phase and an application phase executed sequentially. During the sampling phase, the DC power supply used to apply voltage to the focusing ring is turned off, and the voltage of the focusing ring is sampled to obtain a sampled voltage. The target voltage is obtained based on the sampled voltage and a preset difference voltage. During the application phase, the voltage applied to the focusing ring by the DC power supply is controlled to be equal to the target voltage; the actual voltage of the focusing ring is acquired, and the actual voltage is compared with the target voltage; Based on the comparison results, the difference voltage is adjusted and updated to adjust and update the target voltage; And during the application phase of the current sampling period or the application phase of the next sampling period, control the voltage applied by the DC power supply to the focusing ring to be equal to the updated target voltage; Wherein, when the radio frequency signal is a first pulse signal, the duration of each sampling period is equal to the sum of the durations of N pulse periods of the first pulse signal, where N is an integer greater than or equal to 2; the duration of the sampling phase is the same as the duration of the radio frequency activation period of the pulse period of the first pulse signal, and the start and end times of the sampling phase are the same as the start and end times of the radio frequency activation period of the first pulse period of the first pulse signal within the sampling period; the voltage signal output by the DC power supply during the application phase is a second pulse signal; the duration of the application phase is equal to the sum of the durations of M pulse periods of the second pulse signal, where M is an integer greater than or equal to 2; the pulse period of the second pulse signal is the same as the duration of the pulse period of the first pulse signal, and the rising and falling edges of the second pulse signal are synchronized with the rising and falling edges of the first pulse signal, respectively; or Wherein, when the radio frequency signal is a first continuous signal, a sampling process of at least two sampling cycles is performed from the start time to the end time of the first continuous signal; the voltage signal output by the DC power supply during the application phase is a second continuous signal.

2. The method according to claim 1, characterized in that, When the radio frequency signal is the first pulse signal, the start time and end time of each sampling period are the same as the start time of the first pulse period of the first pulse signal in the sampling period and the end time of the Nth pulse period of the first pulse signal in the sampling period, respectively.

3. The method according to claim 2, characterized in that, The start and end times of the application phase are the same as the start time of the first pulse cycle of the second pulse signal and the end time of the Mth pulse cycle of the second pulse signal, respectively.

4. The method according to claim 3, characterized in that, For each sampling period, in the i-th pulse period of the first pulse signal, i=2,3,...N, the actual voltage is acquired and compared with the target voltage in the current pulse period; The target voltage is adjusted and updated based on the comparison results, and within the (i+1)th pulse period of the first pulse signal, the voltage applied by the DC power supply to the focusing ring is controlled to be equal to the updated target voltage.

5. The method according to claim 4, characterized in that, The step of comparing the actual voltage with the current target voltage; adjusting and updating the target voltage based on the comparison result; and controlling the voltage applied to the focusing ring by the DC power supply to be equal to the updated target voltage within the (i+1)th pulse period of the first pulse signal includes: Within the i-th pulse period of the first pulse signal, calculate the absolute value of the difference between the actual voltage and the target voltage; In response to the absolute value of the difference being greater than a preset error voltage, the target voltage is adjusted and updated, and within the (i+1)th pulse period of the first pulse signal, the voltage applied by the DC power supply to the focusing ring is controlled to be equal to the updated target voltage; In response to the absolute value of the difference not exceeding the preset error voltage, the target voltage remains unchanged.

6. The method according to claim 1, characterized in that, When the radio frequency signal is the first continuous signal, the step of executing the sampling process based on the sampling period in response to the control command of loading the radio frequency signal onto the downward electrode includes: In response to a control command that applies a radio frequency signal to the downward electrode, the DC power supply is kept off for a preset delay period. At the end of the preset delay period, the sampling process begins to be executed based on the sampling period.

7. The method according to claim 1, characterized in that, When the radio frequency signal is the first continuous signal, the duration of the first continuous signal from its start time to its end time is equal to the sum of the durations of K sampling periods, where K is an integer greater than or equal to 2; the start time and end time of the first continuous signal are the same as the start time of the first sampling period and the end time of the Kth sampling period, respectively. During the application phase of the j-th sampling period (j=1,2,...K), the actual voltage is acquired and compared with the target voltage during the current application phase; the target voltage is adjusted and updated based on the comparison result; and during the application phase of the (j+1)-th sampling period, the voltage applied by the DC power supply to the focusing ring is controlled to be equal to the updated target voltage.

8. The method according to claim 7, characterized in that, The steps of comparing the actual voltage with the target voltage during the current application phase, adjusting and updating the target voltage based on the comparison result, and controlling the voltage applied to the focusing ring by the DC power supply to be equal to the updated target voltage during the application phase of the (j+1)th sampling period include: During the application phase of the j-th sampling period, the absolute value of the difference between the actual voltage and the target voltage is calculated; In response to the absolute value of the difference being greater than a preset error voltage, the target voltage is adjusted and updated, and during the application phase of the (j+1)th sampling period, the voltage applied by the DC power supply to the focusing ring is controlled to be equal to the updated target voltage; In response to the absolute value of the difference not exceeding the preset error voltage, the target voltage remains unchanged.

9. The method according to any one of claims 1-8, characterized in that, The sampling phase includes a delayed sub-phase and a collection sub-phase executed sequentially; During the delay sub-stage, the DC power supply is controlled to be turned off; In the acquisition sub-stage, the voltage of the focusing ring is sampled to obtain the sampled voltage, and the target voltage is obtained based on the sampled voltage.

10. The method according to claim 9, characterized in that, The step of sampling the voltage of the focusing ring in the acquisition sub-stage to obtain a sampled voltage, and obtaining the target voltage based on the sampled voltage, includes: In the acquisition sub-stage, the voltage of the focusing ring is sampled multiple times to obtain multiple sampled voltages; The average voltage is obtained by averaging the multiple sampled voltages. The sum of the average voltage and the difference voltage is calculated as the target voltage.

11. The method according to claim 10, characterized in that, The step of adjusting and updating the target voltage based on the comparison result, and controlling the voltage applied to the focusing ring by the DC power supply to be equal to the updated target voltage during the application phase of the current sampling period or the application phase of the next sampling period, includes: The difference voltage is adjusted and updated based on the comparison results, and the sum of the average voltage and the updated difference voltage is recalculated as the new target voltage. During the application phase of the current sampling period or the application phase of the next sampling period, the voltage applied by the DC power supply to the focusing ring is controlled to be equal to the new target voltage.

12. A focusing loop voltage control device, characterized in that, The system includes a controller, which includes at least one processor and at least one memory, the memory storing a computer program that, when executed by the processor, implements the method as described in any one of claims 1-11.

13. A semiconductor process apparatus, comprising a lower electrode, a focusing ring, and a controller, wherein the lower electrode is configured to be electrically connected to an RF power supply; and the focusing ring is configured to be electrically connected to a DC power supply; characterized in that, The controller includes at least one processor and at least one memory, the memory storing a computer program that, when executed by the processor, implements the method as described in any one of claims 1-11.

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