A ground terminal communication system based on FH-TDMA system
By using a ground terminal communication system based on the FH-TDMA architecture, and combining the synchronization time slot analysis of the frame synchronization module and the control module, the frame synchronization error problem of traditional short frame burst communication under low signal-to-noise ratio conditions is solved, achieving higher frame synchronization accuracy and communication reliability.
Patent Information
- Application Number
- CN202510501124.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2025-04-21
- Publication Date
- 2026-11-06
- Estimated Expiration
- 2045-04-21
AI Technical Summary
In the FH-TDMA system, traditional short-frame burst communication is prone to frame synchronization errors under poor signal-to-noise ratio conditions, leading to communication interruption or data loss. Existing technologies cannot achieve reliable and accurate frame synchronization.
The ground terminal communication system based on FH-TDMA includes a transmitting module and a receiving module. Through modules such as encoding, modulation, frequency hopping pattern, digital up/down conversion, radio frequency processing, acquisition, frame synchronization and decoding, combined with the synchronization time slot analysis of the frame synchronization module and the control module, the system uses TOD information for frame synchronization to achieve time and frequency synchronization. LDPC, Turbo or convolutional code modulation methods are used to reduce the probability of frame synchronization false alarms.
It improves the frame synchronization accuracy under low signal-to-noise ratio conditions, enhances the reliability of satellite-to-ground communication and the probability of correct frame synchronization, and reduces the probability of false alarms in frame synchronization.
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Figure CN120415487B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to a ground terminal communication system based on the FH-TDMA system, belonging to the field of satellite communication technology. Background Technology
[0002] FH-TMDA (Frequency Hopping-Time Division Multiple Access) is a communication system that combines frequency hopping and time division multiple access technologies, and it is particularly important in satellite anti-jamming communication systems. In FH-TMDA, frequency hopping avoids interference and eavesdropping by continuously changing the communication frequency. However, frequency hopping also requires the support of a frame synchronization algorithm to ensure that each frequency point remains synchronized and receives data frames during the hopping process, preventing communication interruptions or data loss due to frequency changes. This is crucial for secure and reliable data transmission.
[0003] High-orbit satellite communication systems experience significant space attenuation and rain attenuation during link transmission, causing ground terminals to process signals under low signal-to-noise ratio (SNR) conditions. Traditional short-frame burst communication is prone to frame synchronization errors under these adverse SNR conditions, leading to frame loss. Therefore, achieving reliable and accurate frame synchronization based on the FH-TDMA system has become a pressing technical problem for the industry. Summary of the Invention
[0004] The technical problem solved by the present invention is to overcome the shortcomings of the prior art and provide a ground terminal communication system based on the FH-TDMA system, which improves the frame synchronization accuracy of burst short frame communication under low signal-to-noise ratio conditions.
[0005] The technical solution of this invention is:
[0006] A ground terminal communication system based on FH-TDMA includes: a transmitting module, a control module, and a receiving module;
[0007] The transmission module includes an encoding module, a framing module, a modulation module, a transmit frequency hopping pattern module, a digital up-conversion module, a DAC module, and an RF processing module;
[0008] The receiver module includes an RF processing module, a DAC module, a digital down-conversion module, a receiver frequency hopping pattern module, a capture module, a demodulation module, a frame synchronization module, a deframe module, and a decoding module.
[0009] The host computer sends the link frame containing the transmission information to the transmission module. The encoding module in the transmission module encodes the transmission information through the channel. The encoded information bits and check bits are then framed by the framing module to form a physical frame. After that, the modulation module modulates the signal to obtain the symbol waveform. The transmit frequency hopping pattern module receives the transmit frequency hopping pattern parsed by the control module and then controls the digital up-conversion module to perform frequency local oscillator switching. The symbol waveform is digitally up-converted to the corresponding operating frequency. After intermediate frequency conversion by the DAC module, it is processed into an radio frequency signal by the radio frequency processing module and then transmitted.
[0010] After the ground terminal is powered on, the receiving module is in constant listening mode and demodulates the satellite downlink data. Specifically, the RF processing module and DAC module in the receiving module convert the received RF signal into a digital signal through RF processing and ADC. The receiving frequency hopping pattern module receives the receiving frequency hopping pattern parsed by the control module, and then controls the digital downconversion module to perform frequency local oscillator switching, downconverting the digital signal to the baseband zero frequency. Then, the acquisition module and frame synchronization module achieve time and frequency synchronization. The physical frame content is obtained by the symbol demodulation module. The deframe module deframes and splits the physical frame according to the protocol, and then the decoding module decodes and verifies to obtain the link frame information. The link frame information is sent to the host computer for parsing and simultaneously transmitted to the control module.
[0011] The control module includes a synchronization time slot parsing submodule and a status control submodule. The synchronization time slot parsing submodule receives the link frame information from the receiving module, parses the synchronization time slot information according to the link layer protocol to obtain TOD information and CRC check information, and then obtains the transmit frequency hopping pattern and the receive frequency hopping pattern. The control module transmits the parsed transmit frequency hopping pattern and the receive frequency hopping pattern to the transmit frequency hopping pattern submodule of the transmitting module and the receive frequency hopping pattern submodule of the receiving module, respectively.
[0012] Furthermore, the satellite downlink data frame format includes synchronization time slots and service time slots. The synchronization time slot is divided into a synchronization header, frame length, destination address, source address, TOD information, and CRC check. The service time slot is used to transmit valid service information. The satellite downlink data frame is reassembled at the physical layer and divided into N frequency hopping blocks. Each frequency hopping block consists of frequency hopping protection segments at both ends and frequency hopping data.
[0013] Furthermore, let the transmit frequency hopping pattern be denoted as Pattern Tx The received frequency hopping pattern is Pattern Rx The two frequency hopping patterns are functions of TOD information, and are indexed based on the TOD information. The acquisition method is as follows:
[0014] Pattern Tx =f(TOD)
[0015] Pattern Rx =f(TOD)
[0016] The frequency hopping pattern function f(·) is defined according to the transmitting and receiving parties.
[0017] Furthermore, when performing channel coding, the transmission module uses LDPC, Turbo, or convolutional codes.
[0018] Furthermore, when the transmission module performs modulation, the modulation method is PSK, FSK, or QAM.
[0019] Furthermore, frame synchronization is achieved through the ground terminal communication system, as follows:
[0020] After the ground terminal system is powered on, the receiving module, control module and transmitting module are initially reset. The receiving module is always in a listening state, waiting to receive downlink data from the satellite. The downlink data from the satellite includes the time slot allocation information for the ground terminal's reception and transmission.
[0021] After the receiving module receives downlink data, it parses the time slot allocation information. After parsing, it sets the status of the receiving module and the transmitting module, initializes the local TOD information, and maintains the update of the TOD information in accordance with the protocol requirements.
[0022] The control module performs a CRC check. If the CRC check passes, it means that the synchronization time slot information has been received correctly. Then, the local clock is calibrated according to the TOD information to avoid differences in TOD information due to the clock difference between the ground and the satellite. If the CRC check fails, it means that the synchronization time slot information has not been received correctly. The local clock then maintains the update of the TOD information according to its own local oscillator clock.
[0023] The state control submodule then transmits the TOD information to the frame synchronization module in the receiving module. The frame synchronization module uses the received TOD information and the synchronization result of the previous frame as the frame synchronization input conditions for the current frame, and makes a joint decision on the result of the current frame synchronization to achieve frame synchronization.
[0024] Furthermore, the time slot allocation information received and transmitted by the ground terminal is specifically as follows:
[0025] Within a time slot period T of a satellite-to-ground terminal communication, there are M time slots, namely time slot 1, time slot 2, ..., time slot M. Time slot 1 is used for satellite broadcasting downlink data. In time slots 2 to M, Q time slots are used for Q ground terminals to transmit uplink data, where Q ≤ M-1. Each ground terminal is assigned to a different time slot for uplink data transmission.
[0026] Under low signal-to-noise ratio conditions, noise can cause frame synchronization results to exceed the preset frame synchronization threshold, resulting in frame synchronization false alarms. TOD information represents time information, and frame synchronization confirms the start of each frame in the time dimension. When correct synchronization is achieved at time T0, i.e., after determining the position of the frame header, the frame header positions of the second, third, ..., Nth frames are T0+T, T0+2T, ..., T0+(N-1)T, respectively. Due to the time difference caused by clock differences between the transmitter and receiver, let the clock difference generated in each period T be τ (τ is positive, indicating that the satellite is ahead of the ground terminal; τ is negative, indicating that the satellite is behind the ground terminal). Then the actual frame header positions of the second, third, ..., Nth frames are T0+T+τ, T0+2(T+τ), ..., T0+(N-1)(T+τ), respectively. Therefore, without time calibration, the time synchronization will deteriorate. The joint decision involves synchronizing the frame synchronization algorithm and time calibration. After the CRC check passes, the current reference time T0 is updated, and frame synchronization is enabled in the next T0+T window. This reduces the false alarm probability of the frame synchronization algorithm under low signal-to-noise ratio conditions.
[0027] Secondly, this invention also proposes a frame synchronization method for an FH-TDMA system, comprising the following steps:
[0028] (1) Frame synchronization module status reset;
[0029] (2) The frame synchronization module receives demodulation information;
[0030] (3) Determine whether the current frame is the first frame received after the frame synchronization module is reset. If it is the first frame, the frame synchronization module will not perform frame synchronization without prior information; otherwise, the frame synchronization module will jointly determine the synchronization result of the current frame based on the TOD information and the synchronization result of the previous frame.
[0031] (4) The control module performs CRC check on the received synchronization time slot information. If the CRC check passes, it means that the synchronization time slot information has been received correctly. The local TOD information is updated in real time according to the on-board TOD information. If the CRC check fails, the CRC check error count is incremented by 1. Then it is determined whether the frame synchronization is lost. If the CRC check error count exceeds the threshold value, it is determined that the frame synchronization is lost. The process returns to step (1), the CRC check error count is reset to 0, and steps (1) to (4) are repeated. If the frame synchronization is not lost, the local TOD information is maintained in real time by relying on its own clock.
[0032] (5) The frame synchronization submodule receives the TOD information and repeats steps (1) to (5).
[0033] The advantages of this invention compared to the prior art are:
[0034] (1) This invention improves the frame synchronization probability of short frame burst communication under low signal-to-noise ratio conditions.
[0035] (2) The present invention provides the implementation process of the frame synchronization method, which covers frame synchronization maintenance and frame synchronization loss resynchronization, thereby improving the reliability of satellite-to-ground communication. Attached Figure Description
[0036] Figure 1 This is a structural diagram of a ground terminal communication system based on the FH-TDMA system in an embodiment of the present invention;
[0037] Figure 2 This is a schematic diagram of the downlink data frame format in an embodiment of the present invention;
[0038] Figure 3 This is a schematic diagram of time slot allocation for the FH-TDMA system in an embodiment of the present invention;
[0039] Figure 4 This is a functional diagram of the frame synchronization submodule in an embodiment of the present invention;
[0040] Figure 5 This is a schematic diagram illustrating the implementation process of the frame synchronization method for a ground terminal communication system. Detailed Implementation
[0041] The specific embodiments of the present invention will now be described in further detail with reference to the accompanying drawings.
[0042] The FH-TDMA system has high requirements for time synchronization. Due to propagation delays and clock differences between the satellite and the user, the satellite and the ground terminal need to synchronize their times. However, due to limited onboard resources, the ground terminal needs to actively perform time compensation and correction to achieve time synchronization and ultimately join the network.
[0043] like Figure 1 As shown, the present invention provides a ground terminal communication system based on the FH-TDMA system, including a transmitting module, a control module and a receiving module.
[0044] The transmission module includes an encoding module, a framing module, a modulation module, a transmit frequency hopping pattern module, a digital up-conversion module, a DAC module, and an RF processing module;
[0045] The receiver module includes an RF processing module, a DAC module, a digital down-conversion module, a receiver frequency hopping pattern module, a capture module, a demodulation module, a frame synchronization module, a deframe module, and a decoding module.
[0046] The host computer sends a link frame containing the transmission information to the transmission module. In the transmission module, the encoding module channels the information using methods such as LDPC, Turbo, and convolutional codes. The encoded information bits and check bits are then framed by the framing module to form a physical frame. This frame is then modulated by the modulation module to obtain the symbol waveform; common modulation methods include PSK, FSK, and QAM. The transmit frequency hopping pattern module receives the transmit frequency hopping pattern parsed by the control module and controls the digital up-conversion module to perform local oscillator switching. The symbol waveform is digitally up-converted to the corresponding operating frequency, then converted to intermediate frequency by the DAC module, and finally processed into an RF signal by the RF processing module before being transmitted.
[0047] After the ground terminal is powered on, the receiving module is in constant listening mode and demodulates the satellite downlink data. Specifically, the RF processing module and DAC module in the receiving module convert the received RF signal into a digital signal through RF processing and ADC. The receiving frequency hopping pattern module receives the receiving frequency hopping pattern parsed by the control module, and then controls the digital downconversion module to perform frequency local oscillator switching, downconverting the digital signal to the baseband zero frequency. Then, the acquisition module and frame synchronization module achieve time and frequency synchronization. The physical frame content is obtained by the symbol demodulation module. The deframe module deframes and splits the physical frame according to the protocol, and then the decoding module decodes and verifies to obtain the link frame information. The link frame information is sent to the host computer for parsing and simultaneously transmitted to the control module.
[0048] The control module includes a synchronization time slot parsing submodule and a status control submodule. Its main functions include synchronization time slot parsing, status control, and transmit / receive frequency hopping control. The synchronization time slot parsing submodule receives link frame information from the receiving module, parses the synchronization time slot information according to the link layer protocol to obtain TOD (Time of Day) information and CRC check information, and then obtains the transmit frequency hopping pattern and receive frequency hopping pattern.
[0049] Let the transmit frequency hopping pattern be Pattern Tx The received frequency hopping pattern is Pattern Rx The two frequency hopping patterns are functions of TOD information and can be indexed based on TOD information. The acquisition method is as follows:
[0050] Pattern Tx =f(TOD)
[0051] Pattern Rx =f(TOD)
[0052] The frequency hopping pattern function f(·) is defined according to the transmitting and receiving parties. The control module transmits the parsed transmit frequency hopping pattern and receive frequency hopping pattern to the transmit frequency hopping pattern submodule of the transmitting module and the receive frequency hopping pattern submodule of the receiving module, respectively.
[0053] Downlink data frame format as follows Figure 2 As shown. The satellite downlink data frame format includes synchronization time slots and service time slots. The synchronization time slot is divided into a synchronization header, frame length, destination address, source address, TOD information, and CRC check. The service time slot is used to transmit valid service information. The satellite downlink data frame is reassembled at the physical layer and divided into N frequency hopping blocks. Each frequency hopping block consists of frequency hopping protection segments at both ends and frequency hopping data.
[0054] Traditional frame synchronization algorithms suffer from extremely low correct frame synchronization rates for short-frame burst communication under low signal-to-noise ratio (SNR) conditions. This invention addresses this problem by implementing frame synchronization through a terrestrial terminal communication system based on the FH-TDMA architecture, thus resolving the issue of extremely low correct frame synchronization rates for short-frame burst communication under low SNR conditions. Details are as follows:
[0055] After the ground terminal is powered on, the receiving module, control module, and transmitting module undergo initial reset. The receiving module remains in a constant-listen state, waiting to receive downlink data from the satellite, including time slot allocation information for both reception and transmission by the ground terminal. Figure 3 As shown. After the receiving module receives downlink data, it parses the time slot allocation information. After parsing, it sets the status of both the receiving and transmitting modules. Simultaneously, it initializes the local TOD information and maintains its updates according to protocol requirements. The control module performs a CRC check. If the CRC check passes, it indicates that the synchronization time slot information has been correctly received. The local clock is then calibrated based on the TOD information to avoid discrepancies caused by ground and satellite clock differences. If the CRC check fails, it indicates that the synchronization time slot information has not been correctly received, and the local clock updates the TOD information based on its own local oscillator clock. Figure 4 As shown, the state control submodule then transmits the TOD information to the frame synchronization submodule in the receiving module. The frame synchronization submodule in the receiving module uses the received TOD information and the synchronization result of the previous frame as the frame synchronization input conditions for the current frame, and performs a joint decision on the result of the current frame synchronization.
[0056] Under low signal-to-noise ratio conditions, noise can cause frame synchronization results to exceed the preset frame synchronization threshold, resulting in frame synchronization false alarms. TOD information represents time information, and frame synchronization confirms the start of each frame in the time dimension. When correct synchronization is achieved at time T0, i.e., after determining the position of the frame header, the frame header positions of the second, third, ..., Nth frames are T0+T, T0+2T, ..., T0+(N-1)T, respectively. Due to the time difference caused by clock differences between the transmitter and receiver, let the clock difference generated in each period T be τ (τ is positive, indicating that the satellite is ahead of the ground terminal; τ is negative, indicating that the satellite is behind the ground terminal). Then the actual frame header positions of the second, third, ..., Nth frames are T0+T+τ, T0+2(T+τ), ..., T0+(N-1)(T+τ), respectively. Therefore, without time calibration, the time synchronization will deteriorate. The joint decision involves synchronizing the frame synchronization algorithm and time calibration. After the CRC check passes, the current reference time T0 is updated, and frame synchronization is enabled in the next T0+T window. This reduces the false alarm probability of the frame synchronization algorithm under low signal-to-noise ratio conditions.
[0057] The time slot allocation information for ground terminal reception and transmission is as follows: within a time slot period T of communication between a satellite and a ground terminal, there are a total of M time slots, namely time slot 1, time slot 2, ..., time slot M. Among them, time slot 1 is used for satellite broadcast downlink data. In time slots 2 to M, Q time slots are used for Q ground terminals to transmit uplink data, where Q ≤ M-1. Each ground terminal is allocated to different time slots for uplink data transmission.
[0058] Secondly, based on the aforementioned ground terminal communication system, this invention also proposes a frame synchronization method for the FH-TDMA system, such as... Figure 5 As shown, it includes the following steps:
[0059] (1) Frame synchronization module status reset;
[0060] (2) The frame synchronization module receives demodulation information;
[0061] (3) Determine whether the current frame is the first frame received after the frame synchronization module is reset. If it is the first frame, the frame synchronization module will not perform frame synchronization without prior information; otherwise, the frame synchronization module will jointly determine the synchronization result of the current frame based on the TOD information and the synchronization result of the previous frame.
[0062] (4) The control module performs CRC check on the received synchronization time slot information. If the CRC check passes, it means that the synchronization time slot information has been received correctly. The local TOD information is updated in real time according to the on-board TOD information. If the CRC check fails, the CRC check error count is incremented by 1. Then it is determined whether the frame synchronization is lost. If the CRC check error count exceeds the threshold value, it is determined that the frame synchronization is lost. The process returns to step (1), the CRC check error count is reset to 0, and steps (1) to (4) are repeated. If the frame synchronization is not lost, the local TOD information is maintained in real time by relying on its own clock.
[0063] (5) The frame synchronization submodule receives the TOD information and repeats steps (1) to (5).
[0064] The parts of this invention not described in detail are common knowledge to those skilled in the art.
Claims
1. A ground terminal communication system based on FH-TDMA scheme, characterized by include: Transmitting module, control module, and receiving module; The transmission module includes an encoding module, a framing module, a modulation module, a transmit frequency hopping pattern module, a digital up-conversion module, a DAC module, and an RF processing module; The receiver module includes an RF processing module, a DAC module, a digital down-conversion module, a receiver frequency hopping pattern module, a capture module, a demodulation module, a frame synchronization module, a deframe module, and a decoding module. The host computer sends the link frame containing the transmission information to the transmission module. The encoding module in the transmission module encodes the transmission information through the channel. The encoded information bits and check bits are then framed by the framing module to form a physical frame. After that, the modulation module modulates the signal to obtain the symbol waveform. The transmit frequency hopping pattern module receives the transmit frequency hopping pattern parsed by the control module and then controls the digital up-conversion module to perform frequency local oscillator switching. The symbol waveform is digitally up-converted to the corresponding operating frequency. After intermediate frequency conversion by the DAC module, it is processed into an radio frequency signal by the radio frequency processing module and then transmitted. After the ground terminal is powered on, the receiving module is in constant listening mode and demodulates the satellite downlink data. Specifically, the RF processing module and DAC module in the receiving module convert the received RF signal into a digital signal through RF processing and ADC. The receiving frequency hopping pattern module receives the receiving frequency hopping pattern parsed by the control module, and then controls the digital downconversion module to perform frequency local oscillator switching, downconverting the digital signal to the baseband zero frequency. Then, the acquisition module and frame synchronization module achieve synchronization in time and frequency. The physical frame content is obtained by the demodulation module through symbol demodulation. The deframe module deframes and splits the physical frame according to the protocol. Then, the decoding module decodes and verifies the physical frame to obtain the link frame information. The link frame information is sent to the host computer for parsing and simultaneously transmitted to the control module. The control module includes a synchronization time slot parsing submodule and a state control submodule; The synchronization time slot parsing submodule receives the link frame information from the receiving module, parses the synchronization time slot information according to the link layer protocol to obtain TOD information and CRC check information, and then obtains the transmit frequency hopping pattern and the receive frequency hopping pattern; the control module transmits the parsed transmit frequency hopping pattern and the receive frequency hopping pattern to the transmit frequency hopping pattern submodule of the transmitting module and the receive frequency hopping pattern submodule of the receiving module, respectively. Frame synchronization is achieved through the ground terminal communication system, as follows: After the ground terminal system is powered on, the receiving module, control module and transmitting module are initially reset. The receiving module is always in a listening state, waiting to receive downlink data from the satellite. The downlink data from the satellite includes the time slot allocation information for the ground terminal's reception and transmission. After the receiving module receives downlink data, it parses the time slot allocation information. After parsing, it sets the status of the receiving module and the transmitting module, initializes the local TOD information, and maintains the update of the TOD information in accordance with the protocol requirements. The control module performs a CRC check. If the CRC check passes, it means that the synchronization time slot information has been received correctly. Then, the local clock is calibrated according to the TOD information to avoid differences in TOD information due to the difference between the ground and satellite clocks. If the CRC check fails, it means that the synchronization time slot information has not been received correctly, and the local machine will maintain the update of the TOD information based on its own clock local oscillator. The state control submodule then transmits the TOD information to the frame synchronization module in the receiving module. The frame synchronization module uses the received TOD information and the synchronization result of the previous frame as the frame synchronization input conditions for the current frame, and makes a joint decision on the result of the current frame synchronization to achieve frame synchronization. The time slot allocation information received and transmitted by the ground terminal is specifically as follows: Within a time slot period T of a satellite-to-ground terminal communication, there are M time slots, namely time slot 1, time slot 2, ..., time slot M. Time slot 1 is used for satellite broadcast downlink data. In time slots 2 to M, Q time slots are used for Q ground terminals to transmit uplink data, where Q ≤ M-1. Each ground terminal is allocated to a different time slot for uplink data transmission. The frame synchronization module makes a joint decision on the result of this frame synchronization, specifically as follows: The joint decision involves synchronizing the frame synchronization algorithm and time calibration. After the CRC check passes, the current reference time T0 is updated, and frame synchronization is enabled in the next T0+T window. This reduces the false alarm probability of the frame synchronization algorithm under low signal-to-noise ratio conditions.
2. A ground terminal communication system based on FH-TDMA system according to claim 1, characterized in that: The satellite downlink data frame format includes synchronization time slots and service time slots. The synchronization time slot is divided into a synchronization header, frame length, destination address, source address, TOD information, and CRC check. The service time slot is used to transmit valid service information. The satellite downlink data frame is reassembled at the physical layer and divided into N frequency hopping blocks. Each frequency hopping block consists of frequency hopping protection segments at both ends and frequency hopping data.
3. A ground terminal communication system based on FH-TDMA system according to claim 1, characterized in that: Let the transmit hopping pattern be Pattern Tx , the receive hopping pattern be Pattern Rx , both of which are functions of TOD information, indexed according to TOD information, which is obtained as follows: The frequency hopping pattern function f(·) is defined according to the transmitting and receiving parties.
4. A ground terminal communication system based on FH-TDMA system according to claim 1, characterized in that: When performing channel coding, the transmission module uses LDPC, Turbo, or convolutional codes.
5. A ground terminal communication system based on FH-TDMA system according to claim 1, characterized in that: When the transmitter module performs modulation, the modulation method is PSK, FSK or QAM.
6. A method for synchronizing frames in a FH-TDMA system implemented by the ground terminal communication system of claim 1, characterized by include: (1) Frame synchronization module status reset; (2) The frame synchronization module receives demodulation information; (3) Determine whether the current frame is the first frame received after the frame synchronization module is reset. If it is the first frame, the frame synchronization module will not perform frame synchronization without prior information; otherwise, the frame synchronization module will jointly determine the synchronization result of the current frame based on the TOD information and the synchronization result of the previous frame. (4) The control module performs CRC verification on the received synchronization time slot information. If the CRC verification passes, it means that the synchronization time slot information has been received correctly. Then, the local TOD information is updated in real time according to the on-board TOD information. If the CRC check fails, the CRC check error count is incremented by 1, and then it is determined whether the frame synchronization is lost. If the CRC check error count exceeds the threshold, it is determined that the frame synchronization is lost, and the process returns to step (1). The CRC check error count is reset to 0, and steps (1) to (4) are repeated. If the frame synchronization is not lost, the local TOD information is maintained in real time by relying on its own clock. (5) The frame synchronization submodule receives the TOD information and repeats steps (1) to (5).
7. The method of claim 6, wherein: The frame synchronization module makes a joint decision on the result of this frame synchronization. Specifically, the joint decision involves synchronizing the frame synchronization algorithm and time calibration. After the CRC check passes, the current reference time T0 is updated. Frame synchronization is enabled in the next T0+T window, which reduces the probability of false alarms in the frame synchronization algorithm under low signal-to-noise ratio conditions.
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