A method of forming a metal silicide layer and a semiconductor structure

Abstract

The present application relates to the technical field of semiconductor manufacturing, in particular to a preparation method of metal silicide layer and semiconductor structure. The method comprises the following steps: on a silicon substrate, a metal source is introduced by using an atomic layer deposition process, based on a metal nucleation mechanism, process parameters of the atomic layer deposition are dynamically adjusted to control the generation mode of the metal on a micro reaction path, and a metal layer is formed on the silicon substrate; a rapid annealing process is implemented, so that a metal silicide layer generated by the metal layer and the silicon substrate meets the requirements of thin film quality characteristics. The present application atomically and accurately controls the metal deposition process by using the atomic layer deposition process, optimizes the microstructure of the metal layer by combining with the dynamic nucleation control technology, and accurately controls the phase composition and electrical properties by using the rapid thermal annealing process, thereby providing a more optimal solution for the manufacturing of a new generation of semiconductor devices.

Description

Technical Field

[0001] This invention relates to the field of semiconductor manufacturing technology, and more specifically, to a method for preparing a metal silicide layer and a semiconductor structure. Background Technology

[0002] According to Moore's Law, as the integration density of integrated circuits continues to increase and the feature size of semiconductor processes continues to shrink, the equivalent series resistance of the active regions of transistors (gate, source, and drain) gradually increases, thus affecting chip performance. To reduce the series resistance and contact resistance of the active regions, the semiconductor industry has developed metal silicide technology, which improves conductivity by forming metal silicides (such as Ti, Co, and NiPt) on the active regions. These metals can selectively form low-resistance silicides with the directly contacting silicon substrate or polysilicon gate, but will not react with dielectric materials such as SiO2, Si3N4, or SiON. This ensures that the metal silicides are precisely aligned with the active regions and polysilicon gates, reducing contact resistance and improving the overall conductivity of semiconductor devices. This technology is also known as self-aligned silicide (Salicide).

[0003] As process nodes continue to shrink, traditional metal silicides face certain challenges. For example, with Ti-Salicide, at smaller dimensions, the critical temperature (T1) for the transition from a high-resistivity phase to a low-resistivity phase increases, while the critical temperature (T2) for the agglomeration of the high-resistivity phase decreases, leading to a convergence of T1 and T2 and a shrinking process window. Co-Salicide technology has been used in the 0.18μm–65nm process nodes, but its application is limited by the need to consider thermal stability at even smaller dimensions. NiPt-Salicide, due to its lower rapid thermal annealing (RTA) temperature, is widely used in processes below 65nm. However, with further miniaturization of semiconductor processes, new metal silicide materials are being researched and explored to optimize the electrical performance of devices.

[0004] MoSix (metal silicides) exhibit significant application potential due to their low resistivity and the ability to control their phase structure by adjusting the Mo content and annealing temperature. Compared to traditional Ti, Co, and NiPt silicides, MoSix offers advantages in small-size processes, providing lower contact resistance and superior thermal stability. Therefore, MoSix has become an important area of ​​research in semiconductor processes.

[0005] Currently, MoSix deposition mainly employs PVD (physical vapor deposition) technology. However, the PVD method is difficult to control at the atomic level and has limitations in the metal silicide nucleation process, which restricts the uniformity and controllability of MoSix deposition.

[0006] Therefore, a new preparation method is needed to obtain MoSix in a low-resistivity state and improve its deposition accuracy and nucleation controllability, so as to better meet the needs of advanced process nodes. Summary of the Invention

[0007] The purpose of this invention is to provide a method for preparing a metal silicide layer and a semiconductor structure, which solves the problem that existing technologies are unable to efficiently control the deposition of metal silicides as process nodes shrink.

[0008] To achieve the above objectives, the present invention provides a method for preparing a metal silicide layer, comprising the following steps:

[0009] On a silicon substrate, an atomic layer deposition process is used to introduce a metal source. Based on the nucleation mechanism of metals, the process parameters of atomic layer deposition are dynamically adjusted to control the generation mode of metals in the micro-reaction path and form a metal layer on the silicon substrate.

[0010] A rapid annealing process is implemented to ensure that the metal silicide layer formed between the metal layer and the silicon substrate meets the thin film quality characteristics requirements.

[0011] In some embodiments, the metal is generated along the microscopic reaction pathway via homogeneous nucleation and heterogeneous nucleation.

[0012] The homogeneous nucleation method involves metal atoms diffusing along the surface of a silicon substrate to form a horizontally grown metal layer;

[0013] The heterogeneous nucleation method involves forming initial nucleation points on the silicon substrate through defects or impurities, thereby intensifying the metal diffusion reaction in the direction perpendicular to the substrate.

[0014] In some embodiments, the homogeneous nucleation method is generated by a supersaturation process, which includes some or all of the following conditions: the metal source injection rate is within a first flow range, the metal source injection time is controlled at a first time, and the process temperature is controlled within a first temperature range.

[0015] The heterogeneous nucleation method is generated through an unsaturated process, which includes some or all of the following conditions: the metal source flow rate is within a second flow range, the metal source flow time is controlled within a second time, and the process temperature is controlled within a second temperature range.

[0016] In some embodiments, the first flow rate range is higher than the second flow rate range, the first time is higher than the second time, and the first temperature range is higher than the second temperature range.

[0017] In some embodiments, the step of dynamically adjusting the process parameters of atomic layer deposition based on the nucleation mechanism of metals to control the formation mode of metals along the microscopic reaction pathway further includes:

[0018] The process parameters for atomic layer deposition are dynamically adjusted based on the ratio of homogeneous nucleation to / or heterogeneous nucleation.

[0019] In some embodiments, the step of dynamically adjusting the process parameters of atomic layer deposition according to the ratio of homogeneous nucleation and / or heterogeneous nucleation further includes:

[0020] When the heterogeneous nucleation ratio is greater than the first threshold, a supersaturation process is used for the reaction.

[0021] When the homogeneous nucleation ratio is greater than the second threshold, an unsaturated process is used for the reaction.

[0022] In some embodiments, the step of dynamically adjusting the process parameters of atomic layer deposition to control the formation of metal along the microscopic reaction pathway further includes:

[0023] A dynamic switching control strategy of homogeneous nucleation and heterogeneous nucleation is adopted to uniformly form metal layers in the horizontal and vertical directions of the silicon substrate, ensuring the structural integrity and electrical performance consistency of the metal layers.

[0024] In some embodiments, the metal source includes a molybdenum source, a cobalt source, a titanium source, and a nickel source;

[0025] The metal silicides include molybdenum silicides, cobalt silicides, titanium silicides, and nickel silicides.

[0026] In some embodiments, the first temperature range is 650°C to 800°C;

[0027] The second temperature range is 500°C to 650°C.

[0028] In some embodiments, the step of implementing the rapid annealing process further includes:

[0029] A single annealing process is performed to ensure that the resulting metal silicide layer meets the thin film quality characteristics requirements.

[0030] To achieve the above objectives, the present invention provides a semiconductor structure comprising at least a metal silicide layer, wherein the metal silicide layer is prepared by the above-described method for preparing a metal silicide layer.

[0031] This invention provides a method for preparing a metal silicide layer and a semiconductor structure, offering an efficient, low-cost metal silicide formation scheme suitable for advanced nodes. It utilizes atomic-level precise control of the metal (e.g., Mo) deposition process via atomic layer deposition (ALD), optimizes the microstructure of the metal silicide (e.g., MoSix) by combining dynamic nucleation control technology, and employs rapid thermal annealing (RTP) to precisely control the phase composition and electrical properties, thereby improving process integration and providing a superior solution for the manufacturing of next-generation semiconductor devices. Attached Figure Description

[0032] The above and other features, properties and advantages of the present invention will become more apparent from the following description taken in conjunction with the accompanying drawings and embodiments, in which the same reference numerals always denote the same features, wherein:

[0033] Figure 1 The figure shows the steps of a method for preparing a metal silicide layer according to an embodiment of the present invention;

[0034] Figure 2a A schematic diagram illustrating the reaction state of molybdenum metal and a silicon substrate according to an embodiment of the present invention is shown.

[0035] Figure 2b A schematic diagram illustrating the reaction process of metallic molybdenum with a silicon substrate according to an embodiment of the present invention is shown;

[0036] Figure 2c A schematic diagram showing the completion of the reaction between metallic molybdenum and a silicon substrate according to an embodiment of the present invention is disclosed;

[0037] Figure 3a A schematic diagram of a silicon atom array according to an embodiment of the present invention is disclosed;

[0038] Figure 3b A schematic diagram of the initial contact between a Mo precursor and a silicon substrate according to an embodiment of the present invention is disclosed;

[0039] Figure 4a A schematic diagram of a homogeneous nucleation reaction process according to an embodiment of the present invention is disclosed;

[0040] Figure 4b A graph showing the trend of silicide formation in a homogeneous nucleation-continuous reaction according to an embodiment of the present invention is disclosed.

[0041] Figure 5a A schematic diagram of a heterogeneous nucleation reaction process according to an embodiment of the present invention is disclosed;

[0042] Figure 5b A trend diagram of heterogeneous nucleation sustained reaction is shown according to an embodiment of the present invention;

[0043] Figure 6The timing diagrams of the oversaturated and unsaturated processes according to an embodiment of the present invention are disclosed.

[0044] The meanings of the labels in the figures are as follows:

[0045] 10. Silicon substrate;

[0046] 20 molybdenum layer;

[0047] 30 molybdenum silicon reactive layer;

[0048] 40 molybdenum silicide layer. Detailed Implementation

[0049] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are for illustrative purposes only and are not intended to limit the invention.

[0050] Figure 1 The following diagram illustrates the steps of a method for preparing a metal silicide layer according to an embodiment of the present invention: Figure 1 As shown, the method for preparing a metal silicide layer proposed in this invention includes the following steps:

[0051] Step S1: On a silicon substrate, a metal source is introduced using atomic layer deposition. Based on the nucleation mechanism of metal, the process parameters of atomic layer deposition are dynamically adjusted to control the generation mode of metal in the micro-reaction path and form a metal layer on the silicon substrate.

[0052] Step S2: Implement a rapid annealing process to ensure that the metal silicide layer formed between the metal layer and the silicon substrate meets the thin film quality characteristics requirements.

[0053] The method for preparing metal silicide layers proposed in this invention innovatively combines atomic layer deposition (ALD), a process strategy of dynamically controlling the nucleation path, and a rapid annealing (RTP) process to achieve precise control over the microstructure of metal silicides, providing a cost-effective metal silicide solution for advanced processes.

[0054] Furthermore, the metal source includes a molybdenum source, a cobalt source, a titanium source, and a nickel source;

[0055] The metal silicides include molybdenum silicides, cobalt silicides, titanium silicides, and nickel silicides.

[0056] Although the method for preparing metal silicides provided by this invention uses molybdenum (Mo) as a preferred embodiment, its technical solution is not limited to a specific metal system. Those skilled in the art will understand that, without departing from the core process principle of this invention, this method is also applicable to the preparation of silicides of other transition metals (such as cobalt, nickel, titanium, etc.) by simply adjusting the process parameters.

[0057] In practical implementation, appropriate metal precursors and corresponding process windows can be selected according to actual process requirements and device characteristics. These simple substitutions or adjustments should all be considered within the scope of protection of this invention. The process described in this invention has broad applicability and scalability, and can meet the diverse needs of different technology nodes and device structures for metal silicides.

[0058] Figures 2a to 2c Revealed Figure 1 Please refer to the schematic diagrams shown in the embodiments regarding the pre-reaction state, reaction process, and post-reaction completion of molybdenum metal and silicon substrate. Figure 2a The molybdenum layer 20 and the silicon substrate 10 are in a state of unreacted reaction. The metallic molybdenum layer 20 is deposited on the surface of the silicon substrate 10 through atomic layer deposition (ALD) process. At this time, the molybdenum atoms and silicon atoms have not yet reacted and are in an initial contact state, providing a uniform metal layer basis for the subsequent silaneization reaction.

[0059] Please refer to Figure 2b Molybdenum atoms begin to make point contact with silicon atoms on the silicon substrate surface, forming a molybdenum-silicon reaction layer 30. To obtain a low-resistivity crystalline phase, the process parameters of atomic layer deposition (ALD) need to be dynamically adjusted. By dynamically controlling ALD process parameters (such as temperature and gas flow rate), the microscopic reaction path is controlled to preferentially generate the low-resistivity phase and suppress the formation of the high-resistivity phase.

[0060] Please refer to Figure 2c Through a rapid annealing process, the molybdenum-silicon reactive layer 30 is converted into the final molybdenum silicide layer 40, which meets the device's requirements for thin film quality characteristics such as interface quality and electrical performance.

[0061] The following describes in detail each step of the preparation method of the metal silicide layer provided in this embodiment, taking molybdenum (Mo) as the metal source and molybdenum silicide (MoSix) as the metal silicide.

[0062] Step S1: On a silicon substrate, a metal source is introduced using atomic layer deposition. Based on the nucleation mechanism of metal, the process parameters of atomic layer deposition are dynamically adjusted to control the generation mode of metal in the micro-reaction path and form a metal layer on the silicon substrate.

[0063] When depositing Mo on a silicon substrate, due to the Si-rich environment, the formation trend of silicides typically follows the evolution from Mo2Si to MoSi to MoSi2 from a thermodynamic perspective. However, since MoSi2 has a high resistivity, this embodiment employs a kinetic diffusion control strategy to suppress the formation of high-resistivity MoSi2 and preferentially form low-resistivity Mo2Si and MoSi.

[0064] To achieve the optimal kinetic path, in this embodiment, the reaction process is kept in the slowest kinetic stage during ALD, with metal atoms and silicon atoms in point-contact state. By precisely controlling the deposition of molybdenum through the ALD process, Mo atoms and Si atoms are made into point-to-point contact, which helps to form a uniform and dense molybdenum silicide layer, reduce interface defects, and suppress the impact of parasitic capacitance and parasitic resistance on device performance.

[0065] The phase structure of silicides depends on a variety of factors, including metal deposition rate, deposition temperature, metal layer thickness, metal-silicon ratio, annealing temperature, and heating rate. These parameters greatly influence the kinetics and thermodynamics of microscopic chemical reactions.

[0066] Since the silicon substrate 100 is rich in Si atoms, Mo atoms preferentially react with Si atoms during the deposition process to form a stable metal silicide layer. When the metal atoms and silicon atoms are in point contact, the reaction is mainly controlled by diffusion and desorption of adsorbed atoms.

[0067] Compared to traditional physical vapor deposition (PVD), this step, using ALD, enables more precise atomic-level thickness control and offers better filling capabilities, making it more advantageous in nanoscale fabrication structures. After the atomic-level point contact reaction is complete, the surface metal is consumed by the Si substrate to form metal silicides, triggering a nucleation process that generates new metal silicide nuclei.

[0068] At this point, the reaction may proceed along two pathways. By dynamically adjusting the nucleation method, the growth direction and efficiency of metal silicides can be optimized. Based on the nucleation mechanism of metals, the atomic layer deposition (ALD) process parameters can be dynamically adjusted to precisely control the formation of metals along the microscopic reaction pathways.

[0069] In this embodiment, the metal silicide is formed in two ways along the microscopic reaction pathway: homogeneous nucleation and heterogeneous nucleation.

[0070] The homogeneous nucleation method involves Mo atoms diffusing along the surface of a silicon substrate to form a horizontally grown Mo layer.

[0071] The heterogeneous nucleation method involves Mo atoms forming initial nucleation sites on the silicon substrate through defects or impurities, thereby intensifying the diffusion reaction of Mo atoms in the vertical direction of the substrate.

[0072] When the proportion of homogeneous nucleation is high, the introduction of metal source gas is reduced to keep the reaction in a low super-saturation state, thereby inhibiting excessively rapid nucleation and promoting the uniform growth of the silicide layer.

[0073] When the proportion of heterogeneous nucleation is high, increasing the introduction of metal source gas will put the reaction in a high super-saturation state, thereby accelerating the nucleation rate and optimizing the morphology and thickness uniformity of the silicide.

[0074] To more clearly elucidate the formation mechanism of molybdenum silicides, the following combines... Figures 3a to 5b The microscopic reaction pathway is described in detail. It should be particularly noted that this microscopic reaction pathway is mainly embodied in… Figure 2b The molybdenum-silicon reactive layer 30 shown.

[0075] Figure 3a A schematic diagram of a silicon atom array according to an embodiment of the present invention is disclosed, such as... Figure 3a As shown, silicon atoms (small black dots) are arranged in a regular network structure to form a Si substrate. This Si substrate structure provides a uniform and stable interface, which is conducive to the adsorption of Mo metal atoms and the occurrence of silicide reaction, thereby forming a high-quality molybdenum silicide layer.

[0076] Figures 3b to 5b These images depict the homogeneous and heterogeneous nucleation processes, respectively. The blue spheres represent Mo precursors, indicating metallic Mo atoms deposited on the Si surface; the dark gray spheres represent metallic Mo atoms participating in the formation of metal silicides, indicating that some Mo atoms enter the Si atom array and react with Si; the light gray spheres represent silicon atoms participating in the formation of metal silicides, with some Si atoms reacting with Mo to form MoSi compounds; and the white spheres represent silicon atoms that did not participate in the reaction, maintaining the original structure of the Si substrate.

[0077] Figure 3b A schematic diagram of the initial contact between the Mo precursor and the silicon substrate according to an embodiment of the present invention is shown, as follows: Figure 3b As shown, the Mo precursor (blue spheres) is deposited onto the Si substrate using an ALD process.

[0078] The Mo precursor enters the reaction chamber, comes into contact with the Si substrate, and begins to diffuse and chemically react to form Mo-Si metallic bonds. The formation mechanism of Mo-Si silicides is influenced by the microscopic reaction pathway.

[0079] In this embodiment, the homogeneous nucleation method is generated through a supersaturation process, which allows Mo atoms to diffuse along the surface of the Si substrate and react.

[0080] The supersaturated process includes some or all of the following conditions: the metal source flow rate is within a first flow range, the metal source flow time is controlled within a first time, and the process temperature is controlled within a first temperature range.

[0081] In this embodiment, the first temperature range is 650°C to 800°C.

[0082] Generally, the conditions under a supersaturation process include:

[0083] Higher metal source infeed rate and infeed time (Mo precursor oversaturation infeed, infeed rate is determined by cavity size and design);

[0084] Higher process temperatures are used to overcome the energy barrier for molybdenum diffusion in the silicon layer, promoting the diffusion of Mo in the Si layer. High-temperature assisted diffusion reaction ensures the stable formation of Mo-Si bonds.

[0085] The supersaturation process increases the amount of metal source gas introduced to improve the coverage of Mo on the Si surface and reduce the impact of local defects; extending the introduction time of the metal source gas ensures more uniform diffusion of Mo on the substrate surface and reduces the possibility of local over-reaction.

[0086] Figure 4a A schematic diagram of a homogeneous nucleation reaction process according to an embodiment of the present invention is shown, such as... Figure 4a The homogeneous nucleation process shown involves Mo atoms diffusing into the Si layer and reacting with Si atoms to form Mo-Si bonds. The generated Mo-Si bonds then diffuse around the surface of the Mo layer. After the reaction is complete, the Mo layer extends further downwards (step diffuse).

[0087] Figure 4b A graph illustrating the silicide formation trend of a homogeneous nucleation-continuous reaction according to an embodiment of the present invention is shown, such as... Figure 4b The homogeneous nucleation process shown depicts a continuous Mo layer growing on the Si substrate as deposition progresses. This process relies on a sufficient supply of surface Mo precursors and the overcoming of the high-temperature energy barrier to drive the reaction to equilibrium and move it downwards.

[0088] If growth continues along this path, the formation of the metal layer will depend on crossing the energy barrier, requiring higher temperatures and sufficient metal precursors to drive the reaction downwards. Therefore, it is necessary to switch to heterogeneous nucleation at the appropriate time.

[0089] In this embodiment, during the homogeneous nucleation process, when it is detected that the reaction temperature required to overcome the energy barrier for the metal atom diffusion reaction is higher than a preset first temperature and / or the required precursor injection amount is higher than a first injection amount, the process switches to heterogeneous nucleation.

[0090] The reaction temperature and precursor quantity required for the metal atom diffusion reaction to cross the energy barrier are fixed. The preset first temperature and precursor flow rate are suitable process temperatures and flows for forming Mo-Si in the reaction chamber, and are determined based on process experience.

[0091] In this embodiment, when the homogeneous nucleation ratio exceeds the second threshold, an unsaturated process is required to suppress excessive homogeneous nucleation and promote heterogeneous nucleation.

[0092] The second threshold can be set empirically or by calculation, or it can be obtained through experimental fitting.

[0093] The heterogeneous nucleation method is generated through an unsaturated process, which includes some or all of the following conditions: the metal source flow rate is within a second flow range, the metal source flow time is controlled within a second time, and the process temperature is controlled within a second temperature range.

[0094] Among them, the first flow rate range is higher than the second flow rate range, the first time is higher than the second time, and the first temperature range is higher than the second temperature range.

[0095] In this embodiment, the second temperature range is 500°C to 650°C.

[0096] Generally, the conditions for unsaturated processes include:

[0097] Lower metal source infeed rate and infeed time (Mo precursor unsaturated infeed, infeed rate is determined by cavity size and design);

[0098] Lower process temperatures (500–650°C) are used to make the reaction kinetically favorable, and temperature regulation is used to precisely control the formation of nucleation sites and the growth of silicides.

[0099] The unsaturated process reduces the surface coverage density of Mo by decreasing the amount of metal source gas introduced, making some Mo more likely to nucleate at defect sites or impurity sites; it also reduces the overall amount of Mo deposition by shortening the metal source gas introduction time, making the reaction more localized; and the lower process temperature encourages Mo to react preferentially at defect sites.

[0100] Figure 5a A schematic diagram of a heterogeneous nucleation reaction process according to an embodiment of the present invention is disclosed, such as... Figure 5a The heterogeneous nucleation process shown in the diagram involves the preferential deposition of Mo atoms at defect or impurity sites on the Si substrate, forming initial nucleation sites. The Mo-Si reaction at these sites intensifies, causing Mo atoms to diffuse inwards and expanding the formation interface.

[0101] Figure 5b A trend diagram of a heterogeneous nucleation sustained reaction according to an embodiment of the present invention is disclosed, such as... Figure 5b The heterogeneous nucleation process shown depicts the continuous reaction of Mo atoms diffusing outwards as the number of nucleation sites increases. If growth continues along this path, the metal layer will diffuse inwards depending on the nucleation sites.

[0102] In this embodiment, when the heterogeneous nucleation ratio exceeds the first threshold, a supersaturation reaction is required to promote homogeneous nucleation and thus suppress excessive heterogeneous nucleation.

[0103] The first threshold can be set empirically or by calculation, or it can be obtained through experimental fitting.

[0104] Since the growth mechanisms of homogeneous nucleation and heterogeneous nucleation require different process conditions, the process parameters need to be dynamically and alternately adjusted during the ALD process.

[0105] For example, an alternating pattern of 5 cycles of oversaturation process + 2 cycles of unsaturation process can be used to ensure that the growth of the metal layer is both uniform and adaptable to the local characteristics of the silicon substrate.

[0106] Figure 6 Timing diagrams of an oversaturated process and an unsaturated process according to an embodiment of the present invention are disclosed, such as... Figure 6 As shown, the horizontal axis represents time, and the vertical axis lists different gas categories, including carrier gas, precursor, and reducing agent. The yellow area indicates that the gas is in circulation during the corresponding time period.

[0107] The carrier gas includes, but is not limited to, inert gases such as N2, Ar, and Ne; the precursors include, but are not limited to, MoO2Cl2 and MoCl5; and the reducing agents include, but are not limited to, H2, N2H2, NH3, H*, and SiH4.

[0108] The main differences between the supersaturated and unsaturated processes lie in the control of process temperature, the amount of Mo precursor introduced, and the number of cycles.

[0109] In the unsaturated process, the process temperature is controlled between 500 and 650°C, and the introduction of Mo precursor is in an unsaturated state. The entire deposition process can last for 1 to 20 cycles. Specifically, each cycle includes Mo precursor deposition, purging, reduction, and re-purging steps. This method is suitable for heterogeneous nucleation at lower temperatures.

[0110] In contrast, the supersaturation process involves a higher temperature, controlled between 650 and 800°C, and the Mo precursor dosage is supersaturated, also for 1 to 20 cycles. Its process steps are similar to the unsaturated process, including Mo precursor deposition, purging, reduction, and re-purging. Due to the higher temperature, the supersaturation process can be used for homogeneous nucleation.

[0111] The final optimization criterion for judging whether a process is oversaturated or unsaturated is:

[0112] A dynamic switching control strategy using homogeneous and heterogeneous nucleation methods is employed to uniformly form metal layers in the horizontal and vertical directions of the silicon substrate, ensuring structural integrity and consistent electrical performance.

[0113] The final optimization criteria for oversaturated and unsaturated processes are mainly reflected in the three-dimensional uniformity and comprehensive performance indicators of the metal layer.

[0114] Specifically, the optimized metal layer must exhibit a consistent thickness distribution and microstructure in both the horizontal direction (lateral uniformity) and the vertical direction (longitudinal uniformity). TEM characterization should show no unevenness such as local over-thickness, under-thinness, or island-like growth.

[0115] In this embodiment, a transmission electron microscope (TEM) is used to observe and monitor the cross-section of the metal layer. Based on the observed homogeneous nucleation / heterogeneous nucleation ratio, the ALD process parameters are dynamically adjusted to ensure the uniformity and high performance of the final deposited layer.

[0116] TEM, as a high-resolution imaging technique, can directly observe nanoscale structural features.

[0117] In this embodiment, homogeneous nucleation appears in TEM images as a horizontally continuous and uniformly distributed metal layer with a relatively stable thickness and no obvious defects or interface inhomogeneities within the layer. If excessive small-scale island growth is observed, it indicates an insufficient proportion of homogeneous nucleation, requiring adjustment to a supersaturated process to increase surface diffusion. For example, increasing the metal source gas flow rate and improving the surface Mo coverage can promote uniform deposition.

[0118] In this embodiment, heterogeneous nucleation appears in TEM images as potentially localized clusters of metal silicides or as non-uniformly distributed structures at defect / impurity points. If excessive growth in local areas leads to uneven overall layer thickness, it indicates that the proportion of heterogeneous nucleation is too high, requiring adjustment to an unsaturated process to reduce its proportion. For example, reducing the amount of metal precursor introduced can decrease local supersaturation and make the growth more uniform.

[0119] If TEM monitoring reveals significant non-uniformity in the vertical and horizontal directions of the deposited layer, optimization can be achieved through an alternating strategy of supersaturated and unsaturated processes. For example, an alternating pattern of 5 cycles of supersaturated process + 2 cycles of unsaturated process can increase the homogeneous nucleation ratio while avoiding localized over-deposition. If the uniformity requirement is still not met, the cycle ratio can be further optimized, such as 3 cycles of supersaturated process + 3 cycles of unsaturated process, to achieve a more uniform metal layer growth.

[0120] During ALD process optimization, it is necessary to periodically analyze the cross-section of the silicon substrate using TEM, and combine this data with information on composition distribution, thickness uniformity, and interface quality to adjust process parameters for precise control. By progressively optimizing the TEM analysis results, the optimal process window is ultimately determined to ensure uniform growth of the metal layer in both horizontal and vertical directions, while maintaining low resistivity, high interface quality, and excellent process repeatability.

[0121] Step S2: Implement a rapid annealing process to ensure that the metal silicide layer formed between the metal layer and the silicon substrate meets the thin film quality characteristics requirements.

[0122] Phase structure of the metal silicide layer formed between the metal layer and the silicon substrate is controlled by rapid thermal processing (RTP) to meet the requirements of thin film quality characteristics.

[0123] The thin film quality characteristics are reflected in its electrical performance, requiring the silicide layer to have sufficiently low resistivity to ensure efficient carrier transport in the device while achieving low contact resistance. In terms of microstructure, the silicide layer needs to form a stable phase structure, preferentially forming the low-resistivity MoSi or Mo2Si phase, while suppressing the formation of the high-resistivity MoSi2 phase. Interface quality is another important indicator, requiring a dense and complete interface between the silicide layer and the silicon substrate, avoiding defects such as voids and cracks to reduce interface state density and carrier scattering. Furthermore, thin film uniformity is also crucial, requiring consistent thickness in both the lateral and longitudinal directions to avoid localized excessive thickness or thinness, as well as abnormal grain aggregation.

[0124] Therefore, step S2 is mainly used to reduce the resistivity of the metal silicide layer and optimize its electrical properties; promote the stabilization of the silicide phase and suppress the formation of non-uniform or undesirable phases; improve interface quality, reduce interface defects, improve device reliability, and ensure that the final silicide layer is uniform and meets performance requirements.

[0125] like Figure 2c As shown, under the action of RTP annealing, the metal silicide layer undergoes a phase transformation, eventually forming a molybdenum silicide layer 40.

[0126] The molybdenum silicide layer 40 represents the final stable structure after rapid annealing (RTP). High-temperature annealing induces a complete phase transformation of the silicide, forming a uniform thin film dominated by a low-resistivity phase (such as MoSi or Mo2Si) while suppressing the high-resistivity phase (MoSi2). Grain growth further increases, interface defects decrease, and resistivity significantly reduces, while also exhibiting excellent thermal stability and ohmic contact characteristics. This morphology directly determines the electrical performance of the device and is the ultimate goal of process optimization.

[0127] Key parameters of the RTP process include temperature, time, and heating rate, which need to be adjusted based on the composition of the metal silicide and the desired phase structure.

[0128] In this embodiment, the step of implementing the rapid annealing process further includes:

[0129] A single annealing process is performed to ensure that the resulting metal silicide layer meets the thin film quality characteristics requirements.

[0130] Because this invention precisely controls the nucleation structure of the molybdenum layer through atomic layer deposition (ALD) in step S1, the material is closer to the target phase. Therefore, the rapid annealing (RTP) process in step S2 can complete all key steps such as crystallization, phase transformation, and resistivity optimization in a single annealing process, eliminating the need for the step-by-step processing of first annealing to form silicide and second annealing to optimize performance, as is required in traditional processes.

[0131] Compared to the traditional W+MoSi process, the metal silicide layer preparation method proposed in this invention further simplifies the manufacturing process, directly utilizing Mo to form silicides without the need to introduce an additional MoSi functional layer, thereby reducing process steps, improving material compatibility, and lowering production costs.

[0132] In summary, the metal silicide layer preparation method proposed in this invention, by combining the ALD process with the RTP process, significantly simplifies the steps compared to traditional methods, avoids the introduction of additional metals (such as Co and Ni), and allows the Mo layer deposited by ALD to directly form metal silicides under RTP annealing without the need for additional secondary annealing, thus improving process efficiency and ensuring uniform growth of the silicides in both the horizontal and vertical directions. Furthermore, RTP annealing can further reduce the resistivity of the metal silicides, achieving the low-resistivity contact layer required for high-performance devices.

[0133] Based on the above-described method for preparing a metal silicide layer, this invention also proposes a semiconductor structure comprising at least a metal silicide layer, wherein the metal silicide layer is obtained by the same method.

[0134] Since the preparation method has already described the metal silicide layer of the semiconductor structure in detail, it will not be described again here.

[0135] Based on the metal silicide layer fabrication method described in this invention, those skilled in the art will understand that the semiconductor structure obtained through this innovative process has significant technical advantages. Those skilled in the art should recognize that various equivalent modifications or simple substitutions made to the semiconductor structure without departing from the core concept of this invention, such as adjusting device layout or integrating other functional layers, are all within the scope of protection of this invention. This innovative semiconductor structure provides a high-performance metal silicide integration solution for advanced process nodes, simplifying the process flow while improving device performance.

[0136] The method for preparing the metal silicide layer and the semiconductor structure proposed in this invention specifically have the following characteristics:

[0137] Beneficial effects:

[0138] 1) Precise control of silicide phase structure: By depositing Mo through ALD process and combining it with RTP annealing process, the nucleation and growth process of MoSix can be effectively controlled to avoid the formation of high-resistivity MoSi2. Compared with traditional PVD method, low-resistivity Mo2Si and MoSi can be obtained more stably, thus improving the conductivity of the device.

[0139] 2) Improved deposition uniformity and filling capacity: The ALD process has excellent shape retention and can uniformly fill the Mo layer in high aspect ratio structures, ensuring that silicides can grow precisely in complex structures and meet the requirements of advanced processes.

[0140] 3) Simplify the process and reduce costs: ALD deposition of Mo can directly form a high-k layer, and the same Mo layer can be used for subsequent metal silicide conversion without the need to introduce additional metals such as Co and Ni, thereby reducing process steps, material costs and manufacturing complexity.

[0141] 4) Improved process adaptability and controllability: This method achieves precise control at the atomic level by adjusting key process parameters such as Mo content, gas flow rate, and temperature, making the formation of MoSix more predictable. It also has good thermal stability and low contact resistance, making it suitable for more advanced semiconductor process nodes.

[0142] Although the methods described above are illustrated and depicted as a series of actions for the sake of simplicity, it should be understood and appreciated that these methods are not limited by the order of the actions, as some actions may occur in a different order and / or concurrently with other actions from the illustrations and descriptions herein or not illustrated and described herein but which may be understood by those skilled in the art, according to one or more embodiments.

[0143] As indicated in this application and claims, unless the context clearly indicates otherwise, the words "a," "an," "an," and / or "the" are not specifically singular and may include plural forms. Generally speaking, the terms "comprising" and "including" only indicate the inclusion of explicitly identified steps and elements, which do not constitute an exclusive list, and the method or apparatus may also include other steps or elements.

[0144] In this invention, unless otherwise explicitly specified and limited, "above" or "below" the second feature can include direct contact between the first and second features, or contact between the first and second features through another feature between them. Furthermore, "above," "over," and "on top" of the second feature includes the first feature directly above or diagonally above the second feature, or simply indicates that the first feature is at a higher horizontal level than the second feature. "Below," "below," and "under" the second feature includes the first feature directly below or diagonally below the second feature, or simply indicates that the first feature is at a lower horizontal level than the second feature.

[0145] The above embodiments are provided for those skilled in the art to implement or use the present invention. Those skilled in the art can make various modifications or changes to the above embodiments without departing from the inventive concept of the present invention. Therefore, the protection scope of the present invention is not limited to the above embodiments, but should be the maximum scope that conforms to the innovative features mentioned in the claims.

Claims

1. A method for preparing a metal silicide layer, characterized in that, Includes the following steps: On a silicon substrate, an atomic layer deposition process is used to introduce a metal source. Based on the nucleation mechanism of metals, the process parameters of atomic layer deposition are dynamically adjusted to control the generation mode of metals in the micro-reaction path and form a metal layer on the silicon substrate. A rapid annealing process is implemented to ensure that the metal silicide layer formed between the metal layer and the silicon substrate meets the thin film quality characteristics requirements; The metal is generated in two ways along the microscopic reaction pathway: homogeneous nucleation and heterogeneous nucleation. The homogeneous nucleation method involves the diffusion of metal atoms along the surface of a silicon substrate to form a horizontally grown metal layer; the homogeneous nucleation method is generated through a supersaturation process. The heterogeneous nucleation method involves forming initial nucleation points on a silicon substrate through defects or impurities, thereby intensifying the metal diffusion reaction in the direction perpendicular to the substrate; the heterogeneous nucleation method is generated through an unsaturated process.

2. The method for preparing a metal silicide layer according to claim 1, characterized in that, The supersaturation process includes some or all of the following conditions: the metal source flow rate is within a first flow range, the metal source flow time is controlled at a first time, and the process temperature is controlled within a first temperature range. The unsaturated process includes some or all of the following conditions: the metal source flow rate is within a second flow range, the metal source flow time is controlled within a second time range, and the process temperature is controlled within a second temperature range.

3. The method for preparing a metal silicide layer according to claim 2, characterized in that, The first flow rate range is higher than the second flow rate range, the first time is higher than the second time, and the first temperature range is higher than the second temperature range.

4. The method for preparing a metal silicide layer according to claim 1, characterized in that, The step of dynamically adjusting the process parameters of atomic layer deposition based on the nucleation mechanism of metals to control the generation mode of metals in the microscopic reaction pathway further includes: The process parameters for atomic layer deposition are dynamically adjusted based on the ratio of homogeneous nucleation to / or heterogeneous nucleation.

5. The method for preparing a metal silicide layer according to claim 4, characterized in that, The step of dynamically adjusting the process parameters of atomic layer deposition based on the ratio of homogeneous nucleation and / or heterogeneous nucleation further includes: When the heterogeneous nucleation ratio is greater than the first threshold, a supersaturation process is used for the reaction. When the homogeneous nucleation ratio is greater than the second threshold, an unsaturated process is used for the reaction.

6. The method for preparing a metal silicide layer according to claim 1, characterized in that, The step of dynamically adjusting the process parameters of atomic layer deposition to control the formation of metal along the microscopic reaction pathway further includes: A dynamic switching control strategy of homogeneous nucleation and heterogeneous nucleation is adopted to uniformly form metal layers in the horizontal and vertical directions of the silicon substrate, ensuring the structural integrity and electrical performance consistency of the metal layers.

7. The method for preparing a metal silicide layer according to claim 1, characterized in that, The metal source includes a molybdenum source, a cobalt source, a titanium source, and a nickel source; The metal silicides include molybdenum silicides, cobalt silicides, titanium silicides, and nickel silicides.

8. The method for preparing a metal silicide layer according to claim 3, characterized in that, The first temperature range is 650°C to 800°C; The second temperature range is 500°C to 650°C.

9. The method for preparing a metal silicide layer according to claim 1, characterized in that, The step of implementing the rapid annealing process further includes: A single annealing process is performed to ensure that the resulting metal silicide layer meets the thin film quality characteristics requirements.

10. A semiconductor structure, characterized in that, It includes at least a metal silicide layer, which is prepared by the method for preparing a metal silicide layer according to any one of claims 1 to 9.

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