Consumable chip, consumable container, and printing apparatus

Abstract

The application provides a consumable chip, a consumable container and a printing device. The consumable chip comprises a substrate and an electronic module arranged on the substrate. A plurality of connection terminals are arranged on the surface of the substrate. The electronic module has a plurality of pins. Each connection terminal is connected to a corresponding pin. The plurality of connection terminals do not include a ground terminal, or the ground terminal in the connection terminals is shielded by an electrically insulating part. The plurality of connection terminals include a power terminal. The plurality of pins include a power pin. The power terminal is connected to the power pin. The power terminal is directly or indirectly connected to a first end of a power supply device. The plurality of pins further include a ground pin. The ground pin is directly or indirectly connected to a second end of the power supply device. The consumable container provided by the application has the consumable chip described above and the printing device. The application can reduce the area of the circuit board of the consumable chip, and can avoid affecting the communication between the ink cartridge chip and the inkjet printing device due to the foreign matter falling on the connection terminal.

Description

Technical Field

[0001] This invention relates to the technical field of inkjet printing, specifically to a consumable chip, a consumable container having such a consumable chip, and a printing device having such a consumable container installed. Background Technology

[0002] Printing equipment, as a common office tool, provides great convenience for modern offices. Common printing equipment is divided into inkjet printers and laser printers. Inkjet printers use ink cartridges containing ink as consumable containers to spray ink onto paper to form the text or pattern to be printed on the paper; laser printers use toner cartridges containing toner as consumable containers to form the text or pattern to be printed on the medium.

[0003] See Figure 1 A color inkjet printing device has a housing 11. Figure 1 The inkjet printer shown omits the tray of the housing 11. The housing 11 houses the inkjet printer's mechanism 12 and includes a slide bar. The printing carriage 14 is mounted on a motor (…). Figure 1 Driven by the invisible component, it reciprocates along the slide bar. The printing carriage 14 contains the main control circuit board (…). Figure 1 (Not visible in the middle), the main control circuit board communicates with the mechanism 12 via ribbon cable 13.

[0004] Multiple ink cartridges 15 are detachably mounted on the printing carriage 14, each containing ink of a different color. The structure of the ink cartridge 15 is as follows: Figure 2 As shown. The ink cartridge 15 has a housing 16, which forms a cavity for containing ink. The lower end of the cavity is provided with an ink outlet 17. The ink in the cavity flows out through the ink outlet 17 and supplies ink to the ink supply needle of the printing carriage 14.

[0005] A chip 18 is mounted on the outer wall of the cartridge body 16 of the ink cartridge 15. The chip 18 has a substrate, and one side of the substrate has multiple connection terminals 19 for electrical connection with the contact pins on the print carriage 14. The other side of the substrate has a memory ( Figure 2 (Not visible in the image) Typically, this memory is a non-volatile memory, such as EEPROM or FLASH, which stores information related to the ink cartridge, including variable information and invariant information. Variable information is information that changes continuously with the printing operation, such as ink level, printing time, and number of sheets printed. Invariant information is information that does not change with the printing operation, such as ink cartridge model, applicable inkjet printer model, and ink color.

[0006] After ink cartridge 15 is installed into the print carriage 14 of the inkjet printer, the inkjet printer powers on the chip 18 and reads the data stored in the memory of the chip 18 to determine whether the ink cartridge 15 is the right model and whether there is enough ink remaining in the ink cartridge 15. Only after determining that the ink cartridge 15 is the right model and that there is enough ink in the ink cartridge 15 can the inkjet printer perform the printing operation.

[0007] See Figure 3 In a certain type of ink cartridge chip 18, five connection terminals 21, 22, 23, 24, and 25 are provided on one surface of the substrate 20. The five connection terminals include a power terminal, a ground terminal, a clock terminal, a data terminal, and a chip select terminal, respectively. Typically, the ground terminal 25 is relatively far from the other connection terminals.

[0008] When the inkjet printer communicates with the ink cartridge chip, the five connection terminals of the ink cartridge chip are connected to the contact pins of the inkjet printer. For example, the ground terminal needs to be connected to the ground contact pin of the inkjet printer to provide a reference ground for the ink cartridge chip, thus forming a current loop. However, if there are insulating foreign objects on the ground terminal 25, such as residual double-sided tape or dried ink, these foreign objects will cause the electrical connection between the ground terminal 25 and the ground contact pin of the inkjet printer to be broken. As a result, the ink cartridge chip cannot recognize the signal output by the inkjet printer and therefore cannot respond to the signal sent by the inkjet printer. Consequently, the inkjet printer will consider that the ink cartridge is not installed correctly and will not be able to perform a printing operation.

[0009] In addition, from Figure 3 As can be seen, among the five connection terminals, the distance between the power terminal, clock terminal, data terminal, and chip select terminal is relatively small, and they are located on the left side of the central axis of the substrate 20. Only the ground terminal 25 is located on the right side of the central axis of the substrate 20, resulting in a larger area of ​​the ink cartridge chip 18. If the ground terminal is not provided on the substrate 20, on the one hand, the area of ​​the substrate can be reduced, and the production cost of the ink cartridge chip 18 can be reduced. On the other hand, it can also avoid the problem of foreign objects adhering to the ground contact 25 affecting the communication between the inkjet printer and the ink cartridge chip. Summary of the Invention

[0010] To address the aforementioned problems, the first objective of this invention is to provide a consumable chip that prevents short circuits from occurring at multiple connection terminals due to solder dripping.

[0011] A second objective of the present invention is to provide a consumable container in which the above-mentioned consumable chip is installed.

[0012] A third objective of the present invention is to provide a printing device that uses the aforementioned consumable container.

[0013] To achieve the first objective of this invention, the consumable chip provided by this invention includes a substrate, on the surface of which are disposed a plurality of connection terminals and an electronic module. The electronic module has a processor with a plurality of pins, and each connection terminal is connected to a corresponding pin. The plurality of connection terminals do not include a ground terminal, or the ground terminal among the connection terminals is shielded by an electrically insulating component. The plurality of connection terminals include power terminals, and the plurality of pins include power pins, with the power terminals connected to the power pins. The power terminals are directly or indirectly connected to a first end of a power supply device, and the plurality of pins also include ground pins, which are directly or indirectly connected to a second end of the power supply device.

[0014] As can be seen from the above scheme, a power supply device is set on the ink cartridge chip. One end of the power supply device is connected to the power terminal, and the other end can be connected to the ground pin. The power supply device creates a voltage difference between the power terminal and the ground pin, for example, a voltage difference of 3.3V, thereby meeting the operating voltage requirements of the electronic module. Since a ground terminal is not required on the substrate, the substrate area can be reduced, and it can also prevent foreign objects from falling onto the ground terminal and affecting the communication between the consumable chip and the printing device.

[0015] In a preferred embodiment, the power supply device is a first capacitor, the first end of which is directly connected to the power supply terminal, and the second end of which is directly connected to the ground pin; the multiple connection terminals also include at least one communication terminal, and the multiple pins also include communication pins, with each communication terminal connected to a corresponding communication pin; a unidirectional conduction device or a controlled conduction device is connected between the second end of the first capacitor and at least one communication terminal.

[0016] When the printing device first starts working, the communication terminal is usually in a weak pull-down state. Since the second terminal of the first capacitor can be connected to the communication terminal through a unidirectional conduction device or a controlled conduction device, the current output from the power terminal can flow into the communication terminal after passing through the first capacitor and the unidirectional conduction device or the controlled conduction device, thereby charging the first capacitor and enabling the electronic module to work. When the communication terminal is in a weak pull-down state or at a low level, the first capacitor charges; when all communication terminals are at a high level, the first capacitor discharges to maintain the ground pin at a lower ground reference voltage, meeting the operating requirements of the electronic module.

[0017] The preferred embodiment is that the unidirectional conducting device is a diode, with the anode of the diode connected to the second terminal of the first capacitor and the cathode of the diode connected to the connection terminal.

[0018] Therefore, placing a diode between the second end of the first capacitor and the communication terminal can prevent reverse current flow and ensure the stable operation of the electronic module.

[0019] A further option is that the controlled conducting device includes a first switching device, the control terminal of which receives a signal output from the power supply terminal.

[0020] Therefore, the first switching device is controlled by the signal output from the power terminal. Since the first switching device is a voltage-controlled device, even if all communication terminals are in a weak pull-down state when the power is first applied, the first switching device can still be in a conducting state to charge the first capacitor, thereby ensuring that the electronic module has enough power to be successfully turned on.

[0021] One alternative is to use a battery as the power supply, with the positive terminal of the battery directly or indirectly connected to the power supply terminal and the negative terminal of the battery directly or indirectly connected to the ground pin.

[0022] Since the positive and negative terminals of the battery have a certain driving capability, the voltage of the grounding pin is kept lower than the voltage of the power supply terminal by the battery, thereby maintaining a low voltage on the grounding pin and ensuring that the electronic module can work normally.

[0023] A further option is to provide a second switching device between the connection terminal and the positive terminal of the battery; or to connect a second switching device between the negative terminal of the battery and the grounding pin.

[0024] In this way, the battery will only discharge when the switch is closed, thus avoiding prolonged discharge and energy loss.

[0025] A further option is that the second switching device is a mechanical switch or an electronic switch. Preferably, the second switching device is a push-button switch; or the second switching device is an insulating film connected between the battery and the substrate.

[0026] Therefore, by setting a push-button switch or an insulating film, the push-button switch is opened only when it is pressed by other parts after the consumable container is installed in the printing device, or the second switch is opened only after the insulating film is torn off before the consumable container is used. In other words, the second switch is always in the off state before the consumable container is used, thus preventing the battery from discharging before the consumable container is used.

[0027] Another alternative is that the first end of the power supply device is directly connected to the power supply terminal, and the multiple connection terminals also include at least one communication terminal, and the multiple pins also include communication pins, with each communication terminal connected to a corresponding communication pin; a third switching device is provided on the substrate, the second end of the power supply device is connected to the ground pin through the third switching device, the control terminal of the third switching device is connected to a fourth switching device, the control terminal of the fourth switching device is connected to the communication terminal, and the fourth switching device is also connected to the first end of the second capacitor. When the fourth switching device is turned on, the second capacitor is charged, and when the fourth switching device is turned off, the second capacitor discharges to the control terminal of the third switching device.

[0028] Therefore, the fourth switching device can control the on / off state of the third switching device. When the third switching device is on, the power supply device can supply power to the electronic module through it; when the third switching device is off, the power supply device will not supply power to the electronic module. Furthermore, since the on / off state of the third switching device is controlled by the fourth switching device, and the fourth switching device is connected to the communication terminal (meaning it only conducts when the communication terminal is at a low level), the power supply device will only supply power to the electronic module when the consumable chip is working. When the consumable chip stops working, the power supply device will continue supplying power for a period of time before automatically stopping, thus preventing excessive energy loss in the power supply device.

[0029] A further proposed solution is to use a field-effect transistor as the third switching device, and the control terminal of the third switching device is also connected to the first terminal of the second capacitor.

[0030] As can be seen, the second capacitor is charged when the fourth switch is turned on. When the fourth switch is turned off due to the high level of the communication terminal, the second capacitor can continue to discharge to the third switch for a short period of time, thereby maintaining the third switch on for a period of time. After the printing device stops supplying power, the second capacitor will not be charged because the fourth switch is always in the off state. After the second capacitor discharges for a period of time, the third switch is turned off, and the power supply device stops supplying power to the electronic module.

[0031] A further proposed solution is to use a field-effect transistor (FET) as the fourth switching device, with its source connected to the power supply terminal.

[0032] A further approach is to connect the second terminal of the second capacitor directly to the second terminal of the power supply device.

[0033] A further approach is to include a chip select pin among multiple communication pins, with the control terminal of the fifth switching device connected to the chip select pin, and the second terminal of the power supply device connected to the ground pin via the fifth switching device.

[0034] Therefore, by setting a fifth switching device, it can be ensured that the other end of the power supply device can always be connected to the ground pin of the consumable chip during operation, thereby enabling the power supply device to quickly supply power to the electronic module.

[0035] A further embodiment is that multiple communication pins include a chip select pin and a clock pin, and multiple communication terminals include a chip select terminal and a clock terminal; the control terminal of the sixth switching device is connected to the chip select terminal, and the sixth switching device is also connected between the clock terminal and the clock pin.

[0036] Therefore, by setting a sixth switching device, the situation where the third switching device cannot be turned off is avoided because the fourth switching device is always in the on state.

[0037] A further approach is to connect a first unidirectional conducting device between the chip select terminal and the chip select pin, which only allows current to flow from the chip select terminal to the chip select pin.

[0038] Therefore, by setting the first unidirectional conducting device, the reverse flow of current can be avoided, thereby preventing the fifth switching device from being mis-conducted.

[0039] A further embodiment includes multiple communication terminals, including a clock terminal, and a seventh, eighth, and ninth switching device are also provided on the substrate. The seventh switching device is controlled by an electronic module and is connected between the first terminal of the power supply device and the power supply terminal. The control terminal of the eighth switching device is connected to the clock terminal, and the eighth switching device is connected between the power supply terminal and the ninth switching device. The ninth switching device is controlled by an electronic module and is connected between the first terminal of the power supply device and the eighth switching device.

[0040] Therefore, the above solution can effectively avoid the problem of the fifth switching device accidentally turning on again.

[0041] A further proposed solution is to connect a first inverter between one output pin of the electronic module and the control terminal of the seventh switching device; and to connect a second inverter between the other output pin of the electronic module and the control terminal of the ninth switching device.

[0042] A further approach is to include a chip select terminal among multiple communication terminals; the electronic module is provided with a voltage detection pin, and a second unidirectional conduction device is provided between the voltage detection pin and the chip select terminal, which only allows current to flow from the chip select terminal to the voltage detection pin.

[0043] A further proposed solution is that the seventh, eighth, and ninth switching devices are all field-effect transistors.

[0044] Therefore, the above solution can effectively prevent current from flowing back into the control pin of the electronic module, thus avoiding the problem of false triggering of the third switching device, and can also effectively reduce the static power consumption of the electronic module.

[0045] An alternative approach is that the multiple connection terminals include at least one communication terminal; the electronic module includes a processor, which acquires the voltage signal of the communication terminal and determines whether the printing device is powered off based on the acquired voltage signal. If the printing device is powered off, the battery stops supplying power to the electronic module.

[0046] Therefore, by setting up a processor and controlling the battery's operation based on the power outage of the printing device, the battery can supply power to the processor only when it is working and not when it is not working, thereby extending the battery's lifespan.

[0047] A further embodiment is that a tenth switching device is provided on the substrate, the first end of the power supply device is connected to the power terminal through the tenth switching device, the control terminal of the tenth switching device is connected to the eleventh switching device, and the control terminal of the eleventh switching device is directly or indirectly connected to the power terminal; when the processor confirms that the printing device is powered off, it outputs a control signal to the twelfth switching device to control the change of the on / off state of the eleventh switching device, so that the tenth switching device is turned off.

[0048] Therefore, it can be seen that by setting three switching devices to control the switching of the battery's working state, the switching of the battery's working state can be achieved at a low cost, thereby reducing the production cost of the ink cartridge chip.

[0049] A further solution is to connect a voltage reduction device between the control terminal and the power supply terminal of the eleventh switching device.

[0050] Therefore, by placing a voltage reduction device between the control terminal and the power supply terminal of the eleventh switching device, the eleventh switching device can be turned on only when the driving voltage applied by the inkjet printer is high enough, and will automatically turn off before the voltage on the power supply terminal drops to the processor's operating voltage.

[0051] A further approach is for the processor to detect the voltage at the communication terminals via a voltage detection pin.

[0052] To achieve the second objective mentioned above, the consumable container provided by the present invention is detachably installed on a printing device. The consumable container includes a box body, a cavity is formed inside the box body, the cavity contains printing consumables, and a consumable outlet is provided on one side of the cavity; wherein, the aforementioned consumable chip is provided on the outer wall of the box body.

[0053] To achieve the third objective mentioned above, the printing device provided by the present invention includes a body, a main control circuit board is disposed inside the body, and one or more of the above-mentioned consumable containers are installed inside the printing device. Attached Figure Description

[0054] Figure 1 This is a structural diagram of an existing inkjet printing device.

[0055] Figure 2 This is a structural diagram of an existing ink cartridge.

[0056] Figure 3 This is a structural diagram of an existing ink cartridge chip.

[0057] Figure 4 This is the electrical schematic diagram of the first embodiment of the consumable chip of the present invention and the printing device.

[0058] Figure 5 This is the electrical schematic diagram of the second embodiment of the consumable chip of the present invention and the printing device.

[0059] Figure 6 This is the electrical schematic diagram of the third embodiment of the consumable chip of the present invention and the printing device.

[0060] Figure 7 This is the electrical schematic diagram of the fourth embodiment of the consumable chip of the present invention and the printing device.

[0061] Figure 8 This is the electrical schematic diagram of the fifth embodiment of the consumable chip of the present invention and the printing device.

[0062] Figure 9 This is the electrical schematic diagram of the sixth embodiment of the consumable chip of the present invention and the printing device.

[0063] Figure 10 This is the electrical schematic diagram of the seventh embodiment of the consumable chip of the present invention and the printing device.

[0064] Figure 11 This is the electrical schematic diagram of the eighth embodiment of the consumable chip of the present invention and the printing device.

[0065] Figure 12 This is the electrical schematic diagram of the ninth embodiment of the consumable chip of the present invention.

[0066] Figure 13 This is the electrical schematic diagram of the tenth embodiment of the consumable chip of the present invention.

[0067] Figure 14 This is the electrical schematic diagram of the eleventh embodiment of the consumable chip of the present invention.

[0068] Figure 15 This is the electrical schematic diagram of the twelfth embodiment of the consumable chip of the present invention.

[0069] Figure 16 This is the electrical schematic diagram of the thirteenth embodiment of the consumable chip of the present invention.

[0070] The present invention will be further described below with reference to the accompanying drawings and embodiments. Detailed Implementation

[0071] The printing device of this invention can be an inkjet printer or a laser printer; the following description uses an inkjet printer as an example. The inkjet printer has a main body containing one or more ink cartridges, which serve as the consumable container for this invention. Each ink cartridge has an ink cartridge chip on its side wall. This invention improves the circuitry of the ink cartridge chip, thereby eliminating the grounding contact on the chip or blocking it, effectively shielding the grounding contact's function. Even if electrically insulating foreign objects drip onto the grounding contact, it will not affect the communication between the ink cartridge and the inkjet printer.

[0072] First embodiment: The inkjet printing device of this embodiment has a body, and a printing carriage is formed inside the body. The ink cartridges are detachably installed in the printing carriage. Each ink cartridge has a box body, which forms a cavity for containing ink. An ink outlet communicating with the cavity is provided at the bottom of the cavity. The ink in the cavity can flow into the print head of the inkjet printing device through the ink outlet. An ink cartridge chip is detachably installed on the front wall of the ink cartridge.

[0073] The print carriage of an inkjet printer is equipped with a stylus holder. The main control circuit board and ink cartridges are located on opposite sides of the stylus holder, which holds multiple stylus pins. See also Figure 4 The inkjet printer 30 has contact pins including a power contact pin 31, a data contact pin 32, a clock contact pin 33, a chip select contact pin 34, and a ground contact pin 35.

[0074] Additionally, the cartridge chip 40 has a substrate with multiple connection terminals on its surface, including a power terminal 41, a data terminal 42, a clock terminal 43, and a chip select terminal 44. Each connection terminal corresponds to a contact. When the cartridge is installed in an inkjet printer, each connection terminal on the cartridge chip 40 connects to its corresponding contact; for example, the power terminal 41 is electrically connected to the power contact 31, and so on. Furthermore, the cartridge chip 40 does not have a ground terminal; instead, a virtual ground 45 is formed. This virtual ground 45 is not a metal sheet formed on the substrate surface and therefore is not electrically connected to the ground contact 35.

[0075] Since power terminal 41 is electrically connected to power contact pin 31, when the inkjet printer is working, power contact pin 31 outputs a high level of approximately 3.3V. Therefore, power terminal 41 receives a high-level signal. Data terminal 42, clock terminal 43, and chip select terminal 44 are communication terminals, connected to data contact pin 32, clock contact pin 33, and chip select contact pin 34, respectively. Because the data contact pin 32, clock contact pin 33, and chip select contact pin 34 of the inkjet printer have an equivalent resistance of a large value when there is no signal transmission, data terminal 42, clock terminal 43, and chip select terminal 44 usually exhibit a low-level signal when idle, that is, a weak pull-down state.

[0076] An electronic module is also disposed on the substrate of the ink cartridge chip 40. The electronic module can be located on the side of the substrate opposite to the multiple connection terminals, or on the same side as the multiple connection terminals. This embodiment does not limit the arrangement of the multiple connection terminals and the electronic module on the substrate. A processor U11 is disposed within the electronic module; of course, a memory and peripheral circuits can also be disposed therein. The electronic module has multiple functional pins, including power pins, data pins, chip select pins, clock pins, and ground pins, each functional pin being connected to a corresponding connection terminal. Furthermore, since the ink cartridge chip 40 does not have a ground terminal, the ground pin is directly connected to virtual ground 45.

[0077] Since the ink cartridge chip 40 does not have a ground pin, in order to ensure that the virtual ground 45 can continuously provide a ground reference voltage and form a current loop, a power supply device is set on the ink cartridge chip 40. In this embodiment, the power supply device is a capacitor C11. The first end of the capacitor is connected to the power supply terminal 41, the second end of the capacitor C11 is connected to the virtual ground 45, and the second end of the capacitor C11 is also directly connected to the ground pin of the processor U11.

[0078] In order to ensure that the virtual ground 45 continuously provides a ground reference voltage, in this embodiment, unidirectional conducting devices D11, D12, and D13 are respectively provided between the data terminal 42, the clock terminal 43, the chip select terminal 44 and the virtual ground 45. For example, diode D11 is provided between the virtual ground 45 and the data terminal 42, diode D12 is provided between the virtual ground 45 and the clock terminal 43, and diode D13 is provided between the virtual ground 45 and the chip select terminal 44. The anode of each diode is connected to the virtual ground 45, and the cathode is connected to each communication terminal.

[0079] With the above settings, when the ink cartridge is installed in the inkjet printer, power terminal 41 receives a high-level signal output from the inkjet printer. Since all connection terminals are initially idle upon power-up (as mentioned above, this is actually a weak pull-down state), diodes D11, D12, and D13 conduct, creating a voltage difference across capacitor C11, which then begins charging. Because capacitor C11 is connected between the power supply pin and ground pin of processor U11, the voltage difference between these two pins is 3.3V minus the voltage difference of the unidirectional conducting devices. The voltage difference of a typical diode is around 0.2V to 0.3V, which is sufficient to meet the operating requirements of processor U11. Furthermore, by using multiple unidirectional conducting devices, the charging speed of capacitor C11 at initial power-up can be accelerated, allowing processor U11 to start up quickly.

[0080] When the cartridge chip 40 receives or transmits data "1", data terminal 42, clock terminal 43, and chip select terminal 44 are all at high levels. However, due to the presence of capacitor C11, the voltage across it cannot rise abruptly. Therefore, the voltage on virtual ground 45 rises slowly. But when the received or transmitted data becomes "0", or the clock signal periodically goes low, capacitor C11 can continue to charge, causing the voltage on virtual ground 45 to drop again, thus maintaining virtual ground 45 as a low-voltage ground reference point. Therefore, by selecting capacitor C11 with appropriate parameters and minimizing the power consumption of processor U11, the cartridge chip 40 can have a sufficient potential difference to operate normally.

[0081] Since the power supply pin of the processor U11 is at a high level and the ground pin is at a low level, the processor U11 compares the levels of the data pin, clock pin, and chip select pin with the levels of the power supply pin and ground pin to obtain the level status of the data pin, clock pin, and chip select pin. In other words, it identifies the high and low level status of the data pin, clock pin, and chip select pin, thereby identifying the data sent by the inkjet printer.

[0082] Since the ink cartridge chip 40 does not have a grounding terminal, the circuit board area of ​​the ink cartridge chip 40 can be made very small, reducing the production cost of the ink cartridge chip. In addition, even if a foreign object falls into the location where the grounding terminal was originally located, it will not affect the operation of the ink cartridge chip 40. The ink cartridge chip 40 can still correctly identify the signals sent by the inkjet printer and return the corresponding response signal.

[0083] Second embodiment: In this embodiment, the consumable container is an ink cartridge installed in the inkjet printer. An ink cartridge chip is located on the side wall of the cartridge. (See [link]). Figure 5The ink cartridge chip 50 has a substrate, and multiple connection terminals are disposed on the surface of the substrate. The multiple connection terminals include a power terminal 51, a data terminal 52, a clock terminal 53, and a chip select terminal 54.

[0084] The inkjet printer 30 has contacts including a power contact 31, a data contact 32, a clock contact 33, a chip select contact 34, and a ground contact 35. Each connection terminal on the cartridge chip 50 corresponds to a corresponding contact on the inkjet printer. When the cartridge is installed in the inkjet printer, each connection terminal is connected to the corresponding contact. For example, the power terminal 51 is electrically connected to the power contact 31, and so on. Similar to the first embodiment, the cartridge chip 50 in this embodiment does not have a ground terminal, but instead forms a virtual ground 55, which is not electrically connected to the ground contact 35.

[0085] An electronic module is also disposed on the substrate of the ink cartridge chip 50. The electronic module contains a processor U21 and has multiple functional pins, including power pins, data pins, chip select pins, clock pins, and ground pins. Each functional pin is connected to a corresponding connection terminal. Since the ink cartridge chip 50 does not have a ground terminal, the ground pin is connected to virtual ground 55. Furthermore, a capacitor C21 is connected between the power terminal 51 and the power pin. The first end of capacitor C21 is connected to the power terminal 51, and the second end of capacitor C21 is directly connected to the ground pin and then to virtual ground 55.

[0086] Unlike the first embodiment, in this embodiment, a unidirectional conducting device is not provided between the second terminal of capacitor C21 and each communication terminal. Instead, a controlled conducting device is provided. Specifically, the controlled conducting device is a first switching device, such as a transistor or a field-effect transistor. Figure 5 As can be seen, a field-effect transistor (FET) Q21 is positioned between the second terminal of capacitor C21 and data terminal 52. The gate of FET Q21, which is the control terminal, is connected to voltage terminal 51 through resistor R21. The drain of FET Q21 is connected to the second terminal of capacitor C21, and the source is connected to data terminal 52. Correspondingly, a field-effect transistor Q22 is positioned between the second terminal of capacitor C21 and clock terminal 53, and a field-effect transistor Q23 is positioned between the second terminal of capacitor C21 and chip select terminal 54.

[0087] Thus, when power terminal 51 outputs a high level, MOSFETs Q21, Q22, and Q23 conduct. When any of the data terminal 52, clock terminal 53, or chip select terminal 54 is low, current can flow from power terminal 51 through capacitor C21, and then through the MOSFETs into the corresponding communication terminal, thereby charging capacitor C21. Since the voltage at power terminal 51 is approximately 3.3V, the voltage difference between the power supply pin and ground pin of processor U21 is approximately 3.3V, which is sufficient to maintain the operation of the electronic module. Furthermore, since the MOSFETs are voltage-controlled devices, even if data terminal 52, clock terminal 53, and chip select terminal 54 are in a weak pull-down state at the beginning of power-on, the MOSFETs can still turn on to charge capacitor C21, thus ensuring that processor U21 has sufficient power to successfully power on.

[0088] Third embodiment: In this embodiment, the consumable container is an ink cartridge installed in the inkjet printer. An ink cartridge chip is located on the side wall of the cartridge. (See [link]). Figure 6 The ink cartridge chip 60 has a substrate, and multiple connection terminals are disposed on the surface of the substrate, including a power terminal 61, a data terminal 62, a clock terminal 63, and a chip select terminal 64.

[0089] The inkjet printer 30 has contacts including a power contact 31, a data contact 32, a clock contact 33, a chip select contact 34, and a ground contact 35. Each connection terminal of the ink cartridge chip 60 corresponds to a corresponding contact on the inkjet printer. When the ink cartridge is installed in the inkjet printer, each connection terminal is connected to the corresponding contact. For example, the power terminal 61 is electrically connected to the power contact 31, and so on. Similar to the first embodiment, the ink cartridge chip 60 in this embodiment does not have a ground terminal, but instead forms a virtual ground 65, which is not electrically connected to the ground contact 35.

[0090] An electronic module is also provided on the substrate of the ink cartridge chip 60. The electronic module contains a processor U31. The electronic module has multiple functional pins, including power pins, data pins, chip select pins, clock pins, and ground pins. Each functional pin is connected to a corresponding connection terminal. In addition, since the ink cartridge chip 60 does not have a ground terminal, the ground pin is connected to virtual ground 65.

[0091] Unlike the first embodiment, in this embodiment, the power supply device between the power supply terminal 61 and the power supply pin of the processor U31 is not a capacitor, but a battery BAT1. The positive terminal of the battery BAT1 is directly connected to the power supply terminal 61, and the negative terminal of the battery BAT1 is directly connected to the ground pin of the processor U31, and connected to the virtual ground 65.

[0092] Preferably, the voltage difference between the positive and negative terminals of battery BAT1 is 3.3V, which is the same as the voltage difference between the power contact 31 and contact contact 35 of the inkjet printer. Furthermore, the positive terminal of battery BAT1 is connected to power terminal 61. Therefore, the ink cartridge chip 60 and the power bus of the inkjet printer have the same reference potential. Even if the virtual ground 65 of the ink cartridge chip 60 is not connected to the ground contact of the inkjet printer, the processor U31 can still determine whether the signal is high or low based on the difference between the potential of the received signal and the potential at power terminal 61. Moreover, since battery BAT1 itself has driving capability, it can maintain the virtual ground 65 at a voltage 3.3V lower than the positive terminal, that is, maintain the voltage of the virtual ground 65 at a ground reference potential of 0V.

[0093] In addition, since the battery BAT1 itself stores electrical energy, the processor U31 can also obtain power before the inkjet printer supplies power to the ink cartridge chip 60, without needing to charge the capacitor before it can operate. This can improve the response speed of the ink cartridge chip 60 to the instructions sent by the inkjet printer.

[0094] Fourth embodiment: In this embodiment, the consumable container is an ink cartridge installed in the inkjet printer. An ink cartridge chip is located on the side wall of the cartridge. (See [link]). Figure 7 The ink cartridge chip 70 has a substrate, and multiple connection terminals are disposed on the surface of the substrate. The multiple connection terminals include a power terminal 71, a data terminal 72, a clock terminal 73, and a chip select terminal 74.

[0095] The inkjet printer 30 has contacts including a power contact 31, a data contact 32, a clock contact 33, a chip select contact 34, and a ground contact 35. Each connection terminal of the cartridge chip 70 corresponds to a corresponding contact on the inkjet printer. When the cartridge is installed in the inkjet printer, each connection terminal is connected to the corresponding contact. For example, the power terminal 71 is electrically connected to the power contact 31, and so on. Similar to the first embodiment, the cartridge chip 70 in this embodiment does not have a ground terminal, but instead forms a virtual ground 75, which is not electrically connected to the ground contact 35.

[0096] Additionally, a battery BAT2 is provided between power terminal 71 and the power pin of processor U41. The positive terminal of battery BAT2 is indirectly connected to power terminal 71, and the negative terminal of battery BAT2 is directly connected to the ground pin of processor U41 and to virtual ground 75. Preferably, the voltage difference between the positive and negative terminals of battery BAT2 is 3.3V.

[0097] Compared to the third embodiment, the electronic module in this embodiment further includes a second switching device S1, which is connected between the power supply terminal 71 and the positive terminal of the battery BAT2. Alternatively, the second switching device can be connected between the negative terminal of the battery and the ground pin of the processor U41. The second switching device S1 can be a mechanical switch or an electronic switch. If it is an electronic switch, it can be a transistor or a field-effect transistor, and the control terminal of the electronic switch is connected to the power supply terminal 71.

[0098] If a mechanical switch is used, a push-button switch or an insulating film can be selected. For example, the second switching device S1 is a push-button switch, which is located on the side wall of the ink cartridge. When the push-button switch is pressed, it closes, and only then does the battery BAT2 discharge. In this way, the battery BAT2 only discharges after multiple ink cartridges are installed in the printhead of the inkjet printer and the multiple ink cartridges are in contact with each other, causing the push-button switch to close. This avoids energy loss caused by the battery BAT2 discharging before the ink cartridges are installed in the inkjet printer.

[0099] Alternatively, the second switching device S1 is an insulating film connected to the positive / negative terminal of battery BAT2 and the ink cartridge chip substrate. When installing the ink cartridge, the insulating film needs to be removed, allowing the positive / negative terminal of battery BAT2 to be electrically connected to the ink cartridge chip substrate, thus enabling battery BAT2 to be electrically connected to processor U41 and discharge. Alternatively, the insulating film itself may be part of the ink cartridge air inlet label. When the user installs the ink cartridge into the inkjet printer, the air inlet label needs to be torn off, i.e., the insulating film needs to be removed. At this time, battery BAT2 is electrically connected to processor U41 and begins to discharge.

[0100] Fifth embodiment: In this embodiment, the consumable container is an ink cartridge installed in the inkjet printer. An ink cartridge chip is located on the side wall of the cartridge. (See [link]). Figure 8 The ink cartridge chip 80 has a substrate, and multiple connection terminals are disposed on the surface of the substrate, including a power terminal 81, a data terminal 82, a clock terminal 83, and a chip select terminal 84.

[0101] The inkjet printer 30 has contacts including a power contact 31, a data contact 32, a clock contact 33, a chip select contact 34, and a ground contact 35. Each connection terminal of the ink cartridge chip 80 corresponds to a corresponding contact on the inkjet printer. When the ink cartridge is installed in the inkjet printer, each connection terminal is connected to the corresponding contact. For example, the power terminal 81 is electrically connected to the power contact 31, and so on. Similar to the first embodiment, the ink cartridge chip 80 in this embodiment does not have a ground terminal, but instead forms a virtual ground 85, which is not electrically connected to the ground contact 35.

[0102] Additionally, power terminal 81 is directly connected to the power pin of processor U51, the positive terminal of battery BAT3 is directly connected to power terminal 81, and the negative terminal of battery BAT3 is indirectly connected to the ground pin of processor U51, but the negative terminal of battery BAT3 is not connected to virtual ground 85. Preferably, the voltage difference between the positive and negative terminals of battery BAT3 is 3.3V.

[0103] When the inkjet printer 30 is powered on, the clock pin 33 is in a weak pull-down state, that is... Figure 8 Switch S2 is closed. At this time, a resistor R51 is connected between clock pin 33 and contact pin 35. It should be noted that... Figure 8 The switch S2 and resistor R51 in the diagram are illustrative, indicating that when the inkjet printer 30 is powered on, the clock contact 33 is in a weakly pulled-down state. When the inkjet printer 30 is powered off, it is equivalent to the switch S2 being in the open state. At this time, the clock contact 33 is not electrically connected to the ground contact 35, and the clock contact 33 is in a floating state.

[0104] The substrate of the ink cartridge chip 80 also includes a third switching device Q53 and a fourth switching device Q54, as well as resistors R52 and R53 and a capacitor C51. Both the third switching device Q53 and the fourth switching device Q54 are field-effect transistors (FETs). The control terminal (gate) of the fourth switching device Q54 is connected to the clock terminal 83, and its source is connected to the power supply terminal 81. A resistor R52 is connected between the gate and the source, i.e., between the clock terminal 83 and the source of the fourth switching device Q54. Preferably, the resistance value of resistor R52 is a preset multiple of the resistance value of resistor R51, for example, three times the resistance value of resistor R51. Setting the ratio between the resistance values ​​of resistor R52 and resistor R51 serves two purposes: firstly, it provides an electronic leakage path between the gate and source of the fourth switching device Q54 to prevent false triggering of Q54; secondly, it ensures that the weak pull-down state of the clock pin 33 is not significantly altered when the inkjet printer 30 is initially powered on, thus ensuring that the fourth switching device Q54 can be turned on normally.

[0105] The control terminal, i.e., the gate, of the third switching device Q53 is connected to the drain of the fourth switching device Q54. The source of the third switching device Q53 is connected to the negative terminal of the battery BAT3, and the drain is connected to the ground pin of the electronic module. The first terminal of capacitor C51 is connected to the gate of the third switching device Q53, and the drain of the fourth switching device Q54 is also connected to the first terminal of capacitor C51. The second terminal of capacitor C51 is connected to the negative terminal of the battery. Therefore, the negative terminal of battery BAT3 is indirectly connected to the ground pin of processor U51 through the third switching device Q53.

[0106] When the inkjet printer 30 is first powered on, its power contact pins output 3.3V to the power terminal 81, and the voltage of battery BAT3 is also 3.3V. At this time, switch S2 is essentially closed, and clock contact pin 33 is connected to ground contact pin 35 through resistor R51, placing clock contact pin 33 in a weak pull-down state. Furthermore, since the resistance value of resistor R52 is a preset multiple of the resistance value of resistor R51, for example, three times, the gate-source voltage difference of the fourth switching device Q54 is -3 / 4. When VCC = -2.5V, the fourth switching device Q54 is in the ON state.

[0107] After the fourth switching device Q54 is turned on, the voltage at power terminal 81 can be applied to the gate of the third switching device Q53. Simultaneously, since the source of the third switching device Q53 is directly connected to the negative terminal of battery BAT3, and the voltage difference between the positive and negative terminals of battery BAT3 is equal to the VCC voltage of the inkjet printer 30, the gate-source voltage difference of the third switching device Q53 is +3.3V, thus turning on the third switching device Q53. After the third switching device Q53 is turned on, the negative terminal of battery BAT3 is connected to the ground pin of processor U51, and processor U51 powers on and operates. Additionally, after the fourth switching device Q54 is turned on, it begins charging capacitor C51.

[0108] When the clock signal is high, the fourth switch Q54 will be in the off state because the gate and source voltages of the fourth switch Q54 are equal. However, since capacitor C51 is already charged, it can discharge to the gate of the third switch Q53. Therefore, the gate voltage of the third switch Q53 will not decrease immediately, but will gradually decrease as capacitor C51 discharges to resistor R53. However, since the clock signal periodically alternates between high and low levels, when the clock signal is low, the fourth switch Q54 will turn on again and charge capacitor C51 again, thus keeping the third switch Q53 continuously conducting. Therefore, as long as the inkjet printer 30 is powered on and the control terminal of the fourth switch Q54 changes between high and low levels, the third switch Q53 will remain continuously conducting, and the battery BAT3 will continuously supply power to the processor U51.

[0109] When the inkjet printer 30 loses power, the clock pin 33 is not electrically connected to the ground pin 35, which is equivalent to switch S2 being in the open state. Therefore, the gate and source of the fourth switching device Q54 are both at a high level, meaning the voltages at the gate and source are equal, and the fourth switching device Q54 is turned off. As capacitor C51 continues to discharge, after a period of discharge, the third switching device Q53 is immediately turned off, and battery BAT3 stops supplying power to processor U51. By selecting appropriate parameters for capacitor C51 and resistor R53, the duration for which battery BAT3 continues to supply power after the inkjet printer 30 loses power can be set according to actual needs. In this way, battery BAT3 does not continuously supply power to processor U51, but only after the inkjet printer 30 is powered on, avoiding rapid energy loss of battery BAT3 and extending the lifespan of the ink cartridge chip 80.

[0110] Of course, in other embodiments, the gate of the fourth switching device Q54 is not necessarily connected to the clock terminal 83. It can also be connected to a communication terminal such as a data terminal or a chip select terminal where the signal changes high or low, and the same effect can be achieved.

[0111] Sixth embodiment: In the fifth embodiment, in some inkjet printers 30, the clock signal at the clock terminal of the cartridge chip may remain high for an extended period, such as 100ms. In this case, increasing the capacitance of capacitor C51 would result in slow charging of C51 and delayed activation of the third switching device Q53. However, if the cartridge chip takes more than 100ms to turn off the third switching device Q53 after each power outage, it could lead to excessively long battery operating time and high battery consumption.

[0112] Therefore, this embodiment improves the ink cartridge chip to address the above-mentioned issues. See [link to relevant documentation]. Figure 9 In this embodiment, the ink cartridge chip 90 has a substrate, and a plurality of connection terminals are disposed on the surface of the substrate. The plurality of connection terminals include a power terminal 91, a data terminal 92, a clock terminal 93, and a chip select terminal 94.

[0113] The inkjet printer 30 has contacts including a power contact 31, a data contact 32, a clock contact 33, a chip select contact 34, and a ground contact 35. Each connection terminal of the cartridge chip 90 corresponds to a corresponding contact on the inkjet printer. When the cartridge is installed in the inkjet printer, each connection terminal is connected to the corresponding contact. For example, the power terminal 91 is electrically connected to the power contact 31, and so on. In this embodiment, the cartridge chip 90 does not have a ground terminal; instead, a virtual ground 95 is formed. The virtual ground 95 is not electrically connected to the ground contact 35.

[0114] Additionally, power terminal 91 is directly connected to the power pin of processor U61, the positive terminal of battery BAT6 is directly connected to power terminal 91, and the negative terminal of battery BAT6 is indirectly connected to the ground pin of processor U61, but the negative terminal of battery BAT6 is not connected to virtual ground 95. Preferably, the voltage difference between the positive and negative terminals of battery BAT6 is 3.3V.

[0115] The substrate of the ink cartridge chip 90 is also provided with a third switching device Q63 and a fourth switching device Q64, as well as resistors R62 and R63 and capacitor C61. The third switching device Q63 and the fourth switching device Q64 are both field-effect transistors. The gate of the fourth switching device Q64 is connected to the clock terminal 93, and the source is connected to the power supply terminal 91. A resistor R62 is connected between the gate and the source.

[0116] The gate of the third switching device Q63 is connected to the drain of the fourth switching device Q64. The source of the third switching device Q63 is connected to the negative terminal of the battery BAT6, and its drain is connected to the ground pin of the processor U61. The first terminal of the capacitor C61 is connected to the gate of the third switching device Q63, and the drain of the fourth switching device Q64 is also connected to the first terminal of the capacitor C61. The second terminal of the capacitor C61 is connected to the negative terminal of the battery BAT6. Therefore, the negative terminal of the battery BAT6 is indirectly connected to the ground pin of the processor U61 through the third switching device Q63.

[0117] Compared to the fifth embodiment, this embodiment sets a fifth switching device Q65 and a resistor R65 between the chip select terminal 94 and the ground pin of the processor U61. The fifth switching device is an N-type field-effect transistor. The control electrode, i.e., the gate, of the fifth switching device Q65 is connected to the chip select terminal 94, the source is connected to the negative terminal of the battery BAT6, and the drain is connected to the ground pin of the processor U61. The resistor R65 is connected between the gate and the source of the fifth switching device Q65.

[0118] When chip select terminal 94 is high, it indicates that the ink cartridge chip is selected to communicate with the inkjet printer 30, and the ink cartridge chip needs to enter the working state. Because chip select terminal 94 is high, the fifth switch Q65 is turned on, and the negative terminal of battery BAT6 is directly connected to the ground pin of processor U61. As long as chip select terminal 94 remains high, the fifth switch Q65 remains on. When chip select terminal 94 is low, the ink cartridge chip is waiting to receive instructions. Since clock terminal 93 is low or in a weak pull-down state at this time, the third switch Q63 also remains on, thus ensuring a good power supply to processor U61.

[0119] Seventh embodiment: In the fifth embodiment, after the ink cartridge chip is powered on, an equivalent resistance is formed between its processor's clock pin and ground pin. Thus, the positive terminal of the battery is connected to the ground pin via R52 and the clock pin, forming a loop. This may cause the voltage drop across resistor R52 to keep the fourth switching device Q54 in a continuously conducting state, preventing the third switching device Q53 from turning off.

[0120] To address this issue, this embodiment isolates the clock pin 33 of the printing device from the clock pin of the processor U71.

[0121] See Figure 10 The ink cartridge chip 100 in this embodiment has a substrate, and a plurality of connection terminals are disposed on the surface of the substrate. The plurality of connection terminals include a power terminal 101, a data terminal 102, a clock terminal 103 and a chip select terminal 104.

[0122] The inkjet printer 30 has contacts including a power contact 31, a data contact 32, a clock contact 33, a chip select contact 34, and a ground contact 35. Each connection terminal of the cartridge chip 100 corresponds to a corresponding contact on the inkjet printer. When the cartridge is installed in the inkjet printer, each connection terminal is connected to the corresponding contact. For example, the power terminal 101 is electrically connected to the power contact 31, and so on. In this embodiment, the cartridge chip 100 does not have a ground terminal; instead, a virtual ground 105 is formed. The virtual ground 105 is not electrically connected to the ground contact 35.

[0123] In addition, power terminal 101 is directly connected to the power pin of processor U71, the positive terminal of battery BAT7 is directly connected to power terminal 101, and the negative terminal of battery BAT7 is indirectly connected to the ground pin of processor U71, but the negative terminal of battery BAT7 is not connected to virtual ground 105.

[0124] The substrate of the ink cartridge chip 100 is also provided with a third switching device Q73 and a fourth switching device Q74, and with resistors R72 and R73 and capacitor C71. The third switching device Q73 and the fourth switching device Q74 are both field-effect transistors. The gate of the fourth switching device Q74 is connected to the clock terminal 103, and the source is also connected to the power supply terminal 101. A resistor R72 is connected between the gate and the source.

[0125] The gate of the third switching device Q73 is connected to the drain of the fourth switching device Q74. The source of the third switching device Q73 is connected to the negative terminal of the battery BAT7, and its drain is connected to the ground pin of the processor U71. The first terminal of the capacitor C71 is connected to the gate of the third switching device Q73, and the drain of the fourth switching device Q74 is also connected to the first terminal of the capacitor C71. The second terminal of the capacitor C71 is connected to the negative terminal of the battery BAT7. Therefore, the negative terminal of the battery BAT7 is indirectly connected to the ground pin of the processor U71 through the third switching device Q73.

[0126] A fifth switching device Q75 and a resistor R75 are provided between the chip select terminal 104 and the ground pin of the processor U71. The gate of the fifth switching device Q75 is connected to the chip select terminal 104, the source is connected to the negative terminal of the battery BAT7, and the drain is connected to the ground pin of the processor U71. The resistor R75 is connected between the gate and the source of the fifth switching device Q75.

[0127] In addition, a sixth switching device Q76 is also provided on the substrate 100. The sixth switching device Q76 is also an N-type field-effect transistor. Its control terminal, i.e., the gate, is connected to the chip select terminal 104, the source is connected to the clock terminal 103, and the drain is connected to the clock pin of the processor U71. There is a resistor R76 between the power supply terminal 101 and the drain of the sixth switching device Q76. The resistance value of the resistor R76 is smaller than the equivalent resistance value between the clock pin and the ground pin of the processor 71 by a preset multiple.

[0128] from Figure 10 It can be seen that the sixth switching device Q76 is only in the on state when the chip select terminal 104 outputs a high-level signal and the clock terminal 103 outputs a low-level signal. At this time, the clock pin of the processor U71 is connected to ground, making the clock pin of the processor U71 a low-level signal. When the chip select terminal 103 is a low-level signal or floating, the sixth switching device Q76 is in the off state. At this time, the voltage division on the equivalent resistance between the clock pin and the ground pin of the processor U71 keeps the clock pin a high-level signal. However, since the chip select terminal 103 is a low-level signal or floating, it means that the printing device does not need to communicate with the current ink cartridge chip, and the ink cartridge chip does not need a valid clock signal. Therefore, it will not affect the normal operation of the printing device.

[0129] In other embodiments, two inverters can be connected in series between the clock terminal 103 and the clock pin of the processor U71 to isolate the clock signal input and prevent the voltage drop across resistor R72 from being too high, which could cause the fourth switching device Q74 to erroneously enter the on state.

[0130] Eighth embodiment: In response to the problem in the seventh embodiment that the fifth switching device Q75 may be falsely triggered, this embodiment has been improved.

[0131] See Figure 11 In this embodiment, the ink cartridge chip 110 has a substrate, and a plurality of connection terminals are disposed on the surface of the substrate. The plurality of connection terminals include a power terminal 111, a data terminal 112, a clock terminal 113, and a chip select terminal 114.

[0132] The inkjet printer 30 has contacts including a power contact 31, a data contact 32, a clock contact 33, a chip select contact 34, and a ground contact 35. Each connection terminal of the cartridge chip 110 corresponds to a corresponding contact on the inkjet printer. When the cartridge is installed in the inkjet printer, each connection terminal is connected to the corresponding contact. For example, the power terminal 111 is electrically connected to the power contact 31, and so on. In this embodiment, the cartridge chip 110 does not have a ground terminal; instead, a virtual ground 115 is formed. The virtual ground 115 is not electrically connected to the ground contact 35.

[0133] In addition, power terminal 111 is directly connected to the power pin of processor U81, the positive terminal of battery BAT8 is directly connected to power terminal 111, and the negative terminal of battery BAT8 is indirectly connected to the ground pin of processor U81, but the negative terminal of battery BAT8 is not connected to virtual ground 115.

[0134] The substrate of the ink cartridge chip 110 is also provided with a third switching device Q83 and a fourth switching device Q84, as well as resistors R82 and R83 and capacitor C81. The third switching device Q83 and the fourth switching device Q84 are both field-effect transistors. The gate of the fourth switching device Q84 is connected to the clock terminal 113, and the source is also connected to the power supply terminal 111. A resistor R82 is connected between the gate and the source.

[0135] The gate of the third switching device Q83 is connected to the drain of the fourth switching device Q84. The source of the third switching device Q83 is connected to the negative terminal of the battery BAT8, and the drain is connected to the ground pin of the processor U81. The first terminal of the capacitor C81 is connected to the gate of the third switching device Q83, and the drain of the fourth switching device Q84 is also connected to the first terminal of the capacitor C81. The second terminal of the capacitor C81 is connected to the negative terminal of the battery BAT8. Therefore, the negative terminal of the battery BAT8 is indirectly connected to the ground pin of the processor U81 through the third switching device Q83.

[0136] A fifth switching device Q85 and a resistor R85 are provided between the chip select terminal 114 and the ground pin of the processor U81. The gate of the fifth switching device Q85 is connected to the chip select terminal 114, the source is connected to the negative terminal of the battery BAT8, and the drain is connected to the ground pin of the processor U81. The resistor R85 is connected between the gate and the source of the fifth switching device Q85.

[0137] In addition, a sixth switching device Q86 is provided on the substrate 110. The sixth switching device Q86 is also an N-type field-effect transistor. Its gate is connected to the chip select terminal 114, its source is connected to the clock terminal 113, and its drain is connected to the clock pin of the processor U81. There is a resistor R86 between the power supply terminal 111 and the drain of the sixth switching device Q86.

[0138] Compared to the seventh embodiment, this embodiment provides a first unidirectional conducting device between the chip select terminal 114 and the chip select pin of the processor U81. For example, the first unidirectional conducting device is a diode D81. The positive terminal of the diode D81 is connected to the chip select terminal 114, and the negative terminal is connected to the chip select pin of the processor U81. Therefore, the diode D81 only allows current to flow from the chip select terminal 114 to the chip select pin of the processor U81. Providing the diode D81 prevents the formation of an equivalent resistance between the chip select pin and the power supply terminal 111 after the processor U81 is powered on, which would then form a loop through resistor R85 to the negative terminal of the battery BAT8, thus preventing the fifth switching device Q85 from being falsely triggered. Meanwhile, since the voltage drop of diode D81 is generally 0.4V to 0.7V, when the chip select signal output by inkjet printer 30 is 3.3V at a high level, the signal voltage received at the chip select pin of processor U81 is still 2.6V to 2.9V, which is still within the high-level voltage threshold range and will not affect the communication with inkjet printer 30.

[0139] Ninth embodiment: In the sixth embodiment, after some inkjet printers have finished communicating with the cartridge chip or the power is turned off, if the positive terminal of the battery remains connected to the power terminal of the inkjet printer, the battery may even leak current to other communication terminals through the main control circuit board of the inkjet printer. For example, after the inkjet printer stops supplying power to the cartridge chip, the potential difference between the chip select terminal of the inkjet printer and the negative terminal of the battery may exceed 2V, which will cause the fifth switching device to turn on again. Therefore, this embodiment further improves the circuit.

[0140] See Figure 12In this embodiment, the ink cartridge chip 120 has a substrate, and a plurality of connection terminals are disposed on the surface of the substrate. The plurality of connection terminals include a power terminal 121, a data terminal 122, a clock terminal 123, and a chip select terminal 124. However, the ink cartridge chip 120 does not have a ground terminal, but instead forms a virtual ground 125.

[0141] Power terminal 121 is directly connected to the power pin of processor U91. The positive terminal of battery BAT9 is directly connected to power terminal 121, and the negative terminal of battery BAT9 is indirectly connected to the ground pin of processor U91. However, the negative terminal of battery BAT9 is not connected to virtual ground 125.

[0142] The substrate of the ink cartridge chip 120 is also provided with a third switching device Q93 and a fourth switching device Q94, as well as a resistor R93 and a capacitor C91. The third switching device Q93 and the fourth switching device Q94 are both field-effect transistors. The gate of the fourth switching device Q94 is connected to the clock terminal 123, and the source is connected to the power supply terminal 121.

[0143] The gate of the third switching device Q93 is connected to the drain of the fourth switching device Q94. The source of the third switching device Q93 is connected to the negative terminal of the battery BAT9, and its drain is connected to the ground pin of the processor U91. The first terminal of the capacitor C91 is connected to the gate of the third switching device Q93, and the drain of the fourth switching device Q94 is also connected to the first terminal of the capacitor C91. The second terminal of the capacitor C91 is connected to the negative terminal of the battery BAT9. Therefore, the negative terminal of the battery BAT9 is indirectly connected to the ground pin of the processor U91 through the third switching device Q93.

[0144] A fifth switching device Q95 and a resistor R95 are provided between the chip select terminal 124 and the ground pin of the processor U91. The gate of the fifth switching device Q95 is connected to the chip select terminal 124, the source is connected to the negative terminal of the battery BAT9, and the drain is connected to the ground pin of the processor U91. The resistor R95 is connected between the gate and the source of the fifth switching device Q95.

[0145] In this embodiment, three P-type field-effect transistors (FETs) are added between the positive terminal of battery BAT9 and power supply terminal 121. These are the seventh switching devices Q97, Q98, and Q99. The gate of the seventh switching device Q97 is connected to an output pin P2 of processor U91 via the first inverter U2A. Therefore, the seventh switching device Q97 is controlled by processor U91 to switch on and off. Its source is connected to the positive terminal of battery BAT9, and its drain is connected to power supply terminal 121. That is, the seventh switching device Q97 is connected between the positive terminal of battery BAT9 and power supply terminal 121. The control terminal of the eighth switching device Q98, i.e., its gate, is connected to clock terminal 123, its source is connected to power supply terminal 121, and its drain is connected to the drain of the ninth switching device Q99. Therefore, the eighth switching device Q98 is connected between power supply terminal 121 and the ninth switching device Q99. The gate of the ninth switching device Q99 is connected to another output pin P2 of the processor U91 through the second inverter U2B. Therefore, the ninth switching device Q99 is controlled by the processor U91 to turn on and off. The source is connected to the positive terminal of the battery BAT9, and the drain is connected to the drain of the eighth switching device Q98. That is, the ninth switching device Q99 is connected between the positive terminal of the battery BAT9 and the eighth switching device Q98.

[0146] In the initial state, the ninth switch Q99 is in the ON state, while the eighth switch Q98 determines its ON state based on the level of the clock terminal 121. To ensure that both the eighth switch Q98 and the fourth switch Q94 are in the ON state when the cartridge signal is first powered on, a resistor R97 is provided between the clock terminal 123 and the chip select terminal 124 in this embodiment. Thus, both the eighth switch Q98 and the fourth switch Q94 are in the ON state when the cartridge chip is first powered on. Furthermore, since the ninth switch Q99 is also in the ON state, the positive terminal of the battery BAT9 is connected to the power supply terminal 121 through the ninth switch Q99 and the eighth switch Q98, providing a common reference potential point.

[0147] When the fourth switch Q94 is turned on, the third switch Q93 is immediately turned on, and the processor U91 is powered on normally and enters the working state. At this time, the processor U91 continuously outputs a high-level signal through the output pin P2. This high-level signal is turned into a low-level signal after passing through the first inverter U1A, thereby turning on the seventh switch Q97. Keeping the seventh switch Q97 in the on state can prevent the eighth switch Q98 from turning off after the clock signal turns into a high-level signal, which would prevent the positive terminal of the battery BAT9 from being connected to the power terminal 121.

[0148] When the inkjet printer finishes communicating with the cartridge chip, and the positive terminal of battery BAT9 leaks current through the eighth switch Q98 and the ninth switch Q99, processor U91 can detect the leakage voltage through the voltage detection pin ADC. At this time, it first continuously outputs a low-level signal through output pin P2, thus turning off the seventh switch Q97. Then, it temporarily outputs a low-level signal through output pin P1, temporarily turning off the ninth switch Q99. After the seventh and ninth switches Q97 and Q99 are turned off, the positive terminal of battery BAT9 can no longer leak current to the power terminal, so the eighth switch Q98 also enters the off state. When the seventh, eighth, and ninth switches Q97, Q98, and Q99 are all turned off, processor U91 will also power down, and the positive terminal of battery BAT9 will be isolated from power terminal 121. Since processor U91 no longer outputs a low-level signal through output pin P1 after power loss, the ninth switch Q99 will also re-enter the conducting state. Thus, if the gate and source of the eighth switching device Q98 receive a potential difference applied by the inkjet printer again, the eighth switching device Q98 will enter the conducting state again, causing the processor U91 to enter the working state again.

[0149] This embodiment, by setting two inverters U1A and U1B, can prevent the battery BAT9 from leaking through the two output pins P1 and P2, thus preventing false triggering of the switching device and reducing the static power consumption of the processor U91. Furthermore, this embodiment also includes a first unidirectional conducting device and a second unidirectional conducting device. The first unidirectional conducting device is diode D91, and the second unidirectional conducting device is diode D92. Diodes D91 and D92 are connected in series and between the chip select terminal 124 and the chip select pin of the processor U91. In particular, the diode D92, located between the voltage detection pin ADC of the processor U91 and the chip select terminal 124, only allows current to flow from the chip select terminal 124 to the voltage detection pin ADC, thereby preventing leakage from the power supply pin of the processor U91 through the chip select terminal 124 and affecting the reading of the voltage detection pin ADC. Preferably, both diodes D91 and D92 are diodes with low forward voltage drop to prevent excessive voltage drop in the high-level chip select signal output by the inkjet printer 30.

[0150] Tenth embodiment: The ninth embodiment uses more components. In order to reduce the production cost of the ink cartridge chip, the circuit has been further improved in this embodiment.

[0151] See Figure 13The ink cartridge chip in this embodiment has a substrate, and multiple connection terminals are disposed on the surface of the substrate. The multiple connection terminals include a power terminal 131, a data terminal 132, a clock terminal 133, and a chip select terminal 134. However, no ground terminal is disposed on the ink cartridge chip, but a virtual ground 135 is formed instead.

[0152] The power terminal 131 is directly connected to the power pin of the processor U101. The substrate of the ink cartridge chip is also provided with three switching devices, namely the field-effect transistor Q101, which is the tenth switching device in this embodiment, the field-effect transistor Q102, which is the eleventh switching device in this embodiment, and the field-effect transistor Q103, which is the twelfth switching device in this embodiment. In addition, the substrate is also provided with a resistor R101.

[0153] The output pin P1 of processor U101 is connected to the control terminal (gate) of MOSFET Q103. The drain of MOSFET Q103 is connected to power supply terminal 131, and its source is connected to the source of MOSFET Q102. The control terminal (gate) of MOSFET Q102 is also connected to power supply terminal 131, and its drain is connected to the control terminal (gate) of MOSFET Q101. The source of MOSFET Q101 is connected to the first terminal of battery BAT10. The second terminal of battery BAT10 is connected to the ground pin of processor U101. Furthermore, the second terminal of battery BAT10 is also connected to the source of MOSFET Q102 through resistor R101.

[0154] In the initial state, when the ink cartridge chip is not installed in the inkjet printer, or when it is installed in the inkjet printer but the inkjet printer does not output the drive voltage VCC, the ground pin of the processor U101 is used as the ground reference potential point. Since the resistance between the power supply pin and the ground pin of the processor U101 is much smaller than the resistance between the drain and source of the field-effect transistor Q101 when it is in the off state, the power supply terminal 131 exhibits a weak pull-down state, which can be considered as a low level state. At this time, the field-effect transistor Q102 is in the off state, the field-effect transistor Q103 is also in the off state, and the battery BAT10 does not output the drive voltage to the processor U101, that is, it does not supply power to the processor U101. When the inkjet printer starts working, the voltage output from power terminal 131 begins to rise. However, since the clock pin of the inkjet printer is in a weak pull-down state at this time, it can be understood that the clock pin is pulled down to the ground of the inkjet printer through a large resistor. Furthermore, since the clock pin is directly connected to the clock terminal 133 of the ink cartridge chip, there is also an equivalent impedance between the clock pin of the processor U101 and the ground pin of the ink cartridge chip. Therefore, an equivalent resistance of approximately 1M ohms is superimposed between the ground of the inkjet printer and the second terminal of the battery BAT10. Thus, after the DC voltage output from the inkjet printer rises, the gate voltage of the field-effect transistor Q102 is higher than the source voltage of Q102. Because the resistance of resistor R101 is much smaller than the equivalent resistance between the ground of the inkjet printer and the second terminal of the battery BAT10, the field-effect transistor Q102 will conduct. After the field-effect transistor Q102 is turned on, the second terminal of the battery BAT101 is connected to the gate of the field-effect transistor Q101 through the resistor R101, so that the field-effect transistor Q101 is also turned on, and the battery BAT10 discharges to the processor U101 through the field-effect transistor Q101.

[0155] When the inkjet printer starts to lose power, the voltage at power terminal 131 does not immediately drop to 0, but gradually decreases. Therefore, MOSFET Q101 remains in the conducting state for a period of time. During this period, battery BAT10 leaks current in reverse to the inkjet printer, and this leakage current enters the voltage detection pin ADC of processor U101 through chip select terminal 134. When the voltage detection pin ADC of processor U101 detects a continuous leakage voltage, it considers that the inkjet printer has lost power. At this time, it outputs a high level through output pin P1, turning on MOSFET Q103. After MOSFET Q103 is turned on, the source power supply of MOSFET Q102 is the same as the voltage at power terminal 131. At this time, MOSFET Q102 turns off, and MOSFET Q101 also turns off. Battery BAT101 stops supplying power to processor U101. After the inkjet printer is powered off, the field-effect transistor Q102 will return to its initial state, and the ink cartridge chip will also return to its initial state, waiting for the inkjet printer to be powered on again.

[0156] As can be seen, this embodiment can achieve battery operating state control with fewer components, thereby reducing the production cost of ink cartridge chips.

[0157] Eleventh Example: This embodiment is an improvement upon the tenth embodiment; see [link / reference]. Figure 14 In this embodiment, the ink cartridge chip has a substrate, and a plurality of connection terminals are disposed on the surface of the substrate. The plurality of connection terminals include a power terminal 141, a data terminal 142, a clock terminal 143, and a chip select terminal 144. However, no ground terminal is disposed on the ink cartridge chip, but a virtual ground 145 is formed instead.

[0158] Power terminal 141 is directly connected to the power supply pin of processor U111. The output pin P1 of processor U111 is connected to the gate of field-effect transistor Q113. The drain of field-effect transistor Q113 is connected to power terminal 141, and its source is connected to the source of field-effect transistor Q112. The gate of field-effect transistor Q112 is also connected to power terminal 141, and its drain is connected to the gate of field-effect transistor Q111. The source of field-effect transistor Q111 is connected to the first terminal of battery BAT11. The second terminal of battery BAT11 is connected to the ground pin of processor U111. Furthermore, the second terminal of battery BAT11 is also connected to the source of field-effect transistor Q112 through resistor R111.

[0159] Compared to the tenth embodiment, this embodiment adds a step-down device, namely diode D111, between the chip select terminal 144 and the chip select pin of the processor U111. The positive terminal of diode D111 is connected to the chip select terminal 144, and the negative terminal is connected to the chip select pin of the processor U111. Furthermore, the processor U111 does not have a voltage detection pin, thus allowing the use of a processor without voltage detection functionality, thereby reducing the production cost of the cartridge chip. The purpose of diode D111 in this embodiment is to reduce the voltage of the chip select signal received by the processor U111. For example, if the high-level signal output from the chip select terminal 144 is 3.3V, after passing through diode D111, the voltage of the chip select signal received by the processor U111 is 2.6V. Thus, during normal operation, the chip select signal received by the processor U111 still has 2.6V when it is high, and the processor U111 can still recognize it as a high-level chip select signal. When the inkjet printer loses power and the battery BAT11 leaks in reverse to the inkjet printer, the voltage detected by the chip select pin of the processor U111 is approximately 1.5V, which it will therefore recognize as a low level. Thus, the processor U111 can identify whether the inkjet printer has lost power by judging whether the chip select signal is low within a preset time. The working principle of the ink cartridge chip in this embodiment is basically the same as that in the tenth embodiment, and will not be repeated. Of course, in some other embodiments, it can also be set to determine the duration of the low-level chip select signal after the instruction ends, in order to improve the stability of data reading and writing of the ink cartridge chip.

[0160] Of course, in some other embodiments, if some inkjet printers have no leakage voltage on the chip select terminal or the leakage voltage is lower than the high-level voltage threshold after a power failure, diode D111 may not be required.

[0161] Twelfth Example: This embodiment is an improvement upon the tenth embodiment; see [link / reference]. Figure 15 The ink cartridge chip in this embodiment has a substrate, and multiple connection terminals are disposed on the surface of the substrate. The multiple connection terminals include a power terminal 151, a data terminal 152, a clock terminal 153, and a chip select terminal 154. However, no ground terminal is disposed on the ink cartridge chip, but a virtual ground 155 is formed instead.

[0162] Power terminal 151 is directly connected to the power supply pin of processor U121. The output pin P1 of processor U121 is connected to the gate of field-effect transistor Q123. The drain of field-effect transistor Q123 is connected to power terminal 151, and its source is connected to the source of field-effect transistor Q122. The gate of field-effect transistor Q122 is also connected to power terminal 151, and its drain is connected to the gate of field-effect transistor Q121. The source of field-effect transistor Q121 is connected to the first terminal of battery BAT12. The second terminal of battery BAT12 is connected to the ground pin of processor U121. Furthermore, the second terminal of battery BAT12 is also connected to the source of field-effect transistor Q122 through resistor R121.

[0163] Unlike the tenth embodiment, this embodiment adds a step-down device, namely diode D121, between clock terminal 153 and the clock pin of processor U121. The positive terminal of diode D121 is connected to clock terminal 153, and the negative terminal is connected to the clock pin of processor U121. Furthermore, processor U121 does not have a voltage detection pin, thus allowing the use of a processor without voltage detection functionality, thereby reducing the production cost of the cartridge chip.

[0164] Furthermore, in this embodiment, the chip select terminal 154 is not connected to the chip select pin of the processor U121. Therefore, a chip select pin does not need to be provided on the substrate. With this design, the communication method disclosed in CN116483292A can be used to communicate with the inkjet printing device. In this embodiment, the ink cartridge chip determines whether the inkjet printing device has lost power by judging whether the clock signal is low within a preset time. Other working principles are basically the same as in the tenth embodiment and will not be described again.

[0165] Thirteenth Example: This embodiment is an improvement upon the twelfth embodiment; see [link / reference]. Figure 16 In this embodiment, the ink cartridge chip has a substrate, and multiple connection terminals are disposed on the surface of the substrate. The multiple connection terminals include a power terminal 161, a data terminal 162, a clock terminal 163, and a chip select terminal 164. However, the ink cartridge chip does not have a ground terminal, but instead forms a virtual ground 165.

[0166] Power terminal 161 is directly connected to the power pin of processor U131. The output pin P1 of processor U131 is connected to the gate of MOSFET Q133. The drain of MOSFET Q133 is connected to power terminal 131, and its source is connected to the source of MOSFET Q132. The gate of MOSFET Q132 can receive the voltage output from power terminal 151, and its drain is connected to the gate of MOSFET Q131. The source of MOSFET Q131 is connected to the first terminal of battery BAT13. The second terminal of battery BAT13 is connected to the ground pin of processor U131. Furthermore, the second terminal of battery BAT13 is also connected to the source of MOSFET Q132 through resistor R131. A diode D131 is positioned between clock terminal 163 and the clock pin of processor U131. The positive terminal of diode D131 is connected to clock terminal 163, and the negative terminal is connected to the clock pin of processor U131.

[0167] Compared to the twelfth embodiment, this embodiment adds a step-down device, namely diode D132, between the power supply terminal 161 and the gate of the field-effect transistor Q132. The positive terminal of diode D132 is connected to the power supply terminal 161, and the negative terminal is connected to the gate of the field-effect transistor Q132. The purpose of setting diode D132 is to reduce the voltage applied to the gate of the field-effect transistor Q132. When the processor U131 detects a power failure of the inkjet printer and outputs a high level on output pin P1, the voltage on output pin P1 rises rapidly. After reaching the conduction threshold voltage of field-effect transistor Q133, field-effect transistor Q133 turns on, field-effect transistor Q132 turns off, and field-effect transistor Q131 also turns off. At this time, the voltage at power supply terminal 161 begins to drop. When the voltage at power supply terminal 161 drops to the minimum voltage required for the processor U131 to operate, the processor U131 stops working, and output pin P1 no longer outputs a high-level signal. However, since the power supply terminal 161 still has a relatively high voltage, such as 2.8V, without diode D132, the MOSFET Q132 could easily re-enter the conducting state. Therefore, by using diode D132, the processor U131 can ensure that the MOSFET Q132 only turns on when the drive voltage output by the inkjet printer is sufficiently high, and that the MOSFET Q132 automatically turns off before the voltage at power supply terminal 161 drops to the minimum voltage required for the processor U131 to operate. Of course, in some other embodiments, a resistor with a larger resistance value can be used instead of diode D132.

[0168] Since the power-on and power-off times of the processor U131 are essentially synchronized with those of the inkjet printer, in a battery-powered solution where the grounding terminal 165 is shielded, even if the inkjet printer pulls down each communication terminal to ground upon power-on, the processor U131 will not mistakenly interpret this action as a single data bit because it is still in the initialization phase and has not yet begun receiving data. Alternatively, in other embodiments, a capacitor can be added between the power terminal 161 and the second terminal of the battery BAT13 to delay the power-on time of the processor U131, ensuring that the pull-down action of the inkjet printer occurs before the processor U131 completes initialization.

[0169] In the above embodiments, no grounding terminal is provided on the ink cartridge chip. In actual applications, a grounding terminal can also be provided on the ink cartridge chip, but an insulating component can be provided on the surface of the grounding terminal. For example, the insulating component is an insulating film, which covers the contact terminal, so that the grounding pin of the inkjet printer is electrically insulated from the grounding terminal.

[0170] Because the ink cartridge chip contains capacitors or batteries, a stable voltage difference is maintained between the power terminal and the ground pin of the electronic module. This provides a stable voltage to the electronic module to maintain its operation. Furthermore, the electronic module can determine the voltage levels of the data pins, clock pins, and chip select pins based on the voltages of the power and ground pins, thus enabling communication between the inkjet printer and the ink cartridge. Therefore, even if there are foreign objects at the ground terminal, it will not affect the operation of the ink cartridge.

[0171] The above are merely specific embodiments of the present invention, but the scope of protection of the present invention is not limited thereto. The above content is only for the purpose of facilitating understanding of the present invention and is not intended to limit the present invention. Any modifications and changes in the form and details of the implementation can be made by those skilled in the art without departing from the technical scope disclosed in the present invention, and all such modifications and changes should be covered within the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be determined by the scope defined in the claims.

Claims

1. A consumable chip, comprising a substrate, wherein an electronic module and a plurality of connection terminals are disposed on the surface of the substrate, the electronic module comprising a processor having a plurality of pins, and each of the connection terminals being connected to a corresponding pin; Its features are: The plurality of the connection terminals do not include a grounding terminal, or the grounding terminal of the connection terminals is blocked by an electrically insulating component; The plurality of connection terminals include power terminals, the plurality of pins include power pins, the power terminals are connected to the power pins, and the power terminals are directly or indirectly connected to the first end of the power supply device; The plurality of pins also include a ground pin, which is directly or indirectly connected to a second terminal of the power supply device.

2. The consumable chip according to claim 1, characterized in that: The power supply device is a first capacitor, with its first end directly connected to the power supply terminal and its second end directly connected to the ground pin. The plurality of connection terminals further include at least one communication terminal, and the plurality of pins further include communication pins, with each communication terminal connected to a corresponding communication pin; The second terminal of the first capacitor is connected to at least one of the communication terminals by a unidirectional conduction device or a controlled conduction device.

3. The consumable chip according to claim 2, characterized in that: The unidirectional conducting device is a diode, with the anode of the diode connected to the second terminal of the first capacitor and the cathode of the diode connected to the connection terminal.

4. The consumable chip according to claim 2, characterized in that: The controlled conduction device includes a first switching device, the control terminal of which receives the signal output from the power supply terminal.

5. The consumable chip according to claim 1, characterized in that: The power supply device is a battery, the positive terminal of which is directly or indirectly connected to the power terminal, and the negative terminal of which is directly or indirectly connected to the ground pin.

6. The consumable chip according to claim 5, characterized in that: A second switching device is also provided between the power terminal and the positive terminal of the battery; or A second switching device is connected between the negative terminal of the battery and the ground pin.

7. The consumable chip according to claim 6, characterized in that: The second switching device is a mechanical switch or an electronic switch.

8. The consumable chip according to claim 6, characterized in that: The second switching device is a push-button switch; or The second switching device is an insulating film connected between the battery and the substrate.

9. The consumable chip according to claim 1, characterized in that: The first end of the power supply device is directly connected to the power terminal, and the plurality of connection terminals further include at least one communication terminal, and the plurality of pins further include communication pins, with each communication terminal connected to the corresponding communication pin; A third switching device is provided on the substrate. The second end of the power supply device is connected to the ground pin through the third switching device. The control terminal of the third switching device is connected to a fourth switching device. The control terminal of the fourth switching device is connected to the communication terminal. The fourth switching device is also connected to the first end of a second capacitor. When the fourth switching device is turned on, the second capacitor is charged. When the fourth switching device is turned off, the second capacitor discharges to the control terminal of the third switching device.

10. The consumable chip according to claim 9, characterized in that: The third switching device is a field-effect transistor, and the control terminal of the third switching device is also connected to the first terminal of the second capacitor.

11. The consumable chip according to claim 9, characterized in that: The fourth switching device is a field-effect transistor, and the source of the fourth switching device is connected to the power supply terminal.

12. The consumable chip according to claim 11, characterized in that: The second terminal of the second capacitor is directly connected to the second terminal of the power supply device.

13. The consumable chip according to any one of claims 9 to 12, characterized in that: The plurality of communication pins include a chip select pin, the control terminal of the fifth switching device is connected to the chip select pin, and the second terminal of the power supply device is connected to the ground pin through the fifth switching device.

14. The consumable chip according to any one of claims 9 to 12, characterized in that: The plurality of communication pins include a chip select pin and a clock pin, and the plurality of communication terminals include a chip select terminal and a clock terminal; The control terminal of the sixth switching device is connected to the chip select terminal, and the sixth switching device is also connected between the clock terminal and the clock pin.

15. The consumable chip according to claim 14, characterized in that: A first unidirectional conducting device is connected between the chip select terminal and the chip select pin, and the first unidirectional conducting device only allows current to flow from the chip select terminal to the chip select pin.

16. The consumable chip according to any one of claims 9 to 12, characterized in that: The plurality of communication terminals include a clock terminal, and the substrate is further provided with a seventh switch device, an eighth switch device and a ninth switch device; The seventh switching device is controlled to be switched on and off by the electronic module, and the seventh switching device is connected between the first end of the power supply device and the power terminal. The control terminal of the eighth switching device is connected to the clock terminal, and the eighth switching device is connected between the power supply terminal and the ninth switching device. The ninth switching device is controlled by the electronic module to switch on and off, and the ninth switching device is connected between the first terminal of the power supply device and the eighth switching device.

17. The consumable chip according to claim 16, characterized in that: A first inverter is connected between one output pin of the electronic module and the control terminal of the seventh switching device. A second inverter is connected between another output pin of the electronic module and the control terminal of the ninth switching device.

18. The consumable chip according to claim 16, characterized in that: The plurality of the communication terminals include a chip select terminal; The electronic module is provided with a voltage detection pin, and a second unidirectional conduction device is provided between the voltage detection pin and the chip select terminal. The second unidirectional conduction device only allows current to flow from the chip select terminal to the voltage detection pin.

19. The consumable chip according to claim 16, characterized in that: The seventh, eighth, and ninth switching devices are all field-effect transistors.

20. The consumable chip according to claim 5, characterized in that: The plurality of connection terminals include at least one communication terminal; The electronic module includes a processor that acquires the voltage signal from the communication terminal and determines whether the printing device is powered off based on the acquired voltage signal. If the printing device is powered off, the processor stops supplying power to the electronic module from the battery.

21. The consumable chip according to claim 20, characterized in that: The substrate is provided with a tenth switching device. The first end of the power supply device is connected to the power terminal through the tenth switching device. The control end of the tenth switching device is connected to the eleventh switching device. The control end of the eleventh switching device is directly or indirectly connected to the power terminal. When the processor confirms that the printing device has lost power, it outputs a control signal to the twelfth switch to control the on / off state of the eleventh switch, causing the tenth switch to turn off. The control terminal of the twelfth switch is connected to the processor, and the twelfth switch is also connected to the power supply terminal and the eleventh switch.

22. The consumable chip according to claim 21, characterized in that: A voltage reduction device is also connected between the control terminal of the eleventh switching device and the power supply terminal.

23. The consumable chip according to claim 21, characterized in that: The processor detects the voltage of the communication terminal via a voltage detection pin.

24. A consumable container, detachably mounted to a printing device, the consumable container comprising: The box body has a cavity formed inside, which contains printing consumables, and a consumable outlet is provided on one side of the cavity; Its features are: The outer wall of the box is provided with a consumable chip as described in any one of claims 1 to 23.

25. A printing device, comprising a body, wherein a main control circuit board is disposed within the body, characterized in that: The printing device contains one or more consumable containers as described in claim 24.

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