Binding mapping method and apparatus, storage control chip, and storage medium

Abstract

The application provides a binding mapping method and device, a storage control chip and a storage medium. The method comprises the following steps: determining the binding relationship of each Plane in the flash memory; reading a shared page characteristic table of the flash memory; performing a binding mapping operation on each Block of the Plane with the binding relationship, wherein the binding mapping operation comprises: horizontally binding the shared pages of the Blocks at the same position offset, and establishing a binding mapping entry according to the horizontal binding relationship of the shared pages; and establishing an L2P table and storing the L2P table according to the binding mapping entry. By horizontally binding the shared pages of the Blocks at the same position offset, the same type of shared pages in different Blocks can be bound together, a single mapping relationship can represent the effect of multiple logical pages corresponding to multiple physical pages, the overall length of the L2P table can be effectively reduced, and the space resources of the RAM can be avoided from being excessively occupied.

Description

Technical Field

[0001] This invention relates to the field of Flash technology, and in particular to a binding mapping method, apparatus, storage control chip, and storage medium. Background Technology

[0002] NAND Flash (hereinafter referred to as Flash) is one of the mainstream storage media, and its function is to realize data storage. For storage products, Flash is almost always the first choice to serve as the core storage medium. However, due to the physical characteristics of Flash, Flash needs to be mass-produced with storage controller chips.

[0003] The Flash Translation Layer (FTL) in the memory controller chip translates the logical address space of the host to the physical address space of the flash memory, i.e., mapping logical addresses to physical addresses. Whenever data needs to be written to a flash address, the mapping between that logical address and physical address needs to be recorded. When the host needs to read that data, it can retrieve the data from the flash memory based on this mapping and return it to the host. In practical applications, these mappings are stored in the RAM of the memory controller chip as a level-to-page (L2P) mapping table. Since RAM space is limited and needs to store not only the mapping table but also other data, the size of the mapping table is crucial. In previous firmware designs, each mapping entry represented a single logical page corresponding to a single physical page, resulting in an abnormally large mapping table and excessive RAM resource consumption. Summary of the Invention

[0004] The purpose of this invention is to overcome the shortcomings of the prior art and provide a binding mapping method, apparatus, storage control chip and storage medium that can reduce the length of the mapping table and avoid excessive occupation of RAM space resources.

[0005] The first aspect of this application provides a binding mapping method, including: Determine the binding relationships between the planes in the flash memory; Read the shared page characteristic table of the flash memory; Perform a binding mapping operation on each block of the Plane that has a binding relationship. The binding mapping operation includes: horizontally binding the shared pages of the Block at the same position offset, and establishing a binding mapping entry according to the horizontal binding relationship of the shared pages. Based on the binding mapping entries, an L2P table is created and stored.

[0006] Further, in one preferred embodiment, the binding mapping operation performed on each block of the Plane with a binding relationship includes: horizontally binding shared pages of the blocks at the same position offset, and before establishing binding mapping entries based on the horizontal binding relationship of the shared pages, the operation further includes: Identify a single-bit block of the flash memory, and do not perform a binding mapping operation on the pages in the single-bit block.

[0007] Further, in one preferred embodiment, the lateral binding of shared pages of the Block at the same offset position, and the establishment of binding mapping entries based on the lateral binding relationship of the shared pages, includes: Obtain the shared page type corresponding to each WordLine in the shared page characteristic table; Perform horizontal binding on the WordLine according to the shared page type, where: If the shared page corresponding to the WordLine only includes the single shared type of Low Page, then the Low Page will be horizontally bound in the Block at the same offset position; If the shared page corresponding to the WordLine includes two types of shared pages, Low Page and Upper Page, then the Low Page and Upper Page will be horizontally bound in the Block at the same offset position. If the shared page corresponding to the WordLine includes three types of shared pages: Low Page, Upper Page, and Extra Page, then the Low Page, Upper Page, and Extra Page will be horizontally bound in the Block at the same offset position. Based on the horizontal binding relationship of the shared pages, establish binding mapping entries.

[0008] Further, in one preferred embodiment, determining the binding relationship of each plane in the flash memory includes: Read the number of error bits for each plane before and after binding in the flash memory, and determine the binding relationship of each plane based on the change in the number of error bits before and after binding.

[0009] A second aspect of this application provides a binding mapping device, comprising: The binding module is used to determine the binding relationship between each plane in the flash memory; A read module is used to read the shared page characteristic table of the flash memory; The mapping module is used to perform binding mapping operations on each block of the Plane that has a binding relationship. The binding mapping operation includes: horizontally binding the shared pages of the blocks at the same position offset, and establishing binding mapping entries according to the horizontal binding relationship of the shared pages. The storage module is used to create and store an L2P table based on the binding mapping entries.

[0010] Furthermore, in one preferred embodiment, it also includes The identification module is used to identify a single-bit block of the flash memory and not perform a binding mapping operation on the pages in the single-bit block.

[0011] Further, in one preferred embodiment, the mapping module includes: The acquisition unit is used to acquire the shared page type corresponding to each WordLine in the shared page characteristic table; A mapping unit is used to perform lateral binding on the WordLine according to the shared page type, wherein: If the shared page corresponding to the WordLine only includes the single shared type of Low Page, then the Low Page will be horizontally bound in the Block at the same offset position; If the shared page corresponding to the WordLine includes two types of shared pages, Low Page and Upper Page, then the Low Page and Upper Page will be horizontally bound in the Block at the same offset position. If the shared page corresponding to the WordLine includes three types of shared pages: Low Page, Upper Page, and Extra Page, then the Low Page, Upper Page, and Extra Page will be horizontally bound in the Block at the same offset position. The establishment unit is used to establish binding mapping entries based on the horizontal binding relationship of the shared page.

[0012] Further, in one preferred embodiment, the binding module is used to determine the binding relationship between each plane in the flash memory, including: Read the number of error bits for each plane before and after binding in the flash memory, and determine the binding relationship of each plane based on the change in the number of error bits before and after binding.

[0013] A third aspect of this application provides a storage control chip, including: the binding mapping device as described above.

[0014] A fourth aspect of this application provides a computer-readable storage medium storing executable code that, when executed by a processor of an electronic device, causes the processor to perform the binding mapping method as described above.

[0015] The technical solution of this application includes: determining the binding relationship of each plane in flash memory; reading the shared page characteristic table of flash memory; performing binding mapping operations on each block of the plane with binding relationships, the binding mapping operations including: horizontally binding the shared pages of blocks at the same offset, and establishing binding mapping entries according to the horizontal binding relationship of the shared pages; establishing and storing an L2P table according to the binding mapping entries. By horizontally binding the shared pages of blocks at the same offset, shared pages of the same type in different blocks can be bound together, achieving the effect of a single mapping relationship representing multiple logical pages corresponding to multiple physical pages, which can effectively reduce the overall length of the L2P table and avoid excessive occupation of RAM space resources. Attached Figure Description

[0016] To more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings used in the embodiments will be briefly introduced below. It should be understood that the following drawings only show some embodiments of the present invention and should not be regarded as a limitation on the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0017] Figure 1 This is a schematic flowchart illustrating a binding mapping method according to an embodiment of this application; Figure 2 This is a flowchart illustrating a binding mapping method according to another embodiment of this application; Figure 3 The diagram shown is a structural schematic of a binding mapping device in one embodiment of this application; Figure 4 The diagram shown is a structural schematic of a binding mapping device in another embodiment of this application; Figure 5 The diagram shown is a schematic diagram of the structure of a storage control chip in one embodiment of this application; Figure 6 The diagram shown is a structural schematic of an electronic device according to an embodiment of this application; Figure 7 This is a schematic diagram of the organization structure of a flash memory block as shown in one embodiment of this application. Detailed Implementation

[0018] To facilitate understanding of the present invention, a more complete description of the invention is provided below with reference to the accompanying drawings. Preferred embodiments of the invention are shown in the drawings. However, the invention can be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided to provide a thorough and complete understanding of the disclosure of the invention.

[0019] It should be noted that when an element is referred to as being "fixed to" another element, it can be directly attached to the other element or there may be an intervening element. When an element is referred to as being "connected to" another element, it can be directly connected to the other element or there may be an intervening element. The terms "vertical," "horizontal," "left," "right," and similar expressions used herein are for illustrative purposes only and do not represent the only possible implementation.

[0020] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains. The terminology used herein in the description of the invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. The term "and / or" as used herein includes any and all combinations of one or more of the associated listed items.

[0021] In related technologies, in firmware code design, each mapping relationship in the Level-to-Pack (L2P) table represents a single logical page corresponding to a single physical page, resulting in an abnormally large length of the mapping table and excessive consumption of RAM space resources.

[0022] Therefore, in order to solve the above-mentioned technical problems, this application discloses a binding mapping method that can reduce the length of the mapping table and avoid excessive occupation of RAM space resources.

[0023] Before formally describing the technical solution of this application, the knowledge points of flash memory involved in this application will be explained.

[0024] Flash memory can be categorized into SLC, MLC, and TLC based on the number of bits of data stored in a single storage unit, but regardless of the type, their internal architecture is the same. For example... Figure 7The diagram illustrates the organizational structure of a flash block. One word line (WL) corresponds to one or more pages, the exact number depending on whether it's SLC, MLC, or TLC. For SLC, one word line corresponds to one page; for MLC, it corresponds to two pages (Lower Page and Upper Page); for TLC, it corresponds to three pages (Lower Page, Upper Page, and Extra Page, the terminology varies among different flash memory manufacturers). The size of a page determines the number of memory cells and bit lines (BLs) on the word line. All these memory cells within a block share a single substrate.

[0025] The shared page characteristic table is an information table used to describe the shared page information in a block. Shared page characteristic information includes the shared page's WordLine address, positional relationship, write order, and sequential writes. When programming the flash memory, the storage controller chip needs to store the relevant firmware code regarding the shared page characteristic information; otherwise, the storage controller chip cannot perform the flash memory programming.

[0026] Table 1 shows the shared page characteristics of the B58r flash memory.

[0027] 0 - - 0 1 - - 1 2 - - 2 3 - - 3 4 5 6 4 7 8 9 5 10 11 12 6 13 14 16 7 16 17 18 8 19 20 21 9 22 23 24 10 25 26 27 11 ….. …… …… …… 1381 1382 1383 463 1384 1385 - 464 1386 1387 - 465 …… …… …… …… 1398 1399 - 471 1400 1401 1402 472 1403 1404 1405 473 1406 1407 1408 474 …… …… …… …… 2777 2778 2779 931 2780 - - 932 2781 - - 933 2782 - - 934 2783 - - 935 Table 1 in: "0~2783" represents the page number in the current block, indicating that there are 2784 pages in the current block.

[0028] "..." represents an incrementing page number or wordline address, which has the same shared page characteristics.

[0029] "WordLine" is a "structure" used to manipulate pages in flash memory. For example, when programming a page within a block, the corresponding wordline address must be found, and operations performed on that wordline address to program the page. As mentioned earlier, the storage association between pages in a conventional block of TLC flash memory exists in the form of shared pages. Each shared page consists of three pages: Lower Page (LP), Upper Page (UP), and Extra Page (XP).

[0030] The "-" indicates that when operating on the word line address, no programming is required for this page. For example, when operating on the word line address WordLine0, only one page needs to be programmed, i.e., only Page0 needs to be programmed. Conversely, when operating on the word line address WordLine4, three pages need to be programmed, i.e., Page4, Page5, and Page6 need to be programmed.

[0031] The technical solution of this application will be described in detail below with reference to the accompanying drawings.

[0032] Figure 1 The diagram shown is a flowchart of a binding mapping method in one embodiment of this application.

[0033] Please see Figure 1 A binding mapping method includes the following steps: Step S110: Determine the binding relationship of each plane in the flash memory.

[0034] It should be noted that, in order to adapt to today's big data era, most Flash memory is configured with multiple planes internally, and to improve Flash read and write speeds, most Flash memory supports multi-plane operations. The principle of multi-plane operations is to bind blocks in multiple planes to form a bound block. When the memory controller chip operates on the Flash for read and write operations, it operates on this bound block, thereby saving Flash read / write time.

[0035] Multi-Plane operations have prerequisites; the binding relationships between the Planes in the Flash memory must be clearly defined beforehand. Not all Planes in Flash are suitable for binding together. When Plane A is bound to Plane B, Plane B's attributes are sacrificed too much, making these two Planes unsuitable for forming a partition. In this embodiment, the binding ability of each Plane is determined by reading the number of error bits in each Plane before and after binding in the Flash memory. The binding relationship of each Plane is determined based on the change in the number of error bits before and after binding.

[0036] For example, suppose the flash memory has two planes, Plane A and Plane B. Before binding, Plane A has 50 bits / 1K of error bits, and Plane B has 55 bits / 1K of error bits. After binding, Plane A has 72 bits / 1K of error bits, and Plane B has 56 bits / 1K of error bits. Therefore, the change in the number of error bits per plane before and after binding can be calculated. ∆A = |72 - 50| = 22 bits; ∆B = |56 - 55| = 1 Bit; In this embodiment, the preset error bit change threshold is configured to 10 bits. The value of this threshold can be configured according to actual conditions; a larger value results in looser binding conditions, while a smaller value results in stricter binding conditions. Based on the preset error bit change threshold, it can be determined that Plane A and Plane B cannot perform the binding operation because the change in the number of error bits before and after binding Plane A exceeds the set threshold. In practical applications, the identifier of a Plane that cannot be bound is recorded in the Flash management file, and the storage control chip can confirm the binding relationship between Planes by reading the Flash management file.

[0037] Step S120: Read the shared page characteristic table of the flash memory.

[0038] It should be noted that the shared page characteristic table is an information table used to describe the shared page information in the block. Therefore, before the binding mapping is formally executed, the storage controller chip needs to read the shared page characteristic table stored in the Flash memory. Based on the shared page characteristic table, it can obtain information such as the WordLine address, positional relationship, write order, and consecutive writes of the shared page in the Flash memory. In this embodiment, the B58r Flash memory model is still used as an example for explanation.

[0039] Step S130: Perform binding mapping operation on each Block of the Plane with binding relationship. The binding mapping operation includes: horizontally binding the shared pages of Blocks at the same position offset, and establishing binding mapping entries according to the horizontal binding relationship of the shared pages.

[0040] It should be noted that to improve Flash read and write speeds, Flash employs Multi-Plane operations to accelerate read and write speeds. Furthermore, since the shared page characteristic table applies to every Plane, Block, and Page in Flash, the shared page distribution information is consistent for each Page at the same offset (page offset) within each Block. For example, Block0 of Plane A, Block0 of Plane B, and Block0 of Plane C each contain 2784 Pages (0~2783), and the WordLine address, positional relationship, write order, and sequential write information for the shared pages strictly adhere to the information shown in Table 1. Therefore, when the storage controller chip controls the Flash to perform Multi-Plane operations, shared pages located in different Planes (which have binding relationships) at the same offset can be horizontally bound according to the shared page type, thus achieving binding mapping.

[0041] For example, suppose the Flash configuration has 4 Planes, namely PlaneA, PlaneB, PlaneC and PlaneD. Each Plane has 100 Blocks (0~99) and each Block has 2784 Pages (0~2783). The Flash is a TLC type Flash, and the shared page characteristics are shown in Table 1.

[0042] After the storage controller chip reads the Flash management file, it finds that PlaneA, PlaneB, PlaneC, and PlaneD have a binding relationship. This means that when the storage controller chip performs a Multi-Plane operation, it operates PlaneA, PlaneB, PlaneC, and PlaneD simultaneously.

[0043] In this embodiment, firstly, the shared page type corresponding to each WordLine in the shared page characteristic table is obtained, i.e., the storage control chip obtains the content of Table 1. Then, horizontal binding is performed on the WordLine according to the shared page type, wherein: if the shared page corresponding to the WordLine only includes a single shared type, Low Page, then the Low Page is horizontally bound in the Block at the same position offset; if the shared page corresponding to the WordLine includes both Low Page and Upper Page shared page types, then the Low Page and Upper Page are horizontally bound respectively in the Block at the same position offset; if the shared page corresponding to the WordLine includes three types: Low Page, Upper Page, and Extra Page, then the Low Page, Upper Page, and Extra Page are horizontally bound respectively in the Block at the same position offset.

[0044] When performing a Multi-Plane operation, operating on WordLine0 is equivalent to operating on Page0 of a Block within each Plane. Since the shared pages corresponding to this WordLine only include the Low Page type, the Page0 of each Block (i.e., the Low Pages of Blocks at the same offset) are horizontally bound, which is equivalent to: PlaneA-Block0-Page0; PlaneB-Block0-Page0; PlaneC-Block0-Page0; PlaneD-Block0-Page0; The horizontal binding of these 4 pages completes one mapping entry, in which 4 physical pages can be mapped.

[0045] Similarly, operating on WordLine4 is equivalent to operating on Pages 4-6 of Blocks within each Plane. Since the shared pages corresponding to this WordLine include three types: Low Page, Upper Page, and Extra Page, horizontally binding Pages 4-6 of Blocks within each Plane (i.e., the Low Page, Upper Page, and Extra Page of Blocks at the same offset) is equivalent to: For Low Page, it is: PlaneA-Block0-Page4; PlaneB-Block0-Page4; PlaneC-Block0-Page4; PlaneD-Block0-Page4; For Upper Page, it is: PlaneA-Block0-Page5; PlaneB-Block0-Page5; PlaneC-Block0-Page5; PlaneD-Block0-Page5; For Extra Page, it is: PlaneA-Block0-Page6; PlaneB-Block0-Page6; PlaneC-Block0-Page6; PlaneD-Block0-Page6; The horizontal binding of these 12 pages completes 3 mapping entries, and each of these 3 mapping entries can map to 4 physical pages.

[0046] Similarly, when operating on WordLine464, it is equivalent to operating on Pages 1384-1385 of Blocks in each Plane. Since the shared pages corresponding to this WordLine include both Low Page and Upper Page types, horizontally binding Pages 1384-1385 of Blocks in each Plane (i.e., Low Pages and Upper Pages of Blocks at the same offset) is equivalent to: For Low Page, it is: PlaneA-Block0-Page1384; PlaneB-Block0-Page1384; PlaneC-Block0-Page1384; PlaneD-Block0-Page1384; For Upper Page, it is: PlaneA-Block0-Page1385; PlaneB-Block0-Page1385; PlaneC-Block0-Page1385; PlaneD-Block0-Page1385; The horizontal binding of these 8 pages completes 2 mapping entries, and each of these 2 mapping entries can map to 4 physical pages. Finally, based on the horizontal binding relationship of the shared pages, binding mapping entries are established.

[0047] As can be seen from the above examples, the technical solution of this embodiment is essentially implemented based on the shared page type and the Multi-Plane operation principle. Since the Multi-Plane operation simultaneously operates on shared pages of blocks in different Planes, these shared pages can be horizontally bound to achieve binding mapping. Unlike previous firmware code, which used a single logical page to a single physical page mapping (i.e., a single mapping entry can only map one physical page), multiple physical pages are mapped using a single mapping entry. However, this single mapping entry actually contains mapping relationships between four logical pages and four physical pages. The mapping is completed by binding these four physical pages together based on the Multi-Plane operation principle. Because these shared pages are read and written simultaneously during Multi-Plane operations, this is the core of this technical solution. Furthermore, for Flash memory, there can only be one type of mapping entry: either the mapping entry represents one logical page mapping to one physical page, or the mapping entry represents n logical pages mapping to n physical pages (n is greater than or equal to 2, and n is a positive integer). There cannot be more than two mapping types in the same Flash memory.

[0048] Step S140: Based on the binding mapping entries, create and store the L2P table.

[0049] It's important to note that the L2P table is a summary of all mapping relationships currently in the Flash memory. When the memory controller chip controls the Flash to perform a write operation, the established binding mapping entries are recorded in the L2P table. When the memory controller chip controls the Flash to perform a read operation, it needs to read the mapping entries recorded in the L2P table to retrieve the data stored in the physical page, and finally feed the data back to the host for output.

[0050] Figure 2 The diagram shown is a flowchart of a binding mapping method in another embodiment of this application.

[0051] Please see Figure 2 A binding mapping method, characterized by comprising the following steps: Step S210: Determine the binding relationship of each plane in the flash memory.

[0052] Please refer to the description of step S110 for step S210; it will not be repeated here.

[0053] Step S220: Read the shared page characteristic table of the flash memory.

[0054] Please refer to the description of step S120 for step S220; it will not be repeated here.

[0055] Step S230: Identify the single-bit block of the flash memory, and do not perform binding mapping operation on the pages in the single-bit block.

[0056] It should be noted that before establishing the binding mapping, it is necessary to identify which blocks in the Flash are single-bit blocks (SLC blocks) or multi-bit blocks (TLC blocks). For SLC blocks, the binding mapping method is not used because SLC blocks are usually managed as management blocks, which require very high read / write speeds and stability. Although TLC blocks have higher capacity, their read / write speeds and stability are far inferior to SLC blocks. Therefore, for SLC blocks, the technical solution of this embodiment does not allow the use of binding mapping to process these blocks.

[0057] Step S240: Perform binding mapping operation on each Block of the Plane with binding relationship. The binding mapping operation includes: horizontally binding the shared pages of Blocks at the same position offset, and establishing binding mapping entries according to the horizontal binding relationship of the shared pages.

[0058] Please refer to the description of step S130 for step S240, which will not be repeated here.

[0059] Step S250: Based on the binding mapping entries, create and store the L2P table.

[0060] Please refer to the description of step S140 for step S250, which will not be repeated here.

[0061] Corresponding to the foregoing method embodiments, this application also provides a binding mapping device and corresponding embodiments.

[0062] Figure 3 The diagram shown is a structural schematic of a binding mapping device in one embodiment of this application.

[0063] Please see Figure 3 A binding mapping device 300 includes: a binding module 310, a reading module 320, a mapping module 330, and a storage module 340. Wherein: The binding module 310 is used to determine the binding relationship between each plane in the flash memory.

[0064] Furthermore, in this embodiment, the binding module 310 determines the binding relationship of each Plane in the flash memory by reading the number of error bits of each Plane before and after binding, and determining the binding relationship of each Plane based on the change in the number of error bits before and after binding.

[0065] The read module 320 is used to read the shared page characteristic table of the flash memory.

[0066] The mapping module 330 is used to perform binding mapping operations on each block of a Plane with binding relationships. The binding mapping operations include: horizontally binding the shared pages of blocks at the same position offset, and establishing binding mapping entries based on the horizontal binding relationships of the shared pages.

[0067] Storage module 340 is used to build and store L2P tables based on the binding mapping entries.

[0068] It should be noted that the binding mapping method implemented by the binding mapping device disclosed in this embodiment is the same as that in the above embodiments, and therefore will not be described in detail here. Optionally, each module and the other operations or functions described above are respectively for implementing the methods in the foregoing embodiments.

[0069] Figure 4 The diagram shown is a structural schematic of a binding mapping device in another embodiment of this application.

[0070] Please see Figure 4 A binding mapping device 300 includes: a binding module 310, a reading module 320, an identification module 350, a mapping module 330, and a storage module 340. For functional descriptions of the binding module 310, reading module 320, mapping module 330, and storage module 340, please refer to [link to relevant documentation]. Figure 3 This will not be elaborated upon here.

[0071] The identification module 350 is used to identify single-bit blocks in flash memory, and does not perform binding mapping operations on pages in single-bit blocks.

[0072] Furthermore, in this embodiment, the mapping module 330 includes: an acquisition unit 331, a mapping unit 332, and an establishment unit 333. Wherein: The acquisition unit 331 is used to acquire the shared page type corresponding to each WordLine in the shared page property table.

[0073] Mapping unit 332 is used to perform horizontal binding on WordLine according to the shared page type, wherein: If the shared page corresponding to WordLine only includes the single shared type of Low Page, then the Low Page will be horizontally bound in the Block at the same offset position.

[0074] If the shared page corresponding to WordLine includes both Low Page and Upper Page types, then the Low Page and Upper Page will be horizontally bound in the Block at the same offset position.

[0075] If the shared pages corresponding to WordLine include three types: Low Page, Upper Page, and Extra Page, then the Low Page, Upper Page, and Extra Page will be horizontally bound in the Block at the same offset position.

[0076] Unit 333 is used to create binding mapping entries based on the horizontal binding relationship of the shared page.

[0077] It should be noted that the binding mapping method implemented by the binding mapping device disclosed in this embodiment is the same as that in the above embodiments, and therefore will not be described in detail here. Optionally, each module and the other operations or functions described above are respectively for implementing the methods in the foregoing embodiments.

[0078] like Figure 5 The diagram shown is a structural schematic of a storage control chip according to an embodiment of this application.

[0079] Please refer to 5, a storage control chip 500, including the binding mapping device 300 described above.

[0080] It should be noted that the storage control chip in this embodiment, by horizontally binding shared pages of blocks at the same offset, enables shared pages of the same type in different blocks to be bound together, achieving the effect of a single mapping relationship representing multiple logical pages corresponding to multiple physical pages. This can effectively reduce the overall length of the L2P table and avoid excessive occupation of RAM space resources.

[0081] See Figure 6 Another embodiment of this application illustrates a computing electronic device 600 including a processor 610 and a memory 620.

[0082] The processor 610 may be a central processing unit (CPU), or other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc.

[0083] The general-purpose processor can be a microprocessor or any conventional processor. Memory 620 can include various types of storage units, such as system memory, read-only memory (ROM), and permanent storage devices.

[0084] The ROM can store static data or instructions required by the processor 610 or other modules of the computer. The permanent storage device can be a read-write storage device. The permanent storage device can be a non-volatile storage device that retains stored instructions and data even when the computer is powered off. In some embodiments, the permanent storage device uses a high-capacity storage device (e.g., magnetic or optical disk, flash memory) as the permanent storage device.

[0085] In other implementations, the persistent storage device can be a removable storage device (e.g., a floppy disk or optical drive). System memory can be a read-write storage device or a volatile read-write storage device, such as dynamic random access memory. System memory can store some or all of the instructions and data required by the processor during runtime.

[0086] In addition, the memory 620 may include any combination of computer-readable storage media, including various types of semiconductor memory chips (e.g., DRAM, SRAM, SDRAM, flash memory, programmable read-only memory), and disks and / or optical discs may also be used.

[0087] In some embodiments, memory 620 may include a removable storage device that is readable and / or writable, such as a laser disc (CD), a read-only digital versatile optical disc (e.g., DVD-ROM, dual-layer DVD-ROM), a read-only Blu-ray disc, an ultra-high density optical disc, a flash memory card (e.g., SD card, mini SD card, and Micro-SD card), a magnetic floppy disk, etc. Computer-readable storage media do not contain carrier waves or transient electronic signals transmitted wirelessly or via wired connections. Executable code is stored on memory 620, which, when processed by processor 610, can cause processor 610 to perform some or all of the methods described above.

[0088] Furthermore, the method according to this application can also be implemented as a computer program or computer program product, which includes computer program code instructions for performing some or all of the steps in the method described above.

[0089] Alternatively, this application may be implemented as a computer-readable storage medium (or a non-transitory machine-readable storage medium or a machine-readable storage medium) storing executable code (or computer program or computer instruction code) thereon, which, when executed by a processor of an electronic device (or server, etc.), causes the processor to perform part or all of the steps of the methods described above according to this application.

[0090] The various embodiments of this application have been described above. These descriptions are exemplary and not exhaustive, nor are they limited to the disclosed embodiments. Many modifications and variations will be apparent to those skilled in the art without departing from the scope and spirit of the described embodiments. The terminology used herein is chosen to best explain the principles, practical application, or improvement of the technology in the market, or to enable others skilled in the art to understand the embodiments disclosed herein.

Claims

1. A binding mapping method, characterized in that, include: Determine the binding relationships between the planes in the flash memory; Read the shared page characteristic table of the flash memory; For each block of the Plane with a binding relationship, a binding mapping operation is performed. The binding mapping operation includes: obtaining the shared page type corresponding to each WordLine in the shared page characteristic table; performing horizontal binding on the WordLine according to the shared page type, wherein: if the shared page corresponding to the WordLine only includes a single shared type of Low Page, then the Low Page is horizontally bound in the Block at the same position offset; if the shared page corresponding to the WordLine includes two shared page types, Low Page and Upper Page, then the Low Page and Upper Page are horizontally bound respectively in the Block at the same position offset; if the shared page corresponding to the WordLine includes three shared page types, Low Page, Upper Page and Extra Page, then the Low Page, Upper Page and Extra Page are horizontally bound respectively in the Block at the same position offset; and establishing binding mapping entries according to the horizontal binding relationship of the shared pages. Based on the binding mapping entries, an L2P table is created and stored.

2. The binding mapping method according to claim 1, characterized in that, The step of performing a binding mapping operation on each block of the Plane with a binding relationship includes: horizontally binding shared pages of the blocks at the same position offset, and before establishing a binding mapping entry based on the horizontal binding relationship of the shared pages, it further includes: Identify a single-bit block of the flash memory, and do not perform a binding mapping operation on the pages in the single-bit block.

3. The binding mapping method according to claim 1, characterized in that, Determining the binding relationship of each plane in the flash memory includes: Read the number of error bits for each plane before and after binding in the flash memory, and determine the binding relationship of each plane based on the change in the number of error bits before and after binding.

4. A binding mapping device, characterized in that, include: The binding module is used to determine the binding relationship between each plane in the flash memory; A read module is used to read the shared page characteristic table of the flash memory; The mapping module is used to perform binding mapping operations on each block of the Plane that has a binding relationship. The binding mapping operation includes: horizontally binding the shared pages of the blocks at the same position offset, and establishing binding mapping entries according to the horizontal binding relationship of the shared pages. The storage module is used to build and store an L2P table based on the binding mapping entries; The mapping module includes: The acquisition unit is used to acquire the shared page type corresponding to each WordLine in the shared page characteristic table; A mapping unit is used to perform lateral binding on the WordLine according to the shared page type, wherein: If the shared page corresponding to the WordLine only includes the single shared type of Low Page, then the Low Page will be horizontally bound in the Block at the same offset position; If the shared page corresponding to the WordLine includes two types of shared pages, Low Page and Upper Page, then the Low Page and Upper Page will be horizontally bound in the Block at the same offset position. If the shared page corresponding to the WordLine includes three types of shared pages: Low Page, Upper Page, and Extra Page, then the Low Page, Upper Page, and Extra Page will be horizontally bound in the Block at the same offset position. The establishment unit is used to establish binding mapping entries based on the horizontal binding relationship of the shared page.

5. The binding mapping device according to claim 4, characterized in that, Also includes The identification module is used to identify a single-bit block of the flash memory and not perform a binding mapping operation on the pages in the single-bit block.

6. The binding mapping device according to claim 4, characterized in that, The binding module is used to determine the binding relationship between each plane in the flash memory, including: Read the number of error bits for each plane before and after binding in the flash memory, and determine the binding relationship of each plane based on the change in the number of error bits before and after binding.

7. A storage control chip, comprising: The binding mapping apparatus according to any one of claims 4 to 6.

8. A computer-readable storage medium, characterized in that, The device stores executable code that, when executed by a processor of an electronic device, causes the processor to perform the binding mapping method as described in any one of claims 1 to 3.

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