Phased array antenna phase resolving method based on subarray decomposition and reference axis decomposition

Abstract

The application relates to a phased array antenna phase calculation method based on subarray decomposition and reference axis decomposition. Through reference axis decomposition, a pre-stored single-axis phase difference table is stored, and an array surface is divided through subarray decomposition, so that table lookup and addition are used to replace real-time multiplication, the use of multipliers is significantly reduced, the calculation time complexity is optimized from O(N<2>) to O(N / M), the parallel processing efficiency is improved, a subarray level modular design is supported, a multi-chip cooperative architecture is adapted, single-chip resource pressure is reduced, large-scale array surface calculation of a low-specification FPGA or multiple low-cost chips is realized, system cost and power consumption are effectively reduced, and the real-time, low-power and modular requirements of a phased array antenna are met.

Description

Technical Field

[0001] This application relates to the field of phased array antenna technology, and in particular to a phase calculation method for phased array antennas based on subarray decomposition and reference axis decomposition. Background Technology

[0002] Phased array antennas achieve beam pointing by controlling the phase difference of array elements. Phase calculation is the core step. Traditional methods calculate the phase difference of each array element relative to a reference element based on azimuth and off-axis angles. However, large-scale array surface calculation has significant drawbacks: serial calculation time increases quadratically with the number of array elements, while parallel calculation, although improving speed, leads to an exponential increase in hardware resource consumption such as multipliers. Furthermore, it is not adapted to the modular subarray design commonly used in phased array antennas, making it difficult to utilize multiple low-specification chips working together. Therefore, there is an urgent need for a phase calculation method that reduces the use of multipliers and improves the efficiency of parallel processing to resolve the contradiction between resource consumption and calculation speed in large-scale array surface calculation. Summary of the Invention

[0003] Therefore, it is necessary to provide a phase calculation method for phased array antennas based on subarray decomposition and reference axis decomposition to address the aforementioned technical problems.

[0004] A phase calculation method for a phased array antenna based on subarray decomposition and reference axis decomposition, the method comprising: The azimuth and off-axis angles of the received beam are used to calculate the sine and cosine values ​​of the azimuth and off-axis angles using the Cordic algorithm; Based on the sine and cosine values ​​of the azimuth and off-axis angles, as well as the half-wavelength and element spacing of the phased array antenna, the unit phase difference in the X-axis direction and the unit phase difference in the Y-axis direction of the phased array antenna are calculated respectively; wherein, the half-wavelength and element spacing of the phased array antenna are directly called in constant form in the FPGA code; For array elements in the X-axis and Y-axis directions, based on the unit phase difference in the X-axis direction and the unit phase difference in the Y-axis direction, the single-axis phase difference of each array element relative to the reference array element is pre-calculated and stored to obtain the X-axis phase difference table and the Y-axis phase difference table. The M×N phased array antenna array is divided into K×L subarrays, each subarray contains P×Q array elements, and the position of the reference array element of each subarray is determined. Using the reference element of each subarray as the origin, and based on the X-axis phase difference table and Y-axis phase difference table, the phase difference of all elements in the subarray relative to the reference element of the subarray is calculated through address lookup and addition operations. Calculate the phase difference between each subarray reference element and the whole array reference element, and then add it to the phase difference of all elements in the subarray to obtain a uniform element phase value for the whole array.

[0005] In one embodiment, the method further includes: calculating the unit phase difference of the phased array antenna in the X-axis direction based on the sine and cosine values ​​of the azimuth and off-axis angles, as well as the half-wavelength and element spacing of the phased array antenna.

[0006] in, Half wavelength For the spacing between array elements, and These represent the sine of the off-axis angle and the cosine of the azimuth angle, respectively.

[0007] In one embodiment, the method further includes: calculating the unit phase difference of the phased array antenna in the Y-axis direction based on the sine and cosine values ​​of the azimuth and off-axis angles, as well as the half-wavelength and element spacing of the phased array antenna.

[0008] in, Half wavelength For the spacing between array elements, and These represent the sine of the off-axis angle and the sine of the azimuth angle, respectively.

[0009] In one embodiment, the subarray size P×Q is uniformly divided, and the subarray reference element is fixed at the upper left corner of the subarray.

[0010] In one embodiment, the X-axis and Y-axis phase difference table is stored in the on-chip memory of the programmable logic device, supporting direct addressing and reading via coordinates x and y.

[0011] In one embodiment, during multi-channel parallel processing, the phase difference of all elements in at least one subarray is calculated simultaneously in each clock cycle.

[0012] A phase calculation device for a phased array antenna based on subarray decomposition and reference axis decomposition, the device comprising: The parameter receiving module is used to receive the azimuth and off-axis angles of the beam, and to calculate the sine and cosine values ​​of the azimuth and off-axis angles using the Cordic algorithm. The unit phase difference calculation module is used to calculate the unit phase difference of the phased array antenna in the X-axis direction and the unit phase difference in the Y-axis direction based on the sine and cosine values ​​of the azimuth and off-axis angles, as well as the half wavelength and element spacing of the phased array antenna; wherein, the half wavelength and element spacing of the phased array antenna are directly called in constant form in the FPGA code; The reference axis storage module is used to pre-calculate and store the single-axis phase difference of each array element relative to the reference array element based on the unit phase difference in the X-axis direction and the unit phase difference in the Y-axis direction, respectively, to obtain the X-axis phase difference table and the Y-axis phase difference table. The subarray partitioning module is used to divide an M×N phased array antenna array into K×L subarrays, each subarray containing P×Q array elements, and to determine the reference array element positions for each subarray. The subarray phase calculation module is used to calculate the phase difference between all elements in the subarray and the subarray reference element by taking the reference element of each subarray as the origin and using the X-axis phase difference table and Y-axis phase difference table, through address lookup and addition operations. The phase compensation module is used to calculate the phase difference between each subarray reference element and the whole array reference element, and then superimpose it onto the phase difference of all elements in the subarray to obtain a uniform element phase value for the entire array.

[0013] A computer device includes a memory and a processor, the memory storing a computer program, and the processor executing the computer program performing the following steps: The azimuth and off-axis angles of the received beam are used to calculate the sine and cosine values ​​of the azimuth and off-axis angles using the Cordic algorithm; Based on the sine and cosine values ​​of the azimuth and off-axis angles, as well as the half-wavelength and element spacing of the phased array antenna, the unit phase difference in the X-axis direction and the unit phase difference in the Y-axis direction of the phased array antenna are calculated respectively; wherein, the half-wavelength and element spacing of the phased array antenna are directly called in constant form in the FPGA code; For array elements in the X-axis and Y-axis directions, based on the unit phase difference in the X-axis direction and the unit phase difference in the Y-axis direction, the single-axis phase difference of each array element relative to the reference array element is pre-calculated and stored to obtain the X-axis phase difference table and the Y-axis phase difference table. The M×N phased array antenna array is divided into K×L subarrays, each subarray contains P×Q array elements, and the position of the reference array element of each subarray is determined. Using the reference element of each subarray as the origin, and based on the X-axis phase difference table and Y-axis phase difference table, the phase difference of all elements in the subarray relative to the reference element of the subarray is calculated through address lookup and addition operations. Calculate the phase difference between each subarray reference element and the whole array reference element, and then add it to the phase difference of all elements in the subarray to obtain a uniform element phase value for the whole array.

[0014] A computer-readable storage medium having a computer program stored thereon, the computer program performing the following steps when executed by a processor: The azimuth and off-axis angles of the received beam are used to calculate the sine and cosine values ​​of the azimuth and off-axis angles using the Cordic algorithm; Based on the sine and cosine values ​​of the azimuth and off-axis angles, as well as the half-wavelength and element spacing of the phased array antenna, the unit phase difference in the X-axis direction and the unit phase difference in the Y-axis direction of the phased array antenna are calculated respectively; wherein, the half-wavelength and element spacing of the phased array antenna are directly called in constant form in the FPGA code; For array elements in the X-axis and Y-axis directions, based on the unit phase difference in the X-axis direction and the unit phase difference in the Y-axis direction, the single-axis phase difference of each array element relative to the reference array element is pre-calculated and stored to obtain the X-axis phase difference table and the Y-axis phase difference table. The M×N phased array antenna array is divided into K×L subarrays, each subarray contains P×Q array elements, and the position of the reference array element of each subarray is determined. Using the reference element of each subarray as the origin, and based on the X-axis phase difference table and Y-axis phase difference table, the phase difference of all elements in the subarray relative to the reference element of the subarray is calculated through address lookup and addition operations. Calculate the phase difference between each subarray reference element and the whole array reference element, and then add it to the phase difference of all elements in the subarray to obtain a uniform element phase value for the whole array.

[0015] The phase calculation method for phased array antennas based on subarray decomposition and reference axis decomposition described above uses reference axis decomposition to pre-store single-axis phase difference tables and subarray decomposition to divide the array surface. It replaces real-time multiplication with table lookup and addition, significantly reducing the use of multipliers and optimizing the computation time complexity from O(N²) to O(N / M), thus improving parallel processing efficiency. At the same time, it supports subarray-level modular design, adapts to multi-chip collaborative architecture, reduces the resource pressure on a single chip, and enables large-scale array surface calculation using low-specification FPGAs or multiple low-cost chips. This effectively reduces system cost and power consumption, meeting the requirements of phased array antennas for real-time performance, low power consumption, and modularity. Attached Figure Description

[0016] Figure 1 This is a flowchart illustrating a phase calculation method for a phased array antenna based on subarray decomposition and reference axis decomposition in one embodiment. Figure 2 This is a schematic diagram of subarray partitioning in one embodiment; Figure 3 This is a schematic diagram of the selection of reference array elements in one embodiment; Figure 4This is a structural block diagram of a phase calculation device for a phased array antenna based on subarray decomposition and reference axis decomposition in one embodiment. Figure 5 This is an internal structural diagram of a computer device in one embodiment. Detailed Implementation

[0017] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application.

[0018] In one embodiment, such as Figure 1 As shown, a phase calculation method for a phased array antenna based on subarray decomposition and reference axis decomposition is provided, including the following steps: Step 102: Receive the azimuth and off-axis angles of the beam, and use the Cordic algorithm to calculate the sine and cosine values ​​of the azimuth and off-axis angles.

[0019] Step 104: Calculate the unit phase difference in the X-axis direction and the unit phase difference in the Y-axis direction of the phased array antenna based on the sine and cosine values ​​of the azimuth and off-axis angles, as well as the half wavelength and element spacing of the phased array antenna.

[0020] The half-wavelength and element spacing of the phased array antenna are directly called as constants in the FPGA code.

[0021] Step 106: For the array elements in the X-axis and Y-axis directions, pre-calculate and store the single-axis phase difference of each array element relative to the reference array element based on the unit phase difference in the X-axis direction and the unit phase difference in the Y-axis direction, and obtain the X-axis phase difference table and the Y-axis phase difference table.

[0022] In this step, the unit phase difference in the X-axis direction and the unit phase difference in the Y-axis direction are respectively expressed as: and The X-axis phase difference table and the Y-axis phase difference table are respectively represented as follows: and Therefore, the phase calculation method for array elements is as follows:

[0023] Step 108: Divide the M×N phased array antenna array into K×L subarrays, each subarray containing P×Q array elements, and determine the position of the reference array element for each subarray.

[0024] Where M = K × P, N = L × Q.

[0025] Step 110: Using the reference element of each subarray as the origin, calculate the phase difference between all elements in the subarray and the reference element of the subarray by means of address lookup and addition operation, based on the X-axis phase difference table and the Y-axis phase difference table.

[0026] Step 112: Calculate the phase difference of each subarray reference element relative to the whole array reference element, and superimpose it onto the phase difference of all elements in the subarray to obtain a uniform element phase value for the whole array.

[0027] The phase calculation method for phased array antennas based on subarray decomposition and reference axis decomposition described above uses reference axis decomposition to pre-store a single-axis phase difference table and subarray decomposition to divide the array surface. It replaces real-time multiplication with table lookup and addition, significantly reducing the use of multipliers and optimizing the computation time complexity from O(N²) to O(N / M), thus improving parallel processing efficiency. At the same time, it supports subarray-level modular design, adapts to multi-chip collaborative architecture, reduces the resource pressure on a single chip, and enables large-scale array surface calculation using low-specification FPGAs or multiple low-cost chips. This effectively reduces system cost and power consumption, meeting the requirements of phased array antennas for real-time performance, low power consumption, and modularity.

[0028] In one embodiment, the unit phase difference in the X-axis direction of the phased array antenna is calculated based on the sine and cosine values ​​of the azimuth and off-axis angles, as well as the half-wavelength and element spacing of the phased array antenna:

[0029] in, Half wavelength For the spacing between array elements, and These represent the sine of the off-axis angle and the cosine of the azimuth angle, respectively.

[0030] Based on the sine and cosine values ​​of the azimuth and off-axis angles, as well as the half-wavelength and element spacing of the phased array antenna, the unit phase difference in the Y-axis direction of the phased array antenna is calculated as follows:

[0031] in, Half wavelength For the spacing between array elements, and These represent the sine of the off-axis angle and the sine of the azimuth angle, respectively.

[0032] The formula for calculating unit phase difference requires multiple multiplications and one division. Since only the trigonometric functions of the azimuth and off-axis angles are variable, the remaining parts are fixed. Therefore, we can directly set them as constants and add them to the code to reduce the need for multiplication and division.

[0033] Specifically, typical parallel computing calculates the phase of one row of array elements at a time. For a uniform array, this takes N time (where N is the number of array elements per unit direction). This is significantly faster than serial computing. There is a significant improvement, while consuming N times the hardware resources compared to before. For phase calculation of array elements, the calculation for each element requires two multipliers and one adder. Since the values ​​of x and y are fixed, a reference axis decomposition is used. The phase difference between all array elements and the reference array element in the X and Y directions is calculated and stored. The phase calculation for each element only requires addressing and adding the stored values. This method can reduce (N... 2 -2N) multiplications.

[0034] For large-scale arrays, in engineering implementation, they are usually divided into multiple subarrays for processing. This reduces the complexity of the array and also facilitates problem analysis and maintenance. Taking an array with 1024 (32*32) arrays as an example, its subarray size is 64 (8*8), and the array diagram is as follows. Figure 2 As shown.

[0035] In practical phase control of array elements, control is usually performed on a subarray or even smaller array surface basis. Therefore, decomposing phase calculations into subarray scales offers advantages in terms of computational complexity and efficiency. The phase of a phased array element is a relative value, representing the phase deviation relative to a reference element. For each subarray, taking the element at the top left corner as a reference, the phase difference between elements in all subarrays within the entire array is consistent, thus reducing the original number of multiplications by 1 / 4. However, to ensure the phase difference between each subarray, the phase difference between the subarray reference element and the overall array reference element is added when calculating the final phase of each subarray. A schematic diagram of the reference element position is shown below. Figure 3 As shown, the gray area represents the reference element position. The number of additions required by this method is... , where M is the number of subarrays along the unit axis. Originally required As the matrix is ​​transformed into a submatrix, only one addition is needed. Each addition is used to calculate the phase of a subarray; calculating the phase of the entire array still requires... Each addition completes the compensation of the reference phase.

[0036] Using the subarray decomposition method can reduce The number of multiplications will decrease, but it will increase the number of multiplications. The number of additions. The resources required to perform one array element phase calculation are shown in Table 1.

[0037] Table 1. Resources required for one array element phase calculation

[0038] It should be understood that, although Figure 1 The steps in the flowchart are shown sequentially as indicated by the arrows, but these steps are not necessarily executed in the order indicated by the arrows. Unless otherwise specified herein, there is no strict order in which these steps are executed, and they can be performed in other orders. Figure 1 At least some of the steps in the process may include multiple sub-steps or multiple stages. These sub-steps or stages are not necessarily completed at the same time, but can be executed at different times. The execution order of these sub-steps or stages is not necessarily sequential, but can be executed in turn or alternately with other steps or at least some of the sub-steps or stages of other steps.

[0039] In one embodiment, such as Figure 4 As shown, a phase calculation device for a phased array antenna based on subarray decomposition and reference axis decomposition is provided, including: a parameter receiving module 402, a unit phase difference calculation module 404, a reference axis storage module 406, a subarray partitioning module 408, a subarray phase calculation module 410, and a phase compensation module 412, wherein: The parameter receiving module 402 is used to receive the azimuth angle and off-axis angle of the beam, and to calculate the sine and cosine values ​​of the azimuth angle and off-axis angle using the Cordic algorithm; The unit phase difference calculation module 404 is used to calculate the unit phase difference of the phased array antenna in the X-axis direction and the unit phase difference in the Y-axis direction based on the sine and cosine values ​​of the azimuth angle and the off-axis angle, as well as the half wavelength and element spacing of the phased array antenna; wherein, the half wavelength and element spacing of the phased array antenna are directly called in the FPGA code as constants; The reference axis storage module 406 is used to pre-calculate and store the single-axis phase difference of each array element relative to the reference array element based on the unit phase difference in the X-axis direction and the unit phase difference in the Y-axis direction, respectively, to obtain the X-axis phase difference table and the Y-axis phase difference table. The subarray division module 408 is used to divide the M×N phased array antenna array into K×L subarrays, each subarray containing P×Q array elements, and to determine the reference array element position of each subarray. The subarray phase calculation module 410 is used to calculate the phase difference of all elements in the subarray relative to the subarray reference element by taking the reference element of each subarray as the origin and using the X-axis phase difference table and Y-axis phase difference table, through address lookup and addition operations. The phase compensation module 412 is used to calculate the phase difference of each subarray reference element relative to the whole array reference element, and superimpose it onto the phase difference of all elements in the subarray to obtain a uniform element phase value for the whole array.

[0040] In one embodiment, the unit phase difference calculation module 304 is further configured to calculate the unit phase difference of the phased array antenna in the X-axis direction based on the sine and cosine values ​​of the azimuth and off-axis angles, as well as the half-wavelength and element spacing of the phased array antenna:

[0041] in, Half wavelength For the spacing between array elements, and These represent the sine of the off-axis angle and the cosine of the azimuth angle, respectively.

[0042] In one embodiment, the unit phase difference calculation module 304 is further configured to calculate the unit phase difference of the phased array antenna in the Y-axis direction based on the sine and cosine values ​​of the azimuth and off-axis angles, as well as the half-wavelength and element spacing of the phased array antenna:

[0043] in, Half wavelength For the spacing between array elements, and These represent the sine of the off-axis angle and the sine of the azimuth angle, respectively.

[0044] In one embodiment, the subarray size P×Q is uniformly divided, and the subarray reference element is fixed at the upper left corner of the subarray.

[0045] In one embodiment, the X-axis and Y-axis phase difference table is stored in the on-chip memory of the programmable logic device, supporting direct addressing and reading via coordinates x and y.

[0046] In one embodiment, during multi-channel parallel processing, the phase difference of all elements in at least one subarray is calculated simultaneously in each clock cycle.

[0047] Specific limitations regarding the phase calculation device for phased array antennas based on subarray decomposition and reference axis decomposition can be found in the limitations of the phase calculation method for phased array antennas based on subarray decomposition and reference axis decomposition mentioned above, and will not be repeated here. Each module in the aforementioned phase calculation device for phased array antennas based on subarray decomposition and reference axis decomposition can be implemented entirely or partially through software, hardware, or a combination thereof. These modules can be embedded in hardware or independent of the processor in a computer device, or stored in software in the memory of a computer device, so that the processor can call and execute the operations corresponding to each module.

[0048] In one embodiment, a computer device is provided, which may be a terminal, and its internal structure diagram may be as follows: Figure 5 As shown, the computer device includes a processor, memory, network interface, display screen, and input devices connected via a system bus. The processor provides computing and control capabilities. The memory includes non-volatile storage media and internal memory. The non-volatile storage media stores the operating system and computer programs. The internal memory provides an environment for the operation of the operating system and computer programs stored in the non-volatile storage media. The network interface is used for communication with external terminals via a network connection. When executed by the processor, the computer program implements a phase calculation method for a phased array antenna based on subarray decomposition and reference axis decomposition. The display screen can be a liquid crystal display (LCD) or an e-ink display. The input devices can be a touch layer covering the display screen, buttons, a trackball, or a touchpad mounted on the computer device casing, or an external keyboard, touchpad, or mouse.

[0049] Those skilled in the art will understand that Figure 5 The structure shown is merely a block diagram of a portion of the structure related to the present application and does not constitute a limitation on the computer device to which the present application is applied. Specific computer devices may include more or fewer components than those shown in the figure, or combine certain components, or have different component arrangements.

[0050] In one embodiment, a computer device is provided, including a memory and a processor, the memory storing a computer program, the processor executing the computer program to implement the steps of the method described above.

[0051] In one embodiment, a computer-readable storage medium is provided having a computer program stored thereon, which, when executed by a processor, implements the steps of the method described above.

[0052] Those skilled in the art will understand that all or part of the processes in the methods of the above embodiments can be implemented by a computer program instructing related hardware. The computer program can be stored in a non-volatile computer-readable storage medium. When executed, the computer program can include the processes of the embodiments of the above methods. Any references to memory, storage, databases, or other media used in the embodiments provided in this application can include non-volatile and / or volatile memory. Non-volatile memory may include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM), or flash memory. Volatile memory may include random access memory (RAM) or external cache memory. By way of illustration and not limitation, RAM is available in a variety of forms, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), dual data rate SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), synchronous link DRAM (SLDRAM), RAMbus direct RAM (RDRAM), direct memory bus dynamic RAM (DRDRAM), and memory bus dynamic RAM (RDRAM), etc.

[0053] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0054] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the invention patent. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this patent application should be determined by the appended claims.

Claims

1. A phase calculation method for a phased array antenna based on subarray decomposition and reference axis decomposition, characterized in that, The method includes: The azimuth and off-axis angles of the received beam are used to calculate the sine and cosine values ​​of the azimuth and off-axis angles using the Cordic algorithm; Based on the sine and cosine values ​​of the azimuth and off-axis angles, as well as the half-wavelength and element spacing of the phased array antenna, the unit phase difference in the X-axis direction and the unit phase difference in the Y-axis direction of the phased array antenna are calculated respectively; wherein, the half-wavelength and element spacing of the phased array antenna are directly called in constant form in the FPGA code; For array elements in the X-axis and Y-axis directions, based on the unit phase difference in the X-axis direction and the unit phase difference in the Y-axis direction, the single-axis phase difference of each array element relative to the reference array element is pre-calculated and stored to obtain the X-axis phase difference table and the Y-axis phase difference table. The M×N phased array antenna array is divided into K×L subarrays, each subarray contains P×Q array elements, and the position of the reference array element of each subarray is determined. Using the reference element of each subarray as the origin, and based on the X-axis phase difference table and Y-axis phase difference table, the phase difference of all elements in the subarray relative to the reference element of the subarray is calculated through address lookup and addition operations. Calculate the phase difference between each subarray reference element and the whole array reference element, and then add it to the phase difference of all elements in the subarray to obtain a uniform element phase value for the whole array.

2. The method according to claim 1, characterized in that, Based on the sine and cosine values ​​of the azimuth and off-axis angles, and the half-wavelength and element spacing of the phased array antenna, calculate the unit phase difference in the X-axis direction of the phased array antenna, including: Based on the sine and cosine values ​​of the azimuth and off-axis angles, as well as the half-wavelength and element spacing of the phased array antenna, the unit phase difference in the X-axis direction of the phased array antenna is calculated as follows: in, Half wavelength For the spacing between array elements, and These represent the sine of the off-axis angle and the cosine of the azimuth angle, respectively.

3. The method according to claim 1, characterized in that, Based on the sine and cosine values ​​of the azimuth and off-axis angles, as well as the half-wavelength and element spacing of the phased array antenna, calculate the unit phase difference in the Y-axis direction of the phased array antenna, including: Based on the sine and cosine values ​​of the azimuth and off-axis angles, as well as the half-wavelength and element spacing of the phased array antenna, the unit phase difference in the Y-axis direction of the phased array antenna is calculated as follows: in, Half wavelength For the spacing between array elements, and These represent the sine of the off-axis angle and the sine of the azimuth angle, respectively.

4. The method according to claim 1, characterized in that, The subarray size P×Q is uniformly divided, and the reference element of the subarray is fixed at the upper left corner of the subarray.

5. The method according to claim 1, characterized in that, The X-axis and Y-axis phase difference tables are stored in the on-chip memory of the programmable logic device and can be read directly by addressing the coordinates x and y.

6. The method according to any one of claims 1 to 5, characterized in that, In multi-channel parallel processing, the phase difference of all elements in at least one subarray is calculated simultaneously in each clock cycle.

7. A phase calculation device for a phased array antenna based on subarray decomposition and reference axis decomposition, characterized in that, The device includes: The parameter receiving module is used to receive the azimuth and off-axis angles of the beam, and to calculate the sine and cosine values ​​of the azimuth and off-axis angles using the Cordic algorithm. The unit phase difference calculation module is used to calculate the unit phase difference of the phased array antenna in the X-axis direction and the unit phase difference in the Y-axis direction based on the sine and cosine values ​​of the azimuth and off-axis angles, as well as the half wavelength and element spacing of the phased array antenna; wherein, the half wavelength and element spacing of the phased array antenna are directly called in constant form in the FPGA code; The reference axis storage module is used to pre-calculate and store the single-axis phase difference of each array element relative to the reference array element based on the unit phase difference in the X-axis direction and the unit phase difference in the Y-axis direction, respectively, to obtain the X-axis phase difference table and the Y-axis phase difference table. The subarray partitioning module is used to divide an M×N phased array antenna array into K×L subarrays, each subarray containing P×Q array elements, and to determine the reference array element positions for each subarray. The subarray phase calculation module is used to calculate the phase difference between all elements in the subarray and the subarray reference element, with the reference element of each subarray as the origin, based on the X-axis phase difference table and the Y-axis phase difference table, through address lookup and addition operations. The phase compensation module is used to calculate the phase difference between each subarray reference element and the whole array reference element, and then superimpose it onto the phase difference of all elements in the subarray to obtain a uniform element phase value for the entire array.

8. A computer device comprising a memory and a processor, wherein the memory stores a computer program, characterized in that, When the processor executes the computer program, it implements the steps of the method according to any one of claims 1 to 6.

9. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by a processor, it implements the steps of the method according to any one of claims 1 to 6.

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