Communication verification method and device of consumable chip, chip, equipment and storage medium

Abstract

Embodiments of the present application provide a consumable chip communication verification method and device, a chip, an equipment and a storage medium. The method comprises: receiving at least one second identification code respectively fed back by at least one slave processing unit, calculating at least one verification code based on a pre-set first identification code and the at least one second identification code, and sending each verification code to the corresponding slave processing unit for storage; receiving at least one second identification code and at least one verification code respectively fed back by at least one slave processing unit, verifying based on the first identification code, the at least one second identification code and the at least one verification code to obtain a verification result; establishing a communication connection with an image forming device and receiving a first verification key, and in the case that the verification result is a verification success, performing data transmission with the image forming device based on the first verification key. The present scheme realizes the combination of chip internal verification and communication encryption mode, constructs a multi-layer protection mechanism, and guarantees data security.

Description

Technical Field

[0001] This application relates to the field of computer technology, and in particular to a communication verification method, apparatus, chip, device and storage medium for consumable chips. Background Technology

[0002] With the deepening development of digital technology, image forming equipment has begun to be widely used in business fields such as office automation, industrial production, commercial services, and education services. Image forming equipment requires the installation of printing consumables. To identify the status of the printing consumables, a consumable chip is installed on each consumable, storing consumable status information. The image forming equipment can read the consumable status by communicating with the consumable chip.

[0003] To prevent third parties from cracking and accessing the content stored in the consumable chip, related technologies employ encrypted data transmission between the image forming device and the consumable chip. However, these methods typically use a single encryption algorithm or a fixed key, making them susceptible to data leakage or reverse engineering. This exposes the consumable chip to risks such as data tampering, illegal copying, and protocol counterfeiting, resulting in low security. Summary of the Invention

[0004] This application provides a communication verification method, device, chip, equipment, and storage medium for consumable chips. It solves the problem that related technologies are prone to data leakage or algorithm reverse engineering, leading to risks such as data tampering, illegal copying, and protocol imitation of consumable chips, resulting in low security. It effectively combines internal chip verification and communication encryption methods to build a multi-layer protection mechanism, reducing the risks of data tampering, illegal copying, and protocol imitation of consumable chips and ensuring data security.

[0005] In a first aspect, embodiments of this application provide a communication verification method for a consumable chip. The consumable chip internally comprises a main processing unit and at least one slave processing unit. The communication verification method is applied to the main processing unit, and the method includes:

[0006] The system receives at least one second identifier code fed back by the at least one slave processing unit, calculates at least one verification code based on the pre-set first identifier code and the at least one second identifier code, and sends each verification code to the corresponding slave processing unit for storage.

[0007] Receive at least one second identifier code and at least one verification code respectively fed back from the at least one processing unit, and perform verification based on the first identifier code, the at least one second identifier code and the at least one verification code to obtain a verification result;

[0008] A communication connection is established with the image forming device and a first verification key is received. If the verification result is successful, data is transmitted with the image forming device based on the first verification key.

[0009] Secondly, embodiments of this application also provide a communication verification device for consumable chips, comprising:

[0010] The configuration module is configured to receive at least one second identifier code fed back by at least one slave processing unit, calculate at least one verification code based on a pre-set first identifier code and the at least one second identifier code, and send each verification code to the corresponding slave processing unit for storage.

[0011] The verification module is configured to receive at least one second identifier code and at least one verification code respectively fed back from the at least one processing unit, and to perform verification based on the first identifier code, the at least one second identifier code and the at least one verification code to obtain a verification result;

[0012] The communication module is configured to establish a communication connection with the image forming device and receive a first verification key. If the verification result is successful, the module transmits data with the image forming device based on the first verification key.

[0013] Thirdly, embodiments of this application also provide a chip, the chip comprising:

[0014] One or more processors;

[0015] Memory, configured to store one or more programs.

[0016] When the one or more programs are executed by the one or more processors, the one or more processors implement the communication verification method for consumable chips described in the embodiments of this application.

[0017] Fourthly, embodiments of this application also provide an electronic device, which includes the chip described in embodiments of this application.

[0018] Fifthly, embodiments of this application also provide a non-volatile storage medium for storing computer-executable instructions, which, when executed by a computer processor, are configured to perform the communication verification method for the consumable chip described in embodiments of this application.

[0019] In this embodiment, the consumable chip can be configured with a main processing unit and at least one slave processing unit. During the configuration of the consumable chip, at least one verification code is calculated based on a set first identifier code and at least one second identifier code fed back by at least one slave processing unit. Each verification code is sent to the corresponding slave processing unit for storage. Independent verification information can be configured for each slave processing unit for internal verification of the consumable chip in subsequent practical applications. During the application of the consumable chip, a verification result is obtained by verifying based on the first identifier code, at least one second identifier code, and at least one verification code. This ensures the authenticity and legitimacy of the identities of each slave processing unit in the consumable chip, preventing unauthorized modules from accessing or counterfeiting or cracking the internal units of the chip. If the verification result is successful, data transmission is performed between the consumable chip and the image forming device based on the first verification key. This ensures the security of data transmission between the consumable chip and the image forming device, preventing data from being stolen or tampered with during transmission. The above scheme effectively combines internal chip verification and communication encryption methods to construct a multi-layer protection mechanism, reducing the risks of data tampering, illegal copying, and protocol imitation faced by the consumable chip, and ensuring data security. Attached Figure Description

[0020] Figure 1 A flowchart illustrating a communication verification method for a consumable chip provided in an embodiment of this application;

[0021] Figure 2 This is a schematic diagram of a communication structure between an image forming apparatus and a consumable chip, provided in an embodiment of this application.

[0022] Figure 3 A flowchart illustrating a communication verification method that includes the process of calculating multiple verification codes, provided as an embodiment of this application;

[0023] Figure 4 A flowchart of a communication verification method, including a process of performing verification to obtain a verification result, is provided as an embodiment of this application.

[0024] Figure 5 A flowchart of another communication verification method provided in this application embodiment, including a process of performing verification to obtain a verification result;

[0025] Figure 6 A flowchart of another communication verification method provided in this application embodiment, including a process of performing verification to obtain a verification result;

[0026] Figure 7 A flowchart illustrating a communication verification method that includes the process of applying a second communication key within a consumable chip, as provided in an embodiment of this application;

[0027] Figure 8 A flowchart of a communication verification method including a power-on self-verification process for consumable chips, provided for embodiments of this application;

[0028] Figure 9 A structural block diagram of a communication verification device for a consumable chip provided in an embodiment of this application;

[0029] Figure 10 This is a schematic diagram of the structure of an electronic device provided in an embodiment of this application. Detailed Implementation

[0030] The embodiments of this application will be further described in detail below with reference to the accompanying drawings and examples. It should be understood that the specific embodiments described herein are merely illustrative of the embodiments of this application and are not intended to limit the scope of the embodiments. Furthermore, it should be noted that, for ease of description, only the parts relevant to the embodiments of this application are shown in the accompanying drawings, not the entire structure.

[0031] The terms "first," "second," etc., used in the specification and claims of this application are used to distinguish similar objects and not to describe a specific order or sequence. It should be understood that such use of data can be interchanged where appropriate so that embodiments of this application can be implemented in orders other than those illustrated or described herein, and the objects distinguished by "first," "second," etc., are generally of the same class and the number of objects is not limited; for example, a first object can be one or more. Furthermore, in the specification and claims, "and / or" indicates at least one of the connected objects, and the character " / " generally indicates that the preceding and following objects are in an "or" relationship.

[0032] Figure 1 This is a flowchart illustrating a communication verification method for a consumable chip provided in an embodiment of this application. The consumable chip can communicate with an image forming device via a bus, where the image forming device can be a printer, printing press, etc. The consumable chip internally includes a main processing unit and at least one slave processing unit. Taking a plurality of slave processing units as an example, the main processing unit and different slave processing units can communicate through pre-set communication interfaces. The communication interfaces between the main processing unit and each slave processing unit can be different. By setting multiple slave processing units, the algorithms that the consumable chip needs to execute can be split and distributed to different slave processing units for execution, thereby accelerating the computation time of the original algorithm. Furthermore, third parties need to simultaneously crack multiple slave processing units to identify the complete algorithm, which increases the difficulty of cracking. Figure 2 This is a schematic diagram of a communication structure between an image forming apparatus and a consumable chip provided in an embodiment of this application. The communication methods between the image forming apparatus and the consumable chip include, but are not limited to, I... 2 C, SPI, and UART. For example... Figure 2As shown, I-type interconnects are used between the image forming apparatus 101 and the consumable chip 102, as well as within the consumable chip 102. 2 Data transmission is performed using the C-bus protocol. The consumable chip 102 includes a main processing unit 103 and two slave processing units 104. An SCL (Serial Clock Line) and an SDA (Serial Data Line) are provided between the image forming apparatus 101 and the main processing unit 103, and SCL and SDA are provided between the main processing unit 103 and each of the two slave processing units 104, respectively, to achieve serial communication.

[0033] like Figure 1 As shown, the communication verification method for this consumable chip specifically includes the following steps:

[0034] Step S101: Receive at least one second identifier code fed back by at least one slave processing unit, calculate at least one verification code based on the pre-set first identifier code and at least one second identifier code, and send each verification code to the corresponding slave processing unit for storage.

[0035] Step S101 is executed during the configuration process of the consumable chip. Developers can pre-program and pre-load raw data onto the main processing unit and at least one slave processing unit of the consumable chip. This raw data may include a first identifier code corresponding to the main processing unit and second identifier codes corresponding to each slave processing unit, used to uniquely identify different processing units. During the specific configuration process, the main processing unit can receive multiple second identifier codes fed back by multiple slave processing units. In one embodiment, the main processing unit can fuse the set first identifier code and multiple second identifier codes according to different preset calculation orders to obtain a different verification code corresponding to each slave processing unit. For example, the specific calculation formula is as follows:

[0036] Y B =x1×A + x2×B + x3×C,

[0037] Y C =x1×A + x2×C + x3×B,

[0038] Among them, Y B and Y C These are the verification codes corresponding to different processing units, A is the first identifier code, B and C are the second identifier codes corresponding to different processing units, and x1, x2 and x3 are the calculation factors set by the preset algorithm.

[0039] In one embodiment, the main processing unit can generate a random number and then perform a fusion calculation on the random number, a set first identifier, and multiple second identifiers according to different preset operation orders to obtain a different verification code for each slave processing unit. Of course, other calculation methods for generating verification codes can also be set, and this application does not limit this. Therefore, the main processing unit's generation of verification codes based on the first identifier and multiple second identifiers ensures the uniqueness of the verification codes. Furthermore, it can bind the main processing unit and multiple slave processing units; replacing any one of the processing units will result in different verification codes, making it difficult for the consumable chip to be easily disassembled and cracked.

[0040] Step S102: Receive at least one second identifier code and at least one verification code respectively fed back from the processing unit, and perform verification based on the first identifier code, at least one second identifier code and at least one verification code to obtain a verification result.

[0041] After the consumable chip completes the configuration process, it is installed in the image forming device for application. Steps S102 and S103 are executed during the application process. In a specific application process, after the consumable chip is powered on, the main processing unit can receive at least one second identifier code and at least one verification code fed back by at least one slave processing unit, and perform verification to obtain a verification result. In one embodiment, a calculation result corresponding to each slave processing unit can be obtained by calculating based on the first identifier code and at least one second identifier code according to a preset calculation rule, and the calculation result corresponding to each slave processing unit can be compared with the verification code to determine whether each slave processing unit passes the verification. The preset calculation rule is the same as the calculation rule used when generating the original verification code. In another embodiment, a calculation result corresponding to each slave processing unit can be obtained by calculating based on the first identifier code, the second identifier code corresponding to each slave processing unit, and the verification code according to a preset calculation rule, and the calculation result corresponding to each slave processing unit can be compared with the set reference calculation result to determine whether each slave processing unit passes the verification. Of course, other verification methods can also be set, which are not limited in this application.

[0042] Step S103: Establish a communication connection with the image forming device and receive the first verification key. If the verification result is successful, transmit data with the image forming device based on the first verification key.

[0043] After completing its internal verification process, the consumable chip can establish a communication connection with the image forming device and receive its transmitted first verification key. This first verification key is used for encryption and decryption operations during communication between the main processing unit and the image forming device, and may specifically include one or more key data items. If the verification result is successful, the identity verification between the main processing unit and at least one slave processing unit is considered successful. Based on this first verification key, effective data transmission can then be performed with the image forming device, allowing the consumable chip to pass the verification of the image forming device and perform subsequent operations such as printing.

[0044] Optionally, if the verification fails, the first verification key is modified to obtain a second verification key, and data is transmitted with the image forming device based on the second verification key. This prevents the consumable chip from passing the verification by the image forming device, ensuring the security of the consumable chip and increasing the complexity of third-party analysis and cracking.

[0045] Optionally, if the verification fails, each verification code stored in the processing unit can be deleted or modified. This locks the consumable chip, preventing it from passing verification during subsequent power-ups and reducing the success rate of third-party forced cracking.

[0046] As described above, the consumable chip can be configured with a main processing unit and at least one slave processing unit. During the configuration of the consumable chip, at least one verification code is calculated based on a set first identifier code and at least one second identifier code fed back by at least one slave processing unit. Each verification code is then sent to the corresponding slave processing unit for storage. Independent verification information can be configured for each slave processing unit for internal verification of the consumable chip during subsequent practical applications. During the application of the consumable chip, verification results are obtained based on the first identifier code, at least one second identifier code, and at least one verification code. This ensures the authenticity and legitimacy of the identities of each slave processing unit within the consumable chip, preventing unauthorized modules from accessing or counterfeiting / cracking the chip's internal units. If the verification result is successful, data transmission is performed with the image forming device based on the first verification key. This ensures the security of data transmission between the consumable chip and the image forming device, preventing data theft or tampering during transmission. This scheme effectively combines internal chip verification and communication encryption methods to construct a multi-layered protection mechanism, reducing the risks of data tampering, illegal copying, and protocol imitation faced by the consumable chip, thus ensuring data security.

[0047] Figure 3 This is a flowchart illustrating a communication verification method, including the process of calculating multiple verification codes, provided as an embodiment of this application. Figure 3 As shown, the specific steps include the following:

[0048] Step S201: Receive multiple second identifier codes fed back by multiple processing units respectively.

[0049] Step S202: Calculate the pre-generated random number, the pre-set first identifier code, and multiple second identifier codes according to different preset operation orders to obtain multiple verification codes corresponding to multiple processing units, and send each verification code to the corresponding processing unit for storage.

[0050] In one embodiment, the specific calculation formula is as follows:

[0051] Y B = x1×R1×A + x2×R1×B + x3×R1×C,

[0052] Y C =x1×R1×A+x2×R1×C+x3×R1×B,

[0053] Among them, Y B and Y C These are the verification codes corresponding to different processing units, R1 is a random number, A is the first identifier code, B and C are the second identifier codes corresponding to different processing units, and x1, x2 and x3 are the calculation factors set by the preset algorithm.

[0054] In another embodiment, the specific calculation formula is as follows:

[0055] Y B =x1×R1×A+x2×R2×B+x3×R3×C,

[0056] Y C =x1×R1×A+x2×R2×C+x3×R3×B,

[0057] Among them, Y B and Y C These are the verification codes corresponding to different processing units, where R1, R2, and R3 are random numbers, A is the first identifier, B and C are the second identifiers corresponding to different processing units, and x1, x2, and x3 are calculation factors set by the preset algorithm. Of course, other calculation methods for generating verification codes can also be set, which are not limited in this application.

[0058] Step S203: Receive multiple second identifier codes and multiple verification codes fed back from multiple processing units respectively, and perform verification based on the first identifier code, multiple second identifier codes and multiple verification codes to obtain the verification result.

[0059] Step S204: Establish a communication connection with the image forming device and receive the first verification key. If the verification result is successful, transmit data with the image forming device based on the first verification key.

[0060] As described above, by combining pre-generated random numbers, set first identifier codes, and multiple second identifier codes to calculate according to different preset operation orders, it can be ensured that the verification code of each processing unit is determined by the corresponding second identifier code and the independent operation order, avoiding verification code conflicts or duplication between different processing units. Furthermore, by adding random numbers, the verification code can be made unpredictable, thereby improving the security of the verification code.

[0061] Figure 4 This is a flowchart illustrating a communication verification method, including a process of performing verification to obtain a verification result, provided as an embodiment of this application. Figure 4 As shown, the specific steps include the following:

[0062] Step S301: Receive multiple second identifier codes fed back by multiple slave processing units respectively, calculate multiple verification codes based on the pre-set first identifier code and multiple second identifier codes, and send each verification code to the corresponding slave processing unit for storage.

[0063] Step S302: Receive multiple second identification codes and multiple verification codes fed back from multiple processing units respectively.

[0064] Step S303: Calculate the first identifier, multiple second identifiers, and pre-generated random numbers according to different preset operation orders to obtain multiple first calculation results corresponding to multiple processing units respectively; compare the first calculation result corresponding to each processing unit with the verification code; if the corresponding first calculation result and the verification code are consistent, determine the verification result as successful; if the corresponding first calculation result and the verification code are inconsistent, determine the verification result as unsuccessful.

[0065] Since the first calculation result needs to be compared with the verification code for consistency, the specific calculation process for the first calculation result is the same as the calculation process for generating the verification code during the configuration process. For details, please refer to the aforementioned content on generating the verification code; it will not be repeated here. By determining whether the first calculation result and the verification code are consistent, the main processing unit can confirm whether each slave processing unit has passed the verification.

[0066] Step S304: Establish a communication connection with the image forming device and receive the first verification key. If the verification result is successful, transmit data with the image forming device based on the first verification key.

[0067] As described above, by calculating the first identifier, multiple second identifiers, and pre-generated random numbers according to different preset operation orders, a first calculation result can be obtained for comparison with the verification code, thereby effectively verifying whether each processing unit is legitimate and providing accurate verification results.

[0068] Figure 5 A flowchart illustrating another communication verification method provided in this application, including a process of performing verification to obtain a verification result. For example... Figure 5 As shown, the specific steps include the following:

[0069] Step S401: Receive at least one second identifier code fed back by at least one slave processing unit, calculate at least one verification code based on the pre-set first identifier code and at least one second identifier code, and send each verification code to the corresponding slave processing unit for storage.

[0070] Step S402: Receive at least one second identifier code and at least one verification code respectively fed back from the processing unit.

[0071] Step S403: Parse each verification code according to the preset calculation rules to obtain the second calculation result; compare the second calculation result and the second identification code corresponding to each processing unit; if the corresponding second calculation result and the second identification code are consistent, determine the verification result as successful; if the corresponding second calculation result and the second identification code are inconsistent, determine the verification result as unsuccessful.

[0072] In the specific configuration process, the verification code corresponding to each processing unit can be calculated by applying a specific operation rule to the corresponding second identifier code. The preset operation rule in the application process can be the inverse operation of this specific operation rule, so that the corresponding second identifier code can be recovered from the verification code under normal circumstances. In one embodiment, the relevant formula for calculating the verification code in the configuration process can be: Y = X + R, where Y is the verification code, X is the second identifier code, and R is a random number. Correspondingly, the relevant formula for parsing the second calculation result in the application process can be: Y′ = YR, where Y′ is the second calculation result, Y is the verification code, and R is a random number. In one embodiment, assuming that both the second identifier code and the random number are 8 bits, the specific operation rule for calculating the verification code in the configuration process can be: Y = (X << 8 | R), where Y is the verification code, X is the second identifier code, and R is a random number, with the second identifier code located in the high eight bits and the random number located in the low eight bits. Correspondingly, the preset operation rule for parsing the second calculation result in the application process can be: Y′ = Y >> 8, where Y′ is the second calculation result and Y is the verification code. Of course, other preset calculation rules can be set, which are not limited here. By judging whether the second calculation result and the second identifier are consistent, the main processing unit can confirm whether each slave processing unit has passed the verification.

[0073] Step S404: Establish a communication connection with the image forming device and receive the first verification key. If the verification result is successful, transmit data with the image forming device based on the first verification key.

[0074] As described above, by parsing each verification code according to preset calculation rules to obtain the second calculation result, the verification code can be reverse-converted to obtain the second calculation result for comparison with the second identifier code, thereby effectively verifying whether each processing unit is legal and providing accurate verification results.

[0075] Figure 6 A flowchart illustrating another communication verification method provided in this application, including a process of performing verification to obtain a verification result. For example... Figure 6 As shown, the specific steps include the following:

[0076] Step S501: Receive at least one second identifier code fed back by at least one slave processing unit, calculate at least one verification code based on the pre-set first identifier code and at least one second identifier code, and send each verification code to the corresponding slave processing unit for storage.

[0077] Step S502: During the application of the consumable chip, at least one second identification code and at least one verification code are received from the processing unit.

[0078] Step S503: Based on the first identifier code, the second identifier code corresponding to each processing unit, and the verification code, a third calculation result is obtained by fusion calculation; the third calculation result corresponding to each processing unit is compared with the set reference calculation result; if the corresponding third calculation result and the reference calculation result are consistent, the verification result is determined to be successful; if the corresponding third calculation result and the reference calculation result are inconsistent, the verification result is determined to be unsuccessful.

[0079] The fusion calculation can be performed by concatenating the first identifier, the second identifier corresponding to each slave processing unit, and the verification code, followed by a hash operation; or it can be a weighted fusion of the first identifier, the second identifier corresponding to each slave processing unit, and the verification code. Other calculation methods are also possible and are not limited in this application. By determining whether the third calculation result is consistent with the reference calculation result, the main processing unit can confirm whether each slave processing unit has passed the verification.

[0080] Step S504: Establish a communication connection with the image forming device and receive the first verification key. If the verification result is successful, transmit data with the image forming device based on the first verification key.

[0081] As described above, by performing a fusion calculation based on the first identifier, the second identifier corresponding to each processing unit, and the verification code, a third calculation result can be obtained for comparison with the reference calculation result, thereby effectively verifying whether each processing unit is legitimate and providing an accurate verification result.

[0082] Figure 7 This is a flowchart illustrating a communication verification method that includes a process of applying a second communication key within a consumable chip, as provided in an embodiment of this application. Figure 7 As shown, the specific steps include the following:

[0083] Step S601: Receive at least one second identifier code fed back by at least one slave processing unit, calculate at least one verification code based on the pre-set first identifier code and at least one second identifier code, and send each verification code to the corresponding slave processing unit for storage.

[0084] Step S602: Receive at least one second identifier code and at least one verification code respectively fed back from the processing unit, and perform verification based on the first identifier code, at least one second identifier code and at least one verification code to obtain a verification result.

[0085] Step S603: Establish a communication connection with the image forming device and receive the first verification key. If the verification result is successful, transmit data with the image forming device based on the first verification key.

[0086] Step S604: Generate a second communication key based on the first verification key and the first communication key pre-generated during the configuration process, and transmit data with at least one slave processing unit based on the second communication key.

[0087] In the specific configuration process, the main processing unit can pre-generate and store a first communication key. In the specific application process, the main processing unit can generate a second communication key based on the first verification key and the first communication key. The second communication key is used for encryption and decryption operations in the communication process between the main processing unit and the slave processing unit.

[0088] As described above, the main processing unit can be pre-set with a first communication key, and after being installed on different image forming devices, it can generate different second communication keys based on the first verification key provided by the image forming device, thereby increasing the complexity of cracking the communication between the main processing unit and the slave processing unit.

[0089] Figure 8 This is a flowchart illustrating a communication verification method that includes a power-on self-verification process for a consumable chip, as provided in an embodiment of this application. Figure 8 As shown, the specific steps include the following:

[0090] Step S701: Receive at least one second identifier code fed back by at least one slave processing unit, calculate at least one verification code based on the pre-set first identifier code and at least one second identifier code, and send each verification code to the corresponding slave processing unit for storage.

[0091] Step S702: After power-on, execute the self-verification algorithm to obtain the first verification result; receive the second verification results fed back by multiple processing units after executing the self-verification algorithm respectively; combine the first verification result and multiple second verification results to obtain the target verification result, and compare the target verification result with the reference verification result pre-generated during the configuration process.

[0092] After the consumable chip is powered on, the main processing unit and the slave processing unit can each execute a self-verification algorithm to obtain the corresponding verification result. This self-verification algorithm can be a cyclic redundancy check, hash check, etc., on the original stored data, and is not limited thereto in this application. By combining the first verification result corresponding to the main processing unit and the second verification results of multiple slave processing units, a target verification result can be obtained, which is used to determine whether both the main processing unit and the slave processing unit have passed the self-verification. Furthermore, only if the self-verification passes will the subsequent verification process between the main processing unit and the slave processing unit continue.

[0093] Step S703: If the target verification result is consistent with the reference verification result, receive at least one second identifier code and at least one verification code respectively fed back from the processing unit, and perform verification based on the first identifier code, at least one second identifier code and at least one verification code to obtain the verification result.

[0094] Step S704: Establish a communication connection with the image forming device and receive the first verification key. If the verification result is successful, transmit data with the image forming device based on the first verification key.

[0095] As described above, by setting up a self-verification process, two things can be prevented: firstly, third parties can be prevented from bypassing the security restrictions of the consumable chip and directly extracting the raw data. If self-verification is not performed after power-on, it is considered a verification error; secondly, third parties can be prevented from disassembling or replacing the processing unit for analysis and program execution. If the processing unit is changed, the consumable chip will fail the self-verification after power-on. Thus, the security risks of the consumable chip are reduced, and data security is ensured.

[0096] Figure 9 This is a structural block diagram of a communication verification device for a consumable chip provided in an embodiment of this application. The device is configured to execute the communication verification method for the consumable chip provided in the above embodiment, and has corresponding functional modules and beneficial effects for executing the method. Figure 9 As shown, the device specifically includes:

[0097] The configuration module 201 is configured to receive at least one second identifier code fed back by at least one slave processing unit, calculate at least one verification code based on a pre-set first identifier code and at least one second identifier code, and send each verification code to the corresponding slave processing unit for storage.

[0098] Verification module 202 is configured to receive at least one second identifier code and at least one verification code respectively fed back from the processing unit, and to perform verification based on the first identifier code, at least one second identifier code and at least one verification code to obtain a verification result;

[0099] The communication module 203 is configured to establish a communication connection with the image forming device and receive a first verification key. If the verification result is successful, it transmits data with the image forming device based on the first verification key.

[0100] As described above, the consumable chip can be configured with a main processing unit and at least one slave processing unit. During the configuration of the consumable chip, at least one verification code is calculated based on a set first identifier code and at least one second identifier code fed back by at least one slave processing unit. Each verification code is then sent to the corresponding slave processing unit for storage. Independent verification information can be configured for each slave processing unit for internal verification of the consumable chip during subsequent practical applications. During the application of the consumable chip, verification results are obtained based on the first identifier code, at least one second identifier code, and at least one verification code. This ensures the authenticity and legitimacy of the identities of each slave processing unit within the consumable chip, preventing unauthorized modules from accessing or counterfeiting / cracking the chip's internal units. If the verification result is successful, data transmission is performed between the consumable chip and the image forming device based on the first verification key. This ensures the security of data transmission between the consumable chip and the image forming device, preventing data theft or tampering during transmission. This scheme effectively combines internal chip verification and communication encryption methods to construct a multi-layered protection mechanism, reducing the risks of data tampering, illegal copying, and protocol imitation faced by the consumable chip, thus ensuring data security.

[0101] In one possible embodiment, the number of processing units is multiple, the number of second identifier codes is multiple, the number of verification codes is multiple, and the configuration module 201 is specifically configured as follows:

[0102] The pre-generated random number, the pre-set first identifier, and multiple second identifiers are calculated according to different preset operation orders to obtain multiple verification codes corresponding to each processing unit.

[0103] In one possible embodiment, there are multiple processing units, multiple second identifier codes, multiple verification codes, and the verification module 202 is specifically configured as follows:

[0104] The first identifier, multiple second identifiers, and pre-generated random numbers are calculated according to different preset operation orders to obtain multiple first calculation results corresponding to each processing unit;

[0105] The first calculation result corresponding to each processing unit is compared with the verification code; if the first calculation result and the verification code are consistent, the verification result is determined to be successful; if the first calculation result and the verification code are inconsistent, the verification result is determined to be unsuccessful.

[0106] In one possible embodiment, the verification module 202 is specifically configured as follows:

[0107] Each verification code is parsed according to a preset calculation rule to obtain a second calculation result;

[0108] The second calculation result and the second identification code corresponding to each processing unit are compared; if the corresponding second calculation result and the second identification code are consistent, the verification result is determined to be successful; if the corresponding second calculation result and the second identification code are inconsistent, the verification result is determined to be unsuccessful.

[0109] In one possible embodiment, the verification module 202 is specifically configured as follows:

[0110] The third calculation result is obtained by fusing the first identifier code, the second identifier code corresponding to each processing unit, and the verification code.

[0111] The third calculation result corresponding to each processing unit is compared with the set reference calculation result; if the corresponding third calculation result and the reference calculation result are consistent, the verification result is determined to be successful; if the corresponding third calculation result and the reference calculation result are inconsistent, the verification result is determined to be unsuccessful.

[0112] In one possible embodiment, a key adjustment module is also included, configured to:

[0113] If the verification result is a verification failure, the first verification key is modified to obtain a second verification key, and data is transmitted with the image forming device based on the second verification key.

[0114] In one possible embodiment, a verification code adjustment module is also included, configured as follows:

[0115] If the verification result is a verification failure, delete or modify each verification code stored in the processing unit.

[0116] In one possible embodiment, a communication key application module is also included, configured as follows:

[0117] A second communication key is generated based on the first verification key and the first communication key pre-generated during the configuration process;

[0118] Data is transmitted with at least one slave processing unit based on the second communication key.

[0119] In one possible embodiment, the number of processing units is multiple, and a self-verification module is also included, configured as follows:

[0120] After power-on, a self-verification algorithm is executed to obtain the first verification result;

[0121] Receive the second verification results fed back by multiple processing units after each executing the self-verification algorithm;

[0122] The first verification result and multiple second verification results are combined to obtain the target verification result, and the target verification result is compared with the reference verification result pre-generated during the configuration process;

[0123] Accordingly, the verification module 202 is specifically configured as follows:

[0124] If the target verification result is consistent with the reference verification result, at least one second identification code and at least one verification code are received from the processing unit respectively.

[0125] This application also provides a chip, which includes a processor and a memory; the number of processors in the chip can be one or more. The memory, as a computer-readable storage medium, can be configured to store software programs, computer-executable programs, and modules, such as the program instructions / modules corresponding to the communication verification method of the consumable chip in this application embodiment. The processor executes various functional applications and data processing of the device by running the software programs, instructions, and modules stored in the memory, thereby implementing the aforementioned communication verification method for the consumable chip.

[0126] Figure 10 This is a schematic diagram of the structure of an electronic device provided in an embodiment of this application, such as... Figure 10 As shown, the device includes a chip 301, an input device 302, and an output device 303 as provided in the foregoing embodiments; the chip 301 may contain one or more processors 3011, and the chip 301 also includes a memory 3012. Figure 10 Taking a processor 3011 as an example; the chip 301, input device 302, and output device 303 in the device can be connected via a bus or other means. Figure 10 Taking a bus connection as an example, input device 302 can be configured to receive input digital or character information, and generate key signal inputs related to user settings and function control of the device. Output device 303 may include display devices such as a display screen.

[0127] The electronic device provided above can be used to execute the communication verification method of the consumable chip provided in any of the above embodiments, and has the corresponding functions and beneficial effects.

[0128] This application also provides a non-volatile storage medium containing computer-executable instructions. When executed by a computer processor, the computer-executable instructions are configured to perform a communication verification method for a consumable chip described in the above embodiments. The method includes: receiving at least one second identifier code fed back by at least one slave processing unit; calculating at least one verification code based on a pre-set first identifier code and at least one second identifier code; and sending each verification code to a corresponding slave processing unit for storage; receiving at least one second identifier code and at least one verification code fed back by at least one slave processing unit; performing verification based on the first identifier code, at least one second identifier code, and at least one verification code to obtain a verification result; establishing a communication connection with an image forming device and receiving a first verification key; and, if the verification result is successful, transmitting data with the image forming device based on the first verification key.

[0129] Storage medium – any type of memory device or storage device. The term “storage medium” is intended to include: mounting media, such as CD-ROM, floppy disk, or magnetic tape devices; computer system memory or random access memory, such as DRAM, DDR RAM, SRAM, EDO RAM, Rambus RAM, etc.; non-volatile memory, such as flash memory, magnetic media, or optical storage; registers or other similar types of memory elements, etc. Storage medium may also include other types of memory or combinations thereof. Furthermore, storage medium may reside in a first computer system in which the program is executed, or it may reside in a different second computer system connected to the first computer system via a network (such as the Internet). The second computer system can provide program instructions to the first computer for execution. The term “storage medium” may include two or more storage media residing in different locations (e.g., in different computer systems connected via a network). Storage medium may store program instructions (e.g., specifically implemented as a computer program) executable by one or more processors.

[0130] Of course, the computer-executable instructions provided in the embodiments of this application are not limited to the communication verification method of the consumable chip as described above, but can also perform related operations in the communication verification method of the consumable chip provided in any embodiment of this application.

[0131] It is worth noting that in the embodiments of the communication verification device for the above-mentioned consumable chip, the various units and modules included are only divided according to functional logic, but are not limited to the above division, as long as the corresponding functions can be achieved; in addition, the specific names of each functional unit are only for easy differentiation and are not configured to limit the protection scope of the embodiments of this application.

[0132] It should be noted that the numbering of each step in this solution is only used to describe the overall design framework of this solution and does not indicate a necessary sequential relationship between the steps. As long as the overall implementation process conforms to the overall design framework of this solution, it falls within the protection scope of this solution. The order of the text in the description is not an exclusive limitation on the specific implementation process of this solution. Those skilled in the art should understand that the embodiments of this application can be provided as methods, systems, or computer program products. In a typical configuration, a computing device includes one or more processors (CPUs), input / output interfaces, network interfaces, and memory. Memory may include non-persistent memory in computer-readable media, random access memory (RAM), and / or non-volatile memory, such as read-only memory (ROM) or flash RAM. Memory is an example of computer-readable media.

[0133] It should also be noted that the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such process, method, article, or apparatus. Unless otherwise specified, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes that element.

[0134] Note that the above description is merely a preferred embodiment of the present invention and the technical principles employed. Those skilled in the art will understand that the present invention is not limited to the specific embodiments described herein, and various obvious changes, readjustments, and substitutions can be made without departing from the scope of protection of the present invention. Therefore, although the present invention has been described in detail through the above embodiments, the present invention is not limited to the above embodiments, and may include many other equivalent embodiments without departing from the concept of the present invention, the scope of which is determined by the scope of the appended claims.

Claims

1. A communication verification method for a consumable chip, characterized in that, The consumable chip internally comprises a main processing unit and at least one slave processing unit. The communication verification method is applied to the main processing unit, and the method includes: During the configuration process, at least one second identifier code is received from the at least one slave processing unit, at least one verification code is calculated based on the pre-set first identifier code and the at least one second identifier code, and each verification code is sent to the corresponding slave processing unit for storage. During application, at least one second identifier code and at least one verification code are received from the at least one processing unit, and a verification result is obtained based on the first identifier code, the at least one second identifier code and the at least one verification code; a communication connection is established with the image forming device and a first verification key is received; if the verification result is successful, data is transmitted with the image forming device based on the first verification key.

2. The communication verification method for consumable chips according to claim 1, characterized in that, The number of processing units is multiple, the number of second identifier codes is multiple, the number of verification codes is multiple, and the calculation of at least one verification code based on a pre-set first identifier code and at least one second identifier code includes: The pre-generated random number, the pre-set first identifier, and multiple second identifiers are calculated according to different preset operation orders to obtain multiple verification codes corresponding to the multiple processing units.

3. The communication verification method for consumable chips according to claim 1, characterized in that, The number of processing units is multiple, the number of second identifier codes is multiple, the number of verification codes is multiple, and the verification result is obtained based on the first identifier code, the at least one second identifier code, and the at least one verification code, including: The first identifier, multiple second identifiers, and pre-generated random numbers are calculated according to different preset operation orders to obtain multiple first calculation results corresponding to the multiple processing units respectively; The first calculation result and the verification code corresponding to each processing unit are compared; if the first calculation result and the verification code are consistent, the verification result is determined to be successful; if the first calculation result and the verification code are inconsistent, the verification result is determined to be unsuccessful.

4. The communication verification method for consumable chips according to claim 1, characterized in that, The verification result obtained based on the first identifier, the at least one second identifier, and the at least one verification code includes: Each verification code is parsed according to a preset calculation rule to obtain a second calculation result; The second calculation result and the second identification code corresponding to each processing unit are compared; if the corresponding second calculation result and the second identification code are consistent, the verification result is determined to be successful; if the corresponding second calculation result and the second identification code are inconsistent, the verification result is determined to be unsuccessful.

5. The communication verification method for consumable chips according to claim 1, characterized in that, The verification result obtained based on the first identifier, the at least one second identifier, and the at least one verification code includes: A third calculation result is obtained by fusing the first identifier code, the second identifier code corresponding to each of the processing units, and the verification code. The third calculation result corresponding to each processing unit is compared with the set reference calculation result; if the corresponding third calculation result and the reference calculation result are consistent, the verification result is determined to be successful; if the corresponding third calculation result and the reference calculation result are inconsistent, the verification result is determined to be unsuccessful.

6. The communication verification method for consumable chips according to claim 1, characterized in that, After establishing a communication connection with the image forming device and receiving the first verification key, the method further includes: If the verification result is a verification failure, the first verification key is modified to obtain a second verification key, and data is transmitted with the image forming device based on the second verification key.

7. The communication verification method for consumable chips according to claim 1, characterized in that, After establishing a communication connection with the image forming device and receiving the first verification key, the method further includes: If the verification result is a verification failure, the verification code stored in each of the processing units is deleted or modified.

8. The communication verification method for consumable chips according to claim 1, characterized in that, After receiving the first verification key, the process also includes: A second communication key is generated based on the first verification key and the first communication key pre-generated during the configuration process; Data is transmitted with the at least one slave processing unit based on the second communication key.

9. The communication verification method for consumable chips according to claim 1, characterized in that, The number of slave processing units is multiple, and before receiving at least one second identification code and at least one verification code respectively fed back by the at least one slave processing unit, the method further includes: After power-on, a self-verification algorithm is executed to obtain the first verification result; Receive the second verification result fed back by the multiple processing units after they have executed the self-verification algorithm respectively; The first verification result and multiple second verification results are combined to obtain the target verification result, and the target verification result is compared with the reference verification result pre-generated during the configuration process; Accordingly, receiving at least one second identifier and at least one verification code respectively fed back from the at least one processing unit includes: If the target verification result is consistent with the reference verification result, at least one second identifier code and at least one verification code are received from the at least one processing unit respectively.

10. A communication verification device for a consumable chip, characterized in that, include: The configuration module is configured to receive at least one second identifier code fed back by at least one processing unit during the configuration process, calculate at least one verification code based on a pre-set first identifier code and the at least one second identifier code, and send each verification code to the corresponding processing unit for storage. The verification module is configured to receive at least one second identifier code and at least one verification code respectively fed back from the at least one processing unit during the application process, and perform verification based on the first identifier code, the at least one second identifier code and the at least one verification code to obtain a verification result; The communication module is configured to establish a communication connection with the image forming device and receive a first verification key during the application process, and to transmit data with the image forming device based on the first verification key if the verification result is successful.

11. A chip, the chip comprising: One or more processors; A memory configured to store one or more programs, which, when executed by one or more processors, cause the one or more processors to implement the communication verification method for the consumable chip according to any one of claims 1-9.

12. An electronic device comprising the chip of claim 11.

13. A non-volatile storage medium storing computer-executable instructions, wherein the computer-executable instructions, when executed by a computer processor, are configured to perform the communication verification method of the consumable chip according to any one of claims 1-9.

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