Impedance detection circuit, transmitter output calibration device and transmitter apparatus

Abstract

The application discloses an impedance detection circuit, a transmitter output calibration device and a transmitter equipment, and belongs to the field of testing. The impedance detection circuit comprises an interface chip and a reference detection module which are arranged on a PCB board. The interface chip has a first output pin and a second output pin, and the first output pin and the second output pin are connected with the reference detection module through PCB board wiring. The interface chip comprises a transmitter, an analog-digital conversion module, an adjustable resistance module and a readout control module. The first transmitting port of the transmitter is connected with the first output pin, and the second transmitting port is connected with the second output pin. The analog-digital conversion module is connected with the adjustable resistance module and the readout control module. The readout control module is connected with the adjustable resistance module. The interface chip is used for calculating the output path impedance based on the resolution of the analog-digital conversion module, the first data output by the readout control module, the current source voltage signal measured by the reference detection module and the known reference current.

Description

Technical Field

[0001] This application belongs to the field of testing, specifically relating to an impedance detection circuit, a transmitter output calibration device, and a transmitter device. Background Technology

[0002] Interface chips typically consist of two circuits: a transmitter and a receiver. To improve the performance of the transmitter circuit on the interface chip and eliminate differences between different interface chips, it is usually necessary to calibrate the transmitter's output impedance, output amplitude, and other characteristics. In practical applications, interface chips generally have output path impedance. This output path impedance mainly includes the contact impedance caused by soldering or pressure between the interface chip's output pins and the circuit board, as well as the circuit board trace impedance. This output path impedance causes errors in the calibration results of the transmitter's output impedance, output amplitude, and other characteristics. Therefore, it is essential to detect the output path impedance of the interface chip.

[0003] Currently, to mitigate the impact of output path impedance, related technologies typically add chip test circuitry and test pins to the transmitter section of the interface chip to directly measure the output path impedance. However, this approach requires integrating additional, bulky calibration circuitry, and the addition of chip test circuitry and test pins to the transmitter section increases the interface chip area and packaging cost. Summary of the Invention

[0004] This application provides an impedance detection circuit, a transmitter output calibration device, and a transmitter device. It directly utilizes the resolution of the analog-to-digital conversion module inside the interface chip to measure the output path impedance without the need for additional chip test pins. It features high integration and low cost.

[0005] In a first aspect, embodiments of this application provide an impedance detection circuit, including: an interface chip and a reference detection module, both disposed on a PCB board; the interface chip has a first output pin and a second output pin, and the first output pin and the second output pin are connected to the reference detection module through PCB board traces; The interface chip includes a transmitter, an analog-to-digital converter module, an adjustable resistor module, and a readout control module. The transmitter has a first transmit port and a second transmit port, the first transmit port being connected to a first output pin, and the second transmit port being connected to a second output pin. The analog-to-digital converter module has a first input port, a second input port, and an output port. The first input port is connected to the first output pin and a first terminal of the adjustable resistor module, the second input port is connected to the second output pin and a second terminal of the adjustable resistor module, and the output port is connected to the readout control module. The readout control module is connected to a third terminal of the adjustable resistor module. When the impedance detection circuit is in measurement mode, the interface chip is used to calculate the output path impedance between the interface chip and the reference detection module based on the resolution of the analog-to-digital conversion module, the first data output by the read control module, the current source voltage signal measured by the reference detection module, and the known reference current.

[0006] In a second aspect, embodiments of this application provide a transmitter output calibration device, which may include a transmitter output calibration circuit and an impedance detection circuit as described in the first aspect; The impedance detection circuit is used to measure the output path impedance between the interface chip and the reference detection module. The transmitter output calibration circuit is used to calibrate the transmitter's output parameters and correct them based on the output path impedance during the calibration process. The output parameters include at least one of output impedance and output amplitude.

[0007] Thirdly, embodiments of this application provide a transmitter device that may include a transmitter output calibration device as described in the second aspect. The transmitter device is used to control the adjustable resistor module and the analog-to-digital converter module to be in a disconnected state after the transmitter's output parameters have been calibrated, so that the transmitter can work normally.

[0008] In this embodiment, the impedance detection circuit includes an interface chip and a reference detection module, both mounted on a PCB board. The interface chip has a first output pin and a second output pin, which are connected to the reference detection module via PCB board traces. The interface chip includes a transmitter, an analog-to-digital converter (ADC), an adjustable resistor module, and a readout control module. The transmitter has a first transmission port and a second transmission port, with the first transmission port connected to the first output pin and the second transmission port connected to the second output pin. The ADC has a first input port, a second input port, and an output port. The first input port is connected to the first output pin and the first terminal of the adjustable resistor module, the second input port is connected to the second output pin and the second terminal of the adjustable resistor module, and the output port is connected to the readout control module. The readout control module is connected to the third terminal of the adjustable resistor module. When the impedance detection circuit is in measurement mode, the interface chip calculates the output path impedance between the interface chip and the reference detection module based on the resolution of the ADC, the first data output by the readout control module, the current source voltage signal measured by the reference detection module, and the known reference current. In this way, since the output path impedance between the interface chip and the reference detection module can be obtained based on the resolution of the analog-to-digital conversion module, the first data output by the readout control module, the current source voltage signal measured by the reference detection module, and the known reference current, the output path impedance can be measured directly using the resolution of the analog-to-digital conversion module inside the interface chip. There is no need to add additional chip test pins, resulting in high integration and low cost. Attached Figure Description

[0009] Figure 1 A schematic structural diagram of the impedance detection circuit provided in some embodiments of this application; Figure 2 A schematic structural diagram of the impedance detection circuit provided in some embodiments of this application; Figure 3 A schematic structural diagram of the impedance detection circuit provided in some embodiments of this application; Figure 4-1 A schematic structural diagram of the impedance detection circuit provided in some embodiments of this application; Figure 4-2 A schematic structural diagram of the impedance detection circuit provided in some embodiments of this application; Figure 5 A schematic structural diagram of the impedance detection circuit provided in some embodiments of this application; Figure 6 Schematic structural diagram of a transmitter output calibration device provided in some embodiments of this application; Figure 7 A schematic structural diagram of a transmitter device provided for some embodiments of this application.

[0010] Explanation of reference numerals in the attached figures: 10 - Impedance detection circuit; 100 - Interface chip; TXP - First output pin of interface chip; TXN - Second output pin of interface chip; 110 - Transmitter; TX+ - First transmit port of transmitter; TX - Second transmit port of transmitter; 120 - Analog-to-digital converter module; A1 - First input port of analog-to-digital converter module; A2 - Second input port of analog-to-digital converter module; A3 - Output port of analog-to-digital converter module; 130 - Readout control module; 131 - Sampling and storage circuit; 132 - Data comparison circuit; 133 - Logic control circuit; R SA - Adjustable resistor module; 140- First switching module; 200- Reference detection module; 210- Current source; R P - Output path impedance between interface chip and reference detection module; R1 - Contact impedance of first output pin TXP; R2 - Trace impedance of first output pin TXP on the circuit board; R3 - Contact impedance of second output pin TXN; R4 - Trace impedance of second output pin TXN on the circuit board; 220 - Analog-to-digital converter chip; B1 - First input pin of analog-to-digital converter chip; B2 - Second input pin of analog-to-digital converter chip; 300 - Second switching module; 20 - Transmitter output calibration circuit; 600 - Transmitter output calibration device; 700 - Transmitter equipment. Detailed Implementation

[0011] The technical solutions of the embodiments of this application will be clearly described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this application. All other embodiments obtained by those skilled in the art based on the embodiments of this application are within the scope of protection of this application.

[0012] The terms "first," "second," etc., used in the specification and claims of this application are used to distinguish similar objects and not to describe a specific order or sequence. It should be understood that such use of data can be interchanged where appropriate so that embodiments of this application can be implemented in orders other than those illustrated or described herein, and the objects distinguished by "first," "second," etc., are generally of the same class and the number of objects is not limited; for example, a first object can be one or more. Furthermore, in the specification and claims, "and / or" indicates at least one of the connected objects, and the character " / " generally indicates that the preceding and following objects are in an "or" relationship.

[0013] The terminology used in the implementation section of this application is for the purpose of explaining specific embodiments of this application only, and is not intended to limit this application.

[0014] The terminology used in the embodiments of this application will be explained below.

[0015] Interface Chip: An interface chip is an Ethernet chip with data transmission and reception capabilities. An interface chip typically consists of two circuits: a transmitter and a receiver. To improve the performance of the transmitter circuit on the interface chip and to eliminate differences between different interface chips, it is usually necessary to calibrate the output impedance, output amplitude, and other characteristics of the transmitter circuit. The output path impedance R generated by the interface chip on the circuit board... P This may affect the accuracy of the calibration results.

[0016] Output path impedance R P When the interface chip has a first output pin TXP and a second output pin TXN, the output path impedance R P It can be composed of the contact impedance R1 corresponding to the first output pin TXP, the trace impedance R2 corresponding to the first output pin TXP on the circuit board, the contact impedance R3 corresponding to the second output pin TXN, and the trace impedance R4 corresponding to the second output pin TXN on the circuit board.

[0017] Transmitter: This is a functional module inside the interface chip that transmits signals at a certain frequency.

[0018] Analog-to-digital converter module: This is a functional module inside the interface chip that converts the transmitted signal from an analog signal to a digital signal.

[0019] The resolution of an analog-to-digital converter (ADC) module is the smallest voltage signal that the ADC module can quantize. For example, an 8-bit output ADC module with a range of 0-5V will output 0 when the input voltage is 0V and 255 when the input voltage is 5V. Increasing the output voltage by 1 actually increases the input voltage by 5V / 256 = 0.0195V. Therefore, the smallest voltage signal that the ADC module can quantize is 0.0195V, and the corresponding resolution of the ADC module is 0.0195V.

[0020] The readout control module is a functional module used to read the output data of the analog-to-digital converter (ADC). It consists of a sampling and storage circuit, a data comparison circuit, and a logic control circuit. The sampling and storage circuit synchronously samples data using the ADC's clock and stores it in a register. The data comparison circuit extracts the data from the register and compares it to the ADC's maximum range. If the extracted data is close to but less than the ADC's maximum range, the ADC is operating at its optimal accuracy and outputs data Cout. If the extracted data exceeds the ADC's maximum range, the ADC is considered to be operating in a distorted state, and signal conversion fails. When the ADC is in a distorted state, the logic control circuit adjusts the resistance of the adjustable resistor using an impedance adjustment signal until the condition of the data extracted by the data comparison circuit being close to but less than the ADC's maximum range is met, thereby improving the ADC's conversion accuracy.

[0021] Adjustable resistor module: The adjustable resistor module is set at the differential input port of the analog-to-digital converter module, and is used to adjust the conversion accuracy of the analog-to-digital converter module.

[0022] Reference detection module: The reference detection module includes a current source and an analog-to-digital converter chip, which are used to provide the environment required for detecting the output path impedance.

[0023] Current source: The current source is connected to the first output pin TXP and the second output pin TXN of the interface chip to provide a precise and constant reference current.

[0024] Analog-to-digital converter (ADC) chip: An ADC chip is a functional module external to the interface chip that tests and records voltage signals. The ADC chip is connected to a current source and the output pins of the interface chip to test and record the differential voltage signal output by the transmitter within the interface chip.

[0025] The impedance detection circuit provided in this application will be described in detail below with reference to the accompanying drawings, through specific embodiments and application scenarios.

[0026] Figure 1 This is a schematic structural diagram of an impedance detection circuit provided in an embodiment of this application.

[0027] like Figure 1 As shown, the impedance detection circuit 10 provided in this application embodiment may include: an interface chip 100 and a reference detection module 200; the interface chip 100 has a first output pin TXP and a second output pin TXN, and the first output pin TXP and the second output pin TXN of the interface chip 100 are connected to the reference detection module 200 through PCB board traces. Interface chip 100 may include transmitter 110, analog-to-digital converter module 120, and adjustable resistor module R. SA The transmitter 110 has a first transmit port TX+ and a second transmit port TX-. The first transmit port TX+ of the transmitter 110 is connected to the first output pin TXP of the interface chip 100, and the second transmit port TX- of the transmitter 110 is connected to the second output pin TXN of the interface chip 100. The analog-to-digital converter 120 has a first input port A1, a second input port A2, and an output port A3. The first input port A1 of the analog-to-digital converter 120 is connected to the first output pin TXP of the interface chip 100 and the adjustable resistor module R. SA The first end is connected, the second input port A2 of the analog-to-digital converter module 120 is connected to the second output pin TXN of the interface chip 100, and the adjustable resistor module R SA The second end is connected to the output port A3 of the analog-to-digital converter module 120, which is connected to the readout control module 130; the readout control module 130 is connected to the adjustable resistor module R. SA Connect to the third end; When the impedance detection circuit 10 is in the measurement state, the interface chip 100 is used to measure the resolution S of the analog-to-digital conversion module 120. AD Read the first data Cout_RSA output by the control module 130 and the current source voltage signal V measured by the reference detection module 200. DC and the known reference current I E The output path impedance R between interface chip 100 and reference detection module 200 is calculated. P .

[0028] In this embodiment, the first output pin TXP and the second output pin TXN of the interface chip 100 can be a pair of differential output ports. The first transmit port TX+ and the second transmit port TX- of the transmitter 110 can be a pair of differential transmit ports. The first input port A1 and the second input port A2 of the analog-to-digital converter module 120 can be a pair of differential input ports.

[0029] In this embodiment, when the impedance detection circuit 10 is in the measurement state, the transmitter 110 is in the off state, the reference detection module 200 provides a reference power supply, and the reference current I output by the reference detection module 200... E The signal flows sequentially through PCB traces, the first output pin TXP of interface chip 100, the first input port A1 of analog-to-digital converter module 120, the second input port A2 of analog-to-digital converter module 120, the second output pin TXN of interface chip 100, and back to the reference detection module 200 via PCB traces. Based on this, the differential voltage signal V1 of the differential input port of analog-to-digital converter module 120 can be obtained from the power supply voltage signal V.DC Subtract the output path impedance R P The corresponding voltage divider V3 represents the voltage, while the output path impedance R... P The corresponding voltage divider V3 can be determined by the known reference current I. E and the output path impedance R between interface chip 100 and reference detection module 200 P The product is represented as .

[0030] In some embodiments of this application, the resolution S of the analog-to-digital conversion module 120 is... AD This is the smallest quantized voltage signal that the analog-to-digital converter 120 can resolve. The resolution S of the analog-to-digital converter 120... AD It can be a pre-obtained, known value. When reading the first data Cout_RSA output from the control module 130, the first data Cout_RSA and the resolution S of the analog-to-digital converter module 120... AD Multiplying these signals yields the differential voltage signal at the differential input port of the analog-to-digital converter module 120. Furthermore, the output path impedance R... P It can be based on the resolution S of the analog-to-digital conversion module 120 AD The first data Cout_RSA output by the analog-to-digital converter module 120, and the current source voltage signal V measured by the reference detection module 200. DC and the reference current I output by the reference detection module 200 E get.

[0031] Thus, due to the output path impedance R between the interface chip 100 and the reference detection module 200 P It can be based on the resolution S of the analog-to-digital conversion module AD The first data Cout_RSA output by the analog-to-digital converter module, and the current source voltage signal V measured by the reference detection module 200. DC and the known reference current I E This allows for the measurement of output path impedance by directly utilizing the resolution of the analog-to-digital conversion module within the interface chip, eliminating the need for additional chip test pins. This approach offers high integration and low cost.

[0032] The impedance detection circuit provided in this application embodiment may include an interface chip and a reference detection module, both mounted on a PCB board. The interface chip has a first output pin and a second output pin, which are connected to the reference detection module via PCB board traces. The interface chip includes a transmitter, an analog-to-digital converter module, an adjustable resistor module, and a readout control module. The transmitter has a first transmission port and a second transmission port, with the first transmission port connected to the first output pin and the second transmission port connected to the second output pin. The analog-to-digital converter module has a first input port, a second input port, and an output port. The first input port is connected to the first output pin and the first end of the adjustable resistor module, the second input port is connected to the second output pin and the second end of the adjustable resistor module, and the output port is connected to the readout control module. The readout control module is connected to the third end of the adjustable resistor module. When the impedance detection circuit is in measurement mode, the interface chip is used to calculate the output path impedance between the interface chip and the reference detection module based on the resolution of the analog-to-digital converter module, the first data output by the readout control module, the current source voltage signal measured by the reference detection module, and the known reference current. In this way, since the output path impedance between the interface chip and the reference detection module can be obtained based on the resolution of the analog-to-digital conversion module, the first data output by the readout control module, the current source voltage signal measured by the reference detection module, and the known reference current, the output path impedance can be measured directly using the resolution of the analog-to-digital conversion module inside the interface chip. There is no need to add additional chip test pins, resulting in high integration and low cost.

[0033] In some specific embodiments of this application, the reference detection module 200 may include a current source 210 and an analog-to-digital converter chip 220; the first output pin TXP and the second output pin TXN are connected to the current source 210 through PCB traces; the analog-to-digital converter chip 220 has a first input pin B1 and a second input pin B2; the first input pin B1 of the analog-to-digital converter chip 220 is connected to one end of the current source 210, and the second input pin B2 of the analog-to-digital converter chip 220 is connected to the other end of the current source 210.

[0034] When the impedance detection circuit 10 is in the measurement state, the transmitter 110 is in the off state, and the current source 210 is in the on state; the current source 210 is used to output the reference current I. E The analog-to-digital converter module 120 is used to convert the first differential voltage signal V1 between the first input port A1 and the second input port A2 into a first digital voltage signal; the readout control module 130 is used to sample the first digital voltage signal to obtain first data and output the first data Cout_RSA; the analog-to-digital converter chip 220 is used to measure the current source voltage signal V across the current source 210. DC ; Interface chip 100 is used for resolution S based on analog-to-digital conversion module 120 AD The voltage value of the first differential voltage signal V1 is obtained by multiplying it with the first data Cout_RSA; based on the current source voltage signal V across the current source 210... DC The difference between the voltage value of the first differential voltage signal V1 and the voltage value of the second differential voltage signal V3 is used to obtain the third differential voltage signal value V3; based on the third differential voltage signal value V3 and the reference current I... E The ratio of the two values ​​is used to calculate the output path impedance R. P ; Wherein, the reference current I E The constant current output by the current source 210.

[0035] Among them, the resolution S of the analog-to-digital conversion module 120 AD It is a known value. The first data Cout_RSA can be binary data. For example, if the analog-to-digital converter module 120 is an 8-bit resolution analog-to-digital converter module, the first data Cout_RSA can be any binary data from 0 to 255.

[0036] Thus, the embodiments of this application can be based on V1=R P ×I E V3=V DC -V1;V3=Cout_RSA×S AD R is calculated P =[V DC - (Cout_RSA×S) AD )] / I E Because the embodiments of this application calculate the output path impedance R... P At this time, the calculation parameters given by the interface chip are used, namely the first data Cout_RSA, which is the binary data output by the analog-to-digital converter module, instead of demanding a precise quantized voltage value. This greatly reduces the design complexity of the analog-to-digital converter module inside the interface chip and can be implemented with a simple circuit architecture.

[0037] In some embodiments of this application, such as Figure 2 or Figure 3 As shown, regarding the output path impedance R P During the measurement process, the current source 210 can be a constant current source I. DC Compared to voltage sources and resistors, constant current sources I... DC It has the advantages of strong anti-noise interference capability and high precision, constant current source I DC The output reference current can be a stable current value, thereby improving the measurement output path impedance R. P The accuracy.

[0038] In some embodiments of this application, the output path impedance R P Before measurement, this embodiment of the application can first use an analog-to-digital converter chip external to the interface chip 100 to quantize the resolution S of the analog-to-digital converter module 120. AD .like Figure 2 or Figure 3 As shown, the impedance detection circuit 10 provided in this embodiment may further include an analog-to-digital converter chip 220; the analog-to-digital converter chip 220 has a first input pin B1 and a second input pin B2; the first input pin B1 of the analog-to-digital converter chip 220 is connected to one end of the current source 210, and the second input pin B2 of the analog-to-digital converter chip 220 is connected to the other end of the current source 210.

[0039] The impedance detection circuit 10 has a debugging state. When the impedance detection circuit 10 is in the debugging state, the transmitter 110 is in the on state, the current source 210 is in the off state, and the interface chip 100 is used to measure the second differential voltage signal V measured by the analog-to-digital converter chip 220. TX And by reading the second data output by the control module 130, Cout_TX is calculated to obtain the resolution S of the analog-to-digital converter module 120. AD .

[0040] In one specific embodiment, when the impedance detection circuit 10 is in the debugging state, the first input pin B1 and the second input pin B2 of the analog-to-digital converter chip 220 can obtain the second differential voltage signal V output from the first transmit port TX+ and the second transmit port TX- of the transmitter 110. TX Therefore, the analog-to-digital converter chip 220 can detect and record the second differential voltage signal V. TX The specific value.

[0041] The analog-to-digital converter module 120 is used to convert the second differential voltage signal V TX The signal is converted into a second digital voltage signal; the readout control module 130 is used to sample the second digital voltage signal to obtain the second data Cout_TX, and output the second data Cout_TX.

[0042] The interface chip 100 is used to measure the second differential voltage signal V based on the analog-to-digital converter chip 220. TX And by reading the second data output by the control module 130, Cout_TX is calculated to obtain the resolution S of the analog-to-digital converter module 120. AD .

[0043] For example, when the impedance detection circuit 10 is in the debugging state, the transmitter 110 is used to output the second differential voltage signal V. TXThe analog-to-digital converter chip 220 is used to process the second differential voltage signal V output by the transmitter 110. TX Tests are performed; the analog-to-digital converter module 120 is used to convert the second differential voltage signal V between the first input port A1 and the second input port A2 into a digital signal. TX The signal is converted into a second digital voltage signal; the readout control module 130 is used to sample the second digital voltage signal to obtain the second data Cout_TX, and output the second data Cout_TX. Among them, the resolution S of the analog-to-digital conversion module 120 AD The second differential voltage signal V TX The ratio of the second data Cout_TX.

[0044] Thus, in this embodiment of the application, the analog-to-digital converter chip 220 is used to measure and record the second differential voltage signal V output by the transmitter 110. TX And by measuring and recording the second differential voltage signal V TX And the readout control module outputs the second data Cout_TX, and the resolution S of the internal analog-to-digital converter module of the measurement and recording interface chip 100 is measured. AD .

[0045] In practical applications, due to uncalibrated transmitters and process variations between different interface chips, the voltage signal emitted by the transmitter may be too high or too low, and the offset voltage of the analog-to-digital converter (ADC) module of each interface chip is also different. To ensure the working state and accuracy of each ADC module, some embodiments of this application can use a readout control module to adjust the adjustable resistor module until the second data Cout_TX output by the ADC module is close to and less than the maximum range of the ADC module, thereby improving the conversion accuracy of the ADC module. Specifically, the readout control module 130 is also used to adjust the adjustable resistor module R. SA The resistance value is adjusted until the second data Cout_TX is less than or equal to the preset data, which is obtained based on the maximum range of the analog-to-digital converter module 120. Thus, by adjusting the adjustable resistor module R... SA The resistance value is adjusted until the second data Cout_TX output of the control module 130 is close to and less than the maximum range of the analog-to-digital converter module, thereby improving the conversion accuracy of the analog-to-digital converter module.

[0046] For example, such as Figure 3As shown, in the impedance detection circuit 10 provided in this embodiment, the readout control module 130 may include: a sampling storage circuit 131, a data comparison circuit 132, and a logic control circuit 133; the output port A3 of the analog-to-digital conversion module 120 is connected to the sampling storage circuit 131; the sampling storage circuit 131 is connected to the data comparison circuit 132; the data comparison circuit 132 is connected to the logic control circuit 133, and the logic control circuit 133 is connected to the adjustable resistor module R. SA Connect to the third end.

[0047] For example, such as Figure 3 As shown, in the impedance detection circuit 10 provided in this embodiment, the adjustable resistor module R SA An adjustable resistor module R has a first terminal, a second terminal, and a third terminal. SA The first terminal is connected to the first input port A1 of the analog-to-digital converter module 120; the adjustable resistor module R SA The second end is connected to the second input port A2 of the analog-to-digital converter module 120; the adjustable resistor module R SA The third terminal is connected to the logic control circuit 133.

[0048] When the impedance detection circuit is in the debugging state, the sampling and storage circuit 131 samples the second digital voltage signal output by the analog-to-digital converter module 120 to obtain the second data Cout_TX, and stores the second data Cout_TX in a register; the data comparison circuit 132 retrieves the second data Cout_TX from the register and compares the second data Cout_TX with preset data, wherein the preset data is obtained based on the maximum range of the analog-to-digital converter module 120; if the second data Cout_TX is less than or equal to the preset data, the second data Cout_TX is output; if the data comparison circuit 132 determines that the second data Cout_TX is greater than the preset data, the logic control circuit 133 controls the adjustable resistor module R SA The resistance value is adjusted so that the second data Cout_TX is less than or equal to the preset data.

[0049] For example, when the impedance detection circuit 10 is in the debugging state, the analog-to-digital converter module 120 is used to convert the second differential voltage signal V output from the first transmit port TX+ and the second transmit port TX- of the transmitter 110 into a digital signal. TX The data is converted into a digital signal, and the clock signal and digital signal are output to the readout control module 130. Then, the sampling and storage circuit 131 in the readout control module 130 is responsible for synchronously sampling the digital signal using the clock signal of the analog-to-digital converter module 120 to obtain the second data, and storing the second data in the register. Next, the data comparison circuit 132 is responsible for extracting the second data from the register and comparing it with the preset data.

[0050] The preset data can be determined based on the maximum range of the analog-to-digital converter module 120. For example, the maximum range of the 8-bit output analog-to-digital converter module 120 corresponds to the data 255. The preset data can be a number close to but less than 255. For example, the preset data can be 254, or it can be 250, 251, 252 or 253, etc. This application does not limit the specific value of the preset data.

[0051] When the second data Cout_TX extracted by the data comparison circuit 132 is close to but less than the preset data 254 determined based on the maximum range of the analog-to-digital converter module 120, it indicates that the analog-to-digital converter module 120 is working in the state of optimal accuracy. At this time, the analog-to-digital converter module 120 can output data Cout, that is, output the valid second data Cout_TX.

[0052] If the second data Cout_TX extracted by the data comparison circuit 132 exceeds the preset data 254 determined based on the maximum range of the analog-to-digital converter module 120, it indicates that the analog-to-digital converter module 120 is operating in a distorted state and the signal conversion function is malfunctioning.

[0053] When the analog-to-digital conversion module is in a distorted state, some embodiments of this application can utilize the logic control circuit 133 in the readout control module 130 to adjust the adjustable resistor module R. SA The resistance value is adjusted until the second data Cout_TX output by the analog-to-digital converter module 120 is close to and less than the preset data determined based on the maximum range of the analog-to-digital converter module.

[0054] Specifically, if the data comparison circuit 132 determines that the extracted second data Cout_TX is greater than the preset data, it indicates that the analog-to-digital conversion module 120 is operating in a distorted state. In this case, the logic control circuit 133 can adjust the adjustable resistor module R. SA The resistance value is adjusted until the second data Cout_TX is less than or equal to the preset data.

[0055] In this way, the logic control circuit 133 can use an impedance adjustment signal to change the adjustable resistor module R. SA The resistance value is adjusted until the condition that the second data extracted by the data comparison circuit 132 is close to but less than the maximum range of the analog-to-digital conversion module is met.

[0056] It should be noted that in some embodiments of this application, when the impedance detection circuit 10 is in the debugging state, the transmitter 110 inside the interface chip 100 starts to send a voltage signal, the current source 210 does not work, and the analog-to-digital converter chip 220 starts to test and record the voltage signal V sent by the transmitter. TXBecause the transmitter 110 is not calibrated and there are process variations between different interface chips, the voltage signal emitted by the transmitter may be too high or too low, and the offset voltage of the analog-to-digital conversion circuit of each interface chip is also different. At this time, the logic control circuit 133 of the readout control module 130, based on the received second data, uses the impedance adjustment signal to change the adjustable resistor module R... SA The resistance value is adjusted so that the second data Cout_TX output by the analog-to-digital converter (ADC) is close to and less than the maximum range of the ADC, thus improving the conversion accuracy of the ADC. At this point, the resolution S of the ADC 120 within the interface chip is calculated. AD =V TX / Cout_TX.

[0057] Thus, in this embodiment of the application, the readout control module 130 and the adjustable resistor module R are integrated within the interface chip 100. SA This ensures the working status and conversion accuracy of the analog-to-digital converter module 120, and also eliminates the need for additional calibration and zeroing processes for the module, effectively avoiding the impact of process deviations.

[0058] Furthermore, with the transmitter 110 within the interface chip 100 in normal operating condition, the logic control circuit 133 is used to control the adjustable resistor module R. SA The analog-to-digital converter module 120 is disconnected. For example, the logic control circuit 133 can use an impedance adjustment signal to adjust the adjustable resistor module R. SA The resistance value is adjusted to infinity, and the adjustable resistor module R... SA In high-impedance state, the adjustable resistor module R SA Disconnect from the first input port A1 and the second input port A2 of the analog-to-digital converter module 120 to avoid affecting the output impedance of the transmitter 110.

[0059] Furthermore, in practical applications, the impedance detection circuit provided in this application embodiment can be extended to scenarios where multiple transmitters are integrated in a single interface chip.

[0060] For example, in some embodiments of this application, such as Figure 4-1 As shown, the interface chip 100 contains multiple transmitters 110. The interface chip 100 also includes a first switching module 140, and each of the plurality of transmitters 110 is connected to the analog-to-digital conversion module 120 via the first switching module 140; each of the plurality of transmitters 110 is connected to the first output pin TXP and the second output pin TXN of the interface chip 100 via the first switching module 140. When the impedance detection circuit 10 is in the measurement state, the interface chip 100 calculates the output path impedance between the interface chip 100 and the reference detection module 200 based on the resolution of the analog-to-digital conversion module 120, the first data output by the readout control module 130, the current source voltage signal measured by the reference detection module 200, and the known reference current.

[0061] For example, in some embodiments of this application, such as Figure 4-2 As shown, in the interface chip 100, there are multiple transmitters 110. The interface chip 100 includes multiple pairs of differential output pins. Each pair of differential output pins includes a first output pin TXP and a second output pin TXN. One of the multiple transmitters 110 is connected to one pair of differential output pins in the multiple pairs of differential output pins. The interface chip 100 also includes a first switching module 140, wherein each of the plurality of transmitters 110 is connected to the analog-to-digital conversion module 120 via the first switching module 140 to obtain the output path impedance between the target differential output pin and the reference detection module 200; In the reference detection module 200, there are multiple current sources 210 and multiple analog-to-digital converter chips 220. Each pair of differential output pins in the multiple pairs of differential output pins of the interface chip 100 is connected to a current source 210, and a current source 210 is connected to an analog-to-digital converter chip 220.

[0062] The number of transmitters in the interface chip can be set according to actual needs, and this application does not impose specific restrictions on this.

[0063] For example, when the impedance detection circuit 10 is in the measurement state, the interface chip 100 calculates the output path impedance between the target differential output pin of the interface chip 100 and the reference detection module 200 based on the resolution of the analog-to-digital conversion module 120, the first data output by the readout control module 130, the current source voltage signal measured by the reference detection module 200, and the known reference current; wherein, the target differential output pin is any pair of differential output pins among multiple pairs of differential output pins.

[0064] Thus, the impedance detection circuit provided in this application embodiment can be added to the interface chip by a first switching module, which can measure the output path impedance of multiple transmitters 110 in a single interface chip through gating control.

[0065] Furthermore, in practical applications, the impedance detection circuit provided in this application embodiment can be extended to scenarios where multiple interface chips are integrated on the same circuit board.

[0066] For example, in some embodiments of this application, such as Figure 5As shown, there are multiple interface chips 100. The impedance detection circuit 10 may also include a second switching module 300. Each of the multiple interface chips 100 is connected to the reference detection module 200 via the second switching module 300 to obtain the output path impedance between the target interface chip and the reference detection module 200.

[0067] The number of interface chips can be set according to actual needs, and this application does not impose specific restrictions on this.

[0068] For example, when the impedance detection circuit 10 is in the measurement state, the target interface chip is used to calculate the output path impedance between the target interface chip and the reference detection module 200 based on the resolution of the analog-to-digital conversion module 120, the first data output by the readout control module 130, the current source voltage signal measured by the reference detection module 200, and the known reference current; wherein, the target interface chip is any one of the multiple interface chips 100.

[0069] Thus, the impedance detection circuit provided in this application embodiment can be supplemented with a second switching module, which can measure the output path impedance between any one of the multiple interface chips 100 and the reference detection module 200 through gating control.

[0070] Furthermore, the impedance detection circuit provided in this application requires fewer external hardware configurations for the interface chip and is highly versatile, making it easy to be compatible with other calibration or testing procedures of the interface chip. For example, in some embodiments of this application, the output path impedance R is calculated after completion. P Then, the output path impedance R P It can be used to improve the accuracy of transmitter output impedance, output amplitude and other circuit characteristics calibration.

[0071] Based on the same technical concept as the impedance detection circuit provided in the above embodiments, this application provides a transmitter output calibration device.

[0072] like Figure 6 As shown, the transmitter output calibration device 600 provided in this application embodiment includes a transmitter output calibration circuit 20 and an impedance detection circuit 10; The impedance detection circuit 10 is used to measure the output path impedance between the interface chip and the reference detection module. The transmitter output calibration circuit 20 is used to calibrate the output parameters of the transmitter and correct the output parameters according to the output path impedance during the calibration process; The output parameters include at least one of output impedance and output amplitude.

[0073] Thus, after the impedance detection circuit 10 completes its calculation, it outputs the path impedance R. P Subsequently, the impedance detection circuit 10 detects the output path impedance R. P It can be used to improve the accuracy of transmitter output impedance, output amplitude and other circuit characteristics calibration.

[0074] For example, in applications involving calibrating the transmitter output impedance, the output impedance can be directly subtracted from the output path impedance R. P The value is used to correct the result.

[0075] For example, in applications involving calibrating the transmitter output amplitude, the ratio of impedance voltage division can be calculated to quantify the voltage distribution caused by the output path impedance R. P The introduced voltage error is used to correct the target voltage value required for output amplitude calibration.

[0076] Furthermore, based on the same technical concept as the impedance detection circuit provided in the above embodiments, this application provides a transmitter device that may include the transmitter output calibration device provided in any of the above embodiments.

[0077] like Figure 7 As shown, the transmitter device 700 provided in this application embodiment may include the transmitter output calibration device 600 provided in any of the above embodiments.

[0078] Transmitter device 700 is used to control the adjustable resistor module R after the transmitter's output parameters have been calibrated. SA The analog-to-digital converter module 120 is disconnected to allow the transmitter to function properly.

[0079] For example, the logic control circuit 133 can use an impedance adjustment signal to adjust the adjustable resistor module R. SA The resistance value is adjusted to infinity, and the adjustable resistor module R... SA In high-impedance state, the adjustable resistor module R SA Disconnect the first input port A1 and the second input port A2 of the analog-to-digital converter module 120 to avoid affecting the output impedance of the transmitter 110, so that the transmitter can work normally.

[0080] It should be noted that the test equipment provided in this application embodiment may include the impedance detection circuit provided in any of the above embodiments, and may realize all the functions of the impedance detection circuit provided in any of the above embodiments. To avoid repetition, it will not be described again here.

[0081] It should be noted that, in this document, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes that element. Furthermore, it should be noted that the scope of the methods and apparatuses in the embodiments of this application is not limited to performing functions in the order shown or discussed, but may also include performing functions substantially simultaneously or in the reverse order, depending on the functions involved. For example, the described methods may be performed in a different order than described, and various steps may be added, omitted, or combined. Additionally, features described with reference to certain examples may be combined in other examples.

[0082] The embodiments of this application have been described above with reference to the accompanying drawings. However, this application is not limited to the specific embodiments described above. The specific embodiments described above are merely illustrative and not restrictive. Those skilled in the art can make many other forms under the guidance of this application without departing from the spirit and scope of the claims, and all of these forms are within the protection scope of this application.

Claims

1. An impedance detection circuit, characterized in that, It includes an interface chip (100) and a reference detection module (200) both mounted on a PCB board; the interface chip (100) has a first output pin TXP and a second output pin TXN, and the first output pin TXP and the second output pin TXN are connected to the reference detection module (200) through PCB board traces; The interface chip (100) includes a transmitter (110), an analog-to-digital converter (120), and an adjustable resistor module R. SA The transmitter (110) has a first transmission port TX+ and a second transmission port TX-, the first transmission port TX+ being connected to the first output pin TXP, and the second transmission port TX- being connected to the second output pin TXN; the analog-to-digital converter (120) has a first input port A1, a second input port A2, and an output port A3, the first input port A1 being connected to the first output pin TXP, and the adjustable resistor module R SA The first terminal is connected, the second input port A2 is connected to the second output pin TXN, and the adjustable resistor module R SA The second end is connected to the output port A3, which is connected to the readout control module (130); the readout control module (130) is connected to the adjustable resistor module R. SA Connect to the third end; When the impedance detection circuit is in the measurement state, the interface chip (100) is used to calculate the output path impedance between the interface chip (100) and the reference detection module (200) based on the resolution of the analog-to-digital conversion module (120), the first data output by the readout control module (130), the current source voltage signal measured by the reference detection module (200), and the known reference current. The reference detection module (200) includes a current source (210) and an analog-to-digital converter (220); the first output pin TXP and the second output pin TXN are connected to the current source (210) through PCB traces; the analog-to-digital converter (220) has a first input pin B1 and a second input pin B2; the first input pin B1 of the analog-to-digital converter (220) is connected to one end of the current source (210), and the second input pin B2 of the analog-to-digital converter (220) is connected to the other end of the current source (210).

2. The impedance detection circuit according to claim 1, characterized in that, When the impedance detection circuit is in the measurement state, the transmitter (110) is in the off state and the current source (210) is in the on state; The analog-to-digital converter module (120) is used to convert the first differential voltage signal between the first input port A1 and the second input port A2 into a first digital voltage signal; The readout control module (130) is used to sample the first digital voltage signal to obtain first data and output the first data; The analog-to-digital converter chip (220) is used to measure the current source voltage signal across the current source (210); The interface chip (100) is used to obtain the voltage value of the first differential voltage signal based on the product of the resolution of the analog-to-digital conversion module (120) and the first data; The third differential voltage signal value is obtained based on the difference between the voltage value of the current source voltage signal at both ends of the current source (210) and the voltage value of the first differential voltage signal. The output path impedance is calculated based on the ratio of the third differential voltage signal value to the reference current. The reference current is the constant current output by the current source (210).

3. The impedance detection circuit according to claim 1, characterized in that, When the impedance detection circuit is in the debugging state, the transmitter (110) is in the on state, the current source (210) is in the off state, and the interface chip (100) is used to calculate the resolution of the analog-to-digital conversion module (120) based on the second differential voltage signal measured by the analog-to-digital conversion chip (220) and the second data output by the readout control module (130).

4. The impedance detection circuit according to claim 3, characterized in that, When the impedance detection circuit is in the debugging state, the analog-to-digital converter chip (220) is used to measure the second differential voltage signal output by the transmitter (110); the analog-to-digital converter module (120) is used to convert the second differential voltage signal into a second digital voltage signal; the readout control module (130) is used to sample the second digital voltage signal to obtain second data and output the second data; the interface chip (100) is used to calculate the resolution of the analog-to-digital converter module (120) based on the ratio between the second differential voltage signal and the second data. The readout control module (130) is also used to adjust the adjustable resistor module R. SA The resistance value is adjusted until the second data output by the readout control module is less than or equal to the preset data; wherein the preset data is obtained based on the maximum range of the analog-to-digital converter module (120).

5. The impedance detection circuit according to claim 4, characterized in that, The readout control module (130) includes a sampling storage circuit (131), a data comparison circuit (132), and a logic control circuit (133); the output port A3 of the analog-to-digital converter module (120) is connected to the sampling storage circuit (131); the sampling storage circuit (131) is connected to the data comparison circuit (132); the data comparison circuit (132) is connected to the logic control circuit (133), and the logic control circuit (133) is connected to the adjustable resistor module R. SA Connect to the third end; When the impedance detection circuit is in the debugging state, the sampling storage circuit (131) is used to sample the second digital voltage signal output by the analog-to-digital conversion module (120) to obtain second data, and store the second data in a register; The data comparison circuit (132) is used to extract the second data from the register and compare the second data with the preset data. If the second data is less than or equal to the preset data, the second data is output. When the data comparison circuit (132) determines that the second data is greater than the preset data, the logic control circuit (133) is used to adjust the adjustable resistor module R. SA The resistance value is adjusted so that the second data is less than or equal to the preset data.

6. The impedance detection circuit according to claim 1, characterized in that, In the interface chip (100), there are multiple transmitters (110); the interface chip (100) includes multiple pairs of differential output pins, each pair of differential output pins including a first output pin TXP and a second output pin TXN; one of the multiple transmitters (110) is connected to one pair of differential output pins in the multiple pairs of differential output pins; The interface chip (100) further includes a first switching module (140), and each of the plurality of transmitters (110) is connected to the analog-to-digital conversion module (120) via the first switching module (140) to obtain the output path impedance between the target differential output pin and the reference detection module (200); The target differential output pin is any pair of differential output pins among multiple pairs of differential output pins.

7. The impedance detection circuit according to claim 1, characterized in that, The number of interface chips (100) is multiple; the impedance detection circuit also includes a second switching module (300); each of the multiple interface chips (100) is connected to the reference detection module (200) via the second switching module (300) to obtain the output path impedance between the target interface chip and the reference detection module (200); The target interface chip is any one of the multiple interface chips (100).

8. A transmitter output calibration device, characterized in that, Includes a transmitter output calibration circuit and an impedance detection circuit as described in any one of claims 1-7; The impedance detection circuit is used to measure the output path impedance between the interface chip (100) and the reference detection module (200); The transmitter output calibration circuit is used to calibrate the output parameters of the transmitter and correct the output parameters according to the output path impedance during the calibration process; The output parameters include at least one of output impedance and output amplitude.

9. A transmitter device, characterized in that, Including the transmitter output calibration device as described in claim 8, the transmitter equipment is used to control the adjustable resistor module R after the transmitter output parameters have been calibrated. SA The transmitter is disconnected from the analog-to-digital converter module (120) so that it can operate normally.

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