Package substrate and method of manufacturing the same

Abstract

This application provides a packaging substrate and its manufacturing method. The packaging substrate includes at least two glass substrates stacked sequentially. Each glass substrate has at least one conductive circuit pattern layer, and a portion of each conductive circuit pattern layer is exposed on one of two opposing surfaces of the glass substrate. At least one pair of adjacent glass substrates have opposing surfaces including glass-to-glass bonding regions, conductive circuit pattern layer-to-conductive circuit pattern layer bonding regions, and glass-to-conductive circuit pattern layer bonding regions. This application can solve the problem of microcracks and delamination occurring during the manufacturing and use of the packaging substrate in related technologies, which causes reliability issues in substrate connections.

Description

Technical Field

[0001] This application relates to the field of semiconductor packaging technology, and in particular to a packaging substrate and its manufacturing method. Background Technology

[0002] Packaging technology involves placing an integrated circuit die on a substrate that serves as a support, and then fixing and interconnecting the substrate and the integrated circuit die to form a complete package. Pins are led out from the package. The package serves functions such as chip protection, electrical interconnection, and heat dissipation. Glass, as an emerging core material for packaging substrates, has advantages such as a more compatible coefficient of thermal expansion with silicon, a higher glass transition temperature, a higher Young's modulus, better flatness, and better thermal and mechanical stability, attracting widespread attention from numerous chip design and packaging substrate manufacturers.

[0003] Glass substrates are typically separated from conductive circuit patterns by an insulating layer such as a laminated adhesive film (e.g., ABF, short for Ajinomoto Build-up Film). In existing technologies, the insulating layer is usually fabricated on the surface of the glass substrate using lamination. However, due to the inconsistency in the coefficients of thermal expansion (CTE) between the glass and the insulating layer, microcracks and delamination can occur during the manufacturing and use of the encapsulation substrate, leading to reliability issues related to substrate connections. Summary of the Invention

[0004] This application aims to solve at least one of the technical problems existing in the prior art by proposing a packaging substrate and its manufacturing method, which can solve the problem of substrate connection reliability caused by microcracks, delamination and other issues during the manufacturing and use of the packaging substrate.

[0005] To achieve the above objectives, embodiments of this application provide a packaging substrate, comprising at least two glass substrates stacked sequentially, each glass substrate having at least one conductive circuit pattern layer, and a portion of each conductive circuit pattern layer being exposed on one of two opposing surfaces of the glass substrate.

[0006] The surfaces of at least one pair of adjacent glass substrates facing each other include glass-to-glass bonding regions, conductive circuit pattern layers bonding regions, and glass-to-conductive circuit pattern layers bonding regions.

[0007] In some embodiments, at least one of the two opposing surfaces of the glass substrate is formed with a groove, and the conductive circuit pattern layer is disposed in the groove.

[0008] In some embodiments, one of at least a pair of adjacent glass substrates is a double-conductive-layer glass substrate and the other is a single-conductive-layer glass substrate.

[0009] The double conductive layer glass substrate has two conductive circuit pattern layers, which are respectively exposed on two opposing surfaces of the double conductive layer glass substrate; the double conductive layer glass substrate has at least one first conductive connection portion, and the two ends of the first conductive connection portion are respectively interconnected with the two conductive circuit pattern layers of the double conductive layer glass substrate.

[0010] The single-conductive-layer glass substrate has a conductive circuit pattern layer disposed therein, which is exposed on the surface of the single-conductive-layer glass substrate away from the double-conductive-layer glass substrate; the single-conductive-layer glass substrate has at least one second conductive connection portion, one end of which is interconnected with the conductive circuit pattern layer of the single-conductive-layer glass substrate, and the other end is interconnected with the adjacent conductive circuit pattern layer of the double-conductive-layer glass substrate.

[0011] The surfaces of the double-conductive-layer glass substrate and the single-conductive-layer glass substrate facing each other include a glass-to-glass bonding region, a bonding region between the conductive circuit pattern layer and the second conductive connection portion, and a bonding region between the glass and the conductive circuit pattern layer.

[0012] In some embodiments, at least one pair of adjacent glass substrates are single-conductive-layer glass substrates.

[0013] The opposing surfaces of each of the single conductive layer glass substrates are a first surface and a second surface, and the first surface of each single conductive layer glass substrate is opposite to the second surface of the adjacent single conductive layer glass substrate.

[0014] Each of the single conductive layer glass substrates is provided with a conductive circuit pattern layer, which is exposed on the first surface; each of the single conductive layer glass substrates is provided with at least one conductive connection portion, one end of which is interconnected with the conductive circuit pattern layer of the single conductive layer glass substrate in which it is located, and the other end is interconnected with the conductive circuit pattern layer of the adjacent single conductive layer glass substrate.

[0015] The first surface of each of the single conductive layer glass substrates and the second surface of the adjacent single conductive layer glass substrates include a glass-to-glass bonding region, a bonding region between the conductive circuit pattern layer and the conductive connection portion, and a bonding region between the glass and the conductive circuit pattern layer.

[0016] In some embodiments, the exposed surface of the conductive line pattern layer is recessed into the surface of the glass substrate on the same side before the bonding process, and flush with the surface of the glass substrate on the same side after the bonding process.

[0017] As another technical solution, this application also provides a method for manufacturing a packaging substrate, comprising:

[0018] At least two glass substrates are provided; each glass substrate has at least one conductive circuit pattern layer, and a portion of each conductive circuit pattern layer is exposed on one of two opposing surfaces of the glass substrate.

[0019] At least two of the glass substrates are bonded in a predetermined order;

[0020] Specifically, the bonding connection between glass, the bonding connection between conductive circuit pattern layers, and the bonding connection between glass and conductive circuit pattern layers are completed in one bonding process.

[0021] In some embodiments, prior to the bonding process, the exposed surface of the conductive line pattern layer is recessed into the surface of the glass substrate on the same side;

[0022] During the bonding process, the conductive circuit pattern layer expands due to heat, and after the bonding process, the exposed surface of the conductive circuit pattern layer is flush with the surface of the glass substrate on the same side, so as to achieve bonding connection between the conductive circuit pattern layer and the corresponding conductive circuit pattern layer or glass.

[0023] In some embodiments, the distance between the exposed surface of the conductive line pattern layer and the surface of the glass substrate on the same side prior to the bonding process is greater than or equal to 1 nm and less than or equal to 3 μm.

[0024] In some embodiments, the bonding process includes:

[0025] The surface of the glass substrate used for stacking with other glass substrates is treated to improve surface flatness;

[0026] The surface of the glass substrate used for stacking with other glass substrates is activated.

[0027] At least two glass substrates to be bonded are initially bonded at a first temperature;

[0028] The at least two glass substrates to be bonded are bonded at a second temperature, which is higher than the first temperature.

[0029] In some embodiments, the second temperature is greater than or equal to 200°C and less than or equal to 800°C.

[0030] In some embodiments, all of the glass substrates include a double-conductive-layer glass substrate and at least two single-conductive-layer glass substrates;

[0031] The bonding process performed sequentially on at least two of the glass substrates in a preset order includes:

[0032] Perform at least one bonding process;

[0033] In each bonding process, on both sides of the double-conductive glass substrate that are facing away from each other, two of the single-conductive glass substrates are simultaneously bonded to the double-conductive glass substrate or the single-conductive glass substrate respectively; or, on one of the sides of the double-conductive glass substrate that are facing away from each other, one of the single-conductive glass substrates is bonded to the double-conductive glass substrate or the single-conductive glass substrate.

[0034] In some embodiments, all of the glass substrates are single-conductive-layer glass substrates;

[0035] The bonding process performed sequentially on at least two of the glass substrates in a preset order includes:

[0036] Perform at least one bonding process;

[0037] In each bonding process, on one side of the i-th single conductive layer glass substrate, the (i+1)-th single conductive layer glass substrate is bonded to the i-th single conductive layer glass substrate, where i = 1, 2, ..., N, and N is the total number of single conductive layer glass substrates. All single conductive layer glass substrates except the first single conductive layer glass substrate are located on the same side of the first single conductive layer glass substrate.

[0038] In some embodiments, all of the glass substrates are single-conductive-layer glass substrates;

[0039] The bonding process performed sequentially on at least two of the glass substrates in a preset order includes:

[0040] Perform at least two bonding processes;

[0041] In the j-th bonding process, one of the single conductive layer glass substrates is bonded to the corresponding single conductive layer glass substrate on one of the first and second opposite sides of the first single conductive layer glass substrate.

[0042] In the k-th bonding process, one of the single conductive layer glass substrates is bonded to the corresponding single conductive layer glass substrate on the other of the first and second opposite sides of the first single conductive layer glass substrate.

[0043] Where j represents the odd number of bonding processes from the 1st to the Mth bonding processes, k represents the even number of bonding processes from the 1st to the Mth bonding processes, M represents the total number of bonding processes, and M = N-1, where N is the total number of single-conductive-layer glass substrates.

[0044] In some embodiments, it also includes:

[0045] The glass substrates after the bonding process are completed are cut using a chemical etching method.

[0046] Other objects and features of this application will become clear from reading the specification, claims and drawings. Attached Figure Description

[0047] The above and / or additional aspects and advantages of this application will become apparent and readily understood from the description of the embodiments taken in conjunction with the following drawings, wherein:

[0048] Figure 1 This is a cross-sectional view of the first type of packaging substrate provided in the embodiments of this application.

[0049] Figure 2 This is a cross-sectional view of the second type of packaging substrate provided in the embodiments of this application.

[0050] Figure 3 This is a cross-sectional view of the double conductive layer glass substrate provided in the embodiments of this application.

[0051] Figure 4 This is a cross-sectional view of a single conductive layer glass substrate provided in an embodiment of this application.

[0052] Figure 5 This is a flowchart of a method for manufacturing a packaging substrate provided in an embodiment of this application.

[0053] Figure 6 This is a flowchart of the bonding process in the method for fabricating the packaging substrate provided in the embodiments of this application.

[0054] Figure 7a This is a flowchart of step S101 of the method for manufacturing a packaging substrate provided in the embodiments of this application.

[0055] Figure 7b This is a flowchart of step S102 of the method for manufacturing a packaging substrate provided in the embodiments of this application.

[0056] Figure 7cThis is a flowchart of step S103 of the method for manufacturing a packaging substrate provided in the embodiments of this application.

[0057] Figure 7d yes Figure 1 The image shows a cross-sectional view of a cored glass substrate after the first bonding process has been completed.

[0058] Figure 8 yes Figure 2 The diagram shows the process of a three-stage bonding process for a coreless glass substrate.

[0059] Figure 9 This is a process diagram of a three-stage bonding process for another type of coreless glass substrate. Detailed Implementation

[0060] The embodiments of this application are described in detail below. Examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain this application, and should not be construed as limiting this application.

[0061] In the description of this application, it should be understood that the terms "center," "longitudinal," "lateral," "length," "width," "thickness," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," "clockwise," and "counterclockwise," etc., indicating orientation or positional relationships based on the orientation or positional relationships shown in the accompanying drawings, are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this application. Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, features defined with "first" and "second" may explicitly or implicitly include one or more features. In the description of this application, "multiple" means two or more, unless otherwise explicitly specified.

[0062] In the description of this application, it should be noted that, unless otherwise expressly specified and limited, the terms "installation," "connection," and "linking" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection, an electrical connection, or a connection that allows communication between them; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication between two components or the interaction between two components. Those skilled in the art can understand the specific meaning of the above terms in this application according to the specific circumstances.

[0063] The following disclosure provides many different embodiments or examples for implementing different structures of this application. To simplify the disclosure, specific examples of components and arrangements are described below. Of course, these are merely examples and are not intended to limit the scope of this application. Furthermore, reference numerals and / or letters may be repeated in different examples; such repetition is for simplification and clarity and does not in itself indicate a relationship between the various embodiments and / or arrangements discussed. In addition, various specific examples of processes and materials are provided in this application, but those skilled in the art will recognize the application of other processes and / or the use of other materials.

[0064] In the description of this specification, the references to terms such as "one embodiment," "some embodiments," "illustrative embodiment," "example," "specific example," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with an embodiment or example is included in at least one embodiment or example of this application. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples.

[0065] Please refer to the following: Figures 1 to 4 This application provides a packaging substrate 100, including at least two glass substrates 1 stacked sequentially. Each glass substrate 1 has at least one conductive circuit pattern layer 2, and a portion of each conductive circuit pattern layer 2 is exposed on one of two opposing surfaces of the glass substrate 1. The opposing surfaces of at least one pair of adjacent glass substrates 1 include glass-to-glass bonding regions, conductive circuit pattern layer 2-to-conductive circuit pattern layer 2 bonding regions, and glass-to-conductive circuit pattern layer 2 bonding regions.

[0066] Specifically, the material of the glass substrate 1 includes, for example, silicate glass. Each conductive circuit pattern layer 2 is embedded in the glass substrate 1 and partially exposed on one of the two opposing surfaces of the glass substrate 1. By embedding each conductive circuit pattern layer 2 in the glass substrate 1, a basis for direct bonding between adjacent glass substrates 1 can be provided. In some embodiments, at least one of the two opposing surfaces of the glass substrate 1 is formed with a groove, and the conductive circuit pattern layer 2 is disposed in the groove. The groove depth is, for example, 15 μm. In this way, the conductive circuit pattern layer 2 can be embedded in the glass substrate 1 and exposed from the groove opening, so as to be interconnected with the conductive circuit pattern layer 2 in other glass substrates 1. Here, two adjacent glass substrates 1 are referred to as a "pair" of glass substrates 1, and at least a pair of glass substrates 1 are connected by bonding. That is, all adjacent glass substrates 1 can be connected by bonding, or a portion of adjacent glass substrates 1 can be connected by bonding, while the other portion of adjacent glass substrates 1 can be connected by other methods as needed.

[0067] Since each of the opposing surfaces of a pair of adjacent glass substrates 1 has an exposed conductive circuit pattern layer area and a glass area other than the exposed area, and at least one of the parameters such as the shape, size, and distribution of the exposed conductive circuit pattern layer area and the glass area of ​​a pair of adjacent glass substrates 1 is different, this results in three overlapping modes of the two types of areas of a pair of adjacent glass substrates 1. The first overlapping mode is that the glass areas of a pair of adjacent glass substrates 1 overlap; the second overlapping mode is that the exposed conductive circuit pattern layer areas of a pair of adjacent glass substrates 1 overlap; and the third overlapping mode is that the glass area of ​​one pair of adjacent glass substrates 1 overlaps with the exposed conductive circuit pattern layer area of ​​the other. Based on this, for a pair of adjacent glass substrates 1 bonded together, the opposing surfaces of the two include the glass-to-glass bonding area, the conductive circuit pattern layer 2-to-conductive circuit pattern layer 2 bonding area, and the glass-to-conductive circuit pattern layer 2 bonding area. The bonding between glass layers begins at room temperature using intermolecular forces (primarily van der Waals forces) on the glass surface to form initial bonds. Then, at high temperatures, the thermal motion of atoms or ions within the glass intensifies, causing these atoms or ions to rearrange and recombine, forming stronger covalent bonds and further enhancing the bonding strength. The bonding between conductive circuit pattern layers 2 occurs at high temperatures. The thermal expansion coefficient of the conductive metal (e.g., Cu) is greater than that of the surrounding glass (e.g., 3-10 ppm / ℃), causing the conductive circuit pattern layer 2 to expand in volume. This allows the exposed surface of the conductive circuit pattern layer 2 to align with the surface of the glass substrate 1 on the same side and come into contact with the corresponding conductive circuit pattern layer 2. During this process, metal atoms from both conductive circuit pattern layers 2 diffuse into each other's crystal lattices, achieving a strong bond between the two conductive circuit pattern layers 2. The bonding between the glass and the conductive circuit pattern layer 2 is achieved by first forming an initial bond at room temperature using intermolecular forces such as van der Waals forces between the surfaces of the glass and the conductive circuit pattern layer 2. Then, at high temperature, the interface between the glass and the conductive circuit pattern layer 2 undergoes a chemical reaction or physical change, such as by forming some transition compounds or enhancing the bonding force of the interface, thereby achieving a stronger bond between the glass and the conductive circuit pattern layer 2.

[0068] This application achieves direct bonding between glass substrates 1, that is, in the same bonding process, bonding of glass to glass, bonding of conductive circuit pattern layer 2 to conductive circuit pattern layer 2, and bonding of glass to conductive circuit pattern layer 2 are achieved on the opposing surfaces of a pair of adjacent glass substrates 1. This bonding method eliminates the microcracks and delamination that occur during the fabrication and use of the encapsulation substrate 100 due to the inconsistency in the thermal expansion coefficients of the glass and the insulating layer, as is present in the prior art, thereby improving connection reliability. Moreover, the above bonding method allows for the free and flexible combination of different types and quantities of glass substrates. The types of glass substrates 1 include, for example, […]. Figure 4 The single conductive layer glass substrate 1b shown and as shown Figure 3 The double-conductive-layer glass substrate 1a shown above, and the combination of the single-conductive-layer glass substrate 1b and the double-conductive-layer glass substrate 1a are referred to as such. Figure 1 The cored glass substrate 100a shown; the combination containing only a single conductive layer glass substrate 1b is called as follows. Figure 2 The coreless glass substrate 100b is shown. The number of glass substrates 1 in a combination can be odd or even.

[0069] In some embodiments, such as Figure 1 As shown, for the cored glass substrate 100a, that is, at least one of a pair of adjacent glass substrates 1 is a double-conductive-layer glass substrate 1a, and the other is a single-conductive-layer glass substrate 1b. In this case, as... Figure 3 As shown, the thickness of the double-conductive glass substrate 1a is, for example, from 50 μm to 2000 μm, such as 500 μm. Two conductive circuit pattern layers 2 are disposed in the double-conductive glass substrate 1a, and the two conductive circuit pattern layers 2 are exposed on two opposing surfaces of the double-conductive glass substrate 1a. At least one first conductive connection portion 3 is disposed in the double-conductive glass substrate 1a, and the two ends of the first conductive connection portion 3 are interconnected with the two conductive circuit pattern layers 2 of the double-conductive glass substrate 1a. Specifically, a first through-hole 3a is disposed in the double-conductive glass substrate 1a, and the two ends of the first through-hole 3a extend to the bottom surface of the groove 11 located on the two opposing surfaces of the glass substrate 1a. The first conductive connection portion 3 is filled in the first through-hole 3a, and the two ends of the first conductive connection portion 3 are interconnected with the two conductive circuit pattern layers 2 in the groove 11 located on the two opposing surfaces of the glass substrate 1a. The first through-hole 3a is a through-glass via (TGV) that passes through the glass substrate 1, and the radial cross-section of the first through-hole 3a is, for example, circular. By interconnecting the two ends of the first conductive connection portion 3 with the two conductive line pattern layers 2 in the grooves 11 located on two opposite surfaces of the glass substrate 1, it can be used as an electrical interconnection structure that passes through the glass substrate 1.

[0070] like Figure 4As shown, the thickness of the single-conductive-layer glass substrate 1b is, for example, from 50 μm to 2000 μm, such as 100 μm. A conductive line pattern layer 2 is disposed in the single-conductive-layer glass substrate 1b, and this conductive line pattern layer 2 is exposed on the surface of the single-conductive-layer glass substrate 1b away from the double-conductive-layer glass substrate 1a (i.e., Figure 4 The single conductive layer glass substrate 1b shown is facing upwards. At least one second conductive connection portion 4 is provided in the single conductive layer glass substrate 1b. One end of the second conductive connection portion 4 is interconnected with the conductive circuit pattern layer 2 of the single conductive layer glass substrate 1b, and the other end is interconnected with the adjacent conductive circuit pattern layer 2 of the double conductive layer glass substrate 1a. Specifically, a second through-hole 4a is provided in the single conductive layer glass substrate 1b. One end of the second through-hole 4a extends to the bottom surface of the groove 12 of the single conductive layer glass substrate 1b, and the other end extends to the surface of the single conductive layer glass substrate 1b near the double conductive layer glass substrate 1a. The second through-hole 4a is filled with the second conductive connection portion 4. One end of the second conductive connection portion 4 is interconnected with the conductive circuit pattern layer 2 located in the groove 12, and the other end is interconnected with the conductive circuit pattern layer 2 of the adjacent double conductive layer glass substrate 1a. That is, the conductive circuit pattern layer 2 in the single conductive layer glass substrate 1b is interconnected with the conductive circuit pattern layer 2 of the adjacent double conductive layer glass substrate 1a through the second conductive connection portion 4.

[0071] The surfaces of the double-conductive-layer glass substrate 1a and the single-conductive-layer glass substrate 1b facing each other include a glass-to-glass bonding region, a bonding region between the conductive circuit pattern layer 2 and the second conductive connection portion 4, and a bonding region between the glass and the conductive circuit pattern layer 2. Thus, this application achieves direct bonding between the double-conductive-layer glass substrate 1a and the single-conductive-layer glass substrate 1b.

[0072] In some embodiments, such as Figure 2 As shown, for the coreless glass substrate 100b, that is, at least one pair of adjacent glass substrates 1 are both single-conductive-layer glass substrates 1b. In this case, as... Figure 4As shown, the opposing surfaces of each single-conductive-layer glass substrate 1b are a first surface 1b1 and a second surface 1b2, respectively, and the first surface 1b1 of each single-conductive-layer glass substrate 1b is opposite to the second surface 1b2 of the adjacent single-conductive-layer glass substrate 1b. Each single-conductive-layer glass substrate 1b has a conductive circuit pattern layer 2, which is exposed on the first surface 1b1. Each single-conductive-layer glass substrate 1b has at least one conductive connection portion (i.e., a second conductive connection portion 4), one end of which is interconnected with the conductive circuit pattern layer 2 of the single-conductive-layer glass substrate 1b in which it resides, and the other end of which is interconnected with the conductive circuit pattern layer 2 of the adjacent single-conductive-layer glass substrate 1b. Since the specific structure of the single-conductive-layer glass substrate 1b has been described in detail above, it will not be repeated here.

[0073] Each single-conductive-layer glass substrate 1b has a first surface 1b1 and an adjacent second surface 1b2 including a glass-to-glass bonding region, a bonding region between the conductive circuit pattern layer 2 and the conductive connection portion, and a bonding region between the glass and the conductive circuit pattern layer 2. Thus, this application achieves direct bonding between adjacent single-conductive-layer glass substrates 1b.

[0074] In some embodiments, the exposed surface of the conductive circuit pattern layer 2 is recessed into the surface of the glass substrate 1 on the same side before the bonding process, and flush with the surface of the glass substrate 1 on the same side after the bonding process. That is, the material of the conductive circuit pattern layer 2 needs to be a metal material with a coefficient of thermal expansion greater than that of the surrounding glass. In this way, for the bonding of conductive circuit pattern layers 2 to conductive circuit pattern layers 2, the volume expansion of the conductive circuit pattern layer 2 can be used to make the exposed surface of the conductive circuit pattern layer 2 flush with the surface of the glass substrate 1 on the same side and in contact with the corresponding conductive circuit pattern layer 2. During this process, the metal atoms of the two conductive circuit pattern layers 2 diffuse into each other's lattice, thereby achieving a strong bond between the two conductive circuit pattern layers 2.

[0075] As another technical solution, please refer to Figure 5 and combined Figures 1 to 4 This application embodiment also provides a method for manufacturing a packaging substrate 100, including:

[0076] S1. Provide at least two glass substrates 1; each glass substrate 1 has at least one conductive line pattern layer 2, and a portion of each conductive line pattern layer 2 is exposed on one of two opposing surfaces of the glass substrate 1.

[0077] S2. Perform bonding processes on at least two of all glass substrates 1 in a preset order;

[0078] In this process, the bonding connections between glass, between conductive circuit pattern layers 2, and between glass and conductive circuit pattern layers 2 are completed in a single bonding process.

[0079] The embodiments of this application employ the above-described bonding method, which eliminates the microcracks and delamination issues that arise during the fabrication and use of the encapsulation substrate 100 due to the inconsistency in the thermal expansion coefficients of the glass and the insulating layer, thus improving the reliability of the substrate connection. Furthermore, the above-described bonding method allows for the free and flexible combination of different types and quantities of glass substrates 1.

[0080] In some embodiments, before the bonding process, the exposed surface of the conductive circuit pattern layer 2 is recessed into the surface of the glass substrate 1 on the same side; during the bonding process, the conductive circuit pattern layer 2 is heated and expands, and after the bonding process, the exposed surface of the conductive circuit pattern layer 2 is flush with the surface of the glass substrate 1 on the same side, so as to achieve bonding connection between the conductive circuit pattern layer 2 and the corresponding conductive circuit pattern layer 2 or glass.

[0081] Furthermore, in some embodiments, the distance between the exposed surface of the conductive circuit pattern layer 2 and the surface of the glass substrate 1 on the same side before the bonding process can be greater than or equal to 1 nm and less than or equal to 3 μm, for example, 5 nm. By taking the above distance within this range, the exposed surface of the conductive circuit pattern layer 2 can be made to contact the corresponding conductive circuit pattern layer 2, thereby achieving a strong bond between the two conductive circuit pattern layers 2.

[0082] In some embodiments, such as Figure 6 As shown, the above bonding process includes:

[0083] S21. The surface of the glass substrate 1 used for stacking with other glass substrates 1 is treated to improve surface flatness.

[0084] S22. Activate the surface of the glass substrate 1 that is used to be stacked with other glass substrates 1.

[0085] S23. Initial bonding is performed on at least two glass substrates 1 to be bonded at a first temperature.

[0086] S24. The at least two glass substrates 1 to be bonded are bonded at a second temperature; the second temperature is higher than the first temperature.

[0087] In step S21 above, the surface treatment methods include, for example, mechanical polishing, chemical polishing, electrochemical polishing, chemical mechanical polishing (CMP), ultrasonic polishing, magnetic abrasive polishing, and fluid polishing. Surface treatment is a key step in the direct bonding process, used to remove impurities from the surfaces of the glass substrate 1 used for stacking with other glass substrates 1 and to reduce defects such as bubbles and microcracks. These impurities include, for example, oxides, organic matter, or other impurities on the glass or metal surface. By removing these impurities, the formation of air gaps or weak bonding points at the bonding interface, which could lead to insufficient bonding strength, can be avoided. Furthermore, surface treatment can improve the flatness of the surfaces of the glass substrate 1 used for stacking with other glass substrates 1. For example, chemical mechanical polishing (CMP) can ensure a smooth and flat surface. CMP can control surface roughness at the nanometer level, ensuring tight contact at the bonding interface. Thus, through surface treatment, the overall quality and reliability of the glass substrate 1 can be improved.

[0088] In step S22 above, the activation treatment can be used to increase the chemical activity of the surface and promote metal bonding. Specifically, the activation treatment can generate reactive groups on the glass surface, such as hydroxyl (-OH) and carboxyl (-COOH) groups. These groups can enhance the chemical activity of the surface and promote the formation of intermolecular forces (such as van der Waals forces). Moreover, through the activation treatment, the surface energy is significantly increased, making it easier for the surface to form bonds with other surfaces.

[0089] In step S23 above, initial bonding is used to bring the surfaces of at least two glass substrates 1 to be bonded into close contact through intermolecular forces (such as van der Waals forces), reducing the gap at the bonding interface. This achieves the initial connection of the surfaces of at least two glass substrates 1 to be bonded together at room temperature, which helps reduce thermal stress generated during heating and improves the reliability of bonding. Although these forces are relatively weak, they can be further strengthened during the subsequent step S24. Initial bonding ensures that the surfaces of at least two glass substrates 1 to be bonded can be in close contact after alignment, providing a foundation for subsequent bonding steps. In addition, initial bonding helps to further improve surface flatness, ensuring the alignment, uniformity, and consistency of the bonding interface. Furthermore, initial bonding can be regarded as a pre-bonding step, which provides a stable initial state for subsequent bonding steps, facilitating the formation of stronger covalent bonds under high temperature conditions.

[0090] In some embodiments, in step S23 above, the first temperature is, for example, room temperature (e.g., 20°C-25°C).

[0091] In step S24 above, under high-temperature conditions (i.e., the second temperature), the thermal motion of atoms or ions in the glass intensifies, allowing atoms or ions on the surfaces between glass panes to rearrange and recombine, thereby forming stronger covalent bonds and further enhancing the bonding strength. Between metals, because the coefficient of thermal expansion of the metal is greater than that of the surrounding glass, the volume of the metal expands, causing the metals to come into contact. Under high-temperature conditions, metal atoms diffuse between the glass panes, entering the crystal lattice of the other glass, thus achieving a strong bond between copper and copper. The bonding between glass and metal (dielectric bonding, hybrid bonding) occurs under high-temperature conditions through chemical reactions or physical changes, forming a stronger bond.

[0092] In step S24 above, to achieve the aforementioned effect, in some embodiments, the second temperature is greater than or equal to 200°C and less than or equal to 800°C, such as 200°C, 300°C, 400°C, 500°C, 600°C, 700°C, 800°C, etc. A preferred range is greater than or equal to 400°C and less than or equal to 600°C.

[0093] In some embodiments, for a cored glass substrate 100a, that is, all glass substrates 1 include a double-conductive-layer glass substrate 1a and at least two single-conductive-layer glass substrates 1b; the above step S2 specifically includes:

[0094] Perform at least one bonding process;

[0095] In some examples, during each bonding process, two single-conductive-layer glass substrates 1b are simultaneously bonded to either the double-conductive-layer glass substrate 1a or the single-conductive-layer glass substrate 1b on opposite sides of the double-conductive-layer glass substrate 1a. In other examples, during each bonding process, one single-conductive-layer glass substrate 1b is bonded to either the double-conductive-layer glass substrate 1a or the single-conductive-layer glass substrate 1b on one of the opposite sides of the double-conductive-layer glass substrate 1a.

[0096] In one specific embodiment, the method for fabricating the double conductive layer glass substrate 1a includes:

[0097] S101, such as Figure 7a As shown, a first through hole 3a is formed in the glass substrate 1, and the two ends of the first through hole 3a extend to two opposing surfaces of the glass substrate 1.

[0098] In step S101, the first via 3a can be formed by laser induction and chemical etching (e.g., chemical etching using hydrofluoric acid liquid). The diameter of the first via 3a is, for example, 100 μm.

[0099] S102, such as Figure 7bAs shown, grooves 11 are formed on the surfaces of the glass substrate 1 on opposite sides; the two ends of the first through hole 3a are respectively located on the bottom surface of the grooves 11 provided on the two opposite surfaces of the glass substrate 1.

[0100] In step S102, the groove 11 can be formed by laser induction and chemical etching (e.g., chemical etching using hydrofluoric acid liquid). The depth of the groove 11 is, for example, 15 μm.

[0101] S103. A metal seed layer (e.g., a Ti / Cu layer) is formed in the groove 11 and the first through-hole 3a using a sputtering or deposition process to improve the adhesion of subsequent electroplating. The thickness of the metal seed layer is, for example, 0.2 μm. Then, a metal material (e.g., Cu) is filled into the first through-hole 3a and the groove 11 by electroplating to form a first conductive connection 3 in the first through-hole 3a and a conductive circuit pattern layer 2 in the groove 11. The first conductive connection 3 is interconnected with the two conductive circuit pattern layers 2 respectively. The structure of the double conductive layer glass substrate 1a after step S103 is as follows. Figure 3 As shown. The thickness of the metal seed layer is, for example, 0.2 μm.

[0102] In one specific embodiment, the method for fabricating a single conductive layer glass substrate 1b includes:

[0103] S201. A second through hole 4a is formed in the glass substrate 1, and the two ends of the second through hole 4a extend to two opposing surfaces of the glass substrate 1.

[0104] In step S201, the second via 4a can be formed by laser induction and chemical etching (e.g., chemical etching using hydrofluoric acid liquid). The diameter of the second via 4a is, for example, 60 μm.

[0105] S202, A groove 11 is formed on one of the surfaces of the glass substrate 1 on opposite sides; one end of the second through hole 4a is located on the bottom surface of the groove 11.

[0106] In step S202, the groove 11 can be formed by laser induction and chemical etching (e.g., chemical etching using hydrofluoric acid liquid). The depth of the groove 11 is, for example, 15 μm.

[0107] S203. A metal seed layer (e.g., a Ti / Cu layer) is formed in the groove 11 and the second via 4a using a sputtering or deposition process to improve the adhesion of subsequent electroplating. The thickness of the metal seed layer is, for example, 0.2 μm. Then, a metal material (e.g., Cu) is filled into the second via 4a and the groove 11 by electroplating to form a second conductive connection 4 in the second via 4a and a conductive circuit pattern layer 2 in the groove 11. The second conductive connection 4 is interconnected with the conductive circuit pattern layer 2. The structure of the single conductive layer glass substrate 1b after step S203 is as follows. Figure 4 As shown. Figure 7c Both single-conductive-layer glass substrates 1b shown can be obtained using the above-described fabrication method.

[0108] Based on this, Figure 1 The bonding process of the cored glass substrate 100a shown may include two bonding processes:

[0109] In the first bonding process, on the two opposite sides of the double conductive glass substrate 1a, bonds are simultaneously or sequentially bonded. Figure 7c The two single-conductive glass substrates 1b shown are respectively with Figure 7b The double conductive layer glass substrate 1a shown is bonded together to form Figure 7d The structure shown.

[0110] In the second bonding process, on both sides of the double conductive glass substrate 1a that are opposite to each other, bonds are simultaneously or sequentially bonded to the substrate. Figure 7c Two identical or similar single-conductive-layer glass substrates 1b are respectively with Figure 7d The two single-conductive-layer glass substrates 1b shown are bonded together to form Figure 1 The structure shown.

[0111] In some embodiments, for the coreless glass substrate 100b, that is, all glass substrates 1 are single-conductive-layer glass substrates 1b.

[0112] In some examples, step S2 above specifically includes:

[0113] Perform at least one bonding process;

[0114] In each bonding process, on one side of the i-th single conductive layer glass substrate 1b, the (i+1)-th single conductive layer glass substrate 1b is bonded to the i-th single conductive layer glass substrate 1b, where i = 1, 2, ..., N, and N is the total number of single conductive layer glass substrates 1b. All single conductive layer glass substrates 1b except the first single conductive layer glass substrate 1b are located on the same side of the first single conductive layer glass substrate 1b.

[0115] In a specific embodiment, such as Figure 8 As shown, Figure 2 The bonding process of the coreless glass substrate 100b shown may include a three-stage bonding process:

[0116] In the first bonding process, on one side of the first single-conductive glass substrate 1b11 (i.e. Figure 8 On the upper side), the second single conductive layer glass substrate 1b12 is bonded to the first single conductive layer glass substrate 1b11, and the bonded glass substrate structure is 1b10.

[0117] In the second bonding process, on one side of the first single-conductive glass substrate 1b11 (i.e. Figure 8 On the upper side), the third single conductive layer glass substrate 1b13 is bonded to the second single conductive layer glass substrate 1b12, and the bonded glass substrate structure is 1b20.

[0118] In the third bonding process, on one side of the first single-conductive glass substrate 1b11 (i.e. Figure 8 On the upper side), the fourth single-conductive-layer glass substrate 1b14 is bonded to the third single-conductive-layer glass substrate 1b13, and the bonded glass substrate structure is 1b30.

[0119] The second single-conductive-layer glass substrate 1b11, the third single-conductive-layer glass substrate 1b13, and the fourth single-conductive-layer glass substrate 1b14 are all located on the same side of the first single-conductive-layer glass substrate 1b (i.e., Figure 8 (the upper side).

[0120] In other examples, step S2 above specifically includes:

[0121] Perform at least two bonding processes;

[0122] In the j-th bonding process, one of the single conductive layer glass substrates 1b is bonded to the corresponding single conductive layer glass substrate 1b on one of the first side and the second side that are opposite to each other.

[0123] In the k-th bonding process, on the other of the first and second opposite sides of the first single conductive layer glass substrate 1b, one of the single conductive layer glass substrates 1b is bonded to the corresponding single conductive layer glass substrate 1b.

[0124] Where j represents the odd number of bonding processes from the 1st to the Mth bonding processes, k represents the even number of bonding processes from the 1st to the Mth bonding processes, M represents the total number of bonding processes, and M = N-1, where N is the total number of single conductive layer glass substrates 1b.

[0125] In a specific embodiment, such as Figure 9As shown, another bonding process for the coreless glass substrate 100b may include a three-stage bonding process:

[0126] In the first bonding process, on one side of the first single-conductive glass substrate 1b11 (i.e. Figure 8 On the upper side), the second single conductive layer glass substrate 1b12 is bonded to the first single conductive layer glass substrate 1b11, and the bonded glass substrate structure is 1b10.

[0127] In the second bonding process, on the other side of the first single-conductive glass substrate 1b11 (i.e. Figure 8 On the lower side), the third single conductive layer glass substrate 1b13 is bonded to the first single conductive layer glass substrate 1b11, and the bonded glass substrate structure is 1b20.

[0128] In the third bonding process, on one side of the first single-conductive glass substrate 1b11 (i.e. Figure 8 On the upper side), the fourth single-conductive glass substrate 1b14 is bonded to the second single-conductive glass substrate 1b12, and the bonded glass substrate structure is 1b30.

[0129] In the odd-numbered bonding process, on one side of the first single-conductive-layer glass substrate 1b11 (i.e. Figure 8 The bonding process is performed on the upper side of the first single conductive layer glass substrate 1b11; while in the even-numbered bonding process, the bonding process is performed on the other side of the first single conductive layer glass substrate 1b11 (i.e., the upper side of the substrate 1b11). Figure 8 The bonding process is performed on the lower side of the first single-conductive-layer glass substrate 1b11. In this case, the second single-conductive-layer glass substrate 1b11 and the fourth single-conductive-layer glass substrate 1b14 are both located on one side of the first single-conductive-layer glass substrate 1b (i.e., the lower side of the substrate 1b). Figure 8 The third single-conductive glass substrate 1b13 is located on the other side of the first single-conductive glass substrate 1b11 (i.e., the upper side of the substrate), while the third single-conductive glass substrate 1b13 is located on the other side of the first single-conductive glass substrate 1b11 (i.e., the upper side of the substrate). Figure 8 (the lower side).

[0130] As can be seen from the above, by adopting the above bonding method, this application can freely and flexibly combine different types and quantities of glass substrates together.

[0131] In some embodiments, the method for manufacturing the packaging substrate 100 further includes:

[0132] All glass substrates 1 after the bonding process is completed are cut using a chemical etching method.

[0133] The above steps are used to cut all the bonded glass substrates (large-size substrates) into multiple small-size substrates.

[0134] Traditional mechanical or laser cutting may introduce microcracks or fragmentation on the surface of the glass substrate 1. However, the chemical etching method used in this application removes material through chemical reaction rather than physical force, thereby avoiding the generation of mechanical stress, reducing the risk of microcracks and fragmentation, and helping to maintain the integrity and mechanical strength of the glass substrate 1.

[0135] In some embodiments, after all the glass substrates are bonded together by a bonding process, the method for manufacturing the encapsulation substrate 100 further includes:

[0136] The solder resist coating step involves covering the substrate surface with a layer of solder resist ink to prevent soldering or bridging, as well as to provide insulation and protection for the substrate.

[0137] The surface treatment step of the connector pad (such as the ENEPIG process) is used to treat the surface of the connector pad to form a uniform metal layer with good conductivity and oxidation resistance, so as to ensure the reliability and stability of subsequent electrical connections.

[0138] The cutting process involves using a chemical etching method to cut all glass substrates 1 after the bonding process is completed.

[0139] The cutting step is used to divide a large substrate into multiple smaller substrates, facilitating subsequent processing. For example, a quartering method can be used to divide the large substrate into four smaller substrates. The size of each smaller substrate is one-quarter the size of the larger substrate. The specific process of the chemical etching method is as follows: first, a laser is used to induce cutting paths on the large substrate; then, a solution such as hydrofluoric acid (HF) is used to chemically etch the large substrate, removing the glass material along the cutting paths. This method can avoid or reduce defects such as microcracks and fragmentation that occur during mechanical cutting.

[0140] SOP (Solder On Pad) is a step used for the bump interconnection between the substrate and the chip during packaging.

[0141] The single-piece partitioning step is used to further divide the small-sized substrate to obtain the final product unit.

[0142] The testing process involves inspecting the product units to ensure that their quality and performance meet the requirements.

[0143] The testing steps include, for example, appearance inspection, dimensional inspection, electrical performance inspection, reliability inspection, and so on.

[0144] It is understood that the above embodiments are merely exemplary implementations used to illustrate the principles of this application, and this application is not limited thereto. For those skilled in the art, various modifications and improvements can be made without departing from the spirit and substance of this application, and these modifications and improvements are also considered to be within the scope of protection of this application.

Claims

1. A package substrate, characterized by, It includes at least two glass substrates stacked in sequence, the surfaces of the at least two glass substrates to be bonded are in contact, each glass substrate is provided with at least one conductive circuit pattern layer, and a portion of each conductive circuit pattern layer is exposed on one of two opposing surfaces of the glass substrate. The surfaces of at least one pair of adjacent glass substrates facing each other include glass-to-glass bonding regions, conductive circuit pattern layers bonding regions, and glass-to-conductive circuit pattern layers bonding regions.

2. The package substrate of claim 1, wherein At least one of the two opposing surfaces of the glass substrate is formed with a groove, and the conductive circuit pattern layer is disposed in the groove.

3. The package substrate according to claim 1 or 2, wherein At least one of a pair of adjacent glass substrates is a double-conductive-layer glass substrate, and the other is a single-conductive-layer glass substrate. The double conductive layer glass substrate has two conductive circuit pattern layers, which are respectively exposed on two opposing surfaces of the double conductive layer glass substrate; the double conductive layer glass substrate has at least one first conductive connection portion, and the two ends of the first conductive connection portion are respectively interconnected with the two conductive circuit pattern layers of the double conductive layer glass substrate. The single-conductive-layer glass substrate has a conductive circuit pattern layer disposed therein, which is exposed on the surface of the single-conductive-layer glass substrate away from the double-conductive-layer glass substrate; the single-conductive-layer glass substrate has at least one second conductive connection portion, one end of which is interconnected with the conductive circuit pattern layer of the single-conductive-layer glass substrate, and the other end is interconnected with the adjacent conductive circuit pattern layer of the double-conductive-layer glass substrate. The surfaces of the double-conductive-layer glass substrate and the single-conductive-layer glass substrate facing each other include a glass-to-glass bonding region, a bonding region between the conductive circuit pattern layer and the second conductive connection portion, and a bonding region between the glass and the conductive circuit pattern layer.

4. The packaging substrate according to claim 1 or 2, characterized in that, At least one pair of adjacent glass substrates are single-conductive glass substrates. The opposing surfaces of each of the single conductive layer glass substrates are a first surface and a second surface, and the first surface of each single conductive layer glass substrate is opposite to the second surface of the adjacent single conductive layer glass substrate. Each of the single conductive layer glass substrates is provided with a conductive circuit pattern layer, which is exposed on the first surface; each of the single conductive layer glass substrates is provided with at least one conductive connection portion, one end of which is interconnected with the conductive circuit pattern layer of the single conductive layer glass substrate in which it is located, and the other end is interconnected with the conductive circuit pattern layer of the adjacent single conductive layer glass substrate. The first surface of each of the single conductive layer glass substrates and the second surface of the adjacent single conductive layer glass substrates include a glass-to-glass bonding region, a bonding region between the conductive circuit pattern layer and the conductive connection portion, and a bonding region between the glass and the conductive circuit pattern layer.

5. The package substrate according to claim 1 or 2, wherein The exposed surface of the conductive circuit pattern layer is recessed into the surface of the glass substrate on the same side before the bonding process, and flush with the surface of the glass substrate on the same side after the bonding process.

6. A method for fabricating a package substrate, the method comprising: The packaging substrate used for any one of claims 1 to 5 includes: At least two glass substrates are provided; each glass substrate has at least one conductive circuit pattern layer, and a portion of each conductive circuit pattern layer is exposed on one of two opposing surfaces of the glass substrate. At least two of the glass substrates are bonded in a predetermined order; Specifically, the bonding connection between glass, the bonding connection between conductive circuit pattern layers, and the bonding connection between glass and conductive circuit pattern layers are completed in one bonding process.

7. The method of claim 6, wherein Prior to the bonding process, the exposed surface of the conductive circuit pattern layer is recessed into the surface of the glass substrate on the same side; During the bonding process, the conductive circuit pattern layer expands due to heat, and after the bonding process, the exposed surface of the conductive circuit pattern layer is flush with the surface of the glass substrate on the same side, so as to achieve bonding connection between the conductive circuit pattern layer and the corresponding conductive circuit pattern layer or glass.

8. The method of claim 7, wherein The distance between the exposed surface of the conductive circuit pattern layer and the surface of the glass substrate on the same side prior to the bonding process is greater than or equal to 1 nm and less than or equal to 3 μm.

9. The method of claim 6, wherein The bonding process includes: The surface of the glass substrate used for stacking with other glass substrates is treated to improve surface flatness; The surface of the glass substrate used for stacking with other glass substrates is activated. At least two glass substrates to be bonded are initially bonded at a first temperature; The at least two glass substrates to be bonded are bonded at a second temperature, which is higher than the first temperature.

10. The method of claim 9, wherein The second temperature is greater than or equal to 200°C and less than or equal to 800°C.

11. The method of manufacturing a package substrate according to any one of claims 6 to 10, wherein All of the glass substrates include double-conductive-layer glass substrates and at least two single-conductive-layer glass substrates; The bonding process performed sequentially on at least two of the glass substrates in a preset order includes: Perform at least one bonding process; In each bonding process, on both sides of the double-conductive glass substrate that are facing away from each other, two of the single-conductive glass substrates are simultaneously bonded to the double-conductive glass substrate or the single-conductive glass substrate respectively; or, on one of the sides of the double-conductive glass substrate that are facing away from each other, one of the single-conductive glass substrates is bonded to the double-conductive glass substrate or the single-conductive glass substrate.

12. The method for manufacturing a packaging substrate according to any one of claims 6-10, characterized in that, All of the glass substrates are single-conductive-layer glass substrates; The bonding process performed sequentially on at least two of the glass substrates in a preset order includes: Perform at least one bonding process; In each bonding process, on one side of the i-th single conductive layer glass substrate, the (i+1)-th single conductive layer glass substrate is bonded to the i-th single conductive layer glass substrate, where i = 1, 2, ..., N, and N is the total number of single conductive layer glass substrates. All single conductive layer glass substrates except the first single conductive layer glass substrate are located on the same side of the first single conductive layer glass substrate.

13. The method of claim 6-10, wherein All of the glass substrates are single-conductive-layer glass substrates; The bonding process performed sequentially on at least two of the glass substrates in a preset order includes: Perform at least two bonding processes; In the j-th bonding process, one of the single conductive layer glass substrates is bonded to the corresponding single conductive layer glass substrate on one of the first and second opposite sides of the first single conductive layer glass substrate. In the k-th bonding process, one of the single conductive layer glass substrates is bonded to the corresponding single conductive layer glass substrate on the other of the first and second opposite sides of the first single conductive layer glass substrate. Where j represents the odd number of bonding processes from the 1st to the Mth bonding processes, k represents the even number of bonding processes from the 1st to the Mth bonding processes, M represents the total number of bonding processes, and M = N - 1, where N is the total number of single-conductive glass substrates.

14. The method of claim 6, wherein Also includes: The glass substrates after the bonding process are completed are cut using a chemical etching method.

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