Spacer profile control using atomic layer deposition in multiple patterning processes

Abstract

Methods and apparatus for controlling spacer profiles using atomic layer deposition (ALD) in multiple patterning processes are described herein. Silicon oxide spacers are deposited on the patterned core material and the target layer of the substrate in a multi-patterning scheme. A first thickness of the silicon oxide spacer is deposited through a plurality of ALD cycles under first oxidation conditions including oxidation time, plasma power, and substrate temperature. A second thickness of the silicon oxide spacer is deposited through a plurality of ALD cycles under a second oxidation condition, wherein the second oxidation condition differs from the first oxidation condition by one or more parameters. After etching the patterned core material, a resulting profile of the silicon oxide spacer depends at least in part on the first and second oxidation conditions.

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