A carrier synchronous control method suitable for a parallel converter of a doubly-fed wind power generation system

Abstract

This application discloses a carrier synchronization control method applicable to parallel converters in doubly-fed wind power generation systems, belonging to the technical field of excitation converter equipment for doubly-fed wind power generation systems. The method includes: sending a square wave signal containing its own carrier phase information to the bus via a synchronization signal generation circuit; generating a globally unified synchronization signal using wired-AND logic; each module calculating the difference between its own carrier phase and the reference phase based on the received synchronization signal, and comparing it with the average value of the carrier period adjustment; if the difference exceeds a set threshold, optimizing using a software filtering strategy; and dynamically adjusting the carrier phase of each module using an indirect phase modulation method to achieve carrier synchronization. This invention can achieve carrier phase synchronization of parallel converters in a doubly-fed wind power generation system within one power frequency cycle, is entirely based on software control, and has phase adjustment filtering functionality, significantly improving the reliability and anti-interference capability of phase adjustment, as well as the system's operating efficiency and safety.

Description

Technical Field

[0001] This application relates to the field of excitation converter equipment technology for doubly fed wind power systems, and in particular to a carrier synchronization control method applicable to parallel converters in doubly fed wind power systems. Background Technology

[0002] With the continuous expansion of renewable energy grid connection, the demand for frequency regulation capabilities in the power system is increasing. Against this backdrop, megawatt-level doubly-fed induction generator (DFIG) wind power systems, with their flexible power decoupling characteristics and dynamic response advantages, have become a crucial supporting unit for power system frequency regulation. Through the coordinated control of the rotor-side converter and the grid-side converter, DFIG wind turbines can achieve maximum energy tracking and independent reactive power regulation, and can also quickly adjust the rotor current phase and amplitude when the grid frequency fluctuates. Dynamic compensation of electromagnetic torque provides inertial response and primary frequency regulation capabilities to the grid. Its unique partial power converter architecture reduces equipment costs while still achieving bidirectional power regulation within a ±30% rated power range, significantly improving the system's economy and flexibility.

[0003] However, the operation of doubly-fed wind power systems faces numerous challenges under multi-unit parallel operation. First, the dispersion of device parameters, the loss of synchronization in carrier phase, and the difference in line impedance can lead to the generation of high-frequency circulating currents. These high-frequency circulating currents not only increase the additional losses of the system but may also cause electromagnetic interference and even damage equipment, severely restricting the safety and economy of the units.

[0004] Traditional carrier synchronization control strategies often employ master-slave architectures or fixed phase offset strategies. While these methods can achieve carrier synchronization to some extent, they are susceptible to communication delays and clock drift, lack dynamic adjustment capabilities, and struggle to effectively suppress high-frequency circulating currents. Furthermore, existing solutions typically rely on high-precision sensors and complex harmonic algorithms, resulting in high hardware costs and poor interference resistance. Centralized wired architectures have limited scalability, making it difficult to adapt to parameter differences and meet the demands of frequent start-stop cycles and wide-range power regulation in doubly-fed induction generator (DFIG) wind power systems. Therefore, developing an improved carrier synchronization strategy with strong robustness and low complexity has become a key technical bottleneck for the efficient operation of current DFIG wind power systems. Summary of the Invention

[0005] This application aims to provide a carrier synchronization control method applicable to parallel converters in doubly fed wind power generation systems.

[0006] To achieve the above objectives, the technical solution of this application is as follows: A carrier synchronization control method for parallel converters in a doubly-fed wind power generation system includes steps S10 to S80: Step S10: Calculate the carrier phase adjustment of each module in the synchronization signal generation circuit based on the square wave signal containing its own carrier phase information sent by the parallel converter of the doubly fed wind power generation system. Step S20: Determine whether the parallel converter of the doubly fed wind power generation system is stable and the initial carrier synchronization is completed. If yes, proceed to step S30; otherwise, proceed to step S70. Step S30: Enter the software filtering program and calculate the average value of the carrier phase adjustment after the doubly fed wind power system parallel converter is operating stably, based on the dynamic updates of the synchronous control enable signal every specific number of carriers. This value is expressed by the formula: in, Dp ave This represents the average value. Dp i(k) Indicates the first i The module in the first k The amount of carrier phase adjustment when the carrier synchronization control enable signal arrives. N ave Indicates the number of intervals for carrier synchronization control enable signals; The selection of the software filtering threshold is based on the maximum value of the carrier phase difference change between two adjacent carrier synchronization control enable signals, and the maximum value is expressed by the formula: in, Dp max This represents the maximum value of the carrier phase difference change between two adjacent carrier synchronization control enable signals. f oN Indicates power frequency, f cN The rated carrier frequency is ± e osc This indicates the crystal oscillator frequency error; The software filtering threshold is expressed by the formula: in, ψ f Indicates the software filtering threshold. k f Indicates the margin coefficient; Calculate the difference between the average value and the carrier phase adjustment amount; Step S40: Determine whether the difference is greater than the software filtering threshold. If yes, the carrier phase adjustment amount is limited to the average value and proceed to step S50; otherwise, the carrier phase adjustment amount obtained in this detection is used and proceed to step 70. Step S50: Enter the filtering count determination program to determine whether multiple software filtering operations are performed consecutively. If yes, proceed to step S60; otherwise, proceed to step S70. Step S60: Enter the fault protection procedure, immediately disable software filtering, and proceed to step S70 using the actual detected carrier phase adjustment amount; Step S70: Enter the carrier phase adjustment stage. According to the carrier phase adjustment amount, the carrier frequency is changed using a period register. Only the set value of the period register is allowed to be within the TBPRD range. TBPRD +1 and TBPRD The fluctuations between -1 and the three are indirectly changed by determining the carrier phase adjustment period and the carrier adjustment direction, thereby achieving the goal of carrier phase synchronization of each module; When the period register is calculated and set to TBPRD When ±1, the adjustment period is expressed by the formula: in, N regu Indicates the adjustment period. ψ regu The phase adjustment amplitude within one carrier cycle is expressed by the formula: Step S80: Carrier synchronization for one adjustment cycle is completed.

[0007] Optionally, the synchronization signal generation circuit includes: any number of modules, a first synchronization signal bus, and a second synchronization signal bus, with each module connected to the first synchronization signal bus and the second synchronization signal bus respectively; each module includes: a signal transmitting unit, a signal receiving unit, a first ferrite bead, and a second ferrite bead, with the first terminal of the signal transmitting unit connected to the first synchronization signal bus via the first ferrite bead, and the second terminal of the signal transmitting unit connected to the second synchronization signal bus via the second ferrite bead; the first terminal of the signal receiving unit is connected to the midpoint of the series connection between the first terminal of the signal transmitting unit and the first ferrite bead.

[0008] Optionally, step S10 includes: Step S101: Generate a globally unified synchronization signal based on the square wave signal, capture the falling edge of the synchronization signal as the carrier synchronization control enable signal, and select the phase at this moment as the carrier phase reference value. Step S102: Calculate the initial carrier phase adjustment amount of each module based on the carrier phase reference value, and optimize the initial carrier phase adjustment amount by introducing the phase deviation caused by the signal delay of each module, so as to obtain the carrier phase adjustment amount of each module.

[0009] Optionally, in step S102, based on the carrier phase reference value, at the time when the carrier synchronization control enable signal is selected, the difference between the carrier phase of each module and the carrier phase reference value is calculated to obtain the initial carrier phase adjustment amount of each module; the phase deviation caused by the signal delay of each module is introduced, including: before the synchronization signal generation circuit is officially running, a certain module is made to automatically generate and receive a synchronization signal, thereby determining the phase deviation caused by the delay.

[0010] Optionally, in step S20, determining whether the parallel converter of the doubly fed wind power system is stable and the initial carrier synchronization is completed includes: during the initial carrier synchronization stage or dynamic adjustment stage of the parallel converter of the doubly fed wind power system, directly using the initial carrier phase adjustment amount to perform phase adjustment so that the carrier phases between each module are basically in phase.

[0011] Optionally, step S30 includes: dynamically updating the average value of the carrier synchronization control enable signal every specific number of carriers after the synchronization signal generation circuit has been running stably; when the difference between the carrier phase adjustment amount obtained in a certain detection and the average value exceeds the software filtering threshold, the average value calculation process will ignore the average value; when the difference between the average value before and after the update is too large, the calculated value of the current average value will also be determined to be invalid, and the average value before the update will continue to be used for filtering and determination until the next value update.

[0012] Optionally, in step S70, depending on the adjustment direction, when the carrier synchronization control enable signal arrives, if the carrier phase adjustment amount calculated by this module is within (0°, 180°), the setting value of the adjustment period register is TBPRD. +1; If the carrier phase adjustment calculated by this module is within (-180°, 0°), the setting value of the adjustment period register is TBPRD. -1.

[0013] Optionally, after calculating the carrier adjustment period, if the carrier adjustment period is less than the number of carrier adjustment periods between two carrier synchronization control enable signals, then the value of the period register is adjusted to TBPRD within the carrier adjustment period. ±1, restoring the value of the cycle register to TBPRD within the remaining cycle. If the carrier adjustment period is greater than the number of carrier adjustment periods between two carrier synchronization control enable signals, then the value of the period register will be adjusted to TBPRD before the next carrier synchronization control enable signal arrives. ±1.

[0014] This application proposes a carrier synchronization control method for parallel converters in a doubly-fed wind power generation system, aiming to achieve carrier phase synchronization of the parallel converter system within one power frequency cycle. This method utilizes the detected and calculated carrier phase adjustment amount Δ ψ i This method adjusts the carrier phase according to the adjustment direction and period to achieve carrier phase synchronization of each module, avoiding a complex parameter tuning process and offering advantages such as simplicity and ease of implementation. Furthermore, the method incorporates a software filtering strategy, which effectively suppresses the adverse effects of occasional signal delay fluctuations, thereby improving carrier synchronization performance and enhancing high-frequency circulating current suppression. This method is entirely implemented through software control strategies, requiring no additional hardware controller, and is characterized by strong applicability and low cost.

[0015] To make the above-mentioned features and advantages of the application more apparent and understandable, specific embodiments are provided below, and detailed descriptions are given in conjunction with the accompanying drawings. Attached Figure Description

[0016] Figure 1 This is a flowchart of a carrier synchronization control method for parallel converters in a doubly fed wind power generation system proposed in this application.

[0017] Figure 2 This is a structural diagram of a parallel converter in a doubly fed wind power generation system.

[0018] Figure 3 This is a circuit diagram for generating the synchronization signal in this application.

[0019] Figure 4 A schematic diagram of the logic for generating synchronization signals.

[0020] Figure 5 This is a schematic diagram illustrating the impact of delay fluctuations on carrier phase detection.

[0021] Figure 6 This is a schematic diagram of the wave phase adjustment process for different initial phases.

[0022] In the accompanying drawings, similar reference numerals refer to the same elements. Detailed Implementation

[0023] To make the objectives and technical solutions of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this application. All other embodiments obtained by those skilled in the art based on the described embodiments of this application without creative effort are within the scope of protection of this application.

[0024] In one embodiment of this application, please refer to Figure 1 This application provides a carrier synchronization control method for parallel converters in a doubly fed wind power generation system, including steps S10 to S80.

[0025] Step S10: Calculate the carrier phase adjustment of each module in the synchronization signal generation circuit based on the square wave signal containing its own carrier phase information sent by the parallel converter of the doubly fed wind power generation system. Step S20: Determine whether the parallel converter of the doubly fed wind power generation system is stable and the initial carrier synchronization is completed. If yes, proceed to step S30; otherwise, proceed to step S70. Step S30: Enter the software filtering program, calculate the average value of the carrier phase adjustment amount after the parallel converter of the doubly fed wind power generation system is running stably, and calculate the difference between the average value and the carrier phase adjustment amount. Step S40: Determine whether the difference is greater than the software filtering threshold. If yes, the carrier phase adjustment amount is limited to the average value and proceed to step S50; if no, the carrier phase adjustment amount obtained in this detection is used and proceed to step S70. Step S50: Enter the filtering count determination program to determine whether multiple software filtering operations are performed consecutively. If yes, proceed to step S60; otherwise, proceed to step S70. Step S60: Enter the fault protection procedure, immediately disable software filtering, and proceed to step S70 using the actual detected carrier phase adjustment amount; Step S70: Enter the carrier phase adjustment stage. According to the carrier phase adjustment amount, the carrier frequency is changed using a period register. Only the set value of the period register is allowed to be within the TBPRD range. TBPRD +1 and TBPRD The fluctuations between -1 and the three are indirectly changed by determining the carrier phase adjustment period and the carrier adjustment direction, thereby achieving the goal of carrier phase synchronization of each module; Step S80: Carrier synchronization for one adjustment cycle is completed.

[0026] As an example, this embodiment applies to, for example, Figure 2 The image shows a megawatt-class doubly-fed wind power generation system with a parallel converter.

[0027] As an example, the parallel converter of the doubly-fed wind power generation system includes an excitation circuit 1, a doubly-fed motor M, a modulation module 2, a main control circuit, a circuit breaker G_CB, a circuit breaker R_CB, a main transformer T, and an inductor L; the first terminal of the excitation circuit 1 is connected to the first terminal of the circuit breaker G_CB, the second terminal of the circuit breaker G_CB is connected to the first terminal of the inductor L, the second terminal of the inductor L is connected to the first terminal of the circuit breaker R_CB and the first terminal of the main transformer T, the second terminal of the circuit breaker R_CB is connected to the first terminal of the doubly-fed motor M, the second terminal of the doubly-fed motor M is connected to the second terminal of the excitation circuit 1, the second terminal of the main transformer T is connected to the power grid, and the modulation module 2 and the main control circuit are connected to the third and fourth terminals of the excitation circuit 1.

[0028] The excitation circuit 1 includes: a back-to-back parallel converter 11 and a back-to-back parallel converter 12. The back-to-back parallel converter 11 and the back-to-back parallel converter 12 are connected in parallel, and their main function is to excite the rotor. The back-to-back parallel converter 11 includes: a grid-side transformer T 11 , network-side filter L g. Grid-side converter module 111, machine-side converter module 112 and machine-side filter L r Grid-side transformer T 11 , network-side filter L g Grid-side converter module 111, generator-side converter module 112 and generator-side filter L r They are connected sequentially. The grid-side converter module 111 and the generator-side converter module 112 are connected via a DC bus. The grid-side converter includes: grid-side converter module 111 and a grid-side filter. L g Grid-side transformer T 11 The machine-side converter includes: machine-side converter module 112 and machine-side filter. L r .

[0029] The grid-side converter module 111 is mainly used to convert DC voltage and current into AC voltage and current, allowing energy to flow in both directions, including conversion from DC side to DC side (rectification mode) and conversion from DC side to AC side (inverter mode). The mesh filter L g Its main function is to filter out harmonics in the output current of the grid-side converter module 111, ensuring that the power quality delivered to the grid meets the standards.

[0030] The grid-side transformer T 11Its main function is to increase or decrease the voltage output by the grid-side converter module 111 so that it matches the generator-side voltage.

[0031] The main function of the machine-side converter module 112 is also to transform voltage and current. The back-to-back parallel converter 11 excites the doubly fed motor M through the rotor side.

[0032] The machine-side filter L r Its main function is to filter the output current and suppress voltage surges.

[0033] The principle and connection method of the back-to-back parallel converter 12 are the same as those of the back-to-back parallel converter 11, and will not be described again here.

[0034] The drive motor M is a doubly fed motor with variable speed capability, allowing energy to flow in both directions; The main function of the grid-side circuit breaker G_CB and the machine-side circuit breaker R_CB is to control the on / off state of the circuit in the event of a fault, thereby protecting the equipment and the power grid.

[0035] The main transformer T is primarily used to match the grid voltage with the voltage of the doubly fed wind power generation system.

[0036] Among them, grid-side converter module 111, machine-side converter module 112, grid-side converter module 121, and machine-side converter module 122 all require modulation module 2 to generate switching pulse signals G_PWM1, G_PWM2, R_PWM1, and R_PWM2 for their switching control. Since each of the four converter modules is controlled independently, four modulation modules 2 are required. The main control circuit's main functions include sampling, transmitting, receiving, judging, and controlling all signals. The fundamental purpose of the carrier synchronization control method for parallel converters in a doubly-fed wind power generation system provided in this application is to ensure that the phases of all carriers in the modulation module remain synchronized.

[0037] In step S10, please refer to Figure 1 In step S10, the carrier phase adjustment of each module in the synchronization signal generation circuit is calculated based on the square wave signal containing its own carrier phase information sent by the parallel converter of the doubly fed wind power generation system.

[0038] As an example, such as Figure 3 As shown, Figure 3This is a circuit diagram of the synchronization signal generation circuit of this application. The synchronization signal generation circuit includes: modules 31 to 3N, a synchronization signal bus COM1, and a synchronization signal bus COM2, with each module connected to synchronization signal bus COM1 and synchronization signal bus COM2 respectively. Taking module 31 as an example, it includes: a signal transmitting unit 311, a signal receiving unit 312, and a ferrite bead. L 1 and magnetic beads L 2. The first terminal of the signal transmitting unit 311 is connected to a ferrite bead. L 1 is connected to the synchronization signal bus COM1, and the second terminal of the signal transmitting unit 311 is connected to a ferrite bead. L 2. Connected to the synchronization signal bus COM2; the first terminal of the signal receiving unit 312 is connected to the second terminal of the signal transmitting unit 311 and the ferrite bead. L Connect the midpoints of the series connection of 2.

[0039] As an example, the signal transmitting unit 311 includes: power supply V33D1, power supply VCC1, and resistor. R 1 ,resistance R 2 ,resistance R 3 ,resistance R 4 Switching transistor Q a Switching transistor Q b and optocoupler U1; resistor R 2 The first terminal is connected to power supply V33D1, and the resistor... R 2 The second terminal is connected to the first terminal of the optocoupler U1, and the resistor... R 3 The first terminal is connected to the power supply VCC1, and the resistor R 3 The second terminal is connected to the second terminal of optocoupler U1, and the third terminal of optocoupler U1 is connected to the switching transistor. Q a First terminal connection, switch transistor Q a The second terminal is connected to the common terminal GND, resistor R 1 First terminal and switching transistor Q a The second terminal is connected to the resistor. R 1 The second terminal and the switching transistor Q a The third terminal is connected, and the fourth terminal of optocoupler U1 is connected to the resistor. R 4First terminal and switching transistor Q b The first terminal is connected to the resistor. R 4 The second terminal is connected to the switching transistor. Q b The second terminal and common ground point VSS, switching transistor Q b The second terminal is the first terminal of the signal transmitting unit 311, and the switching transistor. Q b The third terminal is the second terminal of the signal transmitting unit 311; wherein, the switching transistor Q a The third terminal is a general-purpose input port.

[0040] As an example, the signal receiving unit 312 includes: power supply V33D2, power supply VCC2, and resistor. R 5 ,resistance R 6 ,resistance R 7 and optocoupler U2; the first terminal of optocoupler U2 is connected to power supply VCC2, and the second terminal of optocoupler U2 is connected to resistor. R 6 First terminal and resistor R 7 The first terminal is connected to the resistor. R 6 The first terminal is connected to the power supply V33D2, and the third terminal of the optocoupler U2 is connected to the resistor. R 5 The first terminal is connected to the resistor. R 5 The second terminal is the first terminal of the signal receiving unit 312, and the fourth terminal of the optocoupler U2 is connected to the common terminal GND; wherein, the resistor R 7 The second terminal is a general-purpose output port.

[0041] As an example, the main control circuit includes a synchronization signal generation circuit, which performs carrier synchronization control on the signal in the modulation module 2 to keep the phases of all carriers in the modulation module synchronized.

[0042] In the synchronization signal generation circuit, power supplies V33D1 and V33D2 provide the required 3.3V supply voltage, while power supplies VCC1 and VCC2 provide the required 8V supply voltage. Optocouplers U1 and U2 provide signal isolation, and a ferrite bead... L 1. Magnetic beads L2. Suppress high-frequency noise. The presence of power supplies VCC1 and VCC2 increases the high-level voltage on the synchronization signal bus to around 8V, which helps improve the circuit's anti-interference capability.

[0043] As an example, modules 31 to 3N input a square wave signal GPIO through a specific general-purpose input / output port of the synchronization signal generation circuit. x This enables it to send a square wave signal that alternates between high and low levels. Taking module 31 as an example, module 31 configures the general-purpose input port of the signal transmission unit 311 to send a square wave signal via GPIO. x Configure the general-purpose output port of the signal receiving unit 312 to receive the synchronization signal GPIO. y According to the circuit logic, when the square wave signal GPIO is input to the general purpose input port... x When a high level is input to the synchronization signal generation circuit, the switching transistor... Q a When the optocoupler U1 is turned on, its LED is forward biased, thereby enabling the switching transistor to... Q b When the signal is turned on, it outputs a low level to the synchronization signal bus COM2; when the square wave signal GPIO is input to the general purpose input port... x If the signal is a low-level square wave, then a high-level square wave signal will be output to the synchronization signal bus COM2.

[0044] Specifically, step S10 includes: Step S101: Generate a globally unified synchronization signal based on the square wave signal, capture the falling edge of the synchronization signal as the carrier synchronization control enable signal, and select the phase at this moment as the carrier phase reference value. ψ ref ; Step S102: Calculate the initial carrier phase adjustment amount of each module based on the carrier phase reference value, and optimize the initial carrier phase adjustment amount by introducing the phase deviation caused by the signal delay of each module, so as to obtain the carrier phase adjustment amount of each module.

[0045] As an example, in step S101, please refer to Figure 3 Due to the switching transistor Q b With the presence of this feature, the first and second terminals of the signal transmitting unit 311 have open-collector characteristics. If the collector is connected to the power supply VCC2 via pull-up resistor R5 and the LED of optocoupler U2, then the synchronization signal bus COM1 and synchronization signal bus COM2 can implement "wired-AND" logic. That is, as long as one module transmits a square wave signal GPIO through the signal transmitting unit, the signal can be connected to the power supply VCC2. xWhen a high level is displayed, the synchronization signal buses COM1 and COM2 will be pulled low; only when all modules send square wave signals through the signal transmission unit GPIO will the signal be low. x Only when both are at a low level can the synchronization signal buses COM1 and COM2 be pulled high. Through wired-AND logic, it can be ensured that when modules 31 to 3N simultaneously send square wave signals to the synchronization signal bus COM2, a globally unified synchronization signal is generated on both synchronization signal buses COM1 and COM2.

[0046] Furthermore, when a globally unified synchronization signal exists on synchronization signal buses COM1 and COM2, module 31 receives a square wave signal containing carrier phase information through signal receiving unit 312. When synchronization signal buses COM1 and COM2 are at a high level, the square wave signal is low, the LED of optocoupler U2 is turned off, and the general-purpose output port receives the synchronization signal GPIO. y Pull-up to power supply V33D, presenting a high level; when synchronization signal bus COM1 and synchronization signal bus COM2 are low, the general purpose output port receives the synchronization signal GPIO. y Pulled down to ground (GND), it presents a low level. Therefore, the input and output logic of the signal receiving unit 312 are consistent.

[0047] For example, please refer to Figure 4 , Figure 4 This is a schematic diagram of the synchronization signal generation logic of this application. Figure 4 In carrier modules 31 and 32, the vertical axis represents the peak value of the set triangular wave; the triangular carrier is generally generated by the built-in Enhanced Pulse Width Modulator (EPWM). In up-and-down counting mode, the Time-Base Counter (TBCTR) in the EPWM starts from an initial value of 0 and increments by 1 after each clock signal (Time-BaseClock, TBCLK) arrives. This continues until the value of TBCTR reaches the set value of the Time-Base Period (TBPRD). After that, TBCTR decrements by 1 after each clock signal arrives. When TBCTR returns to its initial value of 0, the next cycle begins. Figure 4 The vertical axis of modules 31GPIOx and 32GPIOx represents the magnitude of the logical binary signal, which is either 0 or 1. Figure 4 It can be seen that regardless of the frequency and initial phase of the carrier waves of modules 31 to 3N in the synchronization signal generation circuit, the falling edge of the synchronization signal will always correspond to the zero-crossing point of the carrier wave of one of the modules. Therefore, capturing the synchronization signal via GPIO...y The falling edge of the signal is used as the carrier synchronization control enable signal. When modules 31 to 3N capture the synchronization signal GPIO... y At the falling edge of the signal, the carrier phase reference value is considered to be at that moment. ψ ref It is 0°.

[0048] Furthermore, if the carrier phase of modules 31 to 3N is... ψ i relative to carrier phase reference value ψ ref If a deviation exists, the module's own carrier phase will be adjusted according to the carrier synchronization control enable signal. ψ i Adjustments were made. Among them, ψ i This represents the carrier phase of the i-th module.

[0049] In step S102, based on the carrier phase reference value ψ ref Calculate the initial carrier phase adjustment for each module. Dp i0， The initial carrier phase adjustment is optimized by incorporating the phase deviation caused by signal delays in each module. Dp i0 The carrier phase adjustment amount of each module is obtained. Dp i .in, Dp i This represents the carrier phase adjustment amount of the i-th module.

[0050] As an example, based on the carrier phase reference value ψ ref At the selected time of the carrier synchronization control enable signal, the carrier phase of each module is... ψ i With the carrier phase reference value ψ ref By subtracting the values, we obtain the initial carrier phase adjustment amount for the i-th module. Dp i0 .

[0051] As an example, carrier phase deviation is caused by the delay of the module synchronization signal. To avoid unnecessary actions, it is necessary to compensate for the detected carrier phase deviation. Considering the consistency of hardware parameters, it can be approximated that the signal delays of each module are basically the same, that is, the carrier phases of each module are similar. ψ i relative to carrier phase reference value ψ refThe deviations are basically consistent. Therefore, before the parallel converter of the doubly fed wind power system is put into formal operation, a certain module can be made to generate and receive synchronization signals to determine the phase deviation caused by the delay. ψ D And utilize phase deviation ψ D The carrier phase detection stage is corrected. Finally, the actual carrier phase adjustment of the i-th module can be obtained. Dp i for: Formula (1) In step S20, please refer to Figure 1 In step S20, it is determined whether the parallel converter of the doubly fed wind power generation system is stable and the initial carrier synchronization is completed. If yes, proceed to step S30; otherwise, proceed to step S70.

[0052] As an example, determining whether the parallel converter of the doubly fed wind power system is stable or whether the initial carrier synchronization is completed includes: during the initial carrier synchronization stage or dynamic adjustment stage of the parallel converter of the doubly fed wind power system, directly using the initial carrier phase adjustment amount to perform phase adjustment so that the carrier phases of each module are basically in phase.

[0053] Furthermore, since the software filtering strategy only fine-tunes the phase between modules, and the phase difference between modules is large before the doubly-fed wind power generation system parallel converter becomes unstable, software filtering cannot be directly applied. The system determines whether the doubly-fed wind power generation system parallel converter is stable and whether the initial carrier synchronization is complete. If yes, to suppress the phase difference caused by delay fluctuations, the system proceeds to step S30 to enable the software filtering strategy; otherwise, it proceeds to step S70.

[0054] In step S30, please refer to Figure 1 In step S30, the software filtering program is entered to calculate the carrier phase adjustment amount. Dp i After the parallel converter of the doubly fed wind power generation system has been operating stably, the average value of the dynamically updated synchronous control enable signal at specific carrier intervals is calculated. Dp ave With the carrier phase adjustment amount Dp i The difference.

[0055] As an example, set Dp ave Carrier phase adjustment amount Dp i The average value over a specific period. D ψ aveAfter the parallel converter of the doubly fed wind power system is operating stably, every [time] N ave The carrier synchronization control enable signal is dynamically updated to ensure the accuracy of subsequent filtering decisions. The average value... Dp ave The specific expression is shown in formula (2).

[0056] Formula (2) Specifically, in actual operation, the average value Dp ave It will stabilize around 0°. Dp i(k) This represents the carrier phase adjustment amount of the i-th module when the k-th carrier synchronization control enable signal arrives.

[0057] Furthermore, the average value Δ is obtained. ψ ave Then, calculate the carrier phase adjustment amount Δ. ψ i With average Δ ψ ave difference.

[0058] Furthermore, to avoid abrupt changes in signal delay affecting the average value Δ ψ ave The impact of calculation, when the carrier phase adjustment Δ is obtained in a certain detection ψ i With average Δ ψ ave The difference exceeds the software filtering threshold ψ f When, the average value Δ ψ ave This value will be ignored during the calculation. Also, if the average value Δ before and after the update... ψ ave If the difference is too large, the average value Δ will also be determined. ψ ave If the calculated value is invalid, continue using the average value Δ before the update. ψ ave Perform filtering and judgment until the next value update.

[0059] Among them, software filtering threshold ψ f The selection criteria are: the maximum value of the carrier phase difference change between two adjacent carrier synchronization control enable signals. Dp max Assuming the power frequency is in the carrier synchronization control enable signal frequency range, then... f oN (Hz), rated carrier frequency is f cN(Hz), crystal oscillator frequency error is ± e osc (PPM) is the maximum value of the carrier phase difference change between two adjacent carrier synchronization control enable signals. Dp max It can be represented as: Formula (3) Furthermore, considering the uncertainties in actual working conditions, the software filtering threshold... ψ f The selection of the threshold should allow for a certain margin to avoid affecting the normal carrier phase adjustment process. This leads to the software filtering threshold. ψ f for: Formula (4) in, k f This is the margin coefficient, which can generally be selected as 2 to 3.

[0060] In step S40, please refer to Figure 1 In step S40, it is determined whether the difference is greater than the software filtering threshold. ψ f If yes, the carrier phase adjustment amount is limited to the average value, and the process proceeds to step S50; otherwise, the carrier phase adjustment amount obtained from the current detection is used, and the process proceeds to step 70.

[0061] As an example, when performing software filtering, if the detected carrier phase adjustment amount... Dp i With average Δ ψ ave The difference exceeds the software filtering threshold ψ f If this is the case, it is determined that the signal delay has fluctuated significantly, and the carrier phase adjustment amount is [not specified]. Dp i Will be limited to the average value Dp ave Entering the subsequent carrier phase adjustment stage to avoid carrier phase... ψ i Significant changes; if the detected carrier phase adjustment amount Dp i With average Δ ψ ave The difference does not exceed the software filtering threshold. ψ f The carrier phase adjustment amount obtained from this actual test will be used. Dp i Proceed to the subsequent carrier phase adjustment stage.

[0062] For example, please refer to Figure 5 , Figure 5 This diagram illustrates the impact of delay fluctuations on carrier phase detection. It assumes that the signal delay of module 32 is stable, while the signal delay of module 31 experiences occasional fluctuations due to interrupt priority, etc., i.e., the transmission delay of module 31. t d2r-1 Reception delay t d3-1 If module 31 is inconsistent with module 32, then the carrier phase deviation caused by signal delay between the two modules will be inconsistent. The phase deviation of module 31 is... ψ D1 The phase deviation of module 32 is ψ D2 .

[0063] At this point, to achieve carrier synchronization, the carrier phase adjustment amount of module 31 needs to be: Δ ψ 1= ψ 1- ψ ref - ψ D1 The carrier phase adjustment amount of module 32 is: Δ ψ 2= ψ 2- ψ ref - ψ D2 However, phase deviation ψ D It cannot be updated in real time; it can only be determined as a fixed value before the parallel converter of the doubly-fed wind power generation system is officially put into operation. ψ D2 Therefore, the actual carrier phase adjustment of module 31 is: Δ ψ 1= ψ 1- ψ ref - ψ D2 Then the carrier phase of the two modules will ultimately exist | ψ D1 - ψ D2 The phase difference can only be synchronized when the delay fluctuation returns to normal. In this case, proceed to step S50. If there is no delay fluctuation in modules 31 to 3N, proceed to step S70.

[0064] In step S50, please refer to Figure 1 In step S50, the program enters the filtering count determination procedure to determine whether multiple software filtering operations are performed consecutively. If yes, it proceeds to step S60; otherwise, it proceeds to step S70.

[0065] In step S60, please refer to Figure 1In step S60, the fault protection procedure is entered, software filtering is immediately disabled, and the actual detected carrier phase adjustment is used to enter step S70.

[0066] As an example, since the large fluctuations in signal delay have a limited duration, typically several enable signal cycles, when software filtering is performed multiple times consecutively, it can be assumed that the software filtering has malfunctioned, and the actual carrier phase... ψ i The changes have occurred, and software filtering must be immediately disabled. Afterwards, the actual detected carrier phase adjustment should be used. Dp i Proceed to the subsequent carrier phase adjustment stage.

[0067] In step S70, please refer to Figure 1 In step S70, the process proceeds to the carrier phase adjustment stage, based on the aforementioned carrier phase adjustment amount. Dp i The carrier frequency is changed using a period register, and the set value of the period register is only allowed to be within the TBPRD range. TBPRD +1 and TBPRD The fluctuations between these three factors (-1, -2, and -3) are indirectly altered by determining the carrier phase's adjustment period and direction. ψ i This achieves the goal of carrier phase synchronization among all modules.

[0068] As an example, the carrier frequency is changed using the period register TBPRD. See also... Figure 6 , Figure 6 The diagram illustrates the carrier phase adjustment process with different initial phases. To minimize carrier frequency fluctuations, the traditional frequency modulation and phase modulation scheme is improved as follows: only the setting value of the period register TBPRD is allowed within the range of TBPRD. TBPRD +1 and TBPRD -1 fluctuates among the three.

[0069] Furthermore, based on the different adjustment directions, the carrier phase adjustment process under different initial phase differences can be divided into two categories. When the carrier synchronization control enable signal arrives, if the carrier phase adjustment amount Δ calculated by this module... ψ i If it is in (0°, 180°], it means that the module's own carrier phase is... ψ i Leading the carrier phase reference value ψ ref The carrier period needs to be increased, that is, the value of the period register TBPRD needs to be set to TBPRD. +1; If the carrier phase adjustment amount Δ calculated by this module is... ψ i A position of (-180°, 0°) indicates that the module's own carrier phase... ψ i Lagging behind carrier phase reference value ψ ref The carrier period needs to be reduced, which means adjusting the setting of the period register to TBPRD. -1.

[0070] Furthermore, to achieve carrier phase ψ i Precise adjustment requires not only determining the adjustment direction but also knowing the adjustment period. When the period register is calculated and set to TBPRD... When ±1, the phase adjustment amplitude within one carrier cycle ψ regu for: Formula (5) Therefore, the carrier adjustment period can be further calculated. N regu : Formula (6) As an example, if the calculated carrier adjustment period N regu Less than the number of carrier modulation cycles between two carrier synchronization control enable signals (approximately the ratio of carrier frequency to modulation wave frequency, i.e., carrier ratio). N c ), then in front N regu Each carrier cycle will adjust the value of the period register TBPRD to TBPRD. ±1, in the remaining ( N c - N regu The value of the cycle register TBPRD will be restored to TBPRD after 10 cycles. This is to achieve precise phase adjustment. If the carrier adjustment period... N regu Greater than carrier ratio N c Therefore, before the next carrier synchronization control enable signal arrives, the value of the period register TBPRD will be adjusted to TBPRD. ±1. At this point, carrier synchronization cannot be achieved within one power frequency cycle. The carrier phase difference that was not adjusted in the previous cycle will continue to be adjusted after the next enable signal arrives, until carrier synchronization is completed.

[0071] In practice, significant carrier phase differences typically occur during the startup phase of parallel converters in doubly-fed wind power systems. After carrier synchronization control is initially enabled and the system enters a stable state, the carrier phase differences between modules change slowly and are relatively small due to the minimal difference in carrier frequencies. In most cases, the calculated regulation period... N regu All less than the carrier ratio N c Therefore, the performance of this frequency modulation and phase modulation scheme can meet the needs of practical applications.

[0072] In step S80, please refer to Figure 1 In step S80, carrier synchronization is completed in one adjustment cycle.

[0073] As an example, after carrier synchronization is completed in one adjustment cycle, the system checks for delay fluctuations during the next adjustment cycle. If not, it directly enters the carrier phase adjustment stage. If a fault is detected, the system checks for faults. If no fault is detected, the software-filtered carrier phase adjustment amount Δ is used. ψ i Perform carrier phase adjustment; if the fault still exists, continue using the actual detected carrier phase adjustment amount Δ. ψ i Carrier phase adjustment is performed. This mechanism enables fault protection for software filtering.

[0074] This application proposes a carrier synchronization control method for parallel converters in a doubly-fed wind power generation system, aiming to achieve carrier phase synchronization of the parallel converter system within one power frequency cycle. This method utilizes the detected and calculated carrier phase adjustment amount Δ ψ i This method adjusts the carrier phase according to the adjustment direction and period to achieve carrier phase synchronization of each module, avoiding a complex parameter tuning process and offering advantages such as simplicity and ease of implementation. Furthermore, the method incorporates a software filtering strategy, which effectively suppresses the adverse effects of occasional signal delay fluctuations, thereby improving carrier synchronization performance and enhancing high-frequency circulating current suppression. This method is entirely implemented through software control strategies, requiring no additional hardware controller, and is characterized by strong applicability and low cost.

[0075] Although this application has been disclosed above with reference to embodiments, it is not intended to limit this application. Anyone skilled in the art may make some modifications and refinements without departing from the spirit and scope of this application. Therefore, the scope of protection of this application shall be determined by the appended claims.

Claims

1. A carrier synchronization control method suitable for a parallel converter of a doubly-fed wind power generation system, characterized by, Including steps S10 to S80: Step S10: Based on the square wave signal containing its own carrier phase information sent by the parallel converter of the doubly fed wind power system, calculate the carrier phase adjustment of each module in the synchronization signal generation circuit; the synchronization signal generation circuit includes: any number of modules, a first synchronization signal bus, and a second synchronization signal bus, each module being connected to the first synchronization signal bus and the second synchronization signal bus respectively; each module includes: a signal transmitting unit, a signal receiving unit, a first ferrite bead, and a second ferrite bead, the first terminal of the signal transmitting unit being connected to the first synchronization signal bus through the first ferrite bead, and the second terminal of the signal transmitting unit being connected to the second synchronization signal bus through the second ferrite bead; the first terminal of the signal receiving unit is connected to the midpoint of the series connection between the first terminal of the signal transmitting unit and the first ferrite bead; the square wave signal is input to the signal transmitting unit; Step S10 includes: Step S101: Generate a globally unified synchronization signal based on the square wave signal, capture the falling edge of the synchronization signal as the carrier synchronization control enable signal, and select the phase at this moment as the carrier phase reference value. Step S102: Based on the carrier phase reference value, calculate the initial carrier phase adjustment amount of each module, and optimize the initial carrier phase adjustment amount by introducing the phase deviation caused by the signal delay of each module to obtain the carrier phase adjustment amount of each module. Step S20: Determine whether the parallel converter of the doubly fed wind power generation system is stable and the initial carrier synchronization is completed. If yes, proceed to step S30; otherwise, proceed to step S70. Step S30: entering the software filter program, calculating the carrier phase adjustment amount every interval of N ave carrier synchronization control enable signal dynamic update average value, expressed by the formula: in, Δψ ave This represents the average value. Δψ i(k) Indicates the first i The module in the first k The amount of carrier phase adjustment when the carrier synchronization control enable signal arrives. N ave Indicates the number of intervals for carrier synchronization control enable signals; The selection of the software filtering threshold is based on the maximum value of the carrier phase difference change between two adjacent carrier synchronization control enable signals, and the maximum value is expressed by the formula: in, Δψ max This represents the maximum value of the carrier phase difference change between two adjacent carrier synchronization control enable signals. f oN Indicates power frequency, f cN Indicates the rated carrier frequency, ± e osc This indicates the crystal oscillator frequency error; The software filtering threshold is expressed by the formula: wherein ψ f represents a software filtering threshold, k f represents a margin coefficient; Calculate the difference between the average value and the carrier phase adjustment amount; Step S40: Determine whether the difference is greater than the software filtering threshold. If yes, the carrier phase adjustment amount is limited to the average value and proceed to step S50; otherwise, the carrier phase adjustment amount obtained in this detection is used and proceed to step 70. Step S50: Enter the filtering count determination program to determine whether multiple software filtering operations are performed consecutively. If yes, proceed to step S60; otherwise, proceed to step S70. Step S60: Enter the fault protection procedure, immediately disable software filtering, and proceed to step S70 using the actual detected carrier phase adjustment amount; Step S70: Enter the carrier phase adjustment stage. According to the carrier phase adjustment amount, the carrier frequency is changed using a period register. Only the set value of the period register is allowed to be within the TBPRD range. TBPRD +1 and TBPRD The fluctuations between -1 and the three are indirectly changed by determining the carrier phase adjustment period and the carrier adjustment direction, thereby achieving the goal of carrier phase synchronization of each module; When the period register is set to TBPRD ±1, the adjusted period is given by the formula: in, N regu Indicates the adjustment period. This represents the carrier phase adjustment amount of the i-th module. ψ regu The phase adjustment amplitude within one carrier cycle is expressed by the formula: In step S70, depending on the adjustment direction, when the carrier synchronization control enable signal arrives, if the carrier phase adjustment amount calculated by this module is within (0°, 180°), the setting value of the adjustment period register is TBPRD. +1; If the carrier phase adjustment calculated by this module is within (-180°, 0°), the setting value of the adjustment period register is TBPRD. -1; Step S80: Carrier synchronization for one adjustment cycle is completed.

2. The carrier synchronization control method for the parallel converter of the doubly-fed wind power generation system according to claim 1, characterized in that, In step S102, based on the carrier phase reference value, at the time when the carrier synchronization control enable signal is selected, the carrier phase of each module is subtracted from the carrier phase reference value to obtain the initial carrier phase adjustment amount of each module; the phase deviation caused by the signal delay of each module is introduced, including: before the synchronization signal generation circuit is officially running, a certain module is made to automatically generate and receive a synchronization signal, thereby determining the phase deviation caused by the delay.

3. The carrier synchronization control method for parallel converters in a doubly-fed wind power generation system as described in claim 1, characterized in that, In step S20, determining whether the parallel converter of the doubly fed wind power system is stable and the initial carrier synchronization is completed includes: during the initial carrier synchronization stage or dynamic adjustment stage of the parallel converter of the doubly fed wind power system, directly using the initial carrier phase adjustment amount to perform phase adjustment so that the carrier phases between each module are basically in phase.

4. The carrier synchronization control method for the parallel converter of the doubly-fed wind power generation system according to claim 1, characterized in that, Step S30 includes: after the synchronization signal generation circuit has been operating stably, every [time period]... N ave The average value of the carrier synchronization control enable signal is dynamically updated. When the difference between the carrier phase adjustment value obtained in a certain detection and the average value exceeds the software filtering threshold, the average value calculation process will ignore the average value. When the difference between the average value before and after the update is too large, the calculated value of the current average value will also be determined to be invalid, and the average value before the update will continue to be used for filtering and judgment until the next value update.

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