A high-frequency power control system and method based on MOS tubes

Abstract

The application discloses a high-frequency power control system and method based on MOS tubes, relates to the technical field of MOS tube control, and has the rapid response and self-adaptive regulation and control capability for abnormal power consumption behavior through the targeted feedback adjustment of gate drive parameters of target MOS tubes and the synchronous update of the drive control logic strategy. Finally, a dynamic correction mechanism is formed with the periodic dynamic loss integral evaluation value TDE as the feedback basis, the optimization effect of the drive control strategy can be verified by comparing the periodic dynamic loss integral evaluation values TDE before and after adjustment, the repeated triggering of the parameter adjustment process is realized, the power control path capable of closed-loop operation is constructed, the loss perception precision, strategy adjustment targeting and drive control closed-loop of the MOS tube in the high-frequency working scene are realized, and the multiple deficiencies in time accuracy, energy identification and response path in the existing power control technology are effectively overcome.

Description

Technical Field

[0001] This invention relates to the field of MOSFET control technology, specifically to a high-frequency power control system and method based on MOSFETs. Background Technology

[0002] Currently, with the continuous advancement of electronic technology and manufacturing processes, semiconductor device manufacturing, as a crucial link in the microelectronics field, undertakes the core task of converting design logic into physical circuits. Among these, integrated circuit transistors, as the basic units for constructing core functional modules such as CMOS logic, power management, and signal driving, have their fabrication methods directly affecting chip performance, stability, and energy consumption. Against the backdrop of transistor manufacturing processes continuously evolving towards higher integration, higher frequencies, and smaller sizes, typical structures such as MOS transistors are widely used in high-frequency, high-speed control circuits.

[0003] However, transistor structures integrating gas purification functions typically require maintaining stable power control during high-frequency dynamic switching environments. Currently, commonly used power control strategies rely on fixed gate drive voltages, static threshold control, or periodic average power regulation. These methods cannot accurately track and handle instantaneous switching losses in each cycle when transistors such as MOSFETs are performing high-frequency switching. Especially in transistors involving gas purification mechanisms, sensitive material modules such as surface adsorption layers and ionization trapping regions may be embedded in the structure. These modules exhibit high responsiveness and sensitivity to power fluctuations, current spikes, and short-term electric field disturbances. Ignoring the distribution of switching losses on a microscopic timescale in these traditional control strategies will lead to a reduction in overall system efficiency and may even induce problems such as localized heat accumulation and structural degradation. Summary of the Invention

[0004] To address the shortcomings of existing technologies, this invention provides a high-frequency power control system and method based on MOSFETs, which solves the problems mentioned in the background art.

[0005] To achieve the above objectives, the present invention provides the following technical solution: a high-frequency power control method based on a MOSFET, comprising the following steps:

[0006] S1. By synchronously sampling the drain voltage and drain current of the target MOSFET in each switching cycle, an instantaneous switching power dataset IPD is established according to time segments within the switching cycle.

[0007] S2. Based on the instantaneous switching power dataset IPD, the power data in the current switching cycle is integrated to evaluate the cycle dynamic loss integral evaluation value TDE in the current cycle, and then bound to the cycle number to form a time-series data sequence.

[0008] S3. Using the time-series data sequence composed of the periodic dynamic loss integral evaluation value TDE, establish a power fluctuation analysis model PFA, analyze the fluctuation trend of the periodic dynamic loss integral evaluation value TDE, identify abnormal peaks, oscillation drift and trend deviation behavior characteristics, and mark the power consumption abnormal period.

[0009] S4. Based on the abnormal cycle marking results output by the power fluctuation analysis model PFA, the gate drive parameters of the target MOSFET are adjusted, including the drive voltage, turn-on delay time and turn-off dead time parameters, and the drive control logic strategy is adjusted synchronously.

[0010] S5. Apply the adjusted drive control logic strategy to subsequent cycles, re-execute steps S1 and S2, obtain the new cycle dynamic loss integral evaluation value TDE_New, compare it with the previous cycle dynamic loss integral evaluation value TDE data, and determine the effectiveness of the current drive adjustment strategy.

[0011] Preferably, S1 includes S11 and S12;

[0012] S11. After the MOSFET enters the switching working state, the drain voltage signal and drain current signal of the target MOSFET are synchronously sampled using a high-bandwidth data acquisition module. During the sampling process, the voltage and current values ​​within the same cycle are synchronously acquired through a unified clock trigger, forming a voltage sampling sequence and a current sampling sequence.

[0013] S12. Based on the obtained voltage sampling sequence and current sampling sequence, the voltage and current values ​​in each time segment are paired and calculated point by point according to the preset time segment division method to construct the instantaneous power data of the corresponding time segment; the instantaneous power results of multiple time segments are arranged in chronological order to form the instantaneous switching power dataset IPD corresponding to the current switching cycle.

[0014] Preferably, S2 includes S21 and S22;

[0015] S21. Receive the instantaneous switching power dataset IPD output in step S1, perform segment-by-segment accumulation calculation on the power data corresponding to all time segments within the current switching cycle range, obtain the total dynamic energy loss value in a single switching cycle of the current MOSFET, and define the total dynamic energy loss value as the periodic dynamic loss integral evaluation value TDE.

[0016] S22. Bind the periodic dynamic loss integral evaluation value TDE with the period number corresponding to the current switching period, and record the two in a one-to-one correspondence to form a time series data sequence of periodic dynamic loss integral evaluation value TDE containing continuous periods, so as to provide a historical loss record basis for subsequent power fluctuation trend analysis.

[0017] Preferably, S3 includes S31 and S32;

[0018] S31. Based on the time-series data sequence composed of the periodic dynamic loss integral evaluation value TDE, a power fluctuation analysis model PFA is constructed to characterize the power consumption trend change characteristics through the historical evolution relationship of the data sequence under continuous switching cycles. The power fluctuation analysis model PFA is used to fit the overall trend line, average trajectory and fluctuation distribution state of the periodic dynamic loss integral evaluation value TDE.

[0019] The power fluctuation analysis model PFA is established through steps S311, S312 and S313.

[0020] S311. Perform a weighted moving average smoothing process on the continuous periodic dynamic loss integral evaluation value TDE within the specified sliding time window to obtain the trajectory line of the periodic dynamic loss mean.

[0021] S312. Use a regression curve to fit the TDE point value of the periodic dynamic loss integral evaluation value from the current period to the previous few periods, and generate a periodic dynamic loss trend line to represent the overall evolution direction of power consumption.

[0022] S313. The deviation between the periodic dynamic loss integral evaluation value TDE and the mean trajectory line for each period is normalized by standard deviation, the fluctuation range and frequency are statistically analyzed, a power fluctuation distribution state spectrum is formed, and the power fluctuation analysis model PFA is formed by combining it with the periodic dynamic loss mean trajectory line and the periodic dynamic loss trend line.

[0023] Preferably, in step S32, based on the established power fluctuation analysis model PFA, the periodic dynamic loss integral evaluation value TDE corresponding to the current switching cycle is compared and analyzed with the three structural elements of the power fluctuation analysis model PFA, specifically including the following three judgment conditions:

[0024] Condition 1: Compare the current periodic dynamic loss integral evaluation value TDE with the trajectory line of the periodic dynamic loss mean. If the deviation exceeds the set threshold range, it is identified as an abnormal fluctuation of the peak value.

[0025] Condition 2: Compare the current periodic dynamic loss integral evaluation value TDE with the slope and trend direction of the periodic dynamic loss trend line. If the continuous period shows an upward deviation trend, it is identified as a continuous increase in power consumption.

[0026] Condition 3: Check the current periodic dynamic loss integral evaluation value TDE and the historical fluctuation frequency boundary of the power fluctuation distribution state spectrum. If it shows alternating up and down oscillation, it is identified as periodic oscillation drift.

[0027] If the periodic dynamic loss integral evaluation value TDE meets the abnormal characteristic criteria in any of the three judgment conditions, it is marked as an abnormal power consumption period.

[0028] Preferably, S4 includes S41 and S42;

[0029] S41. Based on the marking results of the power consumption abnormal cycle, identify whether the current cycle belongs to the power consumption abnormal cycle; if it is determined to be the power consumption abnormal cycle, generate a drive control strategy adjustment trigger signal. The drive control strategy adjustment trigger signal is used to activate the feedback adjustment channel in the gate control system and start the corresponding gate drive parameter correction process.

[0030] The gate drive parameter correction process includes steps S411, S412 and S413;

[0031] S411. Identify the gate drive parameter configuration set used in the current cycle;

[0032] S412. Call the preset drive parameter adjustment strategy template, and determine the target parameters to be adjusted for the drive dimensions corresponding to the abnormal power consumption characteristics, including drive voltage setting value, turn-on delay time setting value and turn-off dead time setting value.

[0033] S413. Generate the adjusted gate drive parameter settings as valid inputs for the next cycle execution.

[0034] Preferably, in step S42, the feedback adjustment of the gate drive parameters of the target MOSFET is synchronously updated with the drive control logic. After adjusting the trigger signal based on the drive control strategy and generating the target parameter setpoint, the gate drive parameter setpoint corresponding to the cycle is called and applied to the gate drive module in the current control cycle of the target MOSFET.

[0035] The gate drive parameters include: a drive voltage setting value, used to adjust the gate signal amplitude to match the dynamic power consumption state; a turn-on delay time setting value, used to correct the turn-on edge triggering timing to avoid cross-conduction; and a turn-off dead time setting value, used to adjust the turn-off process time window to achieve soft switching or suppress overshoot.

[0036] Simultaneously, based on the application results of the gate drive parameter settings, the gate drive parameter control configuration table is updated synchronously, and the associated gate signal output scheduling rules and periodic parameter execution paths are adjusted synchronously.

[0037] Preferably, S5 includes S51 and S52;

[0038] S51. After the gate drive parameter feedback adjustment is completed and the actual application is completed, the drain voltage signal and drain current signal of the target MOSFET are re-acquired in the next switching cycle. The voltage sampling sequence and current sampling sequence within the cycle are obtained, and a new instantaneous switching power dataset IPD_New is constructed.

[0039] Preferably, in step S52, the new instantaneous switching power dataset IPD_New is input into the cycle energy assessment process, the new cycle dynamic loss integral assessment value TDE_New corresponding to this cycle is recalculated, and the new cycle dynamic loss integral assessment value TDE_New is compared and analyzed with the cycle dynamic loss integral assessment value TDE of the previous cycle. The effectiveness of the driving adjustment strategy is judged based on the comparison and analysis results, specifically including:

[0040] When the new cycle dynamic loss integral evaluation value TDE_New < the cycle dynamic loss integral evaluation value TDE, it is determined that the driving adjustment effect has reached the expectation.

[0041] When the new cycle dynamic loss integral evaluation value TDE_New is greater than or equal to the cycle dynamic loss integral evaluation value TDE, it is determined that the drive adjustment effect has not met expectations, and the gate drive parameter correction process is called again.

[0042] A high-frequency power control system based on MOSFETs includes a MOSFET data acquisition module, a dynamic loss assessment module, a loss trend identification module, a gate drive module, and a drive adjustment decision module.

[0043] The MOSFET data acquisition module synchronously samples the drain voltage and drain current of the target MOSFET in each switching cycle and establishes an instantaneous switching power dataset (IPD) for each switching cycle according to time segments.

[0044] The dynamic loss assessment module is based on the instantaneous switching power dataset IPD. It performs integral processing on the power data in the current switching cycle to evaluate the cycle dynamic loss integral assessment value TDE in the current cycle, and binds it with the cycle number to form a time-series data sequence.

[0045] The loss trend identification module uses the time-series data sequence composed of the periodic dynamic loss integral evaluation value TDE to establish a power fluctuation analysis model PFA, analyze the fluctuation trend of the periodic dynamic loss integral evaluation value TDE, identify abnormal peaks, oscillation drift and trend deviation behavior characteristics, and mark abnormal power consumption periods.

[0046] The gate drive module adjusts the gate drive parameters of the target MOSFET based on the abnormal cycle marking results output by the power fluctuation analysis model (PFA), including the drive voltage, turn-on delay time, and turn-off dead time parameters, and simultaneously adjusts the drive control logic strategy.

[0047] The drive adjustment decision module applies the adjusted drive control logic strategy to subsequent cycles, re-executes steps S1 and S2, obtains the new cycle dynamic loss integral evaluation value TDE_New, compares it with the previous cycle dynamic loss integral evaluation value TDE data, and judges the effectiveness of the current drive adjustment strategy.

[0048] This invention provides a high-frequency power control system and method based on MOSFETs, which has the following beneficial effects:

[0049] (1) By making targeted feedback adjustments to the gate drive parameters of the target MOSFET and combining them with the synchronous update of the drive control logic strategy, the system has the ability to respond quickly and adaptively regulate abnormal power consumption behavior. Finally, a dynamic correction mechanism based on the periodic dynamic loss integral evaluation value TDE is formed. By comparing the periodic dynamic loss integral evaluation value TDE before and after adjustment, the optimization effect of the drive control strategy can be verified, and the parameter adjustment process can be repeatedly triggered. A power control path that can operate in a closed loop is constructed, realizing the accurate loss perception, targeted strategy adjustment, and closed-loop drive control of the MOSFET in high-frequency operating scenarios. This effectively overcomes the multiple shortcomings of existing power control technologies in terms of time accuracy, energy identification, and response path.

[0050] (2) Taking the periodic dynamic loss integral evaluation value TDE of the current switching cycle as the judgment object, it is compared with the periodic dynamic loss mean trajectory line, periodic dynamic loss trend line and power fluctuation distribution state spectrum respectively, and judged in turn whether there is peak abnormal fluctuation, continuous power consumption increase behavior and periodic oscillation drift. Once any judgment condition is met, the current cycle can be marked as a power consumption abnormal cycle, and the corresponding drive control strategy adjustment judgment signal is output. Based on the above mechanism, not only is the joint modeling and intelligent judgment of the periodic dynamic loss integral evaluation value TDE in multiple dimensions such as evolution trend, center shift and statistical distribution realized, but also a recognition and judgment path that can dynamically identify power consumption risk and qualitatively distinguish fluctuation type is constructed by combining and referencing the model structure elements. It has the characteristics of strong trend analysis capability, high abnormal response granularity and clear behavior recognition logic.

[0051] (3) By adjusting the trigger signal generation and gate drive parameter correction process through the drive control strategy, the system can quickly respond and enter three sub-processes based on the identification results of abnormal power consumption cycles: gate drive parameter configuration set identification, drive parameter adjustment strategy template calling, and target parameter generation. This results in a new configuration result for core drive parameters such as drive voltage setting value, conduction delay time setting value, and turn-off dead time setting value. Subsequently, the above gate drive parameter setting values ​​are applied in the actual control cycle, and the gate drive parameter control configuration table, gate signal output scheduling rules, and periodic parameter execution path are updated simultaneously. This ensures that the drive parameters are not only set, but also dynamically distributed and adapted according to the periodic logic execution node, forming a closed-loop control chain integrating "setting - management - calling - feedback". This realizes an efficient control closed-loop path with the periodic dynamic loss integral evaluation value TDE as the core of performance feedback, the gate drive parameter setting value as the execution entry point, and the gate drive parameter control configuration table and periodic parameter execution path as the strategy carrying structure. This improves the system's adjustment response rate, drive behavior consistency, and fault self-repair capability in actual operation. Attached Figure Description

[0052] Figure 1 This is a schematic diagram of the steps of a high-frequency power control system based on MOSFETs according to the present invention;

[0053] Figure 2 This is a schematic block diagram of a high-frequency power control method based on a MOSFET according to the present invention. Detailed Implementation

[0054] The technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without creative effort are within the scope of protection of the present invention.

[0055] Example 1

[0056] This invention provides a high-frequency power control system based on MOSFETs. Please refer to [link / reference]. Figure 1 This includes the following steps:

[0057] S1. By synchronously sampling the drain voltage and drain current of the target MOSFET in each switching cycle, an instantaneous switching power dataset IPD is established according to time segments within the switching cycle.

[0058] S2. Based on the instantaneous switching power dataset IPD, the power data in the current switching cycle is integrated to evaluate the cycle dynamic loss integral evaluation value TDE in the current cycle, and then bound to the cycle number to form a time-series data sequence.

[0059] S3. Using the time-series data sequence composed of the periodic dynamic loss integral evaluation value TDE, establish a power fluctuation analysis model PFA, analyze the fluctuation trend of the periodic dynamic loss integral evaluation value TDE, identify abnormal peaks, oscillation drift and trend deviation behavior characteristics, and mark the power consumption abnormal period.

[0060] S4. Based on the abnormal cycle marking results output by the power fluctuation analysis model PFA, the gate drive parameters of the target MOSFET are adjusted, including the drive voltage, turn-on delay time and turn-off dead time parameters, and the drive control logic strategy is adjusted synchronously.

[0061] S5. Apply the adjusted drive control logic strategy to subsequent cycles, re-execute steps S1 and S2, obtain the new cycle dynamic loss integral evaluation value TDE_New, compare it with the previous cycle dynamic loss integral evaluation value TDE data, and determine the effectiveness of the current drive adjustment strategy.

[0062] In this embodiment, a finely granular and time-continuous instantaneous switching power dataset IPD and a periodic dynamic loss integral evaluation value TDE are constructed, thereby establishing a quantitative evaluation basis for the energy loss behavior of MOSFETs in each cycle at the power control layer. Furthermore, combined with the constructed power fluctuation analysis model PFA, not only is a comprehensive modeling of the changing trend of the periodic dynamic loss integral evaluation value TDE achieved, but the model output results can also accurately identify power consumption instability behaviors, including abnormal peaks, periodic oscillations, and trend deviations. Based on this, targeted feedback adjustment of the gate drive parameters of the target MOSFET, combined with synchronous updates to the drive control logic strategy, enables the system to achieve... The system possesses rapid response and adaptive adjustment capabilities to abnormal power consumption behavior. Finally, a dynamic correction mechanism based on the periodic dynamic loss integral evaluation value (TDE) is formed. By comparing the periodic dynamic loss integral evaluation value (TDE) before and after adjustment, the optimization effect of the drive control strategy can be verified, and the parameter adjustment process can be repeatedly triggered. A power control path that can operate in a closed loop is constructed, realizing accurate loss perception, targeted strategy adjustment, and closed-loop drive control of MOSFETs in high-frequency operating scenarios. This effectively overcomes multiple shortcomings in time accuracy, energy identification, and response path of existing power control technologies, and improves the operating efficiency, response accuracy, and overall stability of the high-frequency power control system.

[0063] Example 2

[0064] Specifically: S1 includes S11 and S12;

[0065] S11. After the MOSFET enters the switching working state, the drain voltage signal and drain current signal of the target MOSFET are synchronously sampled using a high-bandwidth data acquisition module. During the sampling process, the voltage and current values ​​within the same cycle are synchronously acquired through a unified clock trigger, forming a voltage sampling sequence and a current sampling sequence.

[0066] S12. Based on the obtained voltage sampling sequence and current sampling sequence, the voltage and current values ​​in each time segment are paired and calculated point by point according to the preset time segment division method to construct the instantaneous power data of the corresponding time segment; the instantaneous power results of multiple time segments are arranged in chronological order to form the instantaneous switching power dataset IPD corresponding to the current switching cycle.

[0067] S2 includes S21 and S22;

[0068] S21. Receive the instantaneous switching power dataset IPD output in step S1, perform segment-by-segment accumulation calculation on the power data corresponding to all time segments within the current switching cycle range, obtain the total dynamic energy loss value in a single switching cycle of the current MOSFET, and define the total dynamic energy loss value as the periodic dynamic loss integral evaluation value TDE.

[0069] S22. Bind the periodic dynamic loss integral evaluation value TDE with the period number corresponding to the current switching period, and record the two in a one-to-one correspondence to form a time series data sequence of periodic dynamic loss integral evaluation value TDE containing continuous periods, so as to provide a historical loss record basis for subsequent power fluctuation trend analysis.

[0070] In this embodiment, a unified clock triggering mechanism was used to synchronously sample the drain voltage and drain current signals of the target MOSFET, forming voltage and current sampling sequences to ensure precise time alignment of the sampled data. Based on the above sampling sequences, pairing calculations were performed according to a preset time segment granularity to generate a structurally complete and sequentially ordered instantaneous switching power dataset IPD, achieving a high-resolution representation of the single-cycle power fluctuation of the MOSFET. Subsequently, the instantaneous switching power dataset IPD was processed by segment-by-segment accumulation to obtain the total dynamic energy loss value covering the entire switching cycle, which was defined as the periodic dynamic loss integral evaluation value TDE. The periodic dynamic loss integral evaluation value TDE was bound to its corresponding cycle number to form a time-series data sequence of the periodic dynamic loss integral evaluation value TDE, enabling the system to record the historical trajectory of loss and track trends.

[0071] Based on the above mechanisms, this system achieves a full-dimensional acquisition and analysis path for voltage-current synchronization, segment-level power construction, and period-level energy calibration under millisecond-level cycles in high-frequency MOSFET operation scenarios. This provides a data foundation with strong time consistency, clear computational structure, and high historical traceability for subsequent energy consumption modeling and control strategy adjustment. It breaks through the long-standing underlying data bottleneck problems in existing power control systems, such as "unclear transient data coupling," "discontinuous period statistics," and "fuzzy data structure granularity."

[0072] Example 3

[0073] Specifically: S3 includes S31 and S32;

[0074] S31. Based on the time-series data sequence composed of the periodic dynamic loss integral evaluation value TDE, a power fluctuation analysis model PFA is constructed to characterize the power consumption trend change characteristics through the historical evolution relationship of the data sequence under continuous switching cycles. The power fluctuation analysis model PFA is used to fit the overall trend line, average trajectory and fluctuation distribution state of the periodic dynamic loss integral evaluation value TDE.

[0075] The power fluctuation analysis model PFA is established through steps S311, S312 and S313.

[0076] S311. Perform a weighted moving average smoothing process on the continuous periodic dynamic loss integral evaluation value TDE within the specified sliding time window to obtain the trajectory line of the periodic dynamic loss mean.

[0077] S312. Use a regression curve to fit the TDE point value of the periodic dynamic loss integral evaluation value from the current period to the previous few periods, and generate a periodic dynamic loss trend line to represent the overall evolution direction of power consumption.

[0078] S313. The deviation between the periodic dynamic loss integral evaluation value TDE and the mean trajectory line for each period is normalized by standard deviation, the fluctuation range and frequency are statistically analyzed, a power fluctuation distribution state spectrum is formed, and the power fluctuation analysis model PFA is formed by combining it with the periodic dynamic loss mean trajectory line and the periodic dynamic loss trend line.

[0079] S32. Based on the established power fluctuation analysis model PFA, the periodic dynamic loss integral evaluation value TDE corresponding to the current switching cycle is compared and analyzed with the three structural elements of the power fluctuation analysis model PFA, specifically including the following three judgment conditions:

[0080] Condition 1: Compare the current periodic dynamic loss integral evaluation value TDE with the trajectory line of the periodic dynamic loss mean. If the deviation exceeds the set threshold range, it is identified as an abnormal fluctuation of the peak value.

[0081] Condition 2: Compare the current periodic dynamic loss integral evaluation value TDE with the slope and trend direction of the periodic dynamic loss trend line. If the continuous period shows an upward deviation trend, it is identified as a continuous increase in power consumption.

[0082] Condition 3: Check the current periodic dynamic loss integral evaluation value TDE and the historical fluctuation frequency boundary of the power fluctuation distribution state spectrum. If it shows alternating up and down oscillation, it is identified as periodic oscillation drift.

[0083] If the periodic dynamic loss integral evaluation value TDE meets the abnormal characteristic criteria in any of the three judgment conditions, it is marked as an abnormal power consumption period, and a judgment signal for driving control strategy adjustment is output.

[0084] In this embodiment, a power fluctuation analysis model (PFA) is constructed based on the historical periodic dynamic loss integral evaluation value (TDE) change trajectory. The extraction of the periodic dynamic loss mean trajectory line, the construction of the periodic dynamic loss trend line, and the summarization of the power fluctuation distribution state spectrum are completed. These three elements together constitute the complete structural elements of the power fluctuation analysis model (PFA). Furthermore, taking the periodic dynamic loss integral evaluation value TDE of the current switching cycle as the judgment object, it is compared with the periodic dynamic loss mean trajectory line, periodic dynamic loss trend line, and power fluctuation distribution state spectrum respectively to determine whether there are abnormal peak fluctuations, continuous power consumption increase behavior, and periodic oscillation drift. Once any judgment condition is met, the current cycle can be marked as a power consumption abnormal cycle, and the corresponding drive control strategy adjustment judgment signal can be output. Based on the above mechanism, not only is the joint modeling and intelligent judgment of the periodic dynamic loss integral evaluation value TDE in multiple dimensions such as evolution trend, center shift, and statistical distribution realized, but also a judgment path that can dynamically identify power consumption risks and qualitatively distinguish fluctuation types is constructed by combining and referencing the model structural elements. It has the characteristics of strong trend analysis capability, high abnormal response granularity, and clear behavior recognition logic, which breaks through the technical limitations of existing power consumption monitoring technology that only relies on static thresholds or fixed intervals for judgment and is difficult to cope with the dynamic evolution process of power consumption.

[0085] Example 4

[0086] Specifically: S4 includes S41 and S42;

[0087] S41. Based on the marking results of the power consumption abnormal cycle, identify whether the current cycle belongs to the power consumption abnormal cycle; if it is determined to be the power consumption abnormal cycle, generate a drive control strategy adjustment trigger signal. The drive control strategy adjustment trigger signal is used to activate the feedback adjustment channel in the gate control system and start the corresponding gate drive parameter correction process.

[0088] The gate drive parameter correction process includes steps S411, S412 and S413;

[0089] S411. Identify the gate drive parameter configuration set used in the current cycle;

[0090] S412. Call the preset drive parameter adjustment strategy template, and determine the target parameters to be adjusted for the drive dimensions corresponding to the abnormal power consumption characteristics, including drive voltage setting value, turn-on delay time setting value and turn-off dead time setting value.

[0091] S413. Generate the adjusted gate drive parameter settings as valid inputs for the next cycle execution.

[0092] S42. The feedback adjustment of the gate drive parameters of the target MOSFET is synchronously updated with the drive control logic. After adjusting the trigger signal based on the drive control strategy and generating the target parameter set value, the gate drive parameter set value corresponding to the cycle is called and applied to the gate drive module in the current control cycle of the target MOSFET.

[0093] The gate drive parameters include: a drive voltage setting value, used to adjust the gate signal amplitude to match the dynamic power consumption state; a turn-on delay time setting value, used to correct the turn-on edge triggering timing to avoid cross-conduction; and a turn-off dead time setting value, used to adjust the turn-off process time window to achieve soft switching or suppress overshoot.

[0094] Simultaneously, based on the application results of the gate drive parameter setting values, the gate drive parameter control configuration table is updated synchronously, and the associated gate signal output scheduling rules and periodic parameter execution paths are adjusted synchronously to ensure that the subsequent periodic control process is consistent with the adjusted feedback strategy in terms of drive behavior, thereby achieving dynamic adaptation of the closed-loop response of drive parameters and control logic.

[0095] The gate drive parameter control configuration table is a structured data set used to manage and record the drive setting values ​​of the MOSFET in each control cycle. The configuration table contains multiple drive parameter fields, specifically including: drive voltage setting field, turn-on delay time field, and turn-off dead time field.

[0096] The gate signal output scheduling rule is used to define how to sequentially output the gate drive signal generation logic of the MOSFET according to the set values ​​in the "Gate Drive Parameter Control Configuration Table" in a specific cycle, including drive signal start time scheduling, drive signal duration setting, multi-level drive control waveform (such as soft drive / strong drive) scheduling and calling logic, and interlock delay configuration with adjacent switching devices.

[0097] The cycle parameter execution path system, upon entering a new cycle, follows a complete path chain from cycle state judgment → reading the configuration table → scheduling drive signals → feedback update records. This ensures that the drive parameter settings are not only recorded but also referenced, transmitted, and executed in the actual control execution process, forming a cycle-level closed loop.

[0098] The path includes the following core nodes: periodic state initialization node, parameter reading and loading node, signal scheduling execution node, and feedback correction input interface.

[0099] S5 includes S51 and S52;

[0100] S51. After the gate drive parameter feedback adjustment is completed and the actual application is completed, the drain voltage signal and drain current signal of the target MOSFET are re-acquired in the next switching cycle. The voltage sampling sequence and current sampling sequence within the cycle are obtained, and a new instantaneous switching power dataset IPD_New is constructed.

[0101] S52. Input the new instantaneous switching power dataset IPD_New into the cycle energy assessment process, recalculate the new cycle dynamic loss integral assessment value TDE_New corresponding to this cycle, and compare the new cycle dynamic loss integral assessment value TDE_New with the cycle dynamic loss integral assessment value TDE of the previous cycle. Based on the comparison analysis results, determine the effectiveness of the driving adjustment strategy, specifically including:

[0102] When the new cycle dynamic loss integral evaluation value TDE_New < the cycle dynamic loss integral evaluation value TDE, it is determined that the driving adjustment effect has reached the expectation.

[0103] When the new cycle dynamic loss integral evaluation value TDE_New is greater than or equal to the cycle dynamic loss integral evaluation value TDE, it is determined that the drive adjustment effect has not met expectations, and the gate drive parameter correction process is called again.

[0104] In this embodiment, by adjusting the trigger signal generation and gate drive parameter correction process through the drive control strategy, the system can quickly respond and enter three sub-processes based on the identification results of abnormal power consumption cycles: gate drive parameter configuration set identification, drive parameter adjustment strategy template invocation, and target parameter generation. This results in new configuration results for core drive parameters such as drive voltage setting value, conduction delay time setting value, and turn-off dead time setting value. Subsequently, the above gate drive parameter settings are applied in the actual control cycle, and the gate drive parameter control configuration table, gate signal output scheduling rules, and cycle parameter execution path are updated simultaneously. This ensures that the drive parameters are not only set, but also dynamically distributed and adapted according to the cycle logic execution nodes, forming a closed-loop control chain integrating "setting - management - invocation - feedback". Furthermore, by re-acquiring the drain voltage and drain current signals after adjusting the drive parameters, a new instantaneous switching power dataset IPD_New is constructed, and a new periodic dynamic loss integral evaluation value TDE_New is calculated. This value is then compared with the periodic dynamic loss integral evaluation value TDE before adjustment. If the drive adjustment does not achieve the expected effect, the gate drive parameter correction process can be automatically called back, forming a closed-loop reuse mechanism. This achieves a highly efficient control closed-loop path with the periodic dynamic loss integral evaluation value TDE as the core of performance feedback, the gate drive parameter setting value as the execution entry point, and the gate drive parameter control configuration table and periodic parameter execution path as the strategy carrying structure. This enables the MOSFET to have the control advantages of adaptive drive behavior, dynamic parameter deduction, and structured execution process in complex, high-frequency, and variable working environments. It overcomes the structural limitations of existing power control systems such as "static drive response, fragmented parameter adjustment, and non-closed-loop strategy execution," and improves the system's adjustment response rate, drive behavior consistency, and fault self-repair capability in actual operation.

[0105] Example 5

[0106] A high-frequency power control method based on MOSFETs, please refer to... Figure 2 Specifically, it includes a MOSFET data acquisition module, a dynamic loss assessment module, a loss trend identification module, a gate drive module, and a drive adjustment decision module.

[0107] The MOSFET data acquisition module synchronously samples the drain voltage and drain current of the target MOSFET in each switching cycle and establishes an instantaneous switching power dataset (IPD) for each switching cycle according to time segments.

[0108] The dynamic loss assessment module is based on the instantaneous switching power dataset IPD. It performs integral processing on the power data in the current switching cycle to evaluate the cycle dynamic loss integral assessment value TDE in the current cycle, and binds it with the cycle number to form a time-series data sequence.

[0109] The loss trend identification module uses the time-series data sequence composed of the periodic dynamic loss integral evaluation value TDE to establish a power fluctuation analysis model PFA, analyze the fluctuation trend of the periodic dynamic loss integral evaluation value TDE, identify abnormal peaks, oscillation drift and trend deviation behavior characteristics, and mark abnormal power consumption periods.

[0110] The gate drive module adjusts the gate drive parameters of the target MOSFET based on the abnormal cycle marking results output by the power fluctuation analysis model (PFA), including the drive voltage, turn-on delay time, and turn-off dead time parameters, and simultaneously adjusts the drive control logic strategy.

[0111] The drive adjustment decision module applies the adjusted drive control logic strategy to subsequent cycles, re-executes steps S1 and S2, obtains the new cycle dynamic loss integral evaluation value TDE_New, compares it with the previous cycle dynamic loss integral evaluation value TDE data, and judges the effectiveness of the current drive adjustment strategy.

[0112] Although embodiments of the invention have been shown and described, it will be understood by those skilled in the art that various changes, modifications, substitutions and variations can be made to these embodiments without departing from the principles and spirit of the invention, the scope of which is defined by the appended claims and their equivalents.

Claims

1. A high-frequency power control method based on MOSFETs, characterized in that: Includes the following steps: S1. By synchronously sampling the drain voltage and drain current of the target MOSFET in each switching cycle, an instantaneous switching power dataset IPD is established according to time segments within the switching cycle. S2. Based on the instantaneous switching power dataset IPD, the power data in the current switching cycle is integrated to evaluate the cycle dynamic loss integral evaluation value TDE in the current cycle, and then bound to the cycle number to form a time-series data sequence. S3. Using the time-series data sequence composed of the periodic dynamic loss integral evaluation value TDE, establish a power fluctuation analysis model PFA, analyze the fluctuation trend of the periodic dynamic loss integral evaluation value TDE, identify abnormal peaks, oscillation drift and trend deviation behavior characteristics, and mark the power consumption abnormal period. S3 includes S31 and S32; S31. Based on the time-series data sequence composed of the periodic dynamic loss integral evaluation value TDE, a power fluctuation analysis model PFA is constructed to characterize the power consumption trend change characteristics through the historical evolution relationship of the data sequence under continuous switching cycles. The power fluctuation analysis model PFA is used to fit the overall trend line, average trajectory and fluctuation distribution state of the periodic dynamic loss integral evaluation value TDE. The power fluctuation analysis model PFA is established through steps S311, S312 and S313. S311. Perform a weighted moving average smoothing process on the continuous periodic dynamic loss integral evaluation value TDE within the specified sliding time window to obtain the trajectory line of the periodic dynamic loss mean. S312. Use a regression curve to fit the TDE point value of the periodic dynamic loss integral evaluation value from the current period to the previous few periods, and generate a periodic dynamic loss trend line to represent the overall evolution direction of power consumption. S313. The deviation between the periodic dynamic loss integral evaluation value TDE and the mean trajectory line for each period is normalized by standard deviation, the fluctuation range and frequency are statistically analyzed, a power fluctuation distribution state map is formed, and together with the periodic dynamic loss mean trajectory line and the periodic dynamic loss trend line, they constitute the three structural elements of the power fluctuation analysis model PFA. S32. Based on the established power fluctuation analysis model PFA, the periodic dynamic loss integral evaluation value TDE corresponding to the current switching cycle is compared and analyzed with the three structural elements of the power fluctuation analysis model PFA, specifically including the following three judgment conditions: Condition 1: Compare the current periodic dynamic loss integral evaluation value TDE with the trajectory line of the periodic dynamic loss mean. If the deviation exceeds the set threshold range, it is identified as an abnormal fluctuation of the peak value. Condition 2: Compare the current periodic dynamic loss integral evaluation value TDE with the slope and trend direction of the periodic dynamic loss trend line. If the continuous period shows an upward deviation trend, it is identified as a continuous increase in power consumption. Condition 3: Check the current periodic dynamic loss integral evaluation value TDE and the historical fluctuation frequency boundary of the power fluctuation distribution state spectrum. If it shows alternating up and down oscillation, it is identified as periodic oscillation drift. If the periodic dynamic loss integral evaluation value TDE meets the abnormal characteristic criteria in any of the three judgment conditions, it is marked as an abnormal power consumption period. S4. Based on the abnormal cycle marking results output by the power fluctuation analysis model PFA, the gate drive parameters of the target MOSFET are adjusted, including the drive voltage, turn-on delay time and turn-off dead time parameters, and the drive control logic strategy is adjusted synchronously. S5. Apply the adjusted drive control logic strategy to subsequent cycles, re-execute steps S1 and S2, obtain the new cycle dynamic loss integral evaluation value TDE_New, compare it with the previous cycle dynamic loss integral evaluation value TDE data, and determine the effectiveness of the current drive adjustment strategy.

2. The high-frequency power control method based on a MOSFET according to claim 1, characterized in that: S1 includes S11 and S12; S11. After the MOSFET enters the switching working state, the drain voltage signal and drain current signal of the target MOSFET are synchronously sampled using a high-bandwidth data acquisition module. During the sampling process, the voltage and current values ​​within the same cycle are synchronously acquired through a unified clock trigger, forming a voltage sampling sequence and a current sampling sequence. S12. Based on the obtained voltage sampling sequence and current sampling sequence, the voltage and current values ​​in each time segment are paired and calculated point by point according to the preset time segment division method to construct the instantaneous power data of the corresponding time segment; the instantaneous power results of multiple time segments are arranged in chronological order to form the instantaneous switching power dataset IPD corresponding to the current switching cycle.

3. The high-frequency power control method based on a MOSFET according to claim 2, characterized in that: S2 includes S21 and S22; S21. Receive the instantaneous switching power dataset IPD output in step S1, perform segment-by-segment accumulation calculation on the power data corresponding to all time segments within the current switching cycle range, obtain the total dynamic energy loss value in a single switching cycle of the current MOSFET, and define the total dynamic energy loss value as the periodic dynamic loss integral evaluation value TDE. S22. Bind the periodic dynamic loss integral evaluation value TDE with the period number corresponding to the current switching period, and record the two in a one-to-one correspondence to form a time series data sequence of periodic dynamic loss integral evaluation value TDE containing continuous periods, so as to provide a historical loss record basis for subsequent power fluctuation trend analysis.

4. The high-frequency power control method based on a MOSFET according to claim 1, characterized in that: S4 includes S41; S41. Based on the marking results of the power consumption abnormal cycle, identify whether the current cycle belongs to the power consumption abnormal cycle; If it is determined to be an abnormal power consumption cycle, a drive control strategy adjustment trigger signal is generated. The drive control strategy adjustment trigger signal is used to activate the feedback adjustment channel in the gate control system and start the corresponding gate drive parameter correction process. The gate drive parameter correction process includes steps S411, S412 and S413; S411. Identify the gate drive parameter configuration set used in the current cycle; S412. Call the preset drive parameter adjustment strategy template, and determine the target parameters to be adjusted for the drive dimensions corresponding to the abnormal power consumption characteristics, including drive voltage setting value, turn-on delay time setting value and turn-off dead time setting value. S413. Generate the adjusted gate drive parameter settings as valid inputs for the next cycle execution.

5. The high-frequency power control method based on a MOSFET according to claim 4, characterized in that: S4 also includes S42; S42. The feedback adjustment of the gate drive parameters of the target MOSFET is synchronously updated with the drive control logic. After adjusting the trigger signal based on the drive control strategy and generating the target parameter set value, the gate drive parameter set value corresponding to the cycle is called and applied to the gate drive module in the current control cycle of the target MOSFET. The gate drive parameters include: a drive voltage setting value, used to adjust the gate signal amplitude to match the dynamic power consumption state; The turn-on delay time setting is used to correct the timing of the turn-on edge trigger to avoid cross-conduction; the turn-off dead time setting is used to adjust the turn-off process time window to achieve soft switching or suppress overshoot. Simultaneously, based on the application results of the gate drive parameter settings, the gate drive parameter control configuration table is updated synchronously, and the associated gate signal output scheduling rules and periodic parameter execution paths are adjusted synchronously.

6. The high-frequency power control method based on a MOSFET according to claim 1, characterized in that: S5 includes S51; S51. After the gate drive parameter feedback adjustment is completed and the actual application is completed, the drain voltage signal and drain current signal of the target MOSFET are re-acquired in the next switching cycle. The voltage sampling sequence and current sampling sequence within the cycle are obtained, and a new instantaneous switching power dataset IPD_New is constructed.

7. The high-frequency power control method based on a MOSFET according to claim 6, characterized in that: S5 also includes S52; S52. Input the new instantaneous switching power dataset IPD_New into the cycle energy assessment process, recalculate the new cycle dynamic loss integral assessment value TDE_New corresponding to this cycle, and compare the new cycle dynamic loss integral assessment value TDE_New with the cycle dynamic loss integral assessment value TDE of the previous cycle. Based on the comparison analysis results, determine the effectiveness of the driving adjustment strategy, specifically including: When the new cycle dynamic loss integral evaluation value TDE_New < the cycle dynamic loss integral evaluation value TDE, it is determined that the driving adjustment effect has reached the expectation. When the new cycle dynamic loss integral evaluation value TDE_New is greater than or equal to the cycle dynamic loss integral evaluation value TDE, it is determined that the drive adjustment effect has not met expectations, and the gate drive parameter correction process is called again.

8. A high-frequency power control system based on a MOSFET, applied to the high-frequency power control method based on a MOSFET as described in any one of claims 1 to 7, characterized in that: It includes a MOSFET data acquisition module, a dynamic loss assessment module, a loss trend identification module, a gate drive module, and a drive adjustment decision module; The MOSFET data acquisition module synchronously samples the drain voltage and drain current of the target MOSFET in each switching cycle and establishes an instantaneous switching power dataset (IPD) for each switching cycle according to time segments. The dynamic loss assessment module is based on the instantaneous switching power dataset IPD. It performs integral processing on the power data in the current switching cycle to evaluate the cycle dynamic loss integral assessment value TDE in the current cycle, and binds it with the cycle number to form a time-series data sequence. The loss trend identification module uses the time-series data sequence composed of the periodic dynamic loss integral evaluation value TDE to establish a power fluctuation analysis model PFA, analyze the fluctuation trend of the periodic dynamic loss integral evaluation value TDE, identify abnormal peaks, oscillation drift and trend deviation behavior characteristics, and mark abnormal power consumption periods. The gate drive module adjusts the gate drive parameters of the target MOSFET based on the abnormal cycle marking results output by the power fluctuation analysis model (PFA), including the drive voltage, turn-on delay time, and turn-off dead time parameters, and simultaneously adjusts the drive control logic strategy. The drive adjustment decision module applies the adjusted drive control logic strategy to subsequent cycles, re-executes steps S1 and S2, obtains the new cycle dynamic loss integral evaluation value TDE_New, compares it with the previous cycle dynamic loss integral evaluation value TDE data, and judges the effectiveness of the current drive adjustment strategy.

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