Method and device for rapidly extracting three-dimensional stray capacitance parameters and storage medium

CN120654636APending Publication Date: 2025-09-16BEIJING HUADA JIUTIAN IND SOFTWARE RESEARCH INSTITUTE CO LTD
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Patent Information

Application Number
CN202510744737.2
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-06-05
Publication Date
2025-09-16

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Abstract

The invention provides a method and a device for rapidly extracting three-dimensional parasitic capacitance parameters and a storage medium. The method comprises the following steps: extracting description information of a conductor and a medium from an integrated circuit layout file; constructing a corresponding three-dimensional geometric structure physical model according to the description information of the conductor and the medium; selecting the size and the position of a window, and cutting off the conductor in the extraction area; carrying out visibility judgment on the environment conductor in the current window, screening out the shielded environment conductor, and recording direction information of a main conductor and a visual surface of the environment conductor; obtaining forward coupling capacitance and / or lateral coupling capacitance between the main conductor and the environment conductor according to the direction information; the conductors with the forward coupling capacitance and / or the lateral coupling capacitance smaller than a set window threshold value are screened out, and a simplified three-dimensional geometric structure physical model is obtained; and based on the simplified three-dimensional geometric structure physical model, a three-dimensional field solver is used to calculate and obtain the total capacitance of each conductor and the coupling capacitance between the conductors.
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