Method for improving uniformity of threshold voltage and saturation current of device
By adjusting the halo ion implantation dose in different regions during semiconductor manufacturing, the uniformity issues of device threshold voltage and saturation current are solved, achieving improved cost-effectiveness and enhanced performance consistency.
Patent Information
- Application Number
- CN202410291662.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-03-14
- Publication Date
- 2025-09-16
Smart Images
Figure CN120656932A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of semiconductor integrated circuits, and in particular to a method for improving the uniformity of device threshold voltage and saturation current. Background Art
[0002] In semiconductor manufacturing, productivity (yield) is one of the most important indicators. One of the biggest factors affecting productivity and device performance is the variability of device characteristics within the wafer. For cutting-edge devices, some manufacturing processes find it difficult to achieve the required level of process control. This is especially true for processes that use plasma, such as CVD (chemical vapor deposition) and Etch (etching), due to the tendency of the plasma to change in radial position. The inherent variability of this front-end process will ultimately lead to uneven distribution of device electrical parameters (such as saturation current Idsat and threshold voltage Vt) over a wide range.
[0003] To address the issue of uneven electrical parameters such as the device's threshold voltage Vt and saturation current Idsat, the device's critical dimension (CD) (such as gate size or channel size) is generally improved through photolithography and etching to improve the consistency of the critical dimension and, in turn, the uniformity of Vt and Idsat.
[0004] However, if there is a significant difference between Vt and Idsat, the mask needs to be replaced, which is costly. Furthermore, due to inherent variability in processes like etching, further improvement of Vt and Idsat is difficult once they reach a certain range. Summary of the Invention
[0005] The object of the present invention is to provide a method for improving the uniformity of the threshold voltage and saturation current of a device, which can improve the uniformity of the threshold voltage and saturation current of the device without significantly affecting other electrical parameters.
[0006] To solve the above technical problems, the present invention provides a method for improving the uniformity of device threshold voltage and saturation current, comprising the following steps:
[0007] Obtaining a numerical distribution of a threshold voltage or a saturation current on a first wafer on which device fabrication has been completed;
[0008] Dividing the second wafer of the device to be manufactured into a plurality of regions according to the numerical distribution;
[0009] When ion implantation is performed on the second wafer during device fabrication, halo ion implantation is performed in combination with a Super Scan mode, and the ion implantation dose of each region is adjusted according to the threshold voltage or saturation current.
[0010] Optionally, if the threshold voltage in a certain area is lower than the standard value, the ion implantation dose in the area is increased; if the threshold voltage in a certain area is higher than the standard value, the ion implantation dose in the area is reduced; if the threshold voltage in a certain area is close to the standard value, the ion implantation dose remains unchanged.
[0011] Optionally, if the saturation current in a certain area is higher than the standard value, the ion implantation dose in the area is increased; if the saturation current in a certain area is lower than the standard value, the ion implantation dose in the area is reduced; if the saturation current in a certain area is close to the standard value, the ion implantation dose remains unchanged.
[0012] Optionally, the second wafer is divided into three regions, wherein the threshold voltage or saturation current in the first region is lower than the standard value, the threshold voltage or saturation current in the second region is higher than the standard value, and the threshold voltage or saturation current in the third region is close to the standard value.
[0013] Optionally, the second wafer is divided into a plurality of regions, and a difference in threshold voltage or a difference in saturation current in each region is within a preset range.
[0014] Optionally, the device includes SRAM.
[0015] Optionally, the SRAM includes NMOS and PMOS, the NMOS is a drive transistor PD or an access transistor PG, and the PMOS is a load transistor PU.
[0016] Optionally, for NMOS, the dose of N-type ion implantation is increased to increase the threshold voltage of the NMOS and reduce the saturation current.
[0017] Optionally, for PMOS, the dose of P-type ion implantation is increased to increase the threshold voltage of the PMOS and reduce the saturation current.
[0018] Optionally, the method further includes: establishing an ion implantation menu for N-type and P-type halo ion implantation combined with a Super Scan mode respectively.
[0019] In summary, in the method for improving the uniformity of device threshold voltage and saturation current provided by the present invention, the numerical distribution of the threshold voltage or saturation current on the first wafer on which the device has been manufactured is first obtained, and then the second wafer of the device to be manufactured is divided into multiple regions based on the numerical distribution. Then, when ion implantation is performed on the second wafer during device fabrication, halo ion implantation is combined with the Super Scan mode, and the ion implantation dose of each region is adjusted according to the magnitude of the threshold voltage or saturation current. By precisely controlling the ion implantation dose of different regions, the uniformity of the threshold voltage and saturation current is improved, and other electrical parameters will not be significantly affected, the cost is lower, and monitoring is facilitated. In particular, for SRAM, by precisely controlling the ion implantation dose of different regions, both the threshold voltage and the saturation current parameters can be adjusted simultaneously, and the uniformity of the threshold voltage and the saturation current can be improved simultaneously. BRIEF DESCRIPTION OF THE DRAWINGS
[0020] Those skilled in the art will appreciate that the accompanying drawings are provided for a better understanding of the present invention and do not constitute any limitation on the scope of the present invention.
[0021] Figure 1 This is a flow chart of a method for improving the uniformity of device threshold voltage and saturation current provided by one embodiment of the present invention.
[0022] Figure 2 FIG. 4 is a schematic diagram of the distribution of the threshold voltage of a PU provided in one embodiment of the present invention.
[0023] Figure 3 FIG. 4 is a schematic diagram of the distribution of the threshold voltage of a PG provided in one embodiment of the present invention. DETAILED DESCRIPTION
[0024] To make the objects, advantages, and features of the present invention more clearly apparent, the present invention is further described below in conjunction with the accompanying drawings and specific embodiments. It should be noted that the drawings are all in a very simplified form and are not drawn to scale. They are only used to conveniently and clearly assist in illustrating the purposes of the embodiments of the present invention. In addition, the structures shown in the drawings are often part of the actual structure. In particular, different drawings may need to illustrate different focuses and sometimes use different scales.
[0025] As used in the present invention, the singular forms "a", "an" and "the" include plural objects, unless the content clearly indicates otherwise. As used in the present invention, the term "or" is generally used in a sense including "and / or", unless the content clearly indicates otherwise. As used in the present invention, the term "several" is generally used in a sense including "at least one", unless the content clearly indicates otherwise. As used in the present invention, the term "at least two" is generally used in a sense including "two or more", unless the content clearly indicates otherwise. In addition, the terms "first", "second" and "third" are used for descriptive purposes only and are not to be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Therefore, the features defined as "first", "second" and "third" may explicitly or implicitly include one or at least two of the features.
[0026] Ion implantation is the process of ionizing, accelerating, and filtering the doping atoms in sequence, and then injecting positively charged ions into a wafer with a specific depth and concentration, thereby changing the physical properties of the wafer and ultimately achieving changes in the electrical parameters of the device.
[0027] The inventors have discovered a highly linear relationship between the halo ion implantation dose and the device threshold voltage and saturation current, with minimal impact on other parameters such as leakage current. Furthermore, compared to the prior art method of adjusting device critical dimensions to improve threshold voltage and saturation current, adjusting the ion implantation dose is less costly and allows for better monitoring later on.
[0028] After further research, the present invention provides a method for improving the uniformity of device threshold voltage and saturation current. Figure 1 This is a flow chart of a method for improving the uniformity of device threshold voltage and saturation current provided by an embodiment of the present invention. Figure 1 As shown, the method for improving the uniformity of device threshold voltage and saturation current provided in this embodiment includes the following steps:
[0029] Step S1: obtaining a numerical distribution of a threshold voltage or a saturation current on a first wafer on which device fabrication has been completed;
[0030] Step S2: dividing the second wafer on which the device is to be manufactured into a plurality of regions according to the numerical distribution;
[0031] Step S3: When performing ion implantation on the second wafer during device fabrication, halo ion implantation combined with SuperScan mode is used, and the ion implantation dose of each region is adjusted according to the threshold voltage or saturation current.
[0032] In step S1 and step S2, the first wafer refers to a wafer on which the production of various devices has been completed, that is, various devices have been produced on the wafer, and the threshold voltage or saturation current of each device on the wafer can be measured to obtain the numerical distribution of the threshold voltage or saturation current on the entire wafer. The second wafer refers to a wafer on which no devices have been produced yet. The devices to be produced on this wafer are the same as the devices already produced on the first wafer. By analyzing the threshold voltage or saturation current on the first wafer, the uniformity of the threshold voltage or saturation current of the devices to be produced on the second wafer can be improved. That is, the first wafer and the second wafer are the same wafer, the first wafer has been completed, and the second wafer is to be produced.
[0033] When the numerical distribution of the threshold voltage or saturation current on the entire wafer has been obtained, the second wafer on which the device is to be manufactured is divided into a plurality of regions according to the numerical distribution.
[0034] In one embodiment of the present invention, the second wafer can be divided into three regions, wherein the threshold voltage or saturation current in the first region is lower than a standard value, the threshold voltage or saturation current in the second region is higher than the standard value, and the threshold voltage or saturation current in the third region is close to the standard value. Close to the standard value means that the difference from the standard value is within a very small range, and this range can be determined manually.
[0035] In another embodiment of the present invention, the second wafer is divided into multiple regions, and the difference in threshold voltage or saturation current in each region is within a preset range A. For example, the regions are: regions with values close to standard values, regions with values within the standard value plus or minus a preset range A, regions with values within the standard value plus or minus 2A, etc.
[0036] In step S3, when ion implantation is performed on the second wafer during device fabrication, halo ion implantation is performed in combination with a Super Scan mode, and the ion implantation dose in each region is adjusted based on the threshold voltage or saturation current. That is, when devices are fabricated on the second wafer, ion implantation is performed using a halo ion implantation combined with a Super Scan mode, and the ion implantation dose is adjusted based on the region.
[0037] Super Scan mode is a mode of ion implantation that can set different ion implantation doses in different areas.
[0038] The present invention improves the uniformity of threshold voltage and saturation current by precisely controlling the ion implantation dose in different regions without significantly affecting other electrical parameters, thereby lowering the cost and facilitating monitoring.
[0039] Because the threshold voltage and saturation current vary simultaneously and in opposite directions, the threshold voltage and saturation current can be adjusted simultaneously by adjusting the ion implantation dose. In one embodiment of the present invention, if the threshold voltage in a region is lower than a standard value, the ion implantation dose in that region is increased; if the threshold voltage in a region is higher than the standard value, the ion implantation dose in that region is reduced; and if the threshold voltage in a region is close to the standard value, the ion implantation dose remains unchanged.
[0040] In another embodiment of the present invention, if the saturation current in a certain area is higher than the standard value, the ion implantation dose in the area is increased; if the saturation current in a certain area is lower than the standard value, the ion implantation dose in the area is reduced; if the saturation current in a certain area is close to the standard value, the ion implantation dose remains unchanged.
[0041] In one embodiment of the present invention, the device includes an SRAM (Static Random-Access Memory), which includes an NMOS transistor and a PMOS transistor, wherein the NMOS transistor is a drive transistor (PD) or a pass gate transistor (PG), and the PMOS transistor is a load transistor (PU).
[0042] The following description will be given by taking an SRAM as an example.
[0043] Due to front-end process changes (exposure or etching), the uniformity of the SRAM threshold voltage and saturation current is relatively poor. The threshold voltage of PU tends to be lower at the edge than at the center of the wafer, and the threshold voltage of PD and PG tends to be higher at the edge than at the center of the wafer, while the saturation current shows a trend opposite to the threshold voltage.
[0044] In this embodiment, the numerical distribution of the threshold voltage or saturation current of the device SRAM is first determined. Since the threshold voltage and saturation current of the SRAM are different and show opposite trends, this embodiment takes the numerical distribution of the threshold voltage of the SRAM as a benchmark, combines the relationship between the ion implantation dose and the threshold voltage and saturation current, and utilizes N-type halo ion implantation combined with the Super Scan mode to improve the uniformity of the threshold voltage and saturation current of PG and PD, and utilizes P-type halo ion implantation combined with the Super Scan mode to improve the uniformity of the threshold voltage and saturation current of PU.
[0045] Figure 2 This is a schematic diagram of the distribution of the threshold voltage of the PU provided by an embodiment of the present invention. Please refer to Figure 2 As shown, in the threshold voltage distribution of PU, the threshold voltage at the center position (P1 area) is close to the standard value, the threshold voltage at the edge position (P3 area) is relatively low, and the threshold voltage in the area between the center position and the edge position (P2 area) is relatively high. Figure 3 This is a schematic diagram of the distribution of the threshold voltage of PG provided by an embodiment of the present invention. Please refer to Figure 3 As shown, in the PG threshold voltage distribution, the threshold voltage at the center (N1 region) is close to the standard value, while the threshold voltages in the remaining regions (N2 and N3 regions) are higher. The PD threshold voltage distribution is similar to that of the PG and is therefore not shown in the figure.
[0046] Then, based on the numerical distribution, the entire wafer is divided into three different areas to facilitate more precise adjustment of ion implantation in different areas.
[0047] For details, please refer to Figure 2 As shown, for PU, the wafer is divided into three regions: P1, P2, and P3, where the P1 region is located in the middle region of the wafer, the P2 region surrounds the P1 region, and the P3 region surrounds the P2 region. In the P3 region, the threshold voltage is low, so the ion implantation dose in this region is increased (the increase is based on the original ion implantation dose, and the original ion implantation dose refers to the dose used when manufacturing devices on the first wafer that has been completed when the numerical distribution status was previously obtained). In the P2 region, the threshold voltage is high, so the ion implantation dose in this region is reduced. In the P1 region, the threshold voltage is close to the standard value, so the ion implantation dose in this region remains unchanged.
[0048] Please refer to Figure 3 As shown in the figure, for PG, the wafer is divided into three regions: N1, N2, and N3. N1 is located in the center of the wafer, N2 surrounds N1, and N3 surrounds N2. In N1, the threshold voltage is close to the standard value, so the ion implantation dose in this region remains unchanged. In N2 and N3, the threshold voltage is higher, so the ion implantation dose in these regions is reduced.
[0049] Figure 2 and Figure 3 The shapes of the regions include circles and rings, but are not limited thereto. For example, they may also be rectangles, squares, etc. The shapes of the regions may be determined according to the actual numerical distribution.
[0050] Since the threshold voltage distribution of PD is similar to that of PG, the same method as above can be used to divide the regions and adjust the ion implantation dose according to the threshold voltage or saturation current, which will not be described in detail here.
[0051] For SRAM, by precisely controlling the ion implantation dose in different regions, both the threshold voltage and the saturation current parameters can be adjusted simultaneously, and the uniformity of the threshold voltage and the saturation current can be improved simultaneously.
[0052] Based on the above analysis, an ion implantation recipe of N-type and P-type halo ion implantation combined with SuperScan mode can be established for NMOS and PMOS respectively, while keeping other conditions unchanged.
[0053] Table 1
[0054] condition Standard deviation Extremely poor Homogeneity No improvement 0.76 3.52 14.55％ Halo+Super Scan 0.54 2.48 10.53％
[0055] Table 2
[0056] condition Standard deviation Extremely poor Homogeneity No improvement 0.009 0.039 5.52％ Halo+Super Scan 0.007 0.027 3.74％
[0057] Table 1 compares the saturation current values before and after the PU improvement, and Table 2 compares the threshold voltage values before and after the PU improvement. Tables 1 and 2 show that the standard deviation, range, and uniformity of the PU's saturation current are significantly improved after using halo ion implantation combined with Super Scan mode. The range and uniformity of the PU's threshold voltage are also improved.
[0058] Table 3
[0059] condition Standard deviation Extremely poor Homogeneity No improvement 0.98 4.73 6.07％ Halo+Super Scan 0.72 3.14 4.22％
[0060] Table 4
[0061] condition Standard deviation Extremely poor Homogeneity No improvement 0.005 0.027 3.24％ Halo+Super Scan 0.006 0.023 2.71％
[0062] Table 3 compares the saturation current values before and after the PD improvements, and Table 4 compares the threshold voltage values before and after the improvements. Tables 3 and 4 show that the standard deviation, range, and uniformity of the PD's saturation current are significantly improved after using halo ion implantation combined with Super Scan mode. The range and uniformity of the PD's threshold voltage are also improved.
[0063] Table 5
[0064] condition Standard deviation Extremely poor Homogeneity No improvement 1.03 3.81 5.45％ Halo+Super Scan 0.72 3.53 5.24％
[0065] Table 6
[0066] condition Standard deviation Extremely poor Homogeneity No improvement 0.006 0.027 3.32％ Halo+Super Scan 0.005 0.022 2.65％
[0067] Table 5 compares the saturation current values before and after the PG improvement, and Table 6 compares the threshold voltage values before and after the PG improvement. Tables 5 and 6 show that the standard deviation, range, and uniformity of the PG's saturation current are significantly improved after using halo ion implantation combined with Super Scan mode ion implantation. The range and uniformity of the PG's threshold voltage are also improved.
[0068] It can be seen from the values in the above table that the use of halo ion implantation combined with Super Scan mode for ion implantation can effectively improve the poor uniformity of wafer device threshold voltage and saturation current caused by front-end process instability or inherent changes, without significantly affecting other electrical parameters.
[0069] In summary, in the method for improving the uniformity of device threshold voltage and saturation current provided by the present invention, the numerical distribution of the threshold voltage or saturation current on the first wafer on which the device has been manufactured is first obtained, and then the second wafer of the device to be manufactured is divided into multiple regions based on the numerical distribution. Then, when ion implantation is performed on the second wafer during device fabrication, halo ion implantation is combined with the Super Scan mode, and the ion implantation dose of each region is adjusted according to the magnitude of the threshold voltage or saturation current. By precisely controlling the ion implantation dose of different regions, the uniformity of the threshold voltage and saturation current is improved, and other electrical parameters will not be significantly affected, the cost is lower, and monitoring is facilitated. In particular, for SRAM, by precisely controlling the ion implantation dose of different regions, both the threshold voltage and the saturation current parameters can be adjusted simultaneously, and the uniformity of the threshold voltage and the saturation current can be improved simultaneously.
[0070] The above description is only a description of the preferred embodiments of the present invention and does not limit the scope of the present invention. Any changes and modifications made by ordinary technicians in the field of the present invention based on the above disclosure shall fall within the scope of protection of the claims.
Claims
1. A method for improving the uniformity of device threshold voltage and saturation current, characterized in that: The following steps are involved: Obtaining a numerical distribution of a threshold voltage or a saturation current on a first wafer on which device fabrication has been completed; Dividing the second wafer of the device to be manufactured into a plurality of regions according to the numerical distribution; When ion implantation is performed on the second wafer during device fabrication, halo ion implantation is performed in combination with a Super Scan mode, and the ion implantation dose of each region is adjusted according to the threshold voltage or saturation current.
2. The method for improving the uniformity of device threshold voltage and saturation current according to claim 1, characterized in that: If the threshold voltage in a certain area is lower than the standard value, the ion implantation dose in the area is increased; if the threshold voltage in a certain area is higher than the standard value, the ion implantation dose in the area is reduced; if the threshold voltage in a certain area is close to the standard value, the ion implantation dose remains unchanged.
3. The method for improving the uniformity of device threshold voltage and saturation current according to claim 1, characterized in that: If the saturation current in a certain area is higher than the standard value, the ion implantation dose in the area is increased; if the saturation current in a certain area is lower than the standard value, the ion implantation dose in the area is reduced; if the saturation current in a certain area is close to the standard value, the ion implantation dose remains unchanged.
4. The method for improving the uniformity of device threshold voltage and saturation current according to claim 1, characterized in that: The second wafer is divided into three regions, wherein the threshold voltage or saturation current in the first region is lower than the standard value, the threshold voltage or saturation current in the second region is higher than the standard value, and the threshold voltage or saturation current in the third region is close to the standard value.
5. The method for improving the uniformity of device threshold voltage and saturation current according to claim 1, characterized in that: The second wafer is divided into a plurality of regions, and a difference in threshold voltage or a difference in saturation current within each region is within a preset range.
6. The method for improving the uniformity of device threshold voltage and saturation current according to claim 1, characterized in that: The device includes an SRAM.
7. The method for improving the uniformity of device threshold voltage and saturation current according to claim 6, characterized in that: The SRAM includes NMOS and PMOS, the NMOS is a drive transistor PD or an access transistor PG, and the PMOS is a load transistor PU.
8. The method for improving the uniformity of device threshold voltage and saturation current according to claim 7, characterized in that: For NMOS, the dose of N-type ion implantation is increased to increase the threshold voltage of NMOS and reduce the saturation current.
9. The method for improving the uniformity of device threshold voltage and saturation current according to claim 7, characterized in that: For PMOS, the dose of P-type ion implantation is increased to increase the threshold voltage of PMOS and reduce the saturation current.
10. The method for improving the uniformity of device threshold voltage and saturation current according to claim 8 or 9, characterized in that: The method further includes: establishing ion implantation menus for N-type and P-type halo ion implantation combined with Super Scan mode respectively.