Input circuit and semiconductor device
By adopting a parallel differential transistor section and a cut-off selectable section in the semiconductor device, the current distribution is optimized, the problems of responsiveness variation and input offset voltage are solved, and a more stable output value is achieved.
CN120675520APending Publication Date: 2025-09-19KK TOSHIBA +1
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Patent Information
- Application Number
- CN202411037519.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2024-03-19
- Filing Date
- 2024-07-31
- Publication Date
- 2025-09-19
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Figure CN120675520A_ABST
Abstract
Provided are an input circuit capable of reducing an input offset voltage while suppressing a change in responsiveness of a semiconductor device, and a semiconductor device provided with such an input circuit. The input circuit includes: a first differential transistor unit including a plurality of first transistors connected in parallel to each other; a second differential transistor unit having a plurality of second transistors connected in parallel to each other; and cutting the optional portion. The output circuit includes a first current path portion and a second current path portion arranged in parallel with each other. First terminals of the plurality of first transistors are connected to the first current path portion. The first terminals of the plurality of second transistors are connected to the second current path portion. At least one of the plurality of first transistors and the plurality of second transistors is connected in series with a cutoff selectable section. The cut-off selectable unit selects either a state in which current is allowed to flow or a state in which current is cut off.
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Citation Information
Patent Citations
Communication device
JP2024043175A