A method and device for preventing the rejection of inter-phase fault protection in transformer oscillation

Abstract

The application discloses a method and device for realizing anti-rejection protection of phase-to-phase fault in transformer oscillation. The method comprises the following steps: constructing a phase current differential protection mathematical expression and a sequence current differential protection mathematical expression of a transformer based on a transformer differential relay protection expression; constructing a first criterion of transformer relay protection based on the transformer differential relay protection expression; constructing a second criterion of transformer relay protection based on the phase current differential protection mathematical expression and the sequence current differential protection mathematical expression; constructing an anti-rejection protection criterion of the transformer according to the first criterion and the second criterion; and realizing anti-rejection protection of the transformer based on the anti-rejection protection criterion.

Description

Technical Field

[0001] This invention relates to the field of relay protection technology, and more specifically, to a method and apparatus for implementing phase-to-phase fault prevention relay protection during transformer oscillation. Background Technology

[0002] Modern transformer protection systems offer excellent performance; however, their effectiveness can degrade under certain complex fault conditions. For example, inter-turn faults during oscillations can cause a decrease in sensitivity due to the significant fluctuations in braking current during oscillations.

[0003] Relevant technical specifications (GB 20.T 26864-2011 Dynamic Model Test of Power System Relay Protection Products) stipulate that transformer protection should operate correctly under various types of faults and transitional fault scenarios during oscillations. In practical applications, these two types of fault scenarios are entirely possible. If differential protection can quickly and sensitively clear small-turn inter-turn faults in complex scenarios, it can prevent the further development of internal faults and avoid greater damage and impact on the stable operation of equipment and systems. Therefore, it is necessary to analyze and improve these two complex operating conditions. Summary of the Invention

[0004] To address the shortcomings of existing technologies, this invention provides a method and apparatus for implementing phase-to-phase fault protection against relay failure during transformer oscillation.

[0005] According to one aspect of the present invention, a method for implementing phase-to-phase fault prevention relay protection during transformer oscillation is provided, comprising:

[0006] Based on the transformer differential relay protection expression, construct the mathematical expressions for transformer phase current differential protection and sequence current differential protection;

[0007] The first criterion for transformer relay protection is constructed based on the transformer differential relay protection expression;

[0008] The second criterion for transformer relay protection is constructed based on the mathematical expressions for phase current differential protection and sequence current differential protection.

[0009] Based on the first and second criteria, construct the anti-interference protection criteria for transformers;

[0010] Transformer anti-reverse relay protection is implemented based on anti-reverse protection criteria.

[0011] Optionally, the expression for transformer differential relay protection is:

[0012]

[0013] In the formula, I e For the rated current, Ij I represents the current on each side of the transformer. qd For the starting setpoint, I r For braking current, I d is the differential current, and k is the ratio braking coefficient.

[0014] Optionally, based on the transformer differential relay protection expression, mathematical expressions for transformer phase current differential protection and sequence current differential protection are constructed, including:

[0015] The mathematical expression for phase current differential protection is constructed by subtracting the positive sequence current from the restraining current in the phase current differential protection expression of the transformer differential relay protection expression.

[0016] By adding the positive sequence current to the braking current in the sequence current differential protection expression of the transformer differential relay protection expression, a mathematical expression for sequence current differential protection is constructed.

[0017] Optionally, the mathematical expression for phase current differential protection is:

[0018]

[0019] In the formula, I e For the rated current, I j I represents the current on each side of the transformer. qd For the starting setpoint, I r For braking current, I d Where is the differential current, and k is the ratio braking coefficient;

[0020] Mathematical expression for sequence current differential protection

[0021]

[0022] In the formula, I d (2) It is a negative sequence differential current; I r (2) It is the negative sequence braking current; I j (1) I represents the positive sequence current on each side of the transformer. j (2) This refers to the negative sequence current on each side of the transformer.

[0023] Optionally, the first criterion is: I d >0.2I e ANDI d >kI r , where I d For differential current, I e For the rated current, I r is the braking current, and k is the ratio braking coefficient.

[0024] Alternatively, the second criterion is: I d >0.2I e AND AND AND Where I d For differential current, I e For the rated current, I r For braking current, I r (1) This is the positive sequence braking current.

[0025] Optionally, the anti-rejection protection criterion is: satisfying the first criterion OR satisfying the second criterion.

[0026] Optionally, anti-failure relay protection for the transformer is implemented based on anti-failure protection criteria, including:

[0027] If the anti-failure protection criteria are met, the transformer's anti-failure relay protection will be activated; otherwise, the anti-failure relay protection will not be activated.

[0028] According to another aspect of the present invention, a device for implementing phase-to-phase fault protection against relay failure during transformer oscillation is provided, comprising:

[0029] The first construction module is used to construct the mathematical expressions for phase current differential protection and sequence current differential protection of the transformer based on the transformer differential relay protection expression.

[0030] The second construction module is used to construct the first criterion for transformer relay protection based on the transformer differential relay protection expression;

[0031] The third construction module is used to construct the second criterion for transformer relay protection based on the mathematical expressions of phase current differential protection and sequence current differential protection.

[0032] The fourth construction module is used to construct the anti-interference protection criteria for the transformer based on the first and second criteria;

[0033] The protection module is used to implement anti-failure relay protection for transformers based on anti-failure protection criteria.

[0034] According to another aspect of the present invention, a computer-readable storage medium is provided, the storage medium storing a computer program for performing the methods described in any of the above aspects of the present invention.

[0035] According to another aspect of the present invention, an electronic device is provided, the electronic device comprising: a processor; a memory for storing executable instructions of the processor; the processor being configured to read the executable instructions from the memory and execute the instructions to implement the method described in any of the preceding aspects of the present invention.

[0036] Therefore, this invention addresses the problem of delayed operation during oscillation by subtracting the positive-sequence component from the braking current of the differential element, while simultaneously adding the positive-sequence component to the braking current of the zero-sequence and negative-sequence differential elements. This improves the protection sensitivity when an inter-turn fault occurs in the transformer during oscillation, preventing protection failure. Attached Figure Description

[0037] Exemplary embodiments of the present invention can be more fully understood by referring to the following figures:

[0038] Figure 1 This is a flowchart illustrating a method for implementing interphase fault prevention and relay protection during transformer oscillation provided by an exemplary embodiment of the present invention.

[0039] Figure 2 This is a schematic diagram of a low-voltage side BC phase-to-phase fault failure in the oscillation zone provided by an exemplary embodiment of the present invention;

[0040] Figure 3 This is a protection logic block diagram provided by an exemplary embodiment of the present invention;

[0041] Figure 4 This is a schematic diagram of differential current provided in an exemplary embodiment of the present invention;

[0042] Figure 5 This is a schematic diagram of braking current provided in an exemplary embodiment of the present invention;

[0043] Figure 6 This is a comparison diagram of the effects before and after application of the method provided by the present invention, as provided in an exemplary embodiment of the present invention;

[0044] Figure 7 This is a diagram showing the relationship between negative-sequence steady-state differential action and braking quantity provided in an exemplary embodiment of the present invention;

[0045] Figure 8 This is a schematic diagram of the structure of a transformer oscillation phase-to-phase fault prevention and relay protection device provided in an exemplary embodiment of the present invention;

[0046] Figure 9 This is the structure of an electronic device provided in an exemplary embodiment of the present invention. Detailed Implementation

[0047] Hereinafter, exemplary embodiments according to the present invention will be described in detail with reference to the accompanying drawings. Obviously, the described embodiments are merely some embodiments of the present invention, and not all embodiments of the present invention. It should be understood that the present invention is not limited to the exemplary embodiments described herein.

[0048] It should be noted that, unless otherwise specifically stated, the relative arrangement, numerical expressions, and values ​​of the components and steps described in these embodiments do not limit the scope of the invention.

[0049] Those skilled in the art will understand that the terms "first," "second," etc., in the embodiments of the present invention are only used to distinguish different steps, devices, or modules, and do not represent any specific technical meaning, nor do they indicate a necessary logical order between them.

[0050] It should also be understood that in the embodiments of the present invention, "multiple" can refer to two or more, and "at least one" can refer to one, two or more.

[0051] It should also be understood that any component, data or structure mentioned in the embodiments of the present invention can generally be understood as one or more unless explicitly defined or given contrary instructions in the context.

[0052] Furthermore, the term "and / or" in this invention is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, or B existing alone. Additionally, the character " / " in this invention generally indicates that the preceding and following related objects have an "or" relationship.

[0053] It should also be understood that the description of the various embodiments in this invention emphasizes the differences between the various embodiments, and the similarities or similarities can be referred to each other. For the sake of brevity, they will not be described in detail.

[0054] At the same time, it should be understood that, for ease of description, the dimensions of the various parts shown in the accompanying drawings are not drawn according to actual scale.

[0055] The following description of at least one exemplary embodiment is merely illustrative and is in no way intended to limit the invention or its application or use.

[0056] Techniques, methods, and equipment known to those skilled in the art may not be discussed in detail, but where appropriate, they should be considered part of the specification.

[0057] It should be noted that similar labels and letters in the following figures indicate similar items; therefore, once an item is defined in one figure, it does not need to be discussed further in subsequent figures.

[0058] The embodiments of this invention can be applied to electronic devices such as terminal devices, computer systems, and servers, and can operate together with a wide range of other general-purpose or special-purpose computing system environments or configurations. Well-known examples of terminal devices, computing systems, environments, and / or configurations suitable for use with electronic devices such as terminal devices, computer systems, and servers include, but are not limited to: personal computer systems, server computer systems, thin clients, thick clients, handheld or laptop devices, microprocessor-based systems, set-top boxes, programmable consumer electronics, network PCs, minicomputer systems, mainframe computer systems, and distributed cloud computing environments including any of the above systems, etc.

[0059] Electronic devices such as terminal devices, computer systems, and servers can be described in the general context of computer system executable instructions (such as program modules) executed by a computer system. Typically, program modules can include routines, programs, object programs, components, logic, data structures, etc., which perform specific tasks or implement specific abstract data types. Computer systems / servers can be implemented in distributed cloud computing environments, where tasks are executed by remote processing devices linked through communication networks. In distributed cloud computing environments, program modules can reside on local or remote computing system storage media, including storage devices.

[0060] Exemplary methods

[0061] Figure 1 This is a flowchart illustrating a method for implementing phase-to-phase fault prevention and relay protection during transformer oscillation, provided by an exemplary embodiment of the present invention. This embodiment can be applied to electronic devices, such as... Figure 1 As shown, the method 100 for implementing phase-to-phase fault protection against transformer oscillation includes the following steps:

[0062] Step 101: Based on the transformer differential relay protection expression, construct the mathematical expression for the phase current differential protection and the sequence current differential protection of the transformer.

[0063] Step 102: Construct the first criterion for transformer relay protection based on the transformer differential relay protection expression;

[0064] Step 103: Construct the second criterion for transformer relay protection based on the mathematical expressions for phase current differential protection and sequence current differential protection;

[0065] Step 104: Construct the anti-interference protection criteria for the transformer based on the first and second criteria;

[0066] Step 105: Implement anti-reverse protection relay protection for the transformer based on the anti-reverse protection criterion.

[0067] Specifically, this invention addresses the problem of protection failure when inter-turn faults occur in transformers during system oscillations by proposing a protection method to prevent phase-to-phase fault failure during transformer oscillations. This method can improve the protection sensitivity when inter-turn faults occur in transformers during oscillations and prevent protection failure.

[0068] To address the issue of delayed action during oscillation, the braking current of the phase differential element is reduced by the positive sequence component, while the positive sequence component is added to the braking current of the zero-sequence and negative-sequence differential elements.

[0069] A typical transformer differential relay is implemented as shown in equation (1):

[0070]

[0071] Among them, I e For the rated current, I j I represents the current on each side of the transformer. qd For the starting setpoint, I r For braking current, I d The differential current is K, where K is the ratio braking coefficient (0.2–0.7, 0.5 recommended). This transformer differential relay is prone to failing to operate during inter-turn faults in oscillating conditions, such as… Figure 2 As shown.

[0072] To improve the sensitivity of phase current differential protection in the event of a minor fault during full-phase oscillation, the positive-sequence current in the braking current is significantly reduced, forming an AND logic output with the negative-sequence differential. To prevent maloperation of the negative-sequence differential due to unbalanced current, a positive-sequence current braking component is added to the braking component of the negative-sequence differential element. That is, to reduce the risk of maloperation that may result from subtracting the positive-sequence current from the braking current of the phase current differential protection, a positive-sequence component is added to the braking current of the phase current differential, thereby offsetting and canceling the risk. This protection principle is implemented as shown in equations (2) and (3):

[0073]

[0074] In the formula, I d (2) It is a negative sequence differential current; I r (2) It is the negative sequence braking current; I j (1) I represents the positive sequence current on each side of the transformer. j (2) This refers to the negative sequence current on each side of the transformer.

[0075] In equation (2), the first three equations are the standard transformer phase current differential protection criterion expressions, and in the last two equations, the superscript 1 represents the positive sequence component. Equation (2) is the optimized mathematical implementation of phase current differential protection, and equation (3) is the optimized mathematical implementation of sequence current differential protection.

[0076] Protection logic block diagram as follows Figure 3 As shown, the first AND gate in the logic block diagram corresponds to the conventional phasor differential protection, which operates during a fault in the normal zone. The second AND gate is used to supplement the conventional phasor differential protection when its sensitivity is insufficient due to increased braking force under oscillation and heavy load conditions. Simultaneously, to offset the risk of false tripping due to reduced braking force, negative sequence differential protection is added, and positive sequence braking current is incorporated into the braking force. The coordinated operation of all protection functions in the entire logic block diagram ensures the overall effectiveness of the differential protection.

[0077] In one embodiment of the present invention, the effectiveness of the proposed algorithm is verified by simulation, and the simulation results are as follows: Figures 4-7 As shown, based on the simulation results and the logic block diagram, it can be seen that when an inter-turn fault occurs during oscillation, the output of the AND gate at the bottom of the block diagram is activated, which improves the sensitivity and reliability of the protection.

[0078] Therefore, this invention addresses the problem of delayed operation during oscillation by subtracting the positive-sequence component from the braking current of the differential element, while simultaneously adding the positive-sequence component to the braking current of the zero-sequence and negative-sequence differential elements. This improves the protection sensitivity when an inter-turn fault occurs in the transformer during oscillation, preventing protection failure.

[0079] Exemplary device

[0080] Figure 8 This is a schematic diagram of the structure of a transformer oscillation-based phase-to-phase fault prevention relay protection device provided in an exemplary embodiment of the present invention. Figure 8 As shown, the device 800 includes:

[0081] The first construction module 810 is used to construct the mathematical expression for phase current differential protection and sequence current differential protection of the transformer based on the transformer differential relay protection expression.

[0082] The second construction module 820 is used to construct the first criterion for transformer relay protection based on the transformer differential relay protection expression;

[0083] The third construction module 830 is used to construct the second criterion for transformer relay protection based on the mathematical expressions of phase current differential protection and sequence current differential protection.

[0084] The fourth construction module 840 is used to construct the anti-interference protection criteria for the transformer based on the first and second criteria;

[0085] Protection module 850 is used to implement anti-failure relay protection for transformers based on anti-failure protection criteria.

[0086] Optionally, the expression for transformer differential relay protection is:

[0087]

[0088] In the formula, I e For the rated current, I j I represents the current on each side of the transformer. qd For the starting setpoint, I r For braking current, I d is the differential current, and k is the ratio braking coefficient.

[0089] Optionally, the first building module 810 includes:

[0090] The first construction submodule is used to subtract the positive sequence current from the braking current in the phase current differential protection expression of the transformer differential relay protection expression to construct the phase current differential protection mathematical expression;

[0091] The second construction submodule is used to add positive sequence current to the braking current in the sequence current differential protection expression of the transformer differential relay protection expression, and construct the sequence current differential protection mathematical expression.

[0092] Optionally, the mathematical expression for phase current differential protection is:

[0093]

[0094] In the formula, I e For the rated current, I j I represents the current on each side of the transformer. qd For the starting setpoint, I r For braking current, I d Where is the differential current, and k is the ratio braking coefficient;

[0095] Mathematical expression for sequence current differential protection

[0096]

[0097] In the formula, I d (2) It is a negative sequence differential current; I r (2) It is the negative sequence braking current; I j (1) I represents the positive sequence current on each side of the transformer. j (2) This refers to the negative sequence current on each side of the transformer.

[0098] Optionally, the first criterion is: I d >0.2I e ANDI d >kI r , where I d For differential current, I eFor the rated current, I r is the braking current, and k is the ratio braking coefficient.

[0099] Alternatively, the second criterion is: I d >0.2I e AND AND AND Where I d For differential current, I e For the rated current, I r For braking current, I r (1) This is the positive sequence braking current.

[0100] Optionally, the anti-rejection protection criterion is: satisfying the first criterion OR satisfying the second criterion.

[0101] Optionally, the protection module 850 includes:

[0102] The protection submodule is used to activate the transformer's anti-failure relay protection when the anti-failure protection criteria are met; otherwise, the anti-failure relay protection is not activated.

[0103] Exemplary electronic devices

[0104] Figure 9 This is the structure of an electronic device provided in an exemplary embodiment of the present invention. For example... Figure 9 As shown, the electronic device 90 includes one or more processors 91 and memory 92.

[0105] The processor 91 may be a central processing unit (CPU) or other form of processing unit with data processing capabilities and / or instruction execution capabilities, and may control other components in the electronic device to perform desired functions.

[0106] The memory 92 may include one or more computer program products, which may include various forms of computer-readable storage media, such as volatile memory and / or non-volatile memory. The volatile memory may include, for example, random access memory (RAM) and / or cache memory. The non-volatile memory may include, for example, read-only memory (ROM), hard disk, flash memory, etc. One or more computer program instructions may be stored on the computer-readable storage medium, and the processor 91 may execute the program instructions to implement the methods of the software programs of the various embodiments of the present invention described above, and / or other desired functions. In one example, the electronic device may also include an input device 93 and an output device 94, these components being interconnected via a bus system and / or other forms of connection mechanisms (not shown).

[0107] In addition, the input device 93 may also include, for example, a keyboard, a mouse, etc.

[0108] The output device 94 can output various information to the outside. The output device 94 may include, for example, a display, a speaker, a printer, and a communication network and its connected remote output devices, etc.

[0109] Of course, for the sake of simplicity, Figure 9 Only some of the components of this electronic device relevant to the present invention are shown, omitting components such as buses, input / output interfaces, etc. In addition, the electronic device may include any other suitable components depending on the specific application.

[0110] Exemplary computer program products and computer-readable storage media

[0111] In addition to the methods and apparatus described above, embodiments of the present invention may also be computer program products, which include computer program instructions that, when executed by a processor, cause the processor to perform the steps in the methods according to various embodiments of the present invention described in the "Exemplary Methods" section above.

[0112] The computer program product can be written in any combination of one or more programming languages ​​to perform the operations of the embodiments of the present invention. The programming languages ​​include object-oriented programming languages ​​such as Java and C++, as well as conventional procedural programming languages ​​such as C or similar languages. The program code can be executed entirely on the user's computing device, partially on the user's computing device, as a standalone software package, partially on the user's computing device and partially on a remote computing device, or entirely on a remote computing device or server.

[0113] Furthermore, embodiments of the present invention may also be computer-readable storage media storing computer program instructions thereon, which, when executed by a processor, cause the processor to perform the steps of the methods according to various embodiments of the present invention described in the "Exemplary Methods" section above.

[0114] The computer-readable storage medium may be any combination of one or more readable media. A readable medium may be a readable signal medium or a readable storage medium. A readable storage medium may be, for example, an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, device, or any combination thereof. More specific examples (a non-exhaustive list) of readable storage media include: an electrical connection having one or more wires, a portable disk, a hard disk, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fiber, portable compact disk read-only memory (CD-ROM), optical storage device, magnetic storage device, or any suitable combination thereof.

[0115] The basic principles of the present invention have been described above with reference to specific embodiments. However, it should be noted that the advantages, benefits, and effects mentioned in the present invention are merely examples and not limitations, and should not be considered as essential features of each embodiment of the present invention. Furthermore, the specific details disclosed above are for illustrative and facilitative purposes only, and are not limitations. These details do not limit the present invention to the necessity of employing the aforementioned specific details.

[0116] The various embodiments in this specification are described in a progressive manner, with each embodiment focusing on its differences from other embodiments. Similar or identical parts between embodiments can be referred to interchangeably. For system embodiments, since they largely correspond to method embodiments, the description is relatively simple; relevant parts can be referred to the descriptions in the method embodiments.

[0117] The block diagrams of devices, systems, devices, and systems involved in this invention are merely illustrative examples and are not intended to require or imply that they must be connected, arranged, or configured in the manner shown in the block diagrams. As those skilled in the art will recognize, these devices, systems, devices, and systems can be connected, arranged, and configured in any manner. Words such as “comprising,” “including,” “having,” etc., are open-ended terms meaning “including but not limited to,” and are used interchangeably with them. The terms “or” and “and” as used herein refer to the terms “and / or,” and are used interchangeably with them unless the context clearly indicates otherwise. The term “such as” as used herein refers to the phrase “such as but not limited to,” and is used interchangeably with it.

[0118] The methods and systems of the present invention may be implemented in many ways. For example, they may be implemented by software, hardware, firmware, or any combination of software, hardware, and firmware. The above-described order of steps for the methods is for illustrative purposes only, and the steps of the methods of the present invention are not limited to the order specifically described above unless otherwise specifically stated. Furthermore, in some embodiments, the present invention may also be implemented as a program recorded on a recording medium, the program comprising machine-readable instructions for implementing the methods according to the present invention. Thus, the present invention also covers recording media storing programs for performing the methods according to the present invention.

[0119] It should also be noted that in the systems, apparatus, and methods of the present invention, the components or steps can be disassembled and / or recombined. These disassemblies and / or recombinations should be considered equivalents of the present invention. The above description of the disclosed aspects is provided to enable any person skilled in the art to make or use the invention. Various modifications to these aspects will be readily apparent to those skilled in the art, and the general principles defined herein can be applied to other aspects without departing from the scope of the invention. Therefore, the invention is not intended to be limited to the aspects shown herein, but rather to be carried out within the widest scope consistent with the principles and novel features disclosed herein.

[0120] The above description has been given for purposes of illustration and description. Furthermore, this description is not intended to limit the embodiments of the invention to the forms disclosed herein. Although numerous exemplary aspects and embodiments have been discussed above, those skilled in the art will recognize certain variations, modifications, alterations, additions, and sub-combinations thereof.

Claims

1. A method for implementing phase-to-phase fault prevention relay protection during transformer oscillation, characterized in that, include: Based on the transformer differential relay protection expression, construct the mathematical expressions for transformer phase current differential protection and sequence current differential protection; The first criterion for transformer relay protection is constructed based on the aforementioned transformer differential relay protection expression; Based on the mathematical expressions for phase current differential protection and sequence current differential protection, a second criterion for transformer relay protection is constructed. The anti-shutdown protection criteria for the transformer are constructed based on the first criterion and the second criterion; The transformer's anti-failure relay protection is implemented based on the aforementioned anti-failure protection criterion. The expression for the transformer differential relay protection is: In the formula, I e Rated current, I j The current on each side of the transformer, I qd For starting setpoint, I r For braking current, I d For differential current, k This is the ratio braking coefficient; Based on the transformer differential relay protection expression, mathematical expressions for transformer phase current differential protection and sequence current differential protection are constructed, including: The mathematical expression for the phase current differential protection is: In the formula, I e Rated current, I j The current on each side of the transformer, I qd For starting setpoint, I r For braking current, I d For differential current, k This is the ratio braking coefficient; Mathematical expression for sequence current differential protection In the formula, It is a negative sequence differential current; It is a negative sequence braking current; These are the positive sequence currents on each side of the transformer; This refers to the negative sequence current on each side of the transformer.

2. The method according to claim 1, characterized in that, The first criterion is: AND ,in I d For differential current, I e Rated current, I r For braking current, k This is the ratio braking coefficient.

3. The method according to claim 1, characterized in that, The second criterion is: AND AND AND ,in I d For differential current, I e Rated current, I r For braking current, This is the positive sequence braking current.

4. The method according to claim 1, characterized in that, The anti-rejection protection criterion is: satisfying the first criterion OR satisfying the second criterion.

5. The method according to claim 1, characterized in that, The transformer's anti-failure relay protection is implemented based on the aforementioned anti-failure protection criterion, including: When the anti-failure protection criterion is met, the anti-failure relay protection of the transformer is activated; otherwise, the anti-failure relay protection is not activated.

6. A device for implementing phase-to-phase fault protection against relay failure during transformer oscillation, used to implement the method described in claim 1, characterized in that, include: The first construction module is used to construct the mathematical expressions for phase current differential protection and sequence current differential protection of the transformer based on the transformer differential relay protection expression. The second construction module is used to construct the first criterion for transformer relay protection based on the transformer differential relay protection expression; The third construction module is used to construct a second criterion for transformer relay protection based on the mathematical expression of phase current differential protection and the mathematical expression of sequence current differential protection; The fourth construction module is used to construct the anti-shutdown protection criteria for the transformer based on the first criterion and the second criterion; The protection module is used to implement the anti-failure relay protection of the transformer based on the anti-failure protection criterion.

7. The apparatus according to claim 6, characterized in that, The first criterion is: AND ,in I d For differential current, I e Rated current, I r For braking current, k This is the ratio braking coefficient.

8. The apparatus according to claim 6, characterized in that, The second criterion is: AND AND AND ,in I d For differential current, I e Rated current, I r For braking current, This is the positive sequence braking current.

9. A computer-readable storage medium, characterized in that, The storage medium stores a computer program for performing the method described in any one of claims 1-5.

10. An electronic device, characterized in that, The electronic device includes: processor; Memory used to store the processor's executable instructions; The processor is configured to read the executable instructions from the memory and execute the instructions to implement the method described in any one of claims 1-5.

Images