Improved high speed microphone read-write system

Abstract

The application discloses an improved high-speed microphone read-write system. The system comprises an SOC (System on Chip) module, a high-low speed switching module, a read-write module and a storage module. The high-low speed switching module is connected with the SOC module, the read-write module and the storage module. The SOC module is used for outputting a switching control signal to the high-low speed switching module through a target data transmission module when a matched target data transmission module is detected. The high-low speed switching module is used for switching data transmission among the SOC module, the read-write module and the storage module based on the switching control signal. The read-write speed of the microphone device is improved at low cost.

Description

Technical Field

[0001] This invention relates to the field of microphone technology, and more particularly to an improved high-speed microphone reading and writing system. Background Technology

[0002] In current microphone devices, hardware limitations and software package size affect read / write speeds. While the MCU (Microcontroller Unit) processes data quickly, memory read / write speeds are typically slower, resulting in a generally slow data exchange between the MCU and memory, thus slowing down overall file transfer speeds. Existing technologies aim to improve file transfer speeds through algorithms or by standardizing related instructions in memory, but these methods are costly. Summary of the Invention

[0003] This invention provides an improved high-speed microphone read / write system that improves the read / write speed of microphone devices at a low cost.

[0004] This invention provides an improved high-speed microphone read / write system, comprising: a SOC system-on-a-chip module, a high-low speed switching module, a read / write module, and a storage module; wherein,

[0005] The high-speed and low-speed switching module is connected to the SOC system-on-a-chip module, the read-write module, and the storage module, respectively.

[0006] The SOC system-on-a-chip module is used to output a switching control signal to the high-low speed switching module through the target data transmission module when a matching target data transmission module is detected to be connected.

[0007] The high-low speed switching module is used to switch the data transmission between the SOC on-chip module, the read / write module, and the storage module based on the switching control signal.

[0008] Optionally, the high-low speed switching module includes a first unit and a second unit; the first unit includes a switching control pin for receiving the switching control signal, and the first unit is used to output a switching selection signal based on the switching control signal; the second unit includes a second data pin, a fourth data pin, and a sixth data pin for connecting to the first data pin of the SOC system-on-a-chip module, the third data pin of the read / write module, and the fifth data pin of the storage module, respectively, and the second unit is used to enable or disable data transmission between the second data pin, the fourth data pin, and the sixth data pin based on the switching selection signal.

[0009] Optionally, there may be multiple second units, each of which includes a pair of second data pins, a pair of fourth data pins, and a pair of sixth data pins.

[0010] Optionally, the first clock pin and the first control pin of the storage module are connected to the second clock pin and the second control pin of the high-low speed switching module; the third clock pin and the third control pin of the SOC system-on-a-chip module are connected to the fourth clock pin and the fourth control pin of the high-low speed switching module to unify the clocks of the SOC system-on-a-chip module and the storage module; the fifth clock pin and the fifth control pin of the read-write module are connected to the sixth clock pin and the sixth control pin of the high-low speed switching module to unify the clocks of the read-write module and the storage module.

[0011] Optionally, the high-low speed switching module further includes a third unit, which includes a second clock pin, a second control pin, a fourth clock pin, a fourth control pin, a sixth clock pin, and a sixth control pin, for enabling or disabling data transmission between the second clock pin, the fourth clock pin, and the sixth clock pin, and data transmission between the second control pin, the fourth control pin, and the sixth control pin based on the switching selection signal.

[0012] Optionally, the system further includes a sound pickup module, which is connected to the SOC system-on-a-chip module and is used to collect sound signals, convert them into electrical signals, and transmit them to the SOC system-on-a-chip module.

[0013] Optionally, the SOC system-on-a-chip module is also used to process the electrical signal to obtain audio data and transmit it simultaneously to the storage module and the read / write module through the high-low speed switching module.

[0014] Optionally, the read / write module is used to write audio data to the storage module, and the SOC system-on-chip module is also used to read audio data from the storage module for processing through the high-low speed switching module.

[0015] Optionally, the system further includes an antenna module connected to the SOC system-on-a-chip module for signal transmission with a microphone receiver.

[0016] Optionally, the storage module is an SD, TF, or eMMC.

[0017] This invention provides an improved high-speed microphone read / write system. The system includes a System-on-a-Chip (SoC) module, a high-low speed switching module, a read / write module, and a storage module. The high-low speed switching module is connected to the SoC module, the read / write module, and the storage module, respectively. When the SoC module detects a matching target data transmission module connected to it, it transmits a switching control signal to the high-low speed switching module through the target data transmission module. Upon receiving the switching control signal, the high-low speed switching module switches the data transmission between the SoC module, the read / write module, and the storage module. By freely controlling whether data transmission can occur between the SoC module, the read / write module, and the storage module, the read / write speed of the microphone device can be improved by selecting the data transmission path, thereby improving the performance of the microphone device. Furthermore, this can be achieved with only simple circuit adjustments, reducing the cost required to improve read / write speed. Attached Figure Description

[0018] Figure 1 This is a schematic diagram of the structure of the improved high-speed microphone reading and writing system provided in an embodiment of the present invention;

[0019] Figure 2 A circuit diagram of a pickup module provided in an embodiment of the present invention;

[0020] Figure 3 A circuit diagram of an antenna module provided in an embodiment of the present invention;

[0021] Figure 4 Pin connection diagram of the first unit provided in the embodiment of the present invention;

[0022] Figure 5 This is a pin connection diagram of the read / write module provided in an embodiment of the present invention;

[0023] Figure 6 Pin connection diagram of the second unit provided in an embodiment of the present invention;

[0024] Figure 7 The pin connection diagram of the third unit provided in the embodiment of the present invention. Detailed Implementation

[0025] The present invention will now be described in further detail with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and not intended to limit it. Furthermore, it should be noted that, for ease of description, the accompanying drawings show only the parts relevant to the present invention, and not all of the structures.

[0026] Furthermore, the terms "first," "second," etc., may be used herein to describe various directions, actions, steps, or elements, but these directions, actions, steps, or elements are not limited by these terms. These terms are only used to distinguish a first direction, action, step, or element from another direction, action, step, or element. For example, without departing from the scope of the embodiments of the invention, a first data pin may be referred to as a second data pin, and similarly, a second data pin may be referred to as a first data pin. Both the first data pin and the second data pin are data pins, but they are not the same data pin. The terms "first," "second," etc., should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of the embodiments of the invention, "a plurality of" means at least two, such as two, three, etc., unless otherwise explicitly specified.

[0027] Figure 1 This is a schematic diagram of the improved high-speed microphone read / write system provided in Embodiment 1 of the present invention. This embodiment is applicable to situations requiring improved microphone device read / write speed. Figure 1 As shown, the system includes: a System-on-a-Chip (SoC) module 100, a high-low speed switching module 200, a read / write module 300, and a storage module 400; wherein, the high-low speed switching module 200 is connected to the SoC module 100, the read / write module 300, and the storage module 400 respectively; the SoC module 100 is used to output a switching control signal to the high-low speed switching module 200 through the target data transmission module when a matching target data transmission module is detected; the high-low speed switching module 200 is used to switch the data transmission between the SoC module 100, the read / write module 300, and the storage module 400 based on the switching control signal.

[0028] Among them, such as Figure 1 As shown, the SOC system-on-a-chip module 100 can be connected to the target data transmission module via the target pin 102. The SOC system-on-a-chip module 100 can be a WS300 SOC audio chip, and its USB pin can be used as the target pin 102. The corresponding target data transmission module can be a USB data cable. The other end of the target data transmission module can be connected to the switching control pin 204 of the high / low speed switching module 200 to transmit a switching control signal to it. Figure 1(The example shown is a wired connection.) The SOC system-on-chip 100 can be connected to the second data pin 201 of the high-low speed switching module 200 via the first data pin 101, allowing the SOC system-on-chip 100 to transmit or receive data from the high-low speed switching module 200. Similarly, the read / write module 300 can be connected to the fourth data pin 202 of the high-low speed switching module 200 via the third data pin 301, and the storage module 400 can be connected to the sixth data pin 203 of the high-low speed switching module 200 via the fifth data pin 401, allowing both the read / write module 300 and the storage module 400 to transmit or receive data from the high-low speed switching module 200. The high-low speed switching module 200 can be a switching chip and can select its internal data transmission path. For example, the SOC system-on-a-chip module 100 can read and write to the storage module 400 through the high-low speed switching module 200. Peripherals (such as mobile phones, PCs, etc.) can read and write to the storage module 400 through the read-write module 300 and the high-low speed switching module 200. The SOC system-on-a-chip module 100 can also directly output data to peripherals through the high-low speed switching module 200 and the read-write module 300. Peripherals can also directly input data to the SOC system-on-a-chip module 100 through the read-write module 300 and the high-low speed switching module 200. Optionally, the storage module 400 can be an SD card, TF card, or eMMC, and the read-write module 300 can be a high-speed read-write chip, etc.

[0029] When the target pin 102 of the SOC system-on-a-chip module 100 is not connected, the high-low speed switching module 200 can use a default data transmission path. For example, the default data transmission path could be data transmission between the second data pin 201 and the sixth data pin 203, data transmission between the fourth data pin 202 and the sixth data pin 203, and no data transmission between the second data pin 201 and the fourth data pin 202. When the SOC system-on-a-chip module 100 detects that a matching target data transmission module is connected to the target pin 102 (e.g., a USB data cable is detected being inserted), it can output a switching control signal to the high-low speed switching module 200 through the target pin 102. The high-low speed switching module 200 can then switch the data transmission path based on this switching control signal. For example, the switched data transmission path could be data transmission between the second data pin 201 and the fourth data pin 202, data transmission between the second data pin 201 and the sixth data pin 203, and no data transmission between the fourth data pin 202 and the sixth data pin 203. The default data transmission path and the switched data transmission path can be interchanged.

[0030] Optionally, the system further includes a microphone module connected to the SOC system-on-a-chip module 100. This module collects sound signals, converts them into electrical signals, and transmits them to the SOC system-on-a-chip module 100. Specifically, the SOC system-on-a-chip module 100 (WS300) can be connected to the MIC_BIAS, MICIN2P, and MICIN2N pins of the microphone module via pins 21, 22, and 23, respectively. The circuit diagram of the microphone module is shown below. Figure 2 As shown.

[0031] Optionally, the SOC system-on-a-chip module 100 is further configured to process the electrical signal to obtain audio data and simultaneously transmit it to the storage module 400 and the read / write module 300 via the high / low speed switching module 200. Specifically, when data needs to be output from the microphone, the high-speed mode can be switched by inserting or unplugging the USB data cable into or out of the target pin 102. After processing the electrical signal transmitted by the pickup module to obtain audio data, the SOC system-on-a-chip module 100 transmits the audio data to the high / low speed switching module 200, and then simultaneously transmits it to the storage module 400 and the read / write module 300, respectively, so as to output the audio data to the peripheral device through the output interface of the read / write module 300. This achieves simultaneous data storage and output, avoids the peripheral device reading the storage module 400, and improves the overall speed of data output from the microphone.

[0032] Optionally, the read / write module 300 is used to write audio data to the storage module 400, and the SOC system-on-a-chip module 100 is also used to read audio data from the storage module 400 for processing via the high / low speed switching module 200. Specifically, when data needs to be written to the microphone, the device can switch to normal mode by inserting or unplugging the USB data cable into or out of the target pin 102. First, the peripheral device writes audio data to the storage module 400 via the read / write module 300 and the high / low speed switching module 200. Then, the storage module 400 transmits the audio data to the high / low speed switching module 200, and then to the SOC system-on-a-chip module 100 for processing. Since there is usually no requirement for transmission speed when writing data, a conventional speed is sufficient. By providing different read / write speeds as needed, it is possible to better accelerate the microphone's data read / write speed while controlling costs.

[0033] Optionally, the system further includes an antenna module connected to the SOC system-on-chip module 100 for signal transmission with a microphone receiver. Specifically, this system can be applied to a microphone transmitter and also supports conventional wireless usage modes. The SOC system-on-chip module 100 (WS300) can be connected to the BT-RF pin of the antenna module via its first pin. The circuit diagram of the antenna module is shown below. Figure 3 As shown. Furthermore, the system may also include any other functional modules that can be included in existing microphone devices, such as button modules, LED display modules, contact charging modules, thermal sensing modules, filtering modules, and crystal oscillator modules, etc., all of which can be connected to the SOC system-on-a-chip module 100.

[0034] Based on the above technical solution, optionally, the high-low speed switching module 200 includes a first unit and a second unit; the first unit includes a switching control pin for receiving the switching control signal, and the first unit is used to output a switching selection signal based on the switching control signal; the second unit includes a second data pin, a fourth data pin, and a sixth data pin for connecting to the first data pin of the SOC system-on-a-chip module, the third data pin of the read / write module, and the fifth data pin of the storage module, respectively, and the second unit is used to enable or disable data transmission between the second data pin, the fourth data pin, and the sixth data pin based on the switching selection signal.

[0035] Specifically, the pin connection diagram of the first unit can be as follows: Figure 4 As shown. Specifically, the SOC System-on-Chip Module 100 (WS300) can connect to the 4th and 5th pins (switching control pins) of the first unit via its 15th and 16th pins (target pins) to transmit a switching control signal to the first unit. Upon receiving the switching control signal, the first unit can output a switching selection signal via its 10th pin and transmit it to the second unit. The second unit can serve as a data transmission channel, connecting to the data pins of the SOC System-on-Chip Module 100, the read / write module 300, and the storage module 400, respectively, and can select its internal data transmission path based on the received switching selection signal. Optionally, there can be multiple second units, each including a pair of second data pins, a pair of fourth data pins, and a pair of sixth data pins. Specifically, each second unit can use the same chip model as the first unit, and each unit can connect to a set of pins (positive and negative pins) of the SOC System-on-Chip Module 100, the read / write module 300, and the storage module 400 for selection. The pin connection diagram of the read / write module 300 can be shown below. Figure 5 As shown, multiple second units ( Figure 6 The pin connection diagram (showing two examples) can be as follows: Figure 6 As shown, pins 3, 2, 7, and 8 on the read / write module 300 can be paired up as third data pins and connected to pins 6 and 7 (fourth data pins) on each of the second units. Specifically, the SOC system-on-chip module 100 (WS300) can be paired up as first data pins and connected to pins 4 and 5 (second data pins) on each of the second units via pins 40, 44, 43, and 42. At the same time, pins 1 and 2 (sixth data pins) on each of the second units can be connected to the fifth data pin on the storage module 400.

[0036] Optionally, the first clock pin and the first control pin of the storage module 400 are respectively connected to the second clock pin and the second control pin of the high-low speed switching module 200; the third clock pin and the third control pin of the SOC system-on-chip module 100 are respectively connected to the fourth clock pin and the fourth control pin of the high-low speed switching module 200, for unifying the clocks of the SOC system-on-chip module 100 and the storage module 400; the fifth clock pin and the fifth control pin of the read-write module 300 are respectively connected to the sixth clock pin and the sixth control pin of the high-low speed switching module 200, for unifying the clocks of the read-write module 300 and the storage module 400.

[0037] Optionally, the high-low speed switching module 200 further includes a third unit, which includes a second clock pin, a second control pin, a fourth clock pin, a fourth control pin, a sixth clock pin, and a sixth control pin. This third unit is used to enable or disable data transmission between the second clock pin, the fourth clock pin, and the sixth clock pin, and data transmission between the second control pin, the fourth control pin, and the sixth control pin, based on the switching selection signal. Specifically, the pin connection diagram of the third unit can be as follows: Figure 7 As shown. Specifically, the SOC System-on-Chip Module 100 (WS300) can be connected to the third unit's pins 4 and 5 (fourth clock pin and fourth control pin) via its pins 38 and 39 (third clock pin and third control pin). The read / write module 300 can be connected to the third unit's pins 6 and 7 (sixth clock pin and sixth control pin) via its pins 4 and 5 (fifth clock pin and fifth control pin). Simultaneously, the third unit's pins 2 and 1 (second clock pin and second control pin) can be connected to the first clock pin and first control pin of the storage module 400. This allows for the selection of clock and control signal transmission paths based on the same switching selection signal when transmitting data through the high-low speed switching module 200, thus unifying the clocks at both ends of the data transmission.

[0038] The improved high-speed microphone read / write system provided in this invention includes a System-on-a-Chip (SoC) module, a high-low speed switching module, a read / write module, and a storage module. The high-low speed switching module is connected to the SoC module, the read / write module, and the storage module, respectively. When the SoC module detects a matching target data transmission module connected to it, it transmits a switching control signal to the high-low speed switching module through the target pin and the target data transmission module. Upon receiving the switching control signal, the high-low speed switching module switches the data transmission between the SoC module, the read / write module, and the storage module. By freely controlling whether data transmission can occur between the SoC module, the read / write module, and the storage module, the read / write speed of the microphone device can be improved by selecting the data transmission path, thereby improving the performance of the microphone device. Furthermore, this can be achieved with only simple circuit adjustments, reducing the cost required to improve read / write speed.

[0039] Note that the above description is merely a preferred embodiment of the present invention and the technical principles employed. Those skilled in the art will understand that the present invention is not limited to the specific embodiments described herein, and various obvious changes, readjustments, and substitutions can be made without departing from the scope of protection of the present invention. Therefore, although the present invention has been described in detail through the above embodiments, the present invention is not limited to the above embodiments, and may include many other equivalent embodiments without departing from the concept of the present invention, the scope of which is determined by the scope of the appended claims.

Claims

1. An improved high-speed microphone reading and writing system, characterized in that, The system includes: a SOC (System-on-a-Chip) module, a high-low speed switching module, a read / write module, and a storage module; wherein... The high-speed and low-speed switching module is connected to the SOC system-on-a-chip module, the read-write module, and the storage module, respectively. The SOC system-on-a-chip module is used to output a switching control signal to the high-low speed switching module through the target data transmission module when a matching target data transmission module is detected to be connected. The high-low speed switching module is used to switch the data transmission between the SOC on-chip module, the read / write module, and the storage module based on the switching control signal; The system also includes a sound pickup module, which is connected to the SOC system-on-a-chip module and is used to collect sound signals, convert them into electrical signals, and transmit them to the SOC system-on-a-chip module. The SOC system-on-a-chip module is also used to process the electrical signal to obtain audio data and transmit it simultaneously to the storage module and the read / write module through the high-low speed switching module.

2. The improved high-speed microphone reading and writing system according to claim 1, characterized in that, The high-low speed switching module includes a first unit and a second unit; the first unit includes a switching control pin for receiving the switching control signal, and the first unit is used to output a switching selection signal based on the switching control signal; the second unit includes a second data pin, a fourth data pin, and a sixth data pin for connecting to the first data pin of the SOC system-on-a-chip module, the third data pin of the read / write module, and the fifth data pin of the storage module, respectively, and the second unit is used to enable or disable data transmission between the second data pin, the fourth data pin, and the sixth data pin based on the switching selection signal.

3. The improved high-speed microphone reading and writing system according to claim 2, characterized in that, There are multiple second units, and each second unit includes a pair of second data pins, a pair of fourth data pins, and a pair of sixth data pins.

4. The improved high-speed microphone reading and writing system according to claim 2, characterized in that, The first clock pin and the first control pin of the storage module are connected to the second clock pin and the second control pin of the high-low speed switching module, respectively; the third clock pin and the third control pin of the SOC system-on-a-chip module are connected to the fourth clock pin and the fourth control pin of the high-low speed switching module, respectively, to unify the clocks of the SOC system-on-a-chip module and the storage module; the fifth clock pin and the fifth control pin of the read-write module are connected to the sixth clock pin and the sixth control pin of the high-low speed switching module, respectively, to unify the clocks of the read-write module and the storage module.

5. The improved high-speed microphone reading and writing system according to claim 4, characterized in that, The high-low speed switching module further includes a third unit, which includes a second clock pin, a second control pin, a fourth clock pin, a fourth control pin, a sixth clock pin, and a sixth control pin, and is used to enable or disable data transmission between the second clock pin, the fourth clock pin, and the sixth clock pin, and data transmission between the second control pin, the fourth control pin, and the sixth control pin based on the switching selection signal.

6. The improved high-speed microphone reading and writing system according to claim 1, characterized in that, The read / write module is used to write audio data to the storage module, and the SOC system-on-chip module is also used to read audio data from the storage module for processing through the high-low speed switching module.

7. The improved high-speed microphone reading and writing system according to claim 1, characterized in that, The system also includes an antenna module, which is connected to the SOC system-on-a-chip module and is used for signal transmission with the microphone receiver.

8. The improved high-speed microphone reading and writing system according to claim 1, characterized in that, The storage module is SD, TF, or eMMC.

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