Cavity bulk acoustic resonator and method of manufacturing the same

Abstract

The application discloses a cavity bulk acoustic resonator and a preparation method thereof, and relates to the field of semiconductor radio frequency devices. The preparation method comprises the following steps: (1) forming a piezoelectric layer on a temporary substrate; (2) forming a lower electrode layer and patterning; (3) forming a filling layer and patterning, the projection of the patterned lower electrode layer covering the patterned filling layer; (4) forming a wrapping layer to wrap the patterned lower electrode layer and the patterned filling layer; (5) bonding with a transfer substrate; (6) removing the temporary substrate; (7) forming an upper electrode layer on the piezoelectric layer and patterning, so that the projection of the patterned filling layer covers the patterned upper electrode layer; and (8) removing the filling layer to form a cavity. The filling layer is made of silicon dioxide, phosphorus-containing silicon dioxide or resin, and the wrapping layer is made of silicon or ceramic. By implementing the application, the performance of the cavity bulk acoustic resonator can be improved, and the process cost and process difficulty can be reduced.

Description

Technical Field

[0001] This invention relates to the field of semiconductor radio frequency devices, and in particular to a cavity-type bulk acoustic resonator and its fabrication method. Background Technology

[0002] With the rapid development of fifth-generation mobile communication technology (5G), higher requirements are placed on the performance of radio frequency front-end filters. Large bandwidth and high frequency are two major characteristics of 5G filters. Currently, the most widely used acoustic filters are surface acoustic wave (SAW) filters and bulk acoustic wave (BAW) filters. However, SAW filters are limited in frequency increases due to the size of the interdigitated electrodes, making them less effective for frequencies above 3GHz. Therefore, 5G bulk acoustic wave filters are mainly based on polycrystalline aluminum nitride piezoelectric thin film materials. However, achieving a large bandwidth (>200MHz) with polycrystalline aluminum nitride requires methods such as scandium doping, which is costly and difficult to implement.

[0003] Furthermore, existing bulk acoustic wave resonators generally fall into three structural types: back-etched, solid-state assembled, and cavity-type. Back-etched resonators suffer from poor mechanical robustness, making mass production difficult. While solid-state assembled resonators offer strong mechanical properties, their Bragg reflector layer's ability to confine acoustic waves is limited, resulting in a lower quality factor. Cavity-type resonators do not require the removal of large amounts of substrate material, thus exhibiting strong mechanical stability and a high quality factor. Currently, there are generally two fabrication processes for cavity-type resonators. One process involves forming a concave cavity on the substrate before fabricating the lower electrode, piezoelectric film, and upper electrode. This process provides poor support for the piezoelectric film, making it prone to cracking. The other process involves first forming a high-hardness support layer on the substrate, then placing a sacrificial layer beneath the support layer, and finally removing the sacrificial layer to form the cavity. While this process provides strong support for the piezoelectric film, it also means that the piezoelectric layer must grow on the surface of the lower electrode and / or support layer. This makes epitaxial growth difficult, resulting in poor crystal quality and negatively impacting the performance of the bulk acoustic wave resonator. Summary of the Invention

[0004] The technical problem to be solved by the present invention is to provide a cavity-type bulk acoustic resonator and its fabrication method, which can reduce the process cost and process difficulty, and improve its various performances.

[0005] To address the above problems, this invention discloses a method for fabricating a cavity-type bulk acoustic resonator, comprising the following steps:

[0006] (1) Form a piezoelectric layer on a temporary substrate;

[0007] (2) A lower electrode layer is formed on the piezoelectric layer and patterned;

[0008] (3) A filling layer is formed on the temporary substrate obtained in step (2) and patterned so that the projection of the patterned lower electrode layer covers the patterned filling layer; wherein the filling layer is made of silicon dioxide, phosphorus-containing silicon dioxide or resin.

[0009] (4) A wrapping layer is formed on the temporary substrate obtained in step (3) to wrap the patterned lower electrode layer and the patterned fill layer, and to cover other areas of the temporary substrate; wherein the wrapping layer is made of silicon or ceramic;

[0010] (5) Bond the temporary substrate obtained in step (4) to the transfer substrate;

[0011] (6) Remove the temporary substrate to expose the piezoelectric layer;

[0012] (7) An upper electrode layer is formed on the piezoelectric layer and patterned so that the projection of the patterned filling layer covers the patterned upper electrode layer.

[0013] (8) Remove the filling layer to form a cavity, thus obtaining a cavity-type solid acoustic resonator.

[0014] As an improvement to the above technical solution, the distance between the outer edge of the patterned filling layer and the outer edge of the projection of the patterned lower electrode layer is ≤3μm; and / or

[0015] The distance between the outer edge of the patterned upper electrode layer and the outer edge of the projection of the patterned filling layer is ≤3μm.

[0016] As an improvement to the above technical solution, the patterned fill layer, the patterned upper electrode layer, and the patterned lower electrode layer are all pentagonal.

[0017] The distance between the outer edge of the patterned fill layer and the outer edge of the projection of the patterned lower electrode layer is 2.2 μm to 2.8 μm;

[0018] The distance between the outer edge of the patterned upper electrode layer and the outer edge of the projection of the patterned filling layer is 2.2 μm to 2.8 μm.

[0019] As an improvement to the above technical solution, the temporary substrate is selected from one or more of sapphire substrate, silicon carbide substrate, silicon nitride substrate, or silicon substrate; and / or

[0020] The transfer substrate is selected from one or more of silicon substrate, sapphire substrate, silicon carbide substrate or diamond substrate.

[0021] As an improvement to the above technical solution, the piezoelectric layer is made of single-crystal aluminum nitride and / or single-crystal gallium oxide, with a thickness of 200 nm to 1000 nm; and / or

[0022] The lower electrode layer is made of one or more of tungsten, molybdenum, and aluminum, and has a thickness of 100 nm to 500 nm; and / or

[0023] The thickness of the filling layer is 100 nm to 2000 nm; and / or

[0024] The upper electrode layer is made of one or more of tungsten, molybdenum, and aluminum, and its thickness is 50 nm to 500 nm.

[0025] As an improvement to the above technical solution, the thickness of the encapsulation layer is D, and the total thickness of the filling layer and the lower electrode layer is d, where Dd ≥ 300 nm.

[0026] As an improvement to the above technical solution, in step (5), the encapsulation layer is ground and planarized, and then bonded to the transfer substrate;

[0027] The surface roughness of the coating layer after grinding and planarization is ≤0.3nm, the uniformity is ≤1%, and the TTV is ≤20μm.

[0028] As an improvement to the above technical solution, in step (6), the temporary substrate is first thinned to 5μm to 50μm by grinding, and then the remaining temporary substrate is removed by dry etching to expose the piezoelectric layer.

[0029] As an improvement to the above technical solution, the piezoelectric layer is made of single-crystal ε-gallium oxide.

[0030] Accordingly, the present invention also discloses a cavity-type bulk acoustic resonator, which is prepared by the above-described method for preparing a cavity-type bulk acoustic resonator.

[0031] Implementing this invention has the following beneficial effects:

[0032] In one embodiment of the present invention, a method for fabricating a cavity-type bulk acoustic wave resonator involves first epitaxially growing a piezoelectric layer on a temporary substrate, then fabricating a lower electrode layer, a filling layer, and a cladding layer, followed by bonding and transferring the substrate, removing the temporary substrate to expose the piezoelectric layer, and finally forming an upper electrode layer. This fabrication method not only effectively improves the crystal quality of the piezoelectric layer through epitaxial growth but also forms the upper and lower electrode layers through bonding, reducing manufacturing difficulty and providing a solution for fabricating cavity-type bulk acoustic wave resonators. Attached Figure Description

[0033] Figure 1 This is a schematic cross-sectional view of the temporary substrate after step S2 in one embodiment of the present invention;

[0034] Figure 2 This is a cross-sectional view of the temporary substrate after step S3 in one embodiment of the present invention;

[0035] Figure 3 This is a schematic cross-sectional view of the temporary substrate after step S4 in one embodiment of the present invention;

[0036] Figure 4 This is a cross-sectional view of the temporary substrate after step S5 in one embodiment of the present invention;

[0037] Figure 5 This is a cross-sectional view of the substrate after step S7 in one embodiment of the present invention;

[0038] Figure 6 This is a top view of the substrate after step S7 in an embodiment of the present invention.

[0039] Figure 7 This is a schematic diagram of the through hole in step S8 of an embodiment of the present invention;

[0040] Figure 8 This is a cross-sectional view of a cavity-type bulk acoustic resonator in one embodiment of the present invention;

[0041] In the figure, 1 is a temporary substrate, 2 is a piezoelectric layer, 3 is a lower electrode layer, 4 is a filling layer, 5 is a wrapping layer, 6 is a transfer substrate, 7 is an upper electrode, 8 is a cavity, and 9 is a via. Detailed Implementation

[0042] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. Examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain this application, and should not be construed as limiting this application. Furthermore, it should be understood that the specific embodiments described herein are merely for explaining this application and are not intended to limit this application.

[0043] In the description of this application, it should be understood that the terms "length", "width", "upper", "lower", "left", "right", "horizontal", "top", "bottom", etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, and are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this application.

[0044] In the description of this application, it should be noted that, unless otherwise expressly specified and limited, the terms "installation," "connection," and "linking" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection, an electrical connection, or a connection that allows communication between them; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication between two components or the interaction between two components. Those skilled in the art can understand the specific meaning of the above terms in this application according to the specific circumstances.

[0045] In this application, unless otherwise expressly specified and limited, "above" or "below" the second feature can include direct contact between the first and second features, or contact between the first and second features through another feature between them. Furthermore, "above," "over," and "on top" of the second feature includes the first feature being directly above or diagonally above the second feature, or simply indicates that the first feature is at a higher horizontal level than the second feature. "Below," "below," and "under" the second feature includes the first feature being directly below or diagonally below the second feature, or simply indicates that the first feature is at a lower horizontal level than the second feature.

[0046] The following disclosure provides numerous different embodiments or examples for implementing various structures of this application. To simplify the disclosure, specific examples of components and arrangements are described below. These are merely examples and are not intended to limit the scope of this application. Furthermore, reference numerals and / or letters may be repeated in different examples; such repetition is for simplification and clarity and does not in itself indicate a relationship between the various embodiments and / or arrangements discussed. In addition, examples of various specific processes and materials are provided in this application, but those skilled in the art will recognize the application of other processes and / or the use of other materials.

[0047] See Figures 1 to 7 One embodiment of the present invention provides a method for fabricating a cavity-type bulk acoustic resonator, which includes the following steps:

[0048] S1: Form a piezoelectric layer on a temporary substrate;

[0049] The temporary substrate 1 can be a sapphire substrate, a silicon substrate, a quartz substrate, a silicon carbide substrate, a silicon nitride substrate, or a gallium arsenide substrate, but is not limited thereto. Preferably, the temporary substrate 1 is a sapphire substrate, a silicon carbide substrate, a silicon nitride substrate, or a silicon substrate, and more preferably, a silicon substrate.

[0050] The piezoelectric layer 2 is made of one or more of polycrystalline aluminum nitride, single-crystal aluminum nitride, or single-crystal gallium ε-oxide, but is not limited thereto. Preferably, the piezoelectric layer 2 is made of single-crystal aluminum nitride and / or single-crystal gallium ε-oxide. More preferably, the piezoelectric layer 2 is made of single-crystal gallium ε-oxide and is prepared by epitaxy, and its piezoelectric coefficient is twice that of single-crystal aluminum nitride, which has advantages in terms of large bandwidth and low loss.

[0051] The thickness of the piezoelectric layer 2 is 100nm to 1000nm, and exemplary thicknesses are 150nm, 300nm, 450nm, 600nm, 750nm, or 900nm, but not limited thereto. Preferably, it is 200nm to 1000nm.

[0052] Specifically, a polycrystalline material layer can be grown by PVD, or a single-crystal material layer can be grown by MOCVD, MBE, or PLD as the piezoelectric layer 2, but it is not limited to these methods. Preferably, in this embodiment, a single-crystal ε-gallium oxide layer is grown by MOCVD, which has high preparation efficiency and good piezoelectric properties.

[0053] S2: Form a lower electrode layer on the piezoelectric layer and pattern it;

[0054] The lower electrode layer 3 is made of one or more of tungsten, molybdenum, and aluminum, but is not limited thereto. The thickness of the lower electrode layer 3 is 100 nm to 800 nm, exemplarily 150 nm, 200 nm, 300 nm, 450 nm, 600 nm, or 700 nm, but is not limited thereto. Preferably, the lower electrode layer 3 is 100 nm to 500 nm, more preferably 100 nm to 300 nm.

[0055] The lower electrode layer 3 can be grown using methods such as PVD or vapor deposition, but is not limited to these methods. Preferably, in this embodiment, the lower electrode layer 3 is grown by PVD. After the lower electrode layer 3 is grown, it is patterned by photolithography etching, wherein the etching can be dry etching or wet etching. Preferably, the lower electrode layer 3 is etched by dry etching.

[0056] Specifically, the cross-section of the patterned lower electrode layer 3 is circular, triangular, rectangular, or pentagonal, but not limited to these. Preferably, see [reference needed]. Figure 1 and Figure 6 The cross-section of the lower electrode layer 3 after being patterned is a regular pentagon.

[0057] S3: A filling layer is formed on the temporary substrate obtained in step S2 and patterned so that the projection of the patterned lower electrode layer covers the patterned filling layer.

[0058] The filler layer 4 is made of silicon dioxide, phosphorus-containing silicon dioxide, or resin, but is not limited to these. These materials facilitate the later removal of the filler layer 4. Preferably, the filler layer 4 is made of phosphorus-containing silicon dioxide, i.e., phosphosilicate glass.

[0059] The thickness of the filling layer 4 is 100 nm to 2000 nm to form a larger cavity 8, thereby improving the performance of the cavity-type bulk acoustic resonator. For example, the thickness of the filling layer 4 is 400 nm, 800 nm, 1200 nm, 1500 nm, or 1800 nm, but is not limited thereto. Preferably, the thickness of the filling layer 4 is 500 nm to 1000 nm.

[0060] Specifically, the filler layer 4 can be formed by methods such as MOCVD, PECVD, spin coating, etc., but is not limited to these. After the filler layer 4 is formed, it is patterned by photolithography etching, wherein the etching can be dry etching or wet etching. Preferably, the filler layer 4 is etched by dry etching.

[0061] Specifically, the filling layer 4 is formed above the lower electrode layer 3, and its size after patterning is smaller than that of the patterned lower electrode layer 3, meaning that the projection of the patterned lower electrode layer 3 onto the surface where the filling layer 4 is located completely covers the patterned filling layer 4. Specifically, the cross-section of the patterned filling layer 4 is circular, triangular, rectangular, or pentagonal, but not limited to these. Preferably, see [reference needed]. Figure 2 and Figure 6 The graphical fill layer 4 is a regular pentagon.

[0062] Specifically, the dimensions of the above-mentioned patterned fill layer 4 and patterned lower electrode layer 3 refer to their cross-sectional dimensions. Specifically, when the cross-section is circular, the dimension is the diameter; when the cross-section is rectangular, the dimension is the length of the longer side; when the cross-section is triangular, the dimension is the length of the longest side; when the cross-section is pentagonal, the dimension is the maximum value of the pentagon's height; when the cross-section is other polygons, the dimension is the maximum value of the polygon's height, but not limited to these.

[0063] Specifically, the patterned fill layer 4 and the patterned lower electrode layer 3 may have the same or different cross-sectional shapes. Preferably, in one embodiment, the cross-sections of both the patterned fill layer 4 and the lower electrode layer 3 are regular pentagons, and the five sides of the two cross-sections are parallel.

[0064] Among them, see Figure 6 The distance L between the outer edge of the patterned filling layer 4 and the outer edge of the projection of the patterned lower electrode layer 3 is ≤3μm, and is exemplarily 0.8μm, 1.2μm, 2μm or 2.4μm, but is not limited thereto. Preferably it is 2.2μm to 2.8μm.

[0065] S4: A wrapping layer is formed on the temporary substrate obtained in step S3 to wrap the patterned lower electrode layer and the patterned fill layer, and to cover other areas of the temporary substrate.

[0066] The encapsulation layer 5 is made of a high-hardness material to provide good support for the piezoelectric layer 2, the upper electrode layer 7, and the lower electrode layer 3 after the cavity 8 is formed later. Specifically, the encapsulation layer 5 can be made of silicon or ceramic, but is not limited to these.

[0067] For details, see Figure 3 To form a good support, the thickness D of the encapsulation layer 5 should be controlled to be greater than the total thickness d of the filling layer 4 and the lower electrode layer 3, so that the encapsulation layer 5 completely covers the surface of the lower electrode layer 3, the filling layer 4, and the exposed temporary substrate 1. Preferably, Dd should be controlled to be ≥ 300 nm. More specifically, the thickness of the encapsulation layer 5 is 1000 nm to 3000 nm, exemplarily 1200 nm, 1400 nm, 1800 nm, 2200 nm, 2600 nm, or 2800 nm, but is not limited thereto.

[0068] The encapsulation layer 5 can be prepared by chemical vapor deposition (such as MOCVD or PECVD) or physical vapor deposition (such as PVD), but is not limited to these methods.

[0069] S5: Bond the temporary substrate obtained in S4 to the transfer substrate;

[0070] The transfer substrate 6 can be a sapphire substrate, silicon substrate, quartz substrate, silicon carbide substrate, silicon nitride substrate, gallium arsenide substrate, but is not limited thereto. Preferably, the temporary substrate 1 is one or more of a silicon substrate, sapphire substrate, silicon carbide substrate, or diamond substrate, more preferably a silicon substrate. Preferably, to facilitate bonding, a silicon layer, a silicon dioxide layer, or other non-metallic insulating material layer may also be formed on the transfer substrate 6, but is not limited thereto; these materials are convenient for direct bonding with the encapsulation layer 5.

[0071] The temporary substrate 1 obtained in step S4 can be bonded to the transfer substrate 6 through methods such as eutectic bonding, anodic bonding, thermo-pressing bonding, or direct bonding, but is not limited to these methods. Preferably, direct bonding is used.

[0072] Preferably, in some embodiments, before bonding, the coating layer 5 is ground and polished using chemical mechanical polishing (CMP) to planarize it and facilitate subsequent bonding. Specifically, after grinding and polishing, the surface roughness of the coating layer 5 is ≤0.3 nm, the uniformity is ≤1%, and the total surface velocity (TTV) is ≤20 μm. The methods for measuring surface roughness, uniformity, and TTV can be found in GB / T32814-2016.

[0073] S6: Remove the temporary substrate to expose the piezoelectric layer;

[0074] The temporary substrate 1 can be removed by methods such as chemical polishing, etching, or laser lift-off. Preferably, in one embodiment, the temporary substrate 1 is first polished to a thickness of 5 μm to 50 μm, and then the remaining temporary substrate 1 is removed by dry etching to expose the piezoelectric layer 2.

[0075] S7: Form and pattern the upper electrode layer on the piezoelectric layer;

[0076] The upper electrode layer 7 is made of one or more of tungsten, molybdenum, and aluminum, but is not limited thereto. The thickness of the upper electrode layer 7 is 50 nm to 800 nm, exemplarily 80 nm, 150 nm, 200 nm, 300 nm, 450 nm, 600 nm, or 700 nm, but is not limited thereto. Preferably, the upper electrode layer 7 is 50 nm to 500 nm, more preferably 100 nm to 300 nm.

[0077] The upper electrode layer 7 can be grown using methods such as PVD or vapor deposition, but is not limited to these methods. Preferably, in this embodiment, the upper electrode layer 7 is grown by PVD. After the upper electrode layer 7 is grown, it is patterned by photolithography etching, wherein the etching can be dry etching or wet etching. Preferably, the upper electrode layer 7 is etched by dry etching.

[0078] Specifically, the upper electrode layer 7 is formed above the patterned fill layer 4, and its size after patterning is smaller than the size of the patterned fill layer 4, meaning that the projection of the patterned fill layer 4 onto the surface of the upper electrode layer 7 completely covers the patterned upper electrode layer 7. Specifically, the cross-section of the patterned upper electrode layer 7 is circular, triangular, rectangular, or pentagonal, but is not limited to these. Preferably, see [reference needed]. Figure 5 and Figure 6 The cross-section of the top electrode layer 7 after being patterned is a regular pentagon.

[0079] Specifically, the dimensions of the above-mentioned patterned fill layer 4 and patterned upper electrode layer 7 refer to their cross-sectional dimensions. Specifically, when the cross-section is circular, the dimension is the diameter; when the cross-section is rectangular, the dimension is the length of the longer side; when the cross-section is triangular, the dimension is the length of the longest side; when the cross-section is pentagonal, the dimension is the maximum value of the height of the pentagon; when the cross-section is other polygons, the dimension is the maximum value of the height of that polygon, but not limited to these.

[0080] Specifically, the patterned fill layer 4 and the patterned upper electrode layer 7 may have the same or different cross-sectional shapes. Preferably, in one embodiment, the cross-sections of both the patterned fill layer 4 and the upper electrode layer 7 are regular pentagons, and the five sides of the two cross-sections are parallel.

[0081] Among them, see Figure 6The distance l between the outer edge of the patterned upper electrode layer 7 and the outer edge of the projection of the patterned filling layer 4 is ≤3μm, and is exemplarily 0.8μm, 1.2μm, 2μm or 2.4μm, but is not limited thereto. Preferably it is 2.2μm to 2.8μm.

[0082] S8: Remove the filling layer to form a cavity, thus obtaining a cavity-type solid acoustic resonator.

[0083] Among them, through-hole 9 can be formed by etching piezoelectric layer 2 (refer to...) Figure 7 Then, the filling layer 4 is etched away to form a cavity 8, thereby obtaining a cavity-type bulk acoustic resonator.

[0084] In the method for fabricating a cavity-type bulk acoustic wave resonator of the present invention, a piezoelectric layer 2 is first epitaxially grown on a temporary substrate 1, followed by the fabrication of a lower electrode layer 3, a filling layer 4, and a wrapping layer 5. A transfer substrate 6 is then bonded, the temporary substrate 1 is removed, exposing the piezoelectric layer 2, and finally, an upper electrode layer 7 is formed. Based on this fabrication method, not only is the crystal quality of the piezoelectric layer 2 effectively improved through epitaxial growth, but the upper electrode layer 7 and the lower electrode layer 3 are also formed through bonding, reducing the manufacturing difficulty and providing a solution for the fabrication of cavity-type bulk acoustic wave resonators. It should be noted that while epitaxial growth of the piezoelectric layer 2 can improve its crystal quality, this also means that no other layer (such as the lower electrode layer 3) can exist between the substrate and the piezoelectric layer 2. This makes it impossible to fabricate the lower electrode layer 3 below the piezoelectric layer 2 in advance, resulting in high process difficulty and making it difficult to implement. The present invention solves this problem through a specific fabrication process.

[0085] Accordingly, one embodiment of the present invention also provides a cavity-type bulk acoustic resonator, which is prepared by the above-described method. Preferably, the cavity-type bulk acoustic resonator in this embodiment may further include Bragg reflector layers commonly used in the art, but is not limited thereto.

[0086] The above description is a preferred embodiment of the invention. It should be noted that, for those skilled in the art, several improvements and modifications can be made without departing from the principle of the invention, and these improvements and modifications are also considered to be within the scope of protection of the invention.

Claims

1. A method for fabricating a cavity-type bulk acoustic resonator, characterized in that, Includes the following steps: (1) Forming a piezoelectric layer on a temporary substrate; (2) A lower electrode layer is formed on the piezoelectric layer and patterned; (3) A filling layer is formed on the temporary substrate obtained in step (2) and patterned so that the projection of the patterned lower electrode layer covers the patterned filling layer; wherein the filling layer is made of silicon dioxide, phosphorus-containing silicon dioxide or resin; (4) A wrapping layer is formed on the temporary substrate obtained in step (3) to wrap the patterned lower electrode layer and the patterned fill layer, and to cover other areas of the temporary substrate; wherein the wrapping layer is made of silicon or ceramic; the thickness of the wrapping layer is D, and the total thickness of the fill layer and the lower electrode layer is d, where Dd≥300nm; (5) The encapsulation layer is ground and planarized, and then bonded to the transfer substrate; (6) Remove the temporary substrate to expose the piezoelectric layer; (7) An upper electrode layer is formed on the piezoelectric layer and patterned so that the projection of the patterned filling layer covers the patterned upper electrode layer. (8) Remove the filling layer to form a cavity, thus obtaining a cavity-type solid acoustic resonator.

2. The method for fabricating a cavity-type bulk acoustic resonator as described in claim 1, characterized in that, The distance between the outer edge of the patterned fill layer and the outer edge of the projection of the patterned lower electrode layer is ≤3μm; and / or The distance between the outer edge of the patterned upper electrode layer and the outer edge of the projection of the patterned filling layer is ≤3μm.

3. The method for fabricating a cavity-type bulk acoustic resonator as described in claim 1, characterized in that, The patterned fill layer, the patterned upper electrode layer, and the patterned lower electrode layer are all pentagonal; The distance between the outer edge of the patterned fill layer and the outer edge of the projection of the patterned lower electrode layer is 2.2 μm to 2.8 μm; The distance between the outer edge of the patterned upper electrode layer and the outer edge of the projection of the patterned filling layer is 2.2 μm to 2.8 μm.

4. The method for fabricating a cavity-type bulk acoustic resonator as described in claim 1, characterized in that, The temporary substrate is selected from one or more of sapphire substrate, silicon carbide substrate, silicon nitride substrate, or silicon substrate; and / or The transfer substrate is selected from one or more of silicon substrate, sapphire substrate, silicon carbide substrate or diamond substrate.

5. The method for fabricating a cavity-type bulk acoustic resonator as described in claim 1, characterized in that, The piezoelectric layer is made of single-crystal aluminum nitride and / or single-crystal gallium oxide, with a thickness of 200 nm to 1000 nm; and / or The lower electrode layer is made of one or more of tungsten, molybdenum, and aluminum, and has a thickness of 100 nm to 500 nm; and / or The thickness of the filling layer is 100nm~2000nm; and / or The upper electrode layer is made of one or more of tungsten, molybdenum, and aluminum, and its thickness is 50nm~500nm.

6. The method for fabricating a cavity-type bulk acoustic resonator as described in claim 1, characterized in that, In step (5), the surface roughness of the coating layer after grinding and planarization is ≤0.3nm, the uniformity is ≤1%, and the TTV is ≤20μm.

7. The method for fabricating a cavity-type bulk acoustic resonator as described in claim 1, characterized in that, In step (6), the temporary substrate is first thinned to 5μm~50μm by grinding, and then the remaining temporary substrate is removed by dry etching to expose the piezoelectric layer.

8. The method for fabricating a cavity-type bulk acoustic resonator as described in any one of claims 1 to 7, characterized in that, The piezoelectric layer is made of single-crystal ε-gallium oxide.

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