Image-based LED address dynamic writing method and related equipment

Abstract

This application relates to the field of intelligent lighting technology, and provides a method and related equipment for dynamic LED address writing based on image positioning. The method involves acquiring and denoising images of the target LED layout area to obtain spot positioning data, performing spot contour analysis and coordinate extraction on the spot positioning data to obtain a set of physical coordinates for the spots, traversing the set of physical coordinates according to spatial order to generate an ordered sequence of LEDs, dynamically encoding the ordered sequence of LEDs to generate an address allocation mapping table, and burning the driver IC address according to the time-division multiplexing method of parallel data lines and the address allocation mapping table to obtain an ACK feedback signal. The method then monitors for response anomalies in the target LED layout area based on the ACK feedback signal. This application improves the addressing accuracy and writing efficiency of LEDs by organically combining machine vision with associative traversal, dynamic encoding, parallel broadcasting, and real-time feedback.

Description

Technical Field

[0001] This application relates to the field of intelligent lighting technology, and in particular to an image-based method for dynamically writing LED addresses and related equipment. Background Technology

[0002] As a core component of modern lighting and display systems, LED lights are widely used in indoor and outdoor lighting, stage performances, advertising screens, smart homes, and industrial visual applications due to their high efficiency, long lifespan, and environmental friendliness. In large stage screens or outdoor advertising screens, tens of thousands of individual LEDs work together to present vibrant and colorful images. In intelligent lighting systems, precise local dimming and dynamic color changes are key to achieving a high-quality experience.

[0003] Currently, LED address programming mainly relies on manual configuration or a lighting detection and random competition mechanism based on a communication bus. For example, the most traditional method is manual wiring or writing addresses one by one using a dedicated programming tool. Hangzhou Shengjin Microelectronics Co., Ltd.'s application, "A Parallel LED Address Programming System, Method, LED Module and Package" (CN119045841A), discloses a lighting detection strategy using bus competition, lighting up LEDs one by one and monitoring for line conflicts. Tiancheng High-Tech (Shenzhen) Co., Ltd.'s application, "An LED Online Address Writing Method" (CN118139254A), discloses a photoelectric communication random encoding method that sends random addresses to each unit via a photoelectric interface. Although current programming methods can achieve batch writing, the one-by-one lighting and random addressing make it impossible to quickly and accurately establish a mapping with the actual physical location, failing to meet the needs of rapid deployment and precise maintenance of large-scale screen groups. Summary of the Invention

[0004] In view of this, this application provides an image-based LED address dynamic writing method and related equipment to solve the problem of the lack of direct correlation between address writing and physical location.

[0005] The first aspect of this application provides a method for dynamically writing LED addresses based on image positioning, the method comprising: Image acquisition and noise reduction preprocessing are performed on the target LED layout area to obtain spot positioning data; The spot positioning data is processed by spot contour analysis and coordinate extraction to obtain a set of spot physical coordinates; The physical coordinate set of the light spots is traversed according to a preset spatial order to generate an ordered sequence of LEDs. The ordered sequence of LEDs is subjected to dynamic address encoding to generate an address allocation mapping table; When a broadcast command is received, the driver IC address is programmed according to the preset parallel data line time-division broadcast method and the address allocation mapping table to obtain the ACK feedback signal of each LED display unit, and the target LED layout area is monitored for response anomalies based on the ACK feedback signal.

[0006] In an optional implementation, the image acquisition and noise reduction preprocessing of the target LED layout area to obtain spot positioning data includes: According to the preset test method, all LED display units in the target LED layout area are lit up, and low-exposure image acquisition is performed on the target LED layout area in the lit state to obtain the original layout image. The original layout image is subjected to Gaussian filtering and environmental noise removal processing to obtain a denoised image; The denoised image is subjected to dynamic threshold binarization segmentation to obtain spot localization data.

[0007] In an optional implementation, the step of performing spot contour analysis and coordinate extraction processing on the spot positioning data to obtain a set of spot physical coordinates includes: Each spot in the spot positioning data is subjected to contour tracking processing to generate a set of spot boundary points; The centroid coordinates of each spot in the set of light spot boundary points are calculated to obtain the centroid coordinate set of all light spots. Lens distortion correction is performed on the centroid coordinate set to obtain the physical coordinate set of the light spot.

[0008] In an optional implementation, the step of performing an associative traversal process on the physical coordinate set of the light spots according to a preset spatial order to generate an ordered sequence of LEDs includes: The physical coordinate set of the light spot is subjected to Delaunay triangulation to generate a spatial adjacency network; The spatial adjacency network is traversed using a preset depth-first search algorithm and according to preset spatial order rules to generate a traversal order. An ordered sequence of LEDs is generated based on the traversal order and the adjacency data of each LED display unit in the spatial adjacency relationship network.

[0009] In an optional implementation, the step of performing dynamic address encoding on the ordered sequence of LEDs to generate an address allocation mapping table includes: The ordered sequence of LEDs is hierarchically addressed according to a preset address structure to obtain the address code of each LED display unit. Based on the preset time interval window and the ordered sequence of LEDs, a communication time slot allocation process is performed on each LED display unit to generate a time slot allocation table; The address encoding and the time slot allocation table are fused together to generate an address allocation mapping table.

[0010] In an optional implementation, the broadcast command includes a list of target LED display units, and the anomaly monitoring of the target LED layout area based on the ACK feedback signal includes: The programming simulation is performed according to the broadcast command and the address allocation mapping table to obtain the target feedback signal corresponding to the target LED display unit list; The target feedback signal is compared with the ACK feedback signal to determine whether there is an abnormal response in the target LED layout area; When there is an abnormal response in the target LED layout area, the set of faulty LED display units with abnormal response is obtained according to the target feedback signal and the ACK feedback signal; Fault isolation is achieved by using a preset fault handling method, based on the address allocation mapping table and the fault LED display unit set.

[0011] In an optional implementation, the method further includes: When preset scene change data is obtained, the scene change data is parsed to obtain the LED topology network; Based on the LED topology network and the ordered sequence of LEDs, the change in the target LED layout area is determined to obtain the LED topology change rate; When the LED topology change rate is greater than a preset change rate threshold, the address allocation mapping table is updated according to a preset local update method.

[0012] A second aspect of this application provides an LED address dynamic writing device based on image positioning, the device comprising: The programming control module, which integrates a camera unit and an image processing unit, is used to acquire images of the target LED layout area and identify LED display units in order to generate an address allocation mapping table. The driver encoding module, located in the target LED layout area, is used to control each LED display unit in the target LED layout area; Furthermore, a parallel control module between the programming control module and the driver encoding module is used to perform communication control between the programming control module and the driver encoding module.

[0013] A third aspect of this application provides an electronic device, the electronic device including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the computer program to implement the steps of the image-based LED address dynamic writing method as described above.

[0014] A fourth aspect of this application provides a computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the steps of the image-based LED address dynamic writing method described above.

[0015] In summary, this application includes at least the following beneficial technical effects: 1. By acquiring and denoising the target LED layout area, and then analyzing the light spot contour and extracting the coordinates, the physical coordinates of each LED are accurately obtained, avoiding address mismatch caused by layout deviation or manual measurement error in pure software mapping.

[0016] 2. Based on the preset spatial order, it automatically performs association traversal of the physical coordinate set of the light spot, eliminating the tedious process of manually mapping row by row and column by column, and can flexibly adapt to various screens (e.g., irregular, curved or irregular screens).

[0017] 3. By implementing dynamic address encoding on ordered sequences to generate a mapping table, time-division broadcasting of parallel data lines is supported. Compared with point-by-point single-line serial writing, it has higher concurrent write throughput and improves the programming speed of large-area LED modules. Attached Figure Description

[0018] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0019] Figure 1 This is a flowchart of an image-based method for dynamically writing LED addresses, provided in an embodiment of this application. Figure 2 This is a functional block diagram of an LED address dynamic writing device based on image positioning provided in an embodiment of this application; Figure 3 This is a schematic diagram of the structure of the electronic device provided in the embodiments of this application. Detailed Implementation

[0020] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0021] See also Figures 1 to 2 As shown, the embodiment of this application provides an LED address dynamic writing device 2 based on image positioning, including a burning control module 21 integrating a camera unit and an image processing unit, a driving encoding module 23 disposed in the target LED layout area, and a parallel control module 22 disposed between the burning control module 21 and the driving encoding module 23.

[0022] It should be understood that the target LED layout area consists of multiple parallel LED display units (e.g., LED display modules, LED lamps, etc.). The driver encoding module 23 is a driver chip built into each LED display unit, used to control the corresponding LED display unit and to program the address of the corresponding LED display unit. To improve the quality and stability of data transmission in various application scenarios, the driver encoding module 23 supports the return-to-zero (RZ) code communication protocol. The RZ code communication protocol ensures precise alignment of symbol boundaries between the sending and receiving ends, thus eliminating the need for additional independent clock signal lines. Furthermore, the RZ code communication protocol can effectively suppress DC components and baseline drift to reduce the bit error rate caused by signal distortion, making it suitable for reliable data transmission over long distances or in high-noise environments. The driver encoding modules 23 are connected in parallel to share a data channel, and the shared data channel aggregated in the target LED layout area is connected to the parallel control module 22. The non-volatile address storage unit integrated in the driver encoding module 23 supports electrical signal erasure and overwriting to achieve dynamic rewriting of the target LED layout area.

[0023] In an optional implementation, multiple target LED layout areas are connected in a pre-set hierarchical order via one or more intermediate gateway devices. Each target LED layout area and its parallel-connected driver encoding modules 23 are hierarchically managed using the group number and intra-group sequence number in the address code corresponding to each area. This allows for flexible addition or removal of nodes for the target LED layout areas and driver encoding modules 23 according to layout requirements. Simultaneously, the segmented forwarding and isolation of signals by each gateway effectively enhances the reliability and anti-interference capability of the communication link, thereby simplifying overall wiring and maintenance while ensuring data transmission stability. For example, when a driver encoding module 23 malfunctions, the corresponding driver encoding module 23 can be quickly located using its address code, improving operational efficiency.

[0024] The parallel control module 22, used to control data communication between the programming control module 21 and the driver encoding module 23, coordinates the transmission time slots of each data signal with the target module through a time-division multiplexing mechanism or an encoding addressing mechanism. This allows the programming control module 21 to issue programming instructions or status queries to each LED display unit one by one and accurately, thereby achieving fine-grained management of the entire parallel array. When an LED display unit malfunctions, the parallel control module 22 can detect it immediately and bypass the corresponding signal path, separating the faulty node from the shared aggregated data channel. This avoids data interference from the faulty module to other normal modules and ensures that the data transmission and control process of the remaining display units within the entire target LED layout area can continue to operate stably. The time-division multiplexing mechanism or encoding addressing mechanism provides clear scheduling and isolation for parallel communication by independently segmenting or identifying each module in the time domain or address domain, thereby achieving efficient and reliable multi-node collaboration.

[0025] The programming control module 21, connected to the other end of the parallel control module 22, acquires images of the target LED layout area through an integrated camera unit (e.g., a 5-megapixel camera). Subsequently, the built-in image processing unit (e.g., a processing chip with OpenCV contour detection algorithm) identifies and locates the LED display units in the acquired images, thereby generating a corresponding sequential address code for each unit and its physical location. All sequential address codes within the same area are then aggregated into an address allocation mapping table, providing accurate control and addressing information for the parallel control module 22 and the drive encoding module 23. In an optional implementation, for larger-scale applications, the programming control module 21 can also use distributed camera units to capture images of LED areas at different locations and transmit the image data wirelessly to the main control unit for unified processing and mapping, thus achieving synchronous management and flexible expansion of multiple areas.

[0026] The embodiments of this application provide an LED address dynamic writing device based on image positioning. The specific process of implementing the LED address dynamic writing method based on image positioning is as follows: Step S1: Perform image acquisition and noise reduction preprocessing on the target LED layout area to obtain spot positioning data.

[0027] First, all LED display units are put into low-brightness mode according to the preset test method. In this mode, each LED display unit is lit at only about 10% power to avoid overload and light spot overflow caused by high brightness, while still ensuring sufficient signal strength for subsequent identification. In the test method, the low-brightness mode command of the LED display unit is encapsulated using a return-to-zero code communication protocol. This protocol utilizes its built-in symbol boundary alignment characteristics to achieve precise synchronization between the data transmission and reception ends without the need for an additional clock line. Its protocol encapsulation process includes adding a start code before the command frame and adding a CRC8 check code at the end to ensure reliable transmission of the command over long distances or in high-noise environments. Subsequently, the high-resolution camera unit in the programming control module is controlled to shoot the entire LED array (i.e., the target LED layout area) with a low exposure setting. At this time, the camera shutter speed, ISO, and aperture are adjusted to ensure that each LED light spot covers at least a 5×5 pixel area on the sensor, thereby acquiring the original layout image in the lit state.

[0028] Next, the image processing unit first performs a convolution operation on the image using a Gaussian filtering algorithm. The light intensity values ​​around each pixel are weighted and averaged according to a Gaussian distribution, with the filter kernel size typically set to σ=1.5. Gaussian filtering effectively smooths out isolated bright spots caused by stray indoor light sources or external sunlight interference, while preserving the edge features of the LED light spots. After Gaussian filtering, local statistical methods are used to analyze the grayscale histogram of the entire image to identify the grayscale range of ambient light noise distribution and remove extreme value regions.

[0029] Finally, the image processing unit uses an adaptive thresholding algorithm to automatically select a threshold based on the overall and local grayscale distribution of the image, classifying all pixels into two categories: background and light spots. Specifically, the image is divided into multiple small blocks, and the foreground and background grayscale statistics of each block are calculated. These statistical information are then combined to determine the global threshold, ensuring that the LED light spots are displayed in pure white and the background in pure black. In this embodiment, the brightness of each pixel is encoded using an integer between 0 and 255, where 0 represents pure black, 255 represents pure white, and values ​​between the two correspond to different levels of grayscale brightness. The final obtained light spot positioning data is a binary image, with each white spot precisely corresponding to one LED display unit (with a corresponding pixel value of 255).

[0030] Step S2: Perform spot contour analysis and coordinate extraction processing on the spot positioning data to obtain the spot physical coordinate set.

[0031] First, spot contour tracking is performed on the obtained spot positioning data to generate a set of spot boundary points corresponding to each LED. The image processing unit built into the programming control module executes contour tracking based on the Moore-Neighbor tracking algorithm, performing pixel-level scanning and edge connection on the pure white spot region in the binarized image. During the scanning process, starting from any point on the spot, adjacent pixels are sequentially detected according to a predefined neighborhood order to determine if they belong to the spot, thus forming a closed spot boundary. The Moore-Neighbor tracking algorithm accurately captures the spot contour shape and maintains continuous boundary recognition even when the spot shape is slightly distorted or tilted.

[0032] After the boundary point set is generated, the centroid coordinate calculation process begins. At this point, the image processing unit treats each spot boundary point set as a closed region with uneven brightness distribution and performs statistical calculations on all pixel values ​​within it according to the pixel grayscale weighting principle to obtain the weighted average coordinates of the corresponding region. Specifically, the centroid coordinate calculation is performed by multiplying the horizontal and vertical coordinates of all pixels within the boundary by their respective grayscale values, summing the results, and then dividing by the total grayscale sum to obtain the coordinate center. This weighted calculation effectively offsets local deviations caused by uneven LED brightness or ambient light reflection within the spot, ensuring that the obtained centroid coordinate set of all spots reflects the true center position of the spot with sub-pixel accuracy. If slight noise exists in practical applications, the image processing unit will also combine the previously obtained grayscale statistics of the denoised image and remove isolated pixels smaller than a set threshold to improve the robustness of the centroid calculation, thereby assisting in generating a more accurate centroid coordinate set for all spots.

[0033] After obtaining the centroid coordinate set of all light spots, the distortion effect produced by the camera lens itself needs to be corrected to convert the image coordinates into physical coordinates. Lens distortion correction is performed by a distortion correction algorithm in the programming control module. By combining pre-calibrated radial and tangential distortion coefficients, each initial coordinate is iteratively mapped and corrected according to the Brown-Conrad model. During mapping, the radial distance *r* from each point to the image center is first calculated. Then, a correction factor is calculated based on the distortion coefficients and applied to the original coordinates to generate the corrected physical coordinates. The distortion parameters are obtained through precise calibration of the camera unit during the manufacturing stage. Each correction effectively eliminates deformation errors caused by wide-angle or low-cost lenses, ensuring that the final physical coordinate set (i.e., the light spot physical coordinate set) closely matches the actual LED installation position.

[0034] Step S3: Perform an association traversal process on the physical coordinate set of the light spots according to the preset spatial order to generate an ordered sequence of LEDs.

[0035] After acquiring the physical coordinate set of the LED spot, the first step is to organize these scattered coordinate points into a traversable grid based on their proximity in actual space. Specifically, the image processing unit first calls an algorithm based on Delaunay triangulation to process the physical coordinate set of the LED spot. Delaunay triangulation refers to connecting a given set of points into several triangles on a plane, such that the circumcircle of any triangle does not contain any other points. This mathematical property ensures that the generated grid establishes an unambiguous adjacency relationship between points, while avoiding overly long and narrow triangles, thus better reflecting the physical layout during LED installation. The Delaunay triangulation process is executed by the cell traversal engine in the image processing unit. Internally, it reads each coordinate point sequentially, selects triangles that satisfy the empty circle property from all three-point combinations according to the Delaunay condition, and stores them as adjacency relationship entries. After the triangulation is completed, all coordinate points are organized into several triangular grids, and the sides of the triangles represent the direct adjacency between LED display units.

[0036] After constructing the spatial adjacency grid, the nodes in the grid are traversed along specific paths according to predefined spatial order rules to generate a list of traversal orders. These spatial order rules include predefined directional rules (e.g., from left to right, from top to bottom) and can also be combined with installation path rules (i.e., the order of manual wiring). The programming control module traverses the nodes in the spatial adjacency network one by one using a pre-set depth-first search (DFS) algorithm. DFS is a classic method for graph traversal, exploring new nodes by following the adjacent edges of the current node until a path has no more unvisited nodes, then backtracking to the nearest branch point to continue exploring. Throughout this process, the access order is continuously recorded, resulting in a complete traversal list. Specifically, the starting point of the traversal needs to be determined, typically the leftmost node in the target LED layout area closest to the entrance, which is the root node. The coordinates of this node correspond to the position that is first seen by the human eye or the first line connected during physical installation. Subsequently, the depth-first search algorithm sorts the adjacency list of each node according to the principle of "first ascending order along the X-axis, then order along the Y-axis" to ensure that the traversal path matches "from left to right, from top to bottom" or "from the entrance to the end of the installation line". This ensures that when the depth-first search algorithm executes downwards along a branch, the access order reflects both the spatial relationship of physical coordinates and follows the construction path habits of wiring personnel. Consequently, the address allocation mapping obtained from the traversal sequence can intuitively correspond one-to-one with the actual LED distribution during human-computer interaction.

[0037] After traversal is complete, a traversal order list containing all LED display units is obtained. Next, based on this list and the adjacency data of each node previously recorded in the adjacency relationship grid, the final ordered sequence of LEDs is generated. This sequence is not merely a simple string of numbers; it also carries adjacency information—the immediate, immediate, left, and right neighbors of each LED in the sequence—which aids in subsequent checks and anomaly localization. For example, if an LED fails to respond to ACK feedback on time during operation, the system can immediately locate its upstream and downstream nodes through the adjacency entries in the sequence, thereby accurately implementing the signal bypass or rerouting operations handled by the parallel control module. During the generation of the ordered sequence, the programming control module integrates the physical coordinates, traversal index, and adjacency pointer of each LED into a single data structure and outputs it to the address encoding engine, so that the next stage can directly use this ordered sequence to assign address codes to each LED.

[0038] Step S4: Perform dynamic address encoding on the ordered sequence of LEDs to generate an address allocation mapping table.

[0039] After the ordered sequence of LEDs is generated, the first step is to perform hierarchical address allocation processing on each LED display unit in the sequence according to a predefined address structure to obtain an address code that can be directly recognized by each module. In this embodiment, the address structure adopts a three-layer format of "region number – group number – sequence number". The region number is used to distinguish different target LED layout areas, the group number is used to identify parallel data groups within the same region, and the sequence number is used to uniquely number each LED according to the previously generated ordered sequence. In order to generate a specific address code, the address encoding engine in the programming control module first reads the sequence index of each LED in the ordered sequence and combines it with the region and group number to form a complete multi-field address string or binary code. For example, if the region number occupies 4 bits, the group number occupies 4 bits, and the sequence number occupies 8 bits, then the address of the tenth LED in the first group and the fifth region can be represented as "0101-0001-00001010". This multi-layered structure not only meets the requirements for partitioned management of large-scale LED arrays, but also, by utilizing the separate design of group number and serial number, facilitates the flexible addition or removal of lamps or rearrangement of the order within a group in subsequent applications without affecting the address coding across groups.

[0040] After address allocation, a communication time slot needs to be allocated to each LED so that address write instructions and status query signals can be broadcast sequentially in the time-division multiplexing mechanism implemented by the parallel control module. The time slot allocation process is based on a preset time interval window, which typically corresponds to the communication frame period, for example, set to the level of 1 millisecond or 1 microsecond. The programming control module 21 reads the length n of the ordered sequence and calculates the duration of each time slot based on the selected communication frequency—that is, dividing the entire time window evenly into n parts, where the k-th time slot corresponds to the k-th LED in the ordered sequence. This is achieved by embedding it in a timer or soft clock interrupt. When the time-division multiplexing control signal is issued, the parallel data communication module broadcasts the address write frame to the driver encoding module in the k-th time slot. If an ACK feedback is received in this time slot, the address write is confirmed to be successful and the process continues to the next time slot; otherwise, bypass or retry logic is triggered. Time slot allocation avoids bus contention caused by sending instructions to multiple LED display units simultaneously, and allows each LED to "wake up" to receive instructions within its dedicated window while maintaining low power consumption or a listening state outside the window, thereby reducing overall power consumption and enhancing stability.

[0041] Finally, the generated address codes and corresponding time slot allocation information are fused together to form a complete address allocation mapping table. Each record in the address allocation mapping table is indexed by the physical coordinates or unique identifier of the LED, and associated with its corresponding address code and communication time slot start and end time. During the fusion process, the multi-field address of each LED is first mapped to its position in the ordered sequence, and then the calculated time slot start time and time slot length are appended to the same record, forming an entry that contains both logical address and physical scheduling information. To facilitate rapid verification by the parallel control module and the driver encoding module, the address allocation mapping table can also be appended with a CRC check or version number to ensure that each module maintains a consistent view of the same mapping table during communication. When the parallel control module distributes write instructions to the driver encoding module, it only needs to construct an instruction frame according to the address and time slot information specified in the mapping table and send it in the corresponding time slot. The latter can directly parse and store the instruction in the non-volatile storage unit after receiving it, and simultaneously return an ACK to complete the end-to-end write closed loop.

[0042] Step S5: When a broadcast command is received, the driver IC address is programmed according to the preset parallel data line time-division broadcast method and the address allocation mapping table to obtain the ACK feedback signal of each LED display unit, and the target LED layout area is monitored for response anomalies according to the ACK feedback signal.

[0043] Upon receiving a broadcast command containing a list of target LED display units, the programming control module first calls its internal address allocation mapping table to obtain the address code and corresponding communication time slot information for each LED display unit to be written on the parallel data line. To ensure that the broadcast command can be accurately parsed by the target unit, the control module first encapsulates the command content with the return-to-zero code communication protocol, adding a start character, address field, write command identifier, and CRC8 checksum to the command frame, thus forming a complete write data packet. During this process, the symbol boundary alignment feature provided by the return-to-zero code communication protocol enables the parallel bus, which does not rely on an independent clock line, to maintain precise synchronization of the data frame boundaries between the sending and receiving ends, ensuring that the driver encoding module of each LED display unit can "wake up" in its own dedicated time slot and receive and process the write command on time. Under the time-division multiplexing scheduling of the parallel control module, the write data packet is broadcast sequentially to the physical shared bus according to the time slot table in the mapping table. When the time slot arrives, only the driver encoding module of the corresponding target LED is in an active state and reads the data packet, while other modules remain in a listening state, thereby avoiding signal contention on the parallel bus.

[0044] After a data packet is successfully sent, the driver encoding module immediately writes the received address code into its internal non-volatile memory. Upon completion of the write, it returns an ACK feedback signal. This ACK feedback signal is also encapsulated using a return-to-zero code protocol and broadcast to the parallel data bus by the driver encoding module in the next preset time slot. As part of the broadcast simulation process, the programming control module performs a programming simulation process based on the address allocation mapping table before issuing the write command. This predicts the content of the ACK signal that the target LED display unit should return under normal response conditions and the specific time slot location. This simulation process simulates the receive-write-feedback timing of all target units and generates a list of target feedback signals, detailing in detail when and how each unit returns an ACK. Through simulation, the integrity of the mapping table and the accuracy of the time slot allocation can be verified before actual data transmission, thereby reducing miswrites or omissions caused by errors in the mapping table or time slot calculation.

[0045] When the parallel control module receives the ACK feedback signal from the drive encoding module during actual operation, the programming control module compares and verifies this feedback signal with the target feedback signal generated during the simulation phase. This comparison not only checks the correctness of the CRC checksum in the feedback but also verifies whether the address encoding and command identifier carried in the feedback are consistent with the mapping table. If all feedback signals match the simulation expectation, it indicates that all target LED display units have successfully completed the address writing as expected. During this process, any deviation from the target feedback value or failure to receive the ACK within the time slot can be considered an abnormal response. In this case, the system will record the physical coordinates of the relevant LED display unit and its row and column index in the mapping table in real time, marking it as a faulty unit.

[0046] For a marked faulty LED display unit, the programming control module, combining the adjacency relationship data in the mapping table, quickly locates its parallel group and adjacent normal units, and issues isolation and retry commands according to the preset anomaly handling scheme. For physical isolation, the parallel control module bypasses the signal path of the corresponding faulty node in the shared bus, typically by using bypass circuits such as Schottky diodes to disconnect the node from the bus, preventing the faulty node from sending erroneous signals or reflecting echoes in subsequent time slots, thus interfering with the communication of other normal nodes. For logical isolation, the control module moves the unit's address code from the valid cluster to the graylist state and marks its time slot as idle in the mapping table, thereby reclaiming the communication time slot originally allocated to the faulty unit into the spare pool for use during subsequent additions or retries. Simultaneously, the system triggers a retry process, rebroadcasting the incomplete write command to the remaining valid LED units after fault isolation, ensuring that other nodes in the group do not miss the address write opportunity due to the fault.

[0047] If an ACK response is still not received from a faulty unit after isolation and retries, the system will further record the physical coordinates of the unit and communicate with the backend management platform to report to maintenance personnel for on-site replacement or repair. Simultaneously, because the address allocation mapping table supports dynamic erasure and overwrite functions, once a faulty LED unit is replaced and its hardware is restored to a writable state, the programming control module can quickly reassign the unit's address or reuse the original address. The parallel control module then broadcasts the write command again to restore the address of the replaced unit, ensuring the entire parallel array recovers full functionality in the shortest possible time. In large-scale multi-region deployment scenarios, intermediate gateway devices will also synchronously receive fault reporting information to enable higher-level redundancy switching or regional reconnection during cross-region management, thereby ensuring the high availability of the overall LED network.

[0048] In an optional implementation, after obtaining preset scene change data, the method further includes: It should be understood that the scene change data in this embodiment can come from user-issued addition or removal commands such as "add dining table light" via the host computer interface, or from detection signals generated by the system's built-in automatic detection module when the actual number or structure of the LED topology network changes by more than 5%. Upon receiving these multi-source inputs, the programming control module first parses the scene change data, comparing the addition or removal commands with the node list in the automatic detection signal to reconstruct the current LED topology network. In this process, the parsing unit decodes the scene change data into a set of incremental node information and a set of original node lists. Then, combining the existing physical coordinate set and the previously generated spatial adjacency network, it dynamically draws the latest LED topology map. For example, when a user inputs the "add dining table light" command, the scene change data includes the physical installation location or number information of the new light fixture. After mapping this information to the existing coordinate set, the programming control module can quickly generate a new version of the topology network by comparing the changes in the number or spatial distribution of the old and new nodes.

[0049] After generating the latest LED topology network, the next step is to determine the changes between this network and the previously obtained ordered LED sequence to calculate the LED topology change rate. To do this, the topology comparison engine traverses the nodes and adjacency relationships in the old and new topologies, calculating the differences in node count, connectivity, intra-group distribution, etc., and mapping these differences to a change rate value. For example, if 10 new lights are added to the new network while the old network has only 100 nodes, the change rate is 10%; if some nodes are removed or connections are broken, the change rate will increase accordingly. This change rate metric reflects the severity of the scene change, helping the system decide whether to perform a full update of the address allocation mapping table or only perform incremental updates for newly added and removed nodes when facing significant layout changes.

[0050] When the LED topology change rate exceeds a preset change rate threshold, the programming control module will update the address allocation mapping table according to a preset local update method, while retaining the original valid addresses and time slot resources. The local update method only performs address encoding and time slot allocation for newly added LED nodes, appending the address and time slot information of these new nodes to the mapping table. Simultaneously, it marks the row containing the removed nodes and reclaims their addresses and time slot resources to the spare pool. Specifically, it first reads the physical coordinates of the new nodes and their indices in the topology network and ordered sequence. Then, it calls the address encoding engine to generate corresponding three-level addresses: area number, group number, and sequence number. These addresses maintain semantic consistency with the original mapping table while ensuring that the new nodes are logically and correctly inserted into the sequence. Next, the time slot allocation algorithm calculates the time slot distribution of these new nodes and existing nodes, dynamically dividing the new time slot start and end times according to the existing communication frame period, and writing the new time slot information into the mapping table in the exact same format as the original mapping table. Meanwhile, for the idle resources generated by the removal of nodes, the mapping table management unit will mark the corresponding address code row as idle, so that it can be used again by new nodes in the future, thereby realizing the recycling of address resources.

[0051] After the partial update is completed, to ensure data consistency, the parallel control module will broadcast the new mapping table version number to all unchanged driver coding modules in the next communication cycle. In the following one to two communication cycles, it will sequentially complete the version number alignment and confirmation process with each driver coding module to confirm that each module has loaded the latest partial update result. At this point, the mapping table update loop is complete, and the system can issue address write commands for new LED nodes and receive ACK feedback without rewriting the original node addresses. This avoids the communication congestion and redundant erasure effects on the lifespan of non-volatile memory caused by large-scale full rewrites.

[0052] This application is applied to the field of intelligent lighting technology. It obtains light spot positioning data by acquiring and denoising images of the target LED layout area. The light spot positioning data is then analyzed for its contour and its coordinates extracted to obtain a set of physical coordinates. This physical coordinate set is traversed according to spatial order to generate an ordered LED sequence. The ordered LED sequence is then dynamically address-encoded to generate an address allocation mapping table. The driver IC address is programmed using a time-division multiplexing method with parallel data lines and the address allocation mapping table to obtain an ACK feedback signal. Finally, the target LED layout area is monitored for response anomalies based on the ACK feedback signal. This application organically combines machine vision with associative traversal, dynamic encoding, parallel broadcasting, and real-time feedback, significantly improving addressing accuracy and writing efficiency. Furthermore, online anomaly monitoring greatly enhances system reliability and ease of maintenance.

[0053] like Figure 3 The diagram shown is a structural schematic of an electronic device provided in an embodiment of this application.

[0054] In a preferred embodiment of the present invention, the electronic device 3 may include, but is not limited to, a memory 31, at least one processor 32, and at least one communication bus 33.

[0055] Those skilled in the art should understand that Figure 3 The structure of the electronic device 3 shown does not constitute a limitation of the embodiments of the present invention. The electronic device 3 may also include more or fewer other hardware or software than shown, or different component arrangements.

[0056] In some embodiments, the electronic device 3 is a device capable of automatically performing numerical calculations and / or information processing according to pre-set or stored instructions, and its hardware includes, but is not limited to, microprocessors, application-specific integrated circuits, programmable gate arrays, digital processors, and embedded devices.

[0057] It should be noted that the electronic device 3 is merely an example. Other existing or future electronic products that are suitable for this application should also be included within the scope of protection of this application and are incorporated herein by reference.

[0058] In some embodiments, the memory 31 stores a computer program that, when executed by the at least one processor 32, implements all or part of the steps in the image-based LED address dynamic writing method described above. The memory 31 includes a read-only memory (ROM), a programmable read-only memory (PROM), an erasable programmable read-only memory (EPROM), a one-time programmable read-only memory (OTPROM), an electronically erasable programmable read-only memory (EEPROM), a compact disc read-only memory (CD-ROM) or other optical disc storage, disk storage, magnetic tape storage, or any other computer-readable medium capable of carrying or storing data. Further, the computer-readable storage medium may primarily include a program storage area and a data storage area, wherein the program storage area may store an operating system, at least one application program required for a function, etc.

[0059] In some embodiments, the at least one processor 32 is the control unit of the electronic device 3, connecting various components of the electronic device 3 via various interfaces and lines. It executes programs or modules stored in the memory 31 and calls data stored in the memory 31 to perform various functions and process data. For example, when the at least one processor 32 executes a computer program stored in the memory 31, it implements all or part of the steps of the image-based LED address dynamic writing method described in this application embodiment; or it implements all or part of the functions of the image-based LED address dynamic writing device. The at least one processor 32 can be composed of integrated circuits, such as a single-packaged integrated circuit or multiple integrated circuits with the same or different functions, including combinations of one or more central processing units (CPUs), microprocessors, digital processing chips, graphics processors, and various control chips.

[0060] In some embodiments, the at least one communication bus 33 is configured to enable communication between the memory 31 and the at least one processor 32, etc. Although not shown, the electronic device 3 may also include a power supply (e.g., a battery) to power the various components. Preferably, the power supply can be logically connected to the at least one processor 32 via a power management device, thereby enabling functions such as charging, discharging, and power consumption management. The power supply may also include one or more DC or AC power supplies, recharging devices, power fault detection circuits, power converters or inverters, power status indicators, and other arbitrary components. The electronic device 3 may also include various sensors, Bluetooth modules, Wi-Fi modules, etc., which will not be described in detail here.

[0061] The integrated unit implemented as a software functional module described above can be stored in a computer-readable storage medium. This software functional module, stored in a storage medium, includes several instructions to cause an electronic device (which may be a personal computer, electronic device, or network device, etc.) or processor to execute portions of the methods described in the various embodiments of this application.

[0062] In the several embodiments provided in this application, it should be understood that the disclosed apparatus and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for instance, the division of modules is only a logical functional division, and other division methods may be used in actual implementation.

[0063] The modules described as separate components may or may not be physically separate. The components shown as modules may or may not be physical units; they may be located in one place or distributed across multiple network units. Some or all of the modules can be selected to achieve the purpose of this embodiment according to actual needs.

[0064] The above are all preferred embodiments of this application, and are not intended to limit the scope of protection of this application. Therefore, all equivalent changes made in accordance with the structure, shape and principle of this application should be covered within the scope of protection of this application.

Claims

1. A method for dynamically writing LED addresses based on image positioning, characterized in that, The method includes: Image acquisition and noise reduction preprocessing are performed on the target LED layout area to obtain spot positioning data; The spot positioning data is processed by spot contour analysis and coordinate extraction to obtain a set of spot physical coordinates; The LED ordered sequence is generated by performing an associative traversal process on the physical coordinate set of light spots according to a preset spatial order. Specifically, this includes: performing Delaunay triangulation on the physical coordinate set of light spots to generate a spatial adjacency network; performing path traversal on the spatial adjacency network according to a preset depth-first search algorithm and a preset spatial order rule to generate a traversal order; and generating an LED ordered sequence based on the traversal order and the adjacency data of each LED display unit in the spatial adjacency network. The spatial order rule includes a preset direction rule and the order of manual wiring. The LED ordered sequence carries adjacency information, i.e., the neighbors of each LED in the LED ordered sequence, for subsequent inspection and anomaly location. The ordered sequence of LEDs is subjected to dynamic address encoding to generate an address allocation mapping table. Specifically, this includes: performing hierarchical address allocation processing on the ordered sequence of LEDs according to a preset address structure to obtain the address code of each LED display unit; performing communication time slot allocation processing on each LED display unit according to a preset time interval window and the ordered sequence of LEDs to generate a time slot allocation table; and performing data fusion processing on the address codes and the time slot allocation table to generate the address allocation mapping table. When a broadcast command is received, the driver IC address is programmed according to the preset parallel data line time-division broadcast method and the address allocation mapping table to obtain the ACK feedback signal of each LED display unit, and the target LED layout area is monitored for response anomalies based on the ACK feedback signal.

2. The LED address dynamic writing method based on image positioning according to claim 1, characterized in that, The step of image acquisition and noise reduction preprocessing of the target LED layout area to obtain light spot positioning data includes: According to the preset test method, all LED display units in the target LED layout area are lit up, and low-exposure image acquisition is performed on the target LED layout area in the lit state to obtain the original layout image. The original layout image is subjected to Gaussian filtering and environmental noise removal processing to obtain a denoised image; The denoised image is subjected to dynamic threshold binarization segmentation to obtain spot localization data.

3. The LED address dynamic writing method based on image positioning according to claim 1, characterized in that, The step of performing spot contour analysis and coordinate extraction on the spot positioning data to obtain the spot physical coordinate set includes: Each spot in the spot positioning data is subjected to contour tracking processing to generate a set of spot boundary points; The centroid coordinates of each spot in the set of light spot boundary points are calculated to obtain the centroid coordinate set of all light spots. Lens distortion correction is performed on the centroid coordinate set to obtain the physical coordinate set of the light spot.

4. The method for dynamically writing LED addresses based on image positioning according to claim 1, wherein the broadcast instruction includes a list of target LED display units, characterized in that, The step of monitoring for abnormal responses in the target LED layout area based on the ACK feedback signal includes: The programming simulation is performed according to the broadcast command and the address allocation mapping table to obtain the target feedback signal corresponding to the target LED display unit list; The target feedback signal is compared with the ACK feedback signal to determine whether there is an abnormal response in the target LED layout area; When there is an abnormal response in the target LED layout area, the set of faulty LED display units with abnormal response is obtained according to the target feedback signal and the ACK feedback signal; Fault isolation is achieved by using a preset fault handling method, based on the address allocation mapping table and the fault LED display unit set.

5. The LED address dynamic writing method based on image positioning according to claim 1, characterized in that, The method further includes: When preset scene change data is obtained, the scene change data is parsed to obtain the LED topology network; Based on the LED topology network and the ordered sequence of LEDs, the change in the target LED layout area is determined to obtain the LED topology change rate; When the LED topology change rate is greater than a preset change rate threshold, the address allocation mapping table is updated according to a preset local update method.

6. A dynamic LED address writing device based on image positioning, characterized in that, The apparatus for implementing the image-based LED address dynamic writing method according to any one of claims 1 to 5, the apparatus comprising: The programming control module, which integrates a camera unit and an image processing unit, is used to acquire images of the target LED layout area and identify LED display units in order to generate an address allocation mapping table. The driver encoding module, located in the target LED layout area, is used to control each LED display unit in the target LED layout area; A parallel control module is configured between the programming control module and the driver encoding module for communication control between the programming control module and the driver encoding module.

7. An electronic device, characterized in that, The electronic device includes a memory, a processor, and a computer program stored in the memory and executable on the processor. When the processor executes the computer program, it implements the steps of the image-based LED address dynamic writing method according to any one of claims 1 to 5.

8. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by the processor, it implements the steps of the image-based LED address dynamic writing method according to any one of claims 1 to 5.

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