A dynamic frequency adjustment method, device, chip and electronic equipment

Abstract

The application relates to a dynamic frequency adjustment method and device, a chip and electronic equipment, and belongs to the electronic technical field.The dynamic frequency adjustment method comprises the following steps: if a current chip is in a first state and the absolute value of the difference between the current power consumption of the chip and the power consumption wall of the chip is greater than a tolerance value, the current temperature, the current frequency and the current power consumption of the chip are obtained, wherein the first state represents that the chip is in a dynamic frequency adjustment stage; the optimal frequency of the current chip is predicted according to the current temperature, the current frequency, the current power consumption and the power consumption wall; and the current frequency of the chip is adjusted to the optimal frequency.The application can directly predict the optimal frequency when the power consumption is close to the power consumption wall of the chip, can save the time cost of frequency and voltage adjustment, and can make the performance of the chip better.

Description

Technical Field

[0001] This application belongs to the field of electronic technology, specifically relating to a dynamic frequency adjustment method, device, chip, and electronic device. Background Technology

[0002] Dynamic Voltage and Frequency Scaling (DVFS) is a highly efficient power management technology that dynamically adjusts the processor's operating frequency and power supply voltage based on the system's real-time load (power consumption) to achieve energy saving and performance optimization.

[0003] Existing DVFS solutions typically require multiple adjustments to the voltage and frequency to reach the ideal values. The adjustment process generally involves: changing the voltage and frequency based on the currently measured power consumption, then measuring the power consumption again, making corresponding logical decisions based on the measured power consumption, increasing or decreasing the frequency according to a pre-set cycle, and then measuring the latest power consumption again, making the same logical decisions again. This process is repeated until the optimal voltage and frequency combination is found. When the chip power consumption changes significantly, this repeated experimentation is necessary, which is extremely time-consuming. Summary of the Invention

[0004] Therefore, the purpose of this application is to provide a dynamic frequency adjustment method, device, chip, and electronic device that can directly predict the optimal frequency with power consumption close to the chip's power limit, thereby saving the time cost of frequency and voltage adjustment.

[0005] The embodiments of this application are implemented as follows:

[0006] In a first aspect, embodiments of this application provide a dynamic frequency adjustment method, comprising: if the current chip is in a first state, and the absolute value of the difference between the current power consumption of the chip and the power consumption limit of the chip is greater than a tolerance value, obtaining the current temperature and current frequency of the chip, wherein the first state indicates that the chip is in a stage requiring dynamic frequency adjustment; predicting the optimal frequency of the chip based on the current temperature, the current frequency, the current power consumption, and the power consumption limit; and adjusting the current frequency of the chip to the optimal frequency.

[0007] In the above embodiments, if the absolute value of the difference between the current power consumption and the chip's power consumption limit is greater than the tolerance value (the tolerance value is the dividing line between using the predicted frequency and the fine-tuning frequency), it indicates that the current frequency is far from the expected frequency, and the desired frequency cannot be obtained by fine-tuning the current frequency. At this time, the optimal frequency with power consumption close to the chip's power consumption limit can be quickly predicted based on the current temperature, current frequency, current power consumption, and power consumption limit. This allows the chip's frequency to be quickly adjusted to the desired frequency during dynamic frequency tuning. Unlike existing solutions that require monitoring power consumption feedback and repeated experimental adjustments after adjusting the chip frequency, this application can directly predict the optimal frequency, saving the time cost of frequency and voltage tuning, and improving the chip's performance.

[0008] In one possible implementation of the first aspect embodiment, predicting the optimal frequency of the chip based on the current temperature, the current frequency, the current power consumption, and the power consumption limit includes: predicting a first frequency based on the current power consumption, the power consumption limit, and the current frequency; determining whether the first frequency meets the requirements based on the current temperature, the current frequency, the current power consumption, the power consumption limit, and the first frequency; and determining the first frequency as the optimal frequency if the first frequency meets the requirements.

[0009] In the above embodiment, the first frequency is predicted based on the current power consumption, power limit, and current frequency. Then, the first frequency is determined by combining the current temperature, current frequency, current power consumption, power limit, and first frequency. If the first frequency meets the requirements, it can be determined that the first frequency is the optimal frequency. In this way, the optimal frequency with power consumption close to the chip's power limit can be quickly determined.

[0010] In a possible implementation of the first aspect embodiment, the method further includes: if the first frequency does not meet the requirements, continuing to predict a second frequency; determining whether the second frequency meets the requirements based on the current temperature, the current frequency, the current power consumption, the power consumption limit, and the second frequency; if the second frequency does not meet the requirements, continuing to predict the next frequency until a frequency that meets the requirements is obtained; and determining the frequency that meets the requirements as the optimal frequency.

[0011] In the above embodiment, if the first frequency does not meet the requirements, the second frequency is predicted. The second frequency is then combined with the current temperature, current frequency, current power consumption, power limit, and second frequency to determine whether the second frequency meets the requirements. If the second frequency meets the requirements, the iteration stops. If the second frequency does not meet the requirements, the next frequency is predicted until the required frequency is obtained. In this way, the optimal frequency that meets the requirements can be obtained quickly.

[0012] In one possible implementation of the first aspect embodiment, predicting a first frequency based on the current power consumption, the power consumption wall, and the current frequency includes: obtaining the ratio of the power consumption wall to the current power consumption, and obtaining the product of the ratio and the current frequency to obtain a target frequency; if the current power consumption is greater than the power consumption wall, determining that the first frequency is between the target frequency and the current frequency; if the current power consumption is less than the power consumption wall, determining that the first frequency is between the current frequency and the target frequency.

[0013] In the above embodiment, the target frequency Fc*(Pt / Pc) can be quickly determined based on the current power consumption Pc, the power limit Pt, and the current frequency Fc. Then, based on the relationship between Pt and Pc, the frequency range of the first frequency can be quickly determined. Then, the frequency within this range is selected for judgment, which helps to reduce the number of iterations.

[0014] In one possible implementation of the first aspect embodiment, determining whether the first frequency meets the requirements based on the current temperature, the current frequency, the current power consumption, the power consumption limit, and the first frequency includes: obtaining the voltage corresponding to the current frequency and obtaining the voltage corresponding to the first frequency based on a preset relationship between frequency and voltage; determining a first target value based on the current frequency, the voltage corresponding to the current frequency, the current power consumption, the current temperature, the first frequency, the voltage corresponding to the first frequency, and the power consumption limit; and determining whether the first frequency meets the requirements based on the first target value; wherein, if the first target value is within a preset range, the first frequency is determined to meet the requirements.

[0015] In the above embodiments, the voltage corresponding to the current frequency and the voltage corresponding to the first frequency can be quickly obtained based on the preset relationship between frequency and voltage. Then, based on the current frequency, the voltage corresponding to the current frequency, the current power consumption, the current temperature, the first frequency, the voltage corresponding to the first frequency, and the power consumption wall, a first target value is determined. If the first target value is within a preset range, the first frequency is determined to meet the requirements; otherwise, the first frequency is determined to not meet the requirements. At the same time, by determining the first target value based on the current frequency, the voltage corresponding to the current frequency, the current power consumption, the current temperature, the first frequency, the voltage corresponding to the first frequency, and the power consumption wall, the frequency that makes the difference between the chip power consumption and the chip power consumption wall within the tolerance range can be quickly determined.

[0016] In one possible implementation of the first aspect embodiment, predicting a second frequency includes: if the current power consumption is greater than the power consumption wall, and the first target value corresponding to the first frequency is greater than the upper limit of the preset interval, determining that the second frequency is between the first frequency and the current frequency; if the current power consumption is greater than the power consumption wall, and the first target value corresponding to the first frequency is less than the lower limit of the preset interval, determining that the second frequency is between the target frequency and the first frequency; if the current power consumption is less than the power consumption wall, and the first target value corresponding to the first frequency is greater than the upper limit of the preset interval, determining that the second frequency is between the first frequency and the target frequency; if the current power consumption is less than the power consumption wall, and the first target value corresponding to the first frequency is less than the lower limit of the preset interval, determining that the second frequency is between the current frequency and the first frequency.

[0017] In the above embodiments, when predicting the second frequency, the range of the second frequency can be quickly determined based on the relationship between the current power consumption Pc and the power consumption wall Pt, and whether the first target value is outside the upper limit of the preset range or outside the lower limit of the preset range. Then, the frequency within this range is selected for judgment, which helps to reduce the number of iterations.

[0018] In one possible implementation of the first aspect embodiment, the method further includes: if the chip is currently in a first state, and the absolute value of the difference between the chip's current power consumption and the chip's power consumption wall is less than or equal to a tolerance value, obtaining the chip's average power consumption over a period of time and the chip's current frequency; and fine-tuning the chip's current frequency based on the average power consumption, the power consumption wall, and the current frequency.

[0019] In the above embodiments, if the absolute value of the difference between the current power consumption and the chip's power consumption limit is less than or equal to the tolerance value (the tolerance value is the dividing line between deciding whether to use the predicted frequency or the fine-tuned frequency), it indicates that the difference between the current frequency and the expected frequency is small. At this time, the current frequency of the chip can be fine-tuned based on the average power consumption, the power consumption limit, and the current frequency. Furthermore, fine-tuning can be performed in conjunction with the average power consumption over a period of time to reduce the number of frequent adjustments, thereby improving the chip's performance.

[0020] In one possible implementation of the first aspect embodiment, fine-tuning the current frequency of the chip based on the average power consumption, the power consumption limit, and the current frequency includes: if the absolute value of the difference is less than or equal to a tolerance value, and the current power consumption is less than the power consumption limit, then fine-tuning the current frequency of the chip by increasing the frequency based on the relationship between the average power consumption and the power consumption limit, or keeping the current frequency of the chip unchanged; if the absolute value of the difference is less than or equal to a tolerance value, and the current power consumption is greater than or equal to the power consumption limit, then fine-tuning the current frequency of the chip by decreasing the frequency based on the relationship between the average power consumption and the power consumption limit, or keeping the current frequency of the chip unchanged.

[0021] In the above embodiments, the relationship between the current power consumption, average power consumption, and power limit can be used to determine whether to fine-tune the current frequency of the chip by down-clocking, up-clocking, or keep the current frequency unchanged, thereby improving the chip's performance.

[0022] In one possible implementation of the first aspect embodiment, the method further includes: if the chip is in a second state, adjusting the current frequency of the chip to the maximum frequency allowed by the chip's power consumption wall; wherein the second state includes the chip changing from a continuous idle state to a busy state.

[0023] In the above embodiment, when the chip is detected to change from a continuous idle state to a busy state, it indicates that the chip needs to be rapidly increased in frequency. At this time, the current frequency of the chip is directly adjusted to the maximum frequency allowed by the chip's power limit in order to improve the chip's performance as much as possible.

[0024] In one possible implementation of the first aspect embodiment, the method further includes: monitoring the busy state of the hardware in the chip; determining the state of the chip based on the busy state monitored over a period of time, wherein the state of the chip includes the first state or the second state.

[0025] In the above embodiments, the busy status of the hardware in the chip can be monitored to determine whether the chip is working, and the state of the chip can be determined based on the busy status monitored over a period of time, thus avoiding frequent switching of the chip's frequency.

[0026] In one possible implementation of the first aspect embodiment, determining the state of the chip based on the monitored busy state over a period of time includes: if the current hardware is detected to be in an idle state (non-busy state), and there has been a period of time in which the hardware was in a busy state, or if the current hardware is detected to be in a busy state, and there has been a period of time in which the hardware was in a busy state, then the chip is determined to be in a first state; if the current hardware is detected to be in a busy state, and the hardware has been continuously in an idle state over a period of time, then the chip is determined to be in a second state.

[0027] In the above embodiments, the state described above can be used to quickly determine whether the chip is in the first state or the second state, so that different strategies can be adopted to adjust the current frequency of the chip.

[0028] Secondly, embodiments of this application also provide a dynamic frequency adjustment device, including: an acquisition module, a prediction module, and a frequency adjustment module; the acquisition module is used to acquire the current temperature and current frequency of the chip if the chip is currently in a first state and the absolute value of the difference between the current power consumption of the chip and the power consumption limit of the chip is greater than a tolerance value, wherein the first state indicates that the chip is in a stage requiring dynamic frequency adjustment; the prediction module is used to predict the optimal frequency of the chip based on the current temperature, the current frequency, the current power consumption, and the power consumption limit; the frequency adjustment module is used to adjust the current frequency of the chip to the optimal frequency.

[0029] Thirdly, embodiments of this application also provide a chip, including a phase-locked loop and a dynamic frequency adjustment device provided in any possible implementation of the first aspect embodiment and / or in combination with the first aspect embodiment, wherein the dynamic frequency adjustment device is connected to the phase-locked loop.

[0030] Fourthly, embodiments of this application also provide an electronic device, including: a chip and the dynamic frequency adjustment device provided in the second aspect embodiment above, wherein the dynamic frequency adjustment device is connected to the chip.

[0031] Fifthly, embodiments of this application also provide an electronic device, including: the chip provided in the third aspect of the embodiments described above.

[0032] Other features and advantages of this application will be set forth in the following description. The objectives and other advantages of this application can be realized and obtained through the structures particularly pointed out in the written description and the accompanying drawings. Attached Figure Description

[0033] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the accompanying drawings used in the embodiments will be briefly described below. Obviously, the drawings described below are only some embodiments of this application, and those skilled in the art can obtain other drawings based on these drawings. The above and other objects, features, and advantages of this application will become clearer through the accompanying drawings.

[0034] Figure 1 A flowchart illustrating a dynamic frequency adjustment method provided in an embodiment of this application is shown.

[0035] Figure 2 It shows Figure 1 The dynamic frequency adjustment method also includes flowcharts for S4 and S5.

[0036] Figure 3 This illustration shows a schematic diagram of the principle of a dynamic frequency adjustment method provided in an embodiment of this application.

[0037] Figure 4 This illustration shows a schematic diagram illustrating the principle of dynamically adjusting the frequency and voltage of a chip according to an embodiment of this application.

[0038] Figure 5 A schematic diagram of the structure of a dynamic frequency adjustment device provided in an embodiment of this application is shown. Detailed Implementation

[0039] The technical solutions of the embodiments of this application will now be described with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of them. The following embodiments are provided as examples to more clearly illustrate the technical solutions of this application, and should not be used to limit the scope of protection of this application. Those skilled in the art will understand that, without conflict, the following embodiments and features can be combined with each other.

[0040] It should be noted that similar reference numerals and letters in the following figures indicate similar items; therefore, once an item is defined in one figure, it does not need to be further defined and explained in subsequent figures. Furthermore, relational terms such as "first," "second," etc., in the description of this application are used merely to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus.

[0041] Furthermore, the term "and / or" in this application is merely a description of the relationship between related objects, indicating that there can be three relationships. For example, A and / or B can represent three situations: A exists alone, A and B exist simultaneously, and B exists alone.

[0042] In the description of the embodiments of this application, unless otherwise expressly specified and limited, the technical term "connection" can be a direct connection or an indirect connection through an intermediate medium.

[0043] This application provides a dynamic frequency adjustment method, apparatus, chip, and electronic device, which can quickly adjust the chip frequency to the desired frequency during dynamic frequency adjustment. Unlike existing solutions that require repeated experimental adjustments after adjusting the chip frequency by monitoring power consumption feedback, this application can directly predict the optimal frequency with power consumption close to the chip's power limit, saving the time cost of frequency and voltage adjustment, and improving chip performance.

[0044] The following is combined with Figure 1 The frequency adjustment principle of the dynamic frequency adjustment method shown in this application is explained.

[0045] S1: If the chip is currently in the first state, and the absolute value of the difference between the chip's current power consumption and the chip's power consumption wall is greater than the tolerance value, obtain the chip's current temperature and current frequency.

[0046] Whether a chip needs frequency adjustment can be determined by monitoring its current state. When the chip is detected to be in the first state, it indicates that the chip is in a stage requiring dynamic frequency adjustment. Specifically, the first state indicates that the chip is in a stage requiring dynamic frequency adjustment.

[0047] When the chip is detected to be in the first state, if the absolute value of the difference between the chip's current power consumption and the chip's power consumption limit is greater than the tolerance value, then the chip's current temperature and current frequency are obtained to facilitate subsequent optimal frequency prediction. It is understandable that the chip's current power consumption needs to be obtained before determining that the absolute value of the difference between the chip's current power consumption and the chip's power consumption limit is greater than the tolerance value.

[0048] Chip power consumption can be divided into two main parts: static power consumption and dynamic power consumption. In one possible implementation, the current power consumption of the chip can be the total power consumption including static power consumption and dynamic power consumption. Static power consumption refers to the energy consumed when the chip is not performing any operation; dynamic power consumption refers to the energy consumed by the chip in an active state such as performing tasks, data processing, or signal transmission.

[0049] In this context, the chip's power target (Power_target) can be represented by Pt, the current power consumption (Power_current) by Pc, the tolerance value (tolerance) by t, the current temperature by T_current, and the current frequency (Frequency_current) by Fc. If |Pc-Pt|>t holds true, then the chip's current temperature and current frequency need to be obtained.

[0050] The power wall refers to the maximum power consumption limit a chip faces during operation; it is the maximum power consumption allowed during normal operation. The power wall is a known value; 300W is used as an example here. The tolerance value is the dividing line between using the predicted frequency and fine-tuning the frequency; in this example, it is 20W. For instance, if |Pc-Pt|≤t, only the current frequency of the chip needs to be fine-tuned.

[0051] S2: Based on the current temperature, current frequency, current power consumption, and power limit, predict the optimal frequency of the current chip.

[0052] After obtaining the chip's current temperature, frequency, and power consumption, the optimal frequency for the current chip can be predicted based on these parameters and the power consumption limit. At this optimal frequency, the chip's power consumption is close to the power consumption limit, and its performance is at its best.

[0053] When predicting the optimal frequency of the current chip, multiple predictions can be made based on an iterative method until a frequency that meets the requirements is found. In one possible implementation, the process of S2 may include: predicting a first frequency based on the current power consumption, power limit, and current frequency; determining whether the first frequency meets the requirements based on the current temperature, current frequency, current power consumption, power limit, and first frequency; and determining the first frequency as the optimal frequency if it meets the requirements.

[0054] If the first frequency does not meet the requirements, the implementation process of S2 further includes: continuously predicting the second frequency, and determining whether the second frequency meets the requirements based on the current temperature, current frequency, current power consumption, power consumption wall, and the second frequency; if the second frequency does not meet the requirements, continue to predict the next frequency until a frequency that meets the requirements is obtained; determine the frequency that meets the requirements as the optimal frequency. For example, if the second frequency does not meet the requirements, then continue to predict the third frequency, and then determine whether the third frequency meets the requirements based on the current temperature, current frequency, current power consumption, power consumption wall, and the third frequency, and so on, until a frequency that meets the requirements is obtained through iteration. Assume that this process iterates multiple times, and the frequency that meets the requirements obtained finally is the fifth frequency (for example only), then determine the fifth frequency as the optimal frequency. Among them, when predicting the first frequency based on the current power consumption, power consumption wall, and current frequency, the ratio of the power consumption wall Pt to the current power consumption Pc (i.e., Pt / Pc) can be obtained first, and the product of the ratio and the current frequency Fc is obtained to get the target frequency, that is, the target frequency = Fc*(Pt / Pc). Then, based on the magnitude relationship between the current power consumption and the power consumption wall, the frequency interval where the first frequency (denoted as F1) is located is determined.

[0055] If |Pc - Pt| > t holds, and the current power consumption is greater than the power consumption wall, that is, Pc > Pt, then the target frequency = Fc*(Pt / Pc) < Fc, which indicates that the current needs to downshift the frequency, and it is determined that the first frequency F1 is between [Fc*(Pt / Pc), Fc]. If |Pc - Pt| > t holds, and the current power consumption is less than the power consumption wall, that is, Pc < Pt, the target frequency = Fc*(Pt / Pc) > Fc, which indicates that the current needs to upshift the frequency, and it is determined that the first frequency F1 is between [Fc, Fc*(Pt / Pc)].

[0056] In a possible implementation manner, the method of multiple division (which can include the method of binary division) can be used to determine the magnitude of the first frequency. Taking the method of binary division as an example here, then F1 = [Fc*(Pt / Pc) + Fc] / 2. In addition, the method of multiple division can also be the method of ternary division, the method of quaternary division, etc. Taking the method of ternary division as an example, then F1 = [Fc*(Pt / Pc) + Fc] / 3.

[0057] The aforementioned requirement could be a frequency requirement, under which the chip power consumption is close to the chip power consumption wall, meaning the difference between the chip power consumption and the chip power consumption wall is within a tolerable range. In one possible implementation, when determining whether a first frequency meets the requirement based on the current temperature, current frequency, current power consumption, power consumption wall, and a first frequency, the process may include: obtaining the voltage corresponding to the current frequency and the voltage corresponding to the first frequency based on a preset relationship between frequency and voltage; determining a first target value based on the current frequency, the voltage corresponding to the current frequency, the current power consumption, the current temperature, the first frequency, the voltage corresponding to the first frequency, and the power consumption wall; determining whether the first frequency meets the requirement based on the first target value; wherein, if the first target value is within a preset range, the first frequency is determined to meet the requirement; if the first target value is not within the preset range, the first frequency is determined to not meet the requirement.

[0058] The preset relationship between frequency and voltage can be a curve showing the relationship between the chip's frequency F and voltage V, or it can be a list of the chip's frequency F and voltage V, such as an example list: {F0-V0, F1-V1, ..., Fn-Vn, Fmax-Vmax}. After obtaining the frequency, the corresponding voltage can be quickly obtained based on this preset relationship between frequency and voltage. For example, assuming the current frequency is F0, the voltage corresponding to F0 can be obtained as V0 based on the above list relationship.

[0059] The minimum operating voltage V of the chip at different frequencies F can be measured in advance to obtain data on multiple frequencies and voltages. To ensure accuracy, at least five voltage results at different frequencies should be used as a set of data for polynomial fitting to finally obtain the VF relationship curve of the chip. For ease of calculation, the operating frequency range and voltage range can also be set, and a list of VF relationships can be obtained based on the VF relationship curve.

[0060] Specifically, when determining the first target value based on the current frequency, the voltage corresponding to the current frequency, the current power consumption, the current temperature, the first frequency, the voltage corresponding to the first frequency, and the power consumption limit, the first target value can be determined according to a frequency prediction model. The frequency prediction model is as follows:

[0061]

[0062] In the frequency prediction model described above, F_current represents the current frequency Fc, V_current represents the voltage corresponding to the current frequency, P_current represents the current power consumption Pc, T_current represents the current temperature, F_target represents the expected frequency Ft, V_target represents the voltage corresponding to the expected frequency, P_target represents the power wall Pt, and T_target represents the temperature when the chip's power consumption is near the power wall (which can be the average of multiple temperature measurements). For example, T_target = 85℃. Pstatic(V_target, T_target): the static power consumption under the conditions of V_target and T_target. Pstatic(V_current, T_current): the static power consumption under the conditions of V_current and T_current.

[0063] Pstatic(V, T) is a model of the chip's actual power consumption in its idle state. It can be obtained by collecting power consumption values ​​of the chip under different combinations of voltage V and temperature T when there is no operation, and finally fitting the measured power consumption values ​​under different voltage V and temperature T conditions using the least squares method or other regression techniques. An example is Pstatic(V, T) = a0 + a1*V + a2*T + a3*V^2 + a4*V*T + a5*T^2. Here, a0, a1, a2, a3, a4, and a5 are all coefficients and are known values.

[0064] The frequency prediction model described above can be used to quickly determine whether Ft meets the requirements. If not, the next frequency can be quickly predicted using a multi-class method, and then substituted into the frequency prediction model for verification until a frequency that meets the requirements is obtained. For example, after obtaining P_current, T_current, and F_current, to ensure iteration efficiency, a multi-class method can be used to roughly determine the starting point of F1 and V1 for the first iteration. Taking the bisection method as an example, assuming F1 = [Fc*(Pt / Pc) + Fc] / 2, after obtaining F1 (at this time, F1 is F_target), the voltage V1 corresponding to F1 can be obtained based on the preset relationship between frequency and voltage (at this time, V1 is V_target). Then, F_target and V_target are substituted into Pstatic(V, T) to obtain the static power consumption under the conditions of F_target and V_target. Similarly, after obtaining F_current, the corresponding voltage V_current can be obtained based on the preset relationship between frequency and voltage. Then, V_current and T_current are substituted into Pstatic(V, T) to obtain the static power consumption under the conditions of V_current and T_current. Next, P_current, V_current, F_current, Pstatic(V_current, T_current) and F_target, V_target, P_target, Pstatic(F_target, T_target) are substituted into the frequency prediction model to obtain the first target value. If the first target value is within a preset range, the first frequency is considered to meet the requirements. For example, the preset range can be [-0.05, 0.05]. Taking a 300W power limit as an example, the predicted power consumption will fluctuate approximately within ±15W around the chip's power limit. That is, it is determined whether the following requirements (convergence conditions) are met:

[0065]

[0066] If the above requirements are met, then Ft = F1; if the above requirements are not met, then the multi-segmentation method is used to continue predicting the next frequency, and the iterative loop is performed.

[0067] Among them, when continuing to predict the second frequency, the process may include: If the current power consumption is greater than the power consumption wall, that is, Pc > Pt, and the first target value corresponding to the first frequency is greater than the upper limit of the preset interval, that is, greater than 0.05, indicating that the decrease in F1 is too large, then it is determined that the second frequency F2 is between the first frequency and the current frequency. Taking the dichotomy as an example, at this time, F2 = (F1 + Fc) / 2; If the current power consumption is greater than the power consumption wall, that is, Pc > Pt, and the first target value corresponding to the first frequency is less than the lower limit of the preset interval, that is, less than -0.05, indicating that the decrease in F1 is insufficient, then it is determined that the second frequency is between the target frequency and the first frequency. At this time, F2 = [F1 + Fc*(Pt / Pc)] / 2; If the current power consumption is less than the power consumption wall, that is, Pc < Pt, and the first target value corresponding to the first frequency is greater than the upper limit of the preset interval, that is, greater than 0.05, indicating that the increase in F1 is insufficient, then it is determined that the second frequency is between the first frequency and the target frequency. At this time, F2 = [Fc*(Pt / Pc) + F1] / 2; If the current power consumption is less than the power consumption wall, that is, Pc < Pt, and the first target value corresponding to the first frequency is less than the lower limit of the preset interval, that is, less than -0.05, indicating that the increase in F1 is too large, then it is determined that the second frequency is between the current frequency and the first frequency. At this time, F2 = [F1 + Fc] / 2.

[0068] Among them, the process of determining whether the second frequency meets the requirements based on the current temperature, current frequency, current power consumption, power consumption wall, and second frequency is similar to the process of determining whether the first frequency meets the requirements based on the current temperature, current frequency, current power consumption, power consumption wall, and first frequency. For example, after obtaining F2 (at this time, F2 is F_target), based on the preset relationship between frequency and voltage, the voltage V2 corresponding to F2 is obtained (at this time, V2 is V_target). Then, substituting F_target and V_target into Pstatic(V, T), the static power consumption under the conditions of F_target and V_target is obtained. Then, substituting P_current, V_current, F_current, Pstatic(V_current, T_current), as well as F_target, V_target, P_target, and Pstatic(F_target, T_target) into the above frequency prediction model, the second target value corresponding to the second frequency can be obtained. If the second target value is within the preset interval and it is determined that the second frequency meets the requirements, then the second frequency is the optimal frequency.

[0069] If the second frequency does not meet the above requirements, the multi-point method is used to continue predicting the next frequency for iterative loop. Among them, the process of predicting the third frequency is similar to the process of predicting the second frequency.

[0070] For example, when the current power consumption is greater than the power consumption wall, i.e., Pc > Pt, if the first target value corresponding to the first frequency is greater than 0.05 and the second target value corresponding to the second frequency is greater than 0.05, indicating that the decrease in F2 is excessive, then it is determined that the third frequency F3 is between the second frequency and the current frequency. Taking the dichotomy method as an example, at this time, F3 = (F2 + Fc) / 2; if the first target value corresponding to the first frequency is greater than 0.05 and the second target value corresponding to the second frequency is less than -0.05, indicating that the decrease in F2 is insufficient, then it is determined that the third frequency is between the first frequency and the second frequency. At this time, F3 = [F2 + F1] / 2.

[0071] For another example, when the current power consumption is greater than the power consumption wall, i.e., Pc > Pt, if the first target value corresponding to the first frequency is less than -0.05 and the second target value corresponding to the second frequency is greater than 0.05, indicating that the decrease in F2 is excessive, then it is determined that the third frequency F3 is between the second frequency and the first frequency. Taking the dichotomy method as an example, at this time, F3 = (F2 + F1) / 2; if the first target value corresponding to the first frequency is less than -0.05 and the second target value corresponding to the second frequency is less than -0.05, indicating that the decrease in F2 is insufficient, then it is determined that the third frequency is between the second frequency and the target frequency. At this time, F3 = [Fc*(Pt / Pc) + F2] / 2.

[0072] For another example, when the current power consumption is less than the power consumption wall, i.e., Pc < Pt, if the first target value corresponding to the first frequency is greater than 0.05 and the second target value corresponding to the second frequency is greater than 0.05, indicating that the increase in F2 is insufficient, then it is determined that the third frequency is between the second frequency and the target frequency. At this time, F3 = [Fc*(Pt / Pc) + F2] / 2. If the first target value corresponding to the first frequency is greater than 0.05 and the second target value corresponding to the second frequency is less than -0.05, indicating that the increase in F2 is excessive, then it is determined that the third frequency is between the second frequency and the first frequency. At this time, F3 = [F1 + F2] / 2.

[0073] For another example, when the current power consumption is less than the power consumption wall, i.e., Pc < Pt, if the first target value corresponding to the first frequency is less than -0.05 and the second target value corresponding to the second frequency is greater than 0.05, indicating that the increase in F2 is insufficient, then it is determined that the third frequency is between the second frequency and the first standard frequency. At this time, F3 = [F1 + F2] / 2. If the first target value corresponding to the first frequency is less than -0.05 and the second target value corresponding to the second frequency is less than -0.05, indicating that the increase in F2 is excessive, then it is determined that the third frequency is between the second frequency and the current frequency. At this time, F3 = [F2 + Fc] / 2.

[0074] If the third frequency does not meet the above requirements, the multi - division method is used to continue predicting the next frequency until a frequency that meets the requirements is obtained.

[0075] S3: Adjust the current frequency of the chip to the optimal frequency.

[0076] After predicting the optimal frequency of the current chip, adjust the current frequency of the chip to the optimal frequency. When adjusting the frequency of the chip, the voltage of the chip can also be adjusted. It can be to adjust the supply voltage of the chip to the voltage corresponding to the optimal frequency, and the voltage corresponding to the optimal frequency can be obtained according to the preset relationship between frequency and voltage.

[0077] In a possible implementation manner, the above dynamic frequency adjustment method further includes: S4 and S5.

[0078] S4: If the current chip is in the first state, and the absolute value of the difference between the current power consumption of the chip and the power consumption wall of the chip is less than or equal to the tolerance value, obtain the average power consumption of the chip within a period of time and the current frequency of the chip.

[0079] When the chip is in the stage of dynamic frequency modulation, and |Pc - Pt| ≤ t, obtain the average power consumption of the chip within a period of time (such as 1 second, configurable) and the current frequency of the chip.

[0080] S5: Fine-tune the current frequency of the chip according to the average power consumption, power consumption wall, and current frequency.

[0081] After obtaining the average power consumption of the chip within a period of time and the current frequency of the chip, fine-tune the current frequency of the chip according to the average power consumption, power consumption wall, and current frequency. It can be to determine the expected frequency Ft required by the current chip according to the average power consumption, power consumption wall, and current frequency, and then adjust the current frequency of the chip according to Ft. In the fine-tuning mode, usually Ft and Fc differ by a set clock size Fset.

[0082] When fine-tuning the current frequency of the chip according to the average power consumption, power consumption wall, and current frequency, the process can include: if the absolute value of the difference is less than or equal to the tolerance value, and the current power consumption is less than the power consumption wall, that is, if |Pc - Pt| ≤ t, and Pc < Pt, fine-tune and increase the frequency of the chip according to the relationship between the average power consumption and the power consumption wall, or keep the current frequency of the chip unchanged; if the absolute value of the difference is less than or equal to the tolerance value, and the current power consumption is greater than or equal to the power consumption wall, that is, if |Pc - Pt| ≤ t, and Pc ≥ Pt, fine-tune and decrease the frequency of the chip according to the relationship between the average power consumption and the power consumption wall, or keep the current frequency of the chip unchanged.

[0083] For example, if |Pc - Pt| ≤ t, and Pc < Pt, then fine-tuning and increasing the frequency is required:

[0084] I. If the average power consumption of the chip in the past 1 second (not limited to 1 second) is less than 0.67 times the power consumption wall Pt, immediately increase the frequency by a set clock size, i.e., Ft = Fc + Fset, where Fset represents a set clock, for example Fset = 25MHz;

[0085] II. If the average power consumption of the chip in the past second is greater than 0.67 times the power consumption wall, but less than the power consumption wall, then after a delay, the frequency will be increased by a set clock size, i.e., Ft = Fc + Fset;

[0086] III. If the average power consumption of the chip in the past second is greater than the power limit, keep the current frequency unchanged, i.e., Ft = Fc.

[0087] If |Pc-Pt|≤t and Pc≥Pt, then fine-tuning of the frequency reduction is required:

[0088] I. If the average power consumption of the chip in the past second (not limited to 1 second) is less than the power consumption wall, keep the current frequency unchanged, that is, Ft = Fc;

[0089] II. If the average power consumption of the chip in the past second is greater than the power limit but less than 1.1 times the power limit, then the frequency reduction time is delayed. After a period of delay, the frequency is reduced by a set clock size, i.e., Ft = Fc - Fset, for example, Ft = Fc - 25MHz;

[0090] III. If the average power consumption of the chip in the past second is greater than 1.1 times the power consumption wall, immediately reduce the frequency by a set clock size, i.e., Ft = Fc - Fset.

[0091] In one possible implementation, the above dynamic frequency adjustment method further includes: if the chip is in a second state, adjusting the current frequency of the chip to the maximum frequency allowed by the chip's power consumption wall; wherein the second state includes the chip changing from a continuous idle state to a busy state.

[0092] In one possible implementation, the dynamic frequency adjustment method described above further includes: monitoring the busy state of the hardware in the chip; determining the state of the chip based on the busy state monitored over a period of time, wherein the state of the chip includes the first state or the second state described above.

[0093] When determining the chip's state based on the monitored busy state over a period of time, the process may include: if the current hardware is detected to be in an idle state, and there have been instances of the hardware being in a busy state in the past period of time, or if the current hardware is detected to be in a busy state, and there have been instances of the hardware being in a busy state in the past period of time, then the chip is determined to be in a first state; if the current hardware is detected to be in a busy state, and the hardware has been continuously in an idle state in the past period of time, then the chip is determined to be in a second state.

[0094] Monitoring the hardware busy state of a chip can be achieved by monitoring its busy signal. If the busy signal is 1 (high bit), it indicates that the upper-layer application is calling the chip, and the chip frequency needs to be increased to ensure performance. If the busy signal is 0 (low bit), it indicates that the upper-layer application is not calling the chip, and the chip frequency needs to be reduced to a very low level (idle frequency) to save power. To avoid frequent frequency switching, the chip's current state can be determined based on the monitored busy state over a period of time. Before each dynamic frequency and voltage adjustment begins, the hardware busy signal is monitored to determine whether to enter dynamic frequency and voltage adjustment or exit into an idle state.

[0095] For example, I. If the current hardware busy signal is detected as 0, and the hardware busy signal has been continuously 0 for the past 5 seconds, then the idle state is exited; II. If the current hardware busy signal is detected as 1, and the hardware busy signal has been continuously 0 for the past 5 seconds, i.e. "continuous 0 to 1", then the chip is considered to be in the second state; III. If the current hardware busy signal is detected as 1, and the hardware busy signal has been 1 for the past 5 seconds, or if the current hardware busy signal is detected as 0, and the hardware busy signal has been 1 for the past 5 seconds, then the chip is considered to be in the first state in both of these cases.

[0096] In one implementation, the principle of the dynamic frequency adjustment method can be as follows: Figure 3 As shown, the system monitors the busy state of the hardware within the chip. Based on the monitored busy state over a period of time, the chip's current state is determined. When the chip is in the second state, its current frequency is directly adjusted to the maximum frequency allowed by the chip's power consumption limit, achieving rapid frequency upscaling. When the chip is in the first state, the system determines whether to predict the optimal frequency or fine-tune the current frequency based on the relationship between the chip's current power consumption and its power consumption limit. For example, if |Pc-Pt|>t, the optimal frequency needs to be predicted based on the current temperature, current frequency, current power consumption, and power consumption limit. If |Pc-Pt|≤t, only fine-tuning of the current frequency is required.

[0097] In one implementation, the principle of dynamically adjusting the chip's frequency and voltage is as follows: Figure 4As shown, the monitoring chip detects the hardware busy signal. If the busy signal is continuously 0, the process exits. If the busy signal is continuously 0 to 1, the maximum allowed frequency Fbase and corresponding voltage Vbase are directly output to the frequency and voltage regulation module. If the detected busy signal falls under other conditions, i.e., the current hardware busy signal is 1 and there have been instances of 1 in the past 5 seconds, or if the current hardware busy signal is 0 and there have been instances of 1 in the past 5 seconds, the current power consumption Pc, current temperature T, and current frequency Fc are obtained. If |Pc-Pt|>t, Ft and Vt are predicted by the prediction module and input to the frequency and voltage regulation module. If |Pc-Pt|≤t, Ft and Vt are determined by the fine-tuning module and input to the frequency and voltage regulation module.

[0098] The prediction module predicts Ft, and the process is similar to the process described above for predicting the optimal frequency of the chip based on the current temperature, current frequency, current power consumption, and power limit. The fine-tuning module determines Ft, and the process described above for fine-tuning the chip's current frequency based on average power consumption, power limit, and current frequency.

[0099] This application also provides a dynamic frequency adjustment device, such as... Figure 5 As shown. The dynamic frequency adjustment device includes: an acquisition module, a prediction module, and a frequency modulation module.

[0100] The acquisition module is used to acquire the current temperature and current frequency of the chip if the chip is currently in a first state and the absolute value of the difference between the current power consumption of the chip and the power consumption wall of the chip is greater than the tolerance value, wherein the first state indicates that the chip is in a stage requiring dynamic frequency adjustment.

[0101] The prediction module is used to predict the optimal frequency of the chip based on the current temperature, the current frequency, the current power consumption, and the power consumption limit.

[0102] The frequency modulation module is used to adjust the current frequency of the chip to the optimal frequency.

[0103] The prediction module is configured to predict a first frequency based on the current power consumption, the power consumption limit, and the current frequency; determine whether the first frequency meets the requirements based on the current temperature, the current frequency, the current power consumption, the power consumption limit, and the first frequency; and determine the first frequency as the optimal frequency if the first frequency meets the requirements.

[0104] The prediction module is further configured to: if the first frequency does not meet the requirements, continue to predict a second frequency; determine whether the second frequency meets the requirements based on the current temperature, the current frequency, the current power consumption, the power consumption limit, and the second frequency; if the second frequency does not meet the requirements, continue to predict the next frequency until a frequency that meets the requirements is obtained; and determine the frequency that meets the requirements as the optimal frequency.

[0105] The prediction module is used to obtain the ratio of the power consumption wall to the current power consumption, and to obtain the product of the ratio and the current frequency to obtain the target frequency; if the current power consumption is greater than the power consumption wall, it is determined that the first frequency is between the target frequency and the current frequency; if the current power consumption is less than the power consumption wall, it is determined that the first frequency is between the current frequency and the target frequency.

[0106] The prediction module is used to obtain the voltage corresponding to the current frequency and the voltage corresponding to the first frequency according to a preset relationship between frequency and voltage; determine a first target value according to the current frequency, the voltage corresponding to the current frequency, the current power consumption, the current temperature, the first frequency, the voltage corresponding to the first frequency, and the power consumption limit; determine whether the first frequency meets the requirements according to the first target value; wherein, if the first target value is within a preset range, it is determined that the first frequency meets the requirements.

[0107] The prediction module is configured to: determine that the second frequency is between the first frequency and the current frequency if the current power consumption is greater than the power consumption wall and the first target value corresponding to the first frequency is greater than the upper limit of the preset interval; determine that the second frequency is between the target frequency and the first frequency if the current power consumption is greater than the power consumption wall and the first target value corresponding to the first frequency is less than the lower limit of the preset interval; determine that the second frequency is between the first frequency and the target frequency if the current power consumption is less than the power consumption wall and the first target value corresponding to the first frequency is greater than the upper limit of the preset interval; and determine that the second frequency is between the current frequency and the first frequency if the current power consumption is less than the power consumption wall and the first target value corresponding to the first frequency is less than the lower limit of the preset interval.

[0108] The dynamic frequency adjustment device includes: a fine-tuning module, which is used to obtain the average power consumption of the chip over a period of time and the current frequency of the chip if the chip is currently in a first state and the absolute value of the difference between the current power consumption of the chip and the power consumption wall of the chip is less than or equal to a tolerance value; and to fine-tune the current frequency of the chip according to the average power consumption, the power consumption wall, and the current frequency.

[0109] In one implementation, the fine-tuning module can output the required frequency Ft based on the average power consumption, the power consumption limit, and the current frequency; then the frequency modulation module adjusts the frequency based on the Ft output by the fine-tuning module.

[0110] The fine-tuning module is configured to, if the absolute value of the difference is less than or equal to the tolerance value and the current power consumption is less than the power consumption wall, fine-tune the current frequency of the chip by increasing the frequency based on the relationship between the average power consumption and the power consumption wall, or keep the current frequency of the chip unchanged; if the absolute value of the difference is less than or equal to the tolerance value and the current power consumption is greater than or equal to the power consumption wall, fine-tune the current frequency of the chip by decreasing the frequency based on the relationship between the average power consumption and the power consumption wall, or keep the current frequency of the chip unchanged.

[0111] The frequency modulation module is further configured to adjust the current frequency of the chip to the maximum frequency allowed by the power consumption wall of the chip if the chip is in a second state; wherein the second state includes the chip changing from a continuous idle state to a busy state.

[0112] The dynamic frequency adjustment device includes: a detection module for monitoring the busy state of the hardware in the chip; and determining the state of the chip based on the monitored busy state over a period of time, wherein the state of the chip includes the first state or the second state.

[0113] The detection module is used to determine that the chip is in a first state if it detects that the current hardware is in an idle state and the hardware has been in a busy state for a period of time, or if it detects that the current hardware is in a busy state and the hardware has been in a busy state for a period of time; and if it detects that the current hardware is in a busy state and the hardware has been in an idle state for a period of time, it determines that the chip is in a second state.

[0114] In one possible implementation, the dynamic frequency adjustment device may further include a voltage regulation module, wherein the frequency modulation module and the voltage regulation module may be combined into a frequency modulation and voltage regulation module.

[0115] The dynamic frequency adjustment device can be an internal component of the chip; for example, it can be part of the chip's internal power management system. Alternatively, it can be a device independent of the chip. The dynamic frequency adjustment device can be implemented in software or hardware. For instance, it can be firmware within the power management system.

[0116] The dynamic frequency adjustment device provided in this application embodiment has the same implementation principle and technical effect as the aforementioned method embodiment. For the sake of brevity, any parts not mentioned in the device embodiment can be referred to the corresponding content in the aforementioned method embodiment.

[0117] This application also provides a chip including the aforementioned dynamic frequency adjustment device. Furthermore, the chip may also include a phase-locked loop (PLL), with the dynamic frequency adjustment device connected to the PLL. The dynamic frequency adjustment device adjusts the chip frequency by controlling the PLL. Alternatively, the dynamic frequency adjustment device can adjust the chip voltage by controlling the chip's power supply module.

[0118] In one possible implementation, the chip can be a processor, which can be an integrated circuit chip with signal processing capabilities. The aforementioned processor can be a general-purpose processor, including a Central Processing Unit (CPU), a Network Processor (NP), a Graphics Processing Unit (GPU), an Accelerated Processing Unit (ACCU), a Multimedia Application Processor (MAP), a microprocessor, etc.; it can also be a Digital Signal Processor (DSP), an Application Specific Integrated Circuit (ASIC), a Field Programmable Gate Array (FPGA), or other programmable logic devices, discrete gate or transistor logic devices, or discrete hardware components. It can implement or execute the methods, steps, and logic block diagrams disclosed in the embodiments of this application. Alternatively, the processor can also be any conventional processor.

[0119] This application also provides an electronic device that includes the chip described above. The chip may include the dynamic frequency adjustment device described above.

[0120] This application also provides an electronic device, which includes a chip and the aforementioned dynamic frequency adjustment device. The dynamic frequency adjustment device is connected to the chip, and in this case, the dynamic frequency adjustment device is a device independent of the chip.

[0121] The aforementioned electronic devices include, but are not limited to, mobile phones, tablets, computers, servers, etc.

[0122] It should be noted that the various embodiments in this specification are described in a progressive manner, with each embodiment focusing on the differences from other embodiments. The same or similar parts between the various embodiments can be referred to each other.

[0123] In the several embodiments provided in this application, it should be understood that the disclosed apparatus and methods can also be implemented in other ways. The apparatus embodiments described above are merely illustrative. For example, the flowcharts and block diagrams in the accompanying drawings illustrate the architecture, functionality, and operation of possible implementations of apparatus, methods, and computer program products according to various embodiments of this application. In this regard, each block in a flowchart or block diagram may represent a module, segment, or portion of code containing one or more executable instructions for implementing a specified logical function. It should also be noted that in some alternative implementations, the functions marked in the blocks may occur in a different order than those marked in the drawings. For example, two consecutive blocks may actually be executed substantially in parallel, and they may sometimes be executed in reverse order, depending on the functions involved. It should also be noted that each block in a block diagram and / or flowchart, and combinations of blocks in block diagrams and / or flowcharts, can be implemented using a dedicated hardware-based system that performs the specified function or action, or using a combination of dedicated hardware and computer instructions.

[0124] In addition, the functional modules in the various embodiments of this application can be integrated together to form an independent part, or each module can exist independently, or two or more modules can be integrated to form an independent part.

[0125] If the aforementioned functions are implemented as software functional modules and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or a portion of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a computer-readable storage medium and includes several instructions to cause a computer device (which may be a personal computer, laptop, server, or electronic device, etc.) to execute all or part of the steps of the methods described in the various embodiments of this application. The aforementioned computer-readable storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0126] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A dynamic frequency adjustment method, characterized in that, include: If the chip is currently in the first state, and the absolute value of the difference between the chip's current power consumption and the chip's power consumption wall is greater than the tolerance value, obtain the chip's current temperature and current frequency, wherein the first state indicates that the chip is in a stage requiring dynamic frequency adjustment; Based on the current temperature, the current frequency, the current power consumption, and the power consumption limit, predict the optimal frequency of the chip at present; Adjust the current frequency of the chip to the optimal frequency; The process of predicting the optimal frequency of the chip based on the current temperature, the current frequency, the current power consumption, and the power consumption limit includes: Based on the current power consumption, the power limit, and the current frequency, predict the first frequency; Based on the current temperature, the current frequency, the current power consumption, the power consumption limit, and the first frequency, determine whether the first frequency meets the requirements; If the first frequency meets the requirements, the first frequency is determined to be the optimal frequency; The determination of whether the first frequency meets the requirements based on the current temperature, the current frequency, the current power consumption, the power consumption limit, and the first frequency includes: Based on a preset relationship between frequency and voltage, obtain the voltage corresponding to the current frequency, and obtain the voltage corresponding to the first frequency; A first target value is determined based on the current frequency, the voltage corresponding to the current frequency, the current power consumption, the current temperature, the first frequency, the voltage corresponding to the first frequency, and the power consumption limit. Determine whether the first frequency meets the requirements based on the first target value; wherein, if the first target value is within a preset range, determine that the first frequency meets the requirements.

2. The method according to claim 1, characterized in that, The method further includes: If the first frequency does not meet the requirements, continue to predict the second frequency; Based on the current temperature, the current frequency, the current power consumption, the power consumption limit, and the second frequency, determine whether the second frequency meets the requirements; If the second frequency does not meet the requirements, continue to predict the next frequency until a frequency that meets the requirements is obtained. The frequency that meets the requirements is determined as the optimal frequency.

3. The method according to claim 1, characterized in that, Based on the current power consumption, the power limit, and the current frequency, predict the first frequency, including: Obtain the ratio of the power consumption wall to the current power consumption, and obtain the product of the ratio and the current frequency to get the target frequency; If the current power consumption is greater than the power consumption limit, the first frequency is determined to be between the target frequency and the current frequency. If the current power consumption is less than the power consumption wall, the first frequency is determined to be between the current frequency and the target frequency.

4. The method according to claim 1, characterized in that, Predicting the second frequency includes: If the current power consumption is greater than the power consumption wall, and the first target value corresponding to the first frequency is greater than the upper limit of the preset interval, then the second frequency is determined to be between the first frequency and the current frequency. If the current power consumption is greater than the power consumption wall, and the first target value corresponding to the first frequency is less than the lower limit of the preset interval, then the second frequency is determined to be between the target frequency and the first frequency. If the current power consumption is less than the power consumption wall, and the first target value corresponding to the first frequency is greater than the upper limit of the preset interval, then the second frequency is determined to be between the first frequency and the target frequency. If the current power consumption is less than the power consumption wall, and the first target value corresponding to the first frequency is less than the lower limit of the preset interval, then the second frequency is determined to be between the current frequency and the first frequency.

5. The method according to claim 1, characterized in that, The method further includes: If the chip is currently in the first state, and the absolute value of the difference between the chip's current power consumption and the chip's power consumption wall is less than or equal to the tolerance value, obtain the chip's average power consumption and the chip's current frequency over a period of time. The current frequency of the chip is fine-tuned based on the average power consumption, the power consumption limit, and the current frequency.

6. The method according to claim 5, characterized in that, Based on the average power consumption, the power limit, and the current frequency, fine-tuning the current frequency of the chip includes: If the absolute value of the difference is less than or equal to the tolerance value, and the current power consumption is less than the power consumption wall, the current frequency of the chip is finely adjusted and increased according to the relationship between the average power consumption and the power consumption wall, or the current frequency of the chip is kept unchanged. If the absolute value of the difference is less than or equal to the tolerance value, and the current power consumption is greater than or equal to the power consumption wall, the current frequency of the chip is finely adjusted and reduced according to the relationship between the average power consumption and the power consumption wall, or the current frequency of the chip is kept unchanged.

7. The method according to any one of claims 1-5, characterized in that, The method further includes: If the chip is in the second state, the current frequency of the chip is adjusted to the maximum frequency allowed by the chip's power consumption wall; wherein, the second state includes the chip changing from a continuous idle state to a busy state.

8. The method according to claim 7, characterized in that, The method further includes: Monitor the busy status of the hardware in the chip; The state of the chip is determined based on the busy status monitored over a period of time, wherein the state of the chip includes the first state or the second state.

9. The method according to claim 8, characterized in that, Based on the monitored busy status over a period of time, the state of the chip is determined, including: If the current hardware is detected to be in an idle state, and there has been a period of time in the past where the hardware has been in a busy state, or if the current hardware is detected to be in a busy state, and there has been a period of time in the past where the hardware has been in a busy state, then the chip is determined to be in the first state. If the current hardware is detected to be in a busy state, and the hardware has been in an idle state for a period of time, then the chip is determined to be in the second state.

10. A dynamic frequency adjustment device, characterized in that, include: The acquisition module is used to acquire the current temperature and current frequency of the chip if the chip is currently in a first state and the absolute value of the difference between the current power consumption of the chip and the power consumption wall of the chip is greater than the tolerance value, wherein the first state indicates that the chip is in a stage requiring dynamic frequency adjustment. The prediction module is used to predict the optimal frequency of the chip based on the current temperature, the current frequency, the current power consumption, and the power consumption limit. A frequency modulation module is used to adjust the current frequency of the chip to the optimal frequency; The process of predicting the optimal frequency of the chip based on the current temperature, the current frequency, the current power consumption, and the power consumption limit includes: Based on the current power consumption, the power limit, and the current frequency, predict the first frequency; Based on the current temperature, the current frequency, the current power consumption, the power consumption limit, and the first frequency, determine whether the first frequency meets the requirements; If the first frequency meets the requirements, the first frequency is determined to be the optimal frequency; The determination of whether the first frequency meets the requirements based on the current temperature, the current frequency, the current power consumption, the power consumption limit, and the first frequency includes: Based on a preset relationship between frequency and voltage, obtain the voltage corresponding to the current frequency, and obtain the voltage corresponding to the first frequency; A first target value is determined based on the current frequency, the voltage corresponding to the current frequency, the current power consumption, the current temperature, the first frequency, the voltage corresponding to the first frequency, and the power consumption limit. Determine whether the first frequency meets the requirements based on the first target value; wherein, if the first target value is within a preset range, determine that the first frequency meets the requirements.

11. A chip, characterized in that, It includes a phase-locked loop and a dynamic frequency adjustment device as described in claim 10, wherein the dynamic frequency adjustment device is connected to the phase-locked loop.

12. An electronic device, characterized in that, include: The chip and the dynamic frequency adjustment device as described in claim 10, wherein the dynamic frequency adjustment device is connected to the chip.

13. An electronic device, characterized in that, include: The chip as described in claim 11.

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