分布式系统下的分区增强型混合逻辑时钟授时方法及系统
By dividing the distributed system into regions and adopting hardware clock synchronization and differential encoding storage strategies, the accuracy and cost issues of traditional hybrid logic clock timing schemes are solved, achieving efficient and reliable timestamp generation and storage, and improving the timing consistency and performance of the distributed system.
Patent Information
- Application Number
- CN202510908984.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2025-07-02
- Publication Date
- 2026-07-17
- Estimated Expiration
- 2045-07-02
AI Technical Summary
Traditional hybrid logic clock timing schemes suffer from limited accuracy, high maintenance costs, and large differences in the physical clocks of nodes in distributed systems, which affect transaction consistency and efficiency.
The partitioned enhanced hybrid logic clock timing method is adopted. By dividing the system nodes into multiple regions and deploying primary and backup region clock service nodes internally and externally, physical clock synchronization is achieved using hardware clock synchronization protocol. Hybrid logic clock timestamps are generated based on local physical time and logic counters. Combined with progressive fine-tuning and differential encoding storage strategies, timestamp generation and storage are optimized.
It significantly improves clock synchronization accuracy and system reliability, reduces clock synchronization overhead and storage resource consumption, ensures the efficient and stable operation of distributed systems, and provides highly available time-series service capabilities.
Smart Images
Figure CN120768497B_ABST
Abstract
Citation Information
Patent Citations
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