A probe and a method of processing thereof

Abstract

The application provides a probe and a processing method thereof, comprising: a probe MEMS processing method, a substrate selection step: selecting a silicon substrate or a metal substrate, and forming a sacrificial layer on the surface of the substrate; a patterning step: forming a probe structure pattern on the substrate through a photoetching process; a probe pre-structure shaping step: sequentially adopting deep silicon etching and metal etching to realize probe pre-structure processing; a functional layer processing step: adopting physical vapor deposition and pulse applied electroplating to form a metal conductive layer; a structure releasing step: removing the sacrificial layer through a chemical or physical method to complete probe releasing, and obtaining the probe; and / or a femtosecond laser processing method, comprising the following steps: focusing a femtosecond laser beam with a pulse width <100 fs on the surface of a material to be processed; removing the material by using a plasma cold ablation effect to realize a cutting path, and obtaining the probe; and realizing stress-free, high-precision and surface roughness Ra<0.1 mu m probe processing. 13 W / cm 2 Inducing ionization mechanism of the material; using plasma cold ablation effect to realize material removal, forming a cutting path, and obtaining the probe; realizing stress-free, high-precision and surface roughness Ra<0.1 mu m probe processing.

Description

Technical Field

[0001] This invention relates to the field of probe technology, and more specifically to a probe and its fabrication method. Background Technology

[0002] With the rapid development of microelectronic testing and semiconductor inspection technologies, the fabrication process of high-precision probes faces unprecedented challenges. Probes processed by traditional turning or stamping processes struggle to meet micron-level precision requirements and exhibit significant mechanical stress, resulting in a tip deformation rate as high as 15%-20% and dimensional errors generally exceeding ±5μm. Subsequent chemical polishing is required to correct the roughness (Ra>0.3μm), but this weakens the probe's mechanical strength.

[0003] While existing MEMS deep silicon etching processes can achieve high precision, wet etching of sacrificial layers is prone to structural collapse, and the high-temperature process (>300℃) during the deposition of the metal conductive layer can cause annealing of the substrate material. Although the micro-casting method proposed in existing technologies can form complex needle tips, there is still a risk of breakage during the demolding process.

[0004] Existing nanosecond laser processing methods create a 10–20 μm heat-affected zone due to thermal diffusion, leading to oxidation and failure of the probe's conductive layer. While the cantilever probe design used in existing technologies optimizes welding performance, it does not solve the problem of heat accumulation during processing. Summary of the Invention

[0005] To address the inherent technical problems of existing technologies, such as probe deformation due to residual stress and material degradation caused by heat accumulation, this invention proposes a probe and its processing method. This method enables stress-free cutting, avoiding probe deformation or contamination, producing smooth cutting edges without the need for additional polishing, and generating almost no heat accumulation during processing, thus avoiding material annealing or oxidation and reducing costs. It achieves stress-free, high-precision (error < ±2μm) probe processing with a surface roughness of Ra < 0.1μm, meeting the requirements for micron-level precision and significantly improving the reliability and detection accuracy of the probe.

[0006] To achieve the above objectives, the technical solution of the present invention is as follows:

[0007] On one hand, the present invention provides a method for fabricating a probe, comprising:

[0008] The probe MEMS fabrication method includes the following steps:

[0009] Patterning step: A probe structure pattern is formed on a substrate using a photolithography process. The substrate includes a silicon substrate or a metal substrate, and the surface of the substrate has a sacrificial layer.

[0010] Probe pre-structure forming steps: Deep silicon etching or metal etching is used to fabricate the probe pre-structure;

[0011] Functional layer processing steps: A metallic conductive layer is formed using physical vapor deposition and pulsed electroplating;

[0012] Structure release step: The sacrificial layer is removed by chemical or physical methods to complete the probe release and obtain the probe;

[0013] Alternatively, a femtosecond laser processing method may be used, including the following steps:

[0014] A femtosecond laser beam with a pulse width of <100 fs is focused onto the surface of the material to be processed;

[0015] With power density ≥10 13 W / cm 2 A femtosecond laser beam induces ionization in the material;

[0016] The material is removed by utilizing the plasma cold ablation effect, forming a cutting path to obtain a probe.

[0017] This invention proposes a probe and its processing method, which can achieve stress-free cutting, avoid probe deformation or contamination, produce smooth cutting edges without additional polishing, and generate almost no heat accumulation during processing, thus avoiding material annealing or oxidation and reducing costs. It achieves stress-free, high-precision (error < ±2μm) probe processing with a surface roughness of Ra < 0.1μm, meeting the requirements of micron-level precision and significantly improving the reliability and detection accuracy of the probe.

[0018] As a preferred technical solution, the ionization includes:

[0019] Multiphoton ionization: Transparent materials directly form plasma by simultaneously absorbing multiple photons;

[0020] Tunneling ionization: Conductive materials generate a free electron gas through the quantum tunneling effect;

[0021] The heat-affected zone generated by the ionization process has a thickness of <10μm, an aspect ratio of >60, and a cutting edge roughness Ra<0.1μm.

[0022] As a preferred technical solution, the silicon substrate includes: <100> A crystal-oriented single-crystal silicon wafer, wherein the thickness of the silicon substrate is 500–700 μm, and the metal substrate comprises: a rhenium-tungsten alloy or a beryllium-copper alloy; the rhenium-tungsten alloy comprises the following components by weight percentage:

[0023] Re: 1-5%;

[0024] W: 95-99%.

[0025] As a preferred technical solution, the sacrificial layer is formed by plasma-enhanced chemical vapor deposition of SiO2 thin film or SiN. XA thin film is formed, wherein the thickness of the sacrificial layer is 2–5 μm.

[0026] As a preferred technical solution, prior to the patterning step, the method further includes a surface treatment step on the silicon substrate, the surface treatment step comprising the following steps:

[0027] The substrate was cleaned at high temperature using a mixed solution of oxidizing acids to remove organic matter;

[0028] Use a fluorine-containing solution to remove the oxide layer on the substrate surface;

[0029] Enhance the surface activity of the substrate by vapor deposition of silane coupling agents to improve the adhesion of photoresist.

[0030] As a preferred technical solution, in the surface treatment step:

[0031] The oxidizing acid mixture contains sulfuric acid and hydrogen peroxide, and the volume ratio of the two is (2.5-3.5):1. The high-temperature cleaning temperature is 110-130°C, and the high-temperature cleaning time is 7-13 minutes.

[0032] The fluorine-containing solution is a diluted hydrofluoric acid solution with a concentration of 3-7 wt%.

[0033] The silane coupling agent is hexamethyldisilazane or its derivative, the vapor deposition temperature is 100-150°C, and the vapor deposition time is 20-40 seconds.

[0034] As a preferred technical solution, the graphical step includes the following steps:

[0035] Coating steps: Photoresist is spin-coated onto the surface of the substrate after surface treatment to form a film of the target thickness, followed by soft baking.

[0036] Exposure steps: Select a deep ultraviolet light source or an electron beam to irradiate the patterned area with energy;

[0037] Development step: Dissolve the photoresist in the exposed or unexposed areas using the corresponding developer.

[0038] As a preferred technical solution, the coating step includes a photoresist or a negative photoresist. The positive photoresist is spin-coated at a speed of 3000–5000 rpm to form a film with a thickness of 1–2 μm, and its soft-baking temperature is 90–100°C for 1–2 minutes. The negative photoresist is spin-coated at a speed of 1000–3000 rpm to form a film with a thickness of 5–100 μm, and its soft-baking temperature is 90–100°C for 3–7 minutes.

[0039] The exposure energy of the deep ultraviolet light source or electron beam exposure in the exposure step is 100–300 mJ / cm². 2 ;

[0040] The development step includes: using an alkaline developer with a concentration of 1-5 wt% for positive photoresist and a development time of 60-90 seconds; or using an organic developer for negative photoresist and a development time of 2-5 minutes.

[0041] As a preferred technical solution, the probe pre-structure forming step includes the following steps:

[0042] Deep silicon etching step: The silicon substrate is etched using an alternating process of introducing etching gas and passivation gas;

[0043] The deep silicon etching step specifically includes the following steps:

[0044] Alternately introduce fluorine-containing etching gas and carbon fluoride-containing passivation gas;

[0045] Apply an inductively coupled plasma source power of 800–1000 W and an RF bias voltage of 10–20 W;

[0046] Maintain the reaction pressure at 10–20 mTorr and control the temperature within the range of -200℃ to -100℃;

[0047] Deep silicon etching rate 4–6 μm / min, sidewall perpendicularity 89°–91°, surface roughness ≤100 nm;

[0048] Metal etching steps: Selective etching of the metal substrate is performed using wet or dry processes. The wet process includes the following steps:

[0049] Wet etching: The metal is etched at a temperature of 60–100°C using an alkaline solution with a concentration of 20%–40% and an etching rate of 0.5–1 μm / min.

[0050] The dry process includes the following steps:

[0051] Dry etching: using halogen-based reactive gases, with an applied power of 50–100 W and an applied pressure of 40–60 mTorr.

[0052] As a preferred technical solution, the functional layer processing steps specifically include the following steps:

[0053] A Ti and Au double seed layer is sputtered on the surface of the probe prestructure, with the Ti layer having a thickness of 40-60 nm and the Au layer having a thickness of 180-220 nm.

[0054] A nickel layer is electroplated onto the seed layer using a nickel sulfamate electrolyte at a current density of 2–5 A / dm³.2 Temperature 45–55℃, nickel layer thickness 5–10 μm;

[0055] A cobalt-containing gold layer is electroplated onto the nickel layer using a cyanide gold plating solution with a cobalt content of 0.2–0.8 wt% and a current density of 0.8–2.5 A / dm³. 2 The cobalt-containing gold layer is 0.5–1 μm thick;

[0056] A pulsed current is applied during the electroplating process, with a forward current density of 1.0–1.5 A / dm². 2 The reverse duty cycle is 25-35%.

[0057] As a preferred technical solution, the structure release step includes the following steps:

[0058] Wet stripping: Wet stripping is used, and hydrofluoric acid is used to remove the sacrificial layer.

[0059] Dry stripping: O2 plasma is used for ashing treatment to remove photoresist residue;

[0060] Mechanical polishing: Flatness is controlled by chemical mechanical polishing process, with an applied pressure range of 5-10 psi; the polishing slurry is a SiO2 suspension to ensure flatness error <1μm.

[0061] Corrosion resistance treatment: After electroplating a cobalt-containing gold layer on the nickel layer, heat treatment is carried out at 170℃~190℃ for 1~3 hours, and the contact resistance is <0.5Ω.

[0062] On the other hand, the present invention also provides a probe, processed according to the probe processing method described in any one of the preceding claims, the probe comprising:

[0063] The main body of the cantilever beam has a thickness of 20–200 μm;

[0064] A needle-like structure located at the end of a cantilever beam;

[0065] The surface roughness Ra of the probe is less than 0.1 μm.

[0066] The probe and its processing method provided by this invention have the following beneficial effects:

[0067] 1) The present invention provides a probe and its processing method, which can achieve stress-free cutting, avoid probe deformation or contamination, and produce smooth cutting edges without the need for additional polishing. There is almost no heat accumulation during the processing, avoiding material annealing or oxidation, reducing costs, and achieving stress-free, high-precision (error < ±2μm) probe processing with a surface roughness of Ra < 0.1μm, meeting the requirements of micron-level precision, and significantly improving the reliability and detection accuracy of the probe;

[0068] 2) This invention provides a probe and its processing method. In the probe MEMS processing method, in the structure release step, the sacrificial layer is removed by chemical or physical methods combined with cold ablation cutting to achieve stress-free cutting, avoiding deformation caused by mechanical peeling and ensuring the integrity of the probe structure. In the probe pre-structure forming step, the combination of deep silicon etching (DRIE) and metal etching processes can achieve dimensional accuracy at the ±1μm level, and the combination with photolithography patterning technology ensures the consistency of the probe structure. In the functional layer processing step, physical vapor deposition sputtering forms a nanoscale metal seed layer (such as Ti / Au) to avoid high-temperature oxidation. In the functional layer processing step, the surface roughness is reduced to Ra<0.1μm by grain refinement. A pulse is applied during the electroplating process. This step significantly increases the nucleus generation rate and inhibits grain growth by optimizing the crystallization process, thereby obtaining a fine and compact grain structure, refining the grain size to the submicron level, and improving the surface uniformity without the need for subsequent polishing.

[0069] In femtosecond laser processing, the ionization mechanism, specifically multiphoton ionization: when a femtosecond laser is focused onto a material surface, its ultra-high power density (≥10) 13 Multiphoton absorption (W / cm2) allows materials to absorb multiple photon energies in an extremely short time, directly ionizing them to form plasma. For example, for transparent materials (such as glass), multiphoton absorption can precisely sever molecular bonds without damaging the overall material structure. Tunneling ionization: Under a strong laser field, electrons in the material escape the atomic nucleus through quantum tunneling, forming a free electron gas. This process requires no heat accumulation and is suitable for conductive materials such as metals. Ultrashort pulse characteristics: The pulse width of a femtosecond laser (<100 fs) is much smaller than the thermal relaxation time of the material (picosecond to nanosecond scale), thus confining the energy to a very small area and preventing heat from diffusing into the surrounding material. For example, in glass cutting, the heat-affected zone (HAZ) of a femtosecond laser is only <10 μm with an aspect ratio >60, while traditional machining results in significant thermal deformation and edge burrs. Cold ablation effect: After plasma formation, the material is directly removed in an ionized gaseous state, rather than through the melting-solidification process of traditional methods. This "cold processing" characteristic results in smooth cutting edges without residual thermal stress.

[0070] Both sacrificial layer release and femtosecond laser non-contact processing methods for probe MEMS fabrication achieve stress-free cutting. Both processes avoid thermal effects (no annealing / oxidation), thus avoiding inherent defects such as probe deformation and material degradation caused by heat accumulation. No additional polishing is required, reducing overall costs. This enables stress-free, high-precision probe fabrication (error < ±2μm) with a surface roughness of Ra < 0.1μm, meeting the requirements for micron-level precision and significantly improving probe reliability and detection accuracy. Attached Figure Description

[0071] Figure 1This is a schematic diagram of the structure of a probe provided by the present invention;

[0072] Wherein, 1-probe; 2-needle tip. Detailed Implementation

[0073] The preferred embodiments of the present invention will now be described in detail with reference to the accompanying drawings.

[0074] like Figure 1 As shown, the present invention provides a method for fabricating a probe, comprising:

[0075] The probe MEMS fabrication method includes the following steps:

[0076] Patterning step: A probe structure pattern is formed on a substrate using a photolithography process, wherein the substrate includes a silicon substrate or a metal substrate;

[0077] Probe pre-structure forming steps: Deep silicon etching or metal etching is used to fabricate the probe pre-structure;

[0078] Functional layer processing steps: A metallic conductive layer is formed using physical vapor deposition and pulsed electroplating;

[0079] Structure release step: The sacrificial layer is removed by chemical or physical methods to complete the probe release and obtain the probe;

[0080] Alternatively, a femtosecond laser processing method may be used, including the following steps:

[0081] A femtosecond laser beam with a pulse width of <100 fs is focused onto the surface of the material to be processed;

[0082] With power density ≥10 13 W / cm 2 The mechanism by which femtosecond laser beams induce material ionization;

[0083] The material is removed by utilizing the plasma cold ablation effect, forming a cutting path to obtain a probe.

[0084] The pulse width is preferably 95fs, 90fs, 85fs, or 80fs. For space limitations and for the sake of brevity, this invention will not exhaustively list all the specific values ​​included in this range. The power density is preferably 10. 14 W / cm 2 10 15 W / cm 2 Or 10 16 W / cm 2 Due to space limitations and for the sake of brevity, this invention will not exhaustively list all the specific point values ​​included in the range.

[0085] This invention proposes a probe and its processing method, which can achieve stress-free cutting, avoid probe deformation or contamination, produce smooth cutting edges without additional polishing, and generate almost no heat accumulation during processing, thus avoiding material annealing or oxidation and reducing costs. It achieves stress-free, high-precision (error < ±2μm) probe processing with a surface roughness of Ra < 0.1μm, meeting the requirements of micron-level precision and significantly improving the reliability and detection accuracy of the probe.

[0086] Preferably, the ionization mechanism includes:

[0087] Multiphoton ionization: Transparent materials directly form plasma by simultaneously absorbing multiple photons;

[0088] Tunneling ionization: Conductive materials generate a free electron gas through the quantum tunneling effect;

[0089] The heat-affected zone generated by the ionization process has a thickness of <10μm, an aspect ratio of >60, and a cutting edge roughness Ra<0.1μm.

[0090] Preferably, the silicon substrate comprises: <100> A crystal-oriented single-crystal silicon wafer, wherein the thickness of the silicon substrate is 500–700 μm, and the metal substrate comprises: a rhenium-tungsten alloy or a beryllium-copper alloy; the rhenium-tungsten alloy comprises the following components by weight percentage:

[0091] Re: 1-5%;

[0092] W: 95-99%;

[0093] The thickness of the silicon substrate is preferably 500 μm, 600 μm or 700 μm. Due to space limitations and for the sake of brevity, the present invention will not exhaustively list the specific point values ​​included in the range.

[0094] The weight percentage of Re is preferably 1%, 3% or 5%. Due to space limitations and for the sake of brevity, the present invention will not exhaustively list the specific values ​​included in the range.

[0095] The weight percentage of W is preferably 95%, 97% or 99%. Due to space limitations and for the sake of brevity, the present invention will not exhaustively list the specific values ​​included in the range.

[0096] <100> The crystal orientation exhibits anisotropic characteristics during alkaline etching, preferentially forming regular cone structures along specific crystal planes, providing a uniform initial morphology for subsequent laser finishing and reducing processing difficulty. The thickness of the silicon substrate provides sufficient rigidity to resist vibration deformation during deep silicon etching and laser processing, ensuring a dimensional accuracy of ±2μm. The addition of rhenium to the rhenium-tungsten alloy improves the etchability of the alloy, optimizes the sidewall perpendicularity of the metal etching step, reduces the allowance for subsequent laser finishing, and resolves the contradiction between stress deformation, thermal damage, and mechanical properties in probe processing. This achieves polish-free cutting (Ra<0.1μm) and micron-level error control (≤±2μm), significantly improving probe reliability and detection repeatability.

[0097] Preferably, the sacrificial layer is a SiO2 thin film or SiN film deposited by plasma-enhanced chemical vapor deposition. X Thin film formation is performed, wherein the thickness of the sacrificial layer is 2–5 μm; preferably, the thickness of the sacrificial layer is 2 μm, 3.5 μm, or 5 μm. For space limitations and for the sake of brevity, the specific values ​​within this range will not be exhaustively listed. The sacrificial layer is deposited as a SiO2 thin film or SiN film via plasma-enhanced chemical vapor deposition (PECVD). X The design of the thin film and its thickness solves the problems of stress, contamination and thermal damage during the processing, directly supporting the high precision requirements of femtosecond laser finishing (surface roughness Ra<0.1μm, dimensional error ≤±2μm), and significantly improving probe reliability and detection accuracy.

[0098] Preferably, prior to the patterning step, the method further includes a surface treatment step on the silicon substrate, the surface treatment step comprising the following steps:

[0099] The substrate was cleaned at high temperature using a mixed solution of oxidizing acids to remove organic matter;

[0100] Use a fluorine-containing solution to remove the oxide layer on the substrate surface;

[0101] Enhance the surface activity of the substrate by vapor deposition of silane coupling agents to improve the adhesion of photoresist;

[0102] The three-step surface treatment process, through chemical purification, interface reconstruction, and molecular bonding, solves three core problems: substrate contamination, oxide layer interference, and insufficient adhesion. It provides an atomically clean and highly active interface for subsequent micron-level patterning (such as photolithography and etching), and is the cornerstone process for ensuring the accuracy of probe processing.

[0103] Preferably, in the surface treatment step:

[0104] The oxidizing acid mixture solution comprises sulfuric acid and hydrogen peroxide, with a volume ratio of (2.5–3.5):1. The high-temperature cleaning temperature is 110–130°C, and the high-temperature cleaning time is 7–13 minutes. The preferred volume ratio of sulfuric acid to hydrogen peroxide is 2.5:1, 3:1, or 3.5:1. For space limitations and for the sake of brevity, this invention will not exhaustively list all the specific values ​​within this range. The preferred high-temperature cleaning temperature is 110°C, 120°C, or 130°C. For space limitations and for the sake of brevity, this invention will not exhaustively list all the specific values ​​within this range. The preferred high-temperature cleaning time is 7 minutes, 10 minutes, or 13 minutes. For space limitations and for the sake of brevity, this invention will not exhaustively list all the specific values ​​within this range.

[0105] The fluorine-containing solution is a diluted hydrofluoric acid solution with a concentration of 3-7 wt%. The concentration of the fluorine-containing solution is preferably 3 wt%, 5 wt%, or 7 wt%. Due to space limitations and for the sake of brevity, the present invention will not exhaustively list the specific values ​​included in the range.

[0106] The silane coupling agent is hexamethyldisilazane or its derivative; the vapor deposition temperature is 100–150°C; and the vapor deposition time is 20–40 seconds. Preferably, the vapor deposition temperature is 100°C, 130°C, or 150°C. For space limitations and for the sake of brevity, this invention will not exhaustively list all specific values ​​within these ranges. Similarly, the vapor deposition time is 20 seconds, 30 seconds, or 40 seconds. For space limitations and for the sake of brevity, this invention will not exhaustively list all specific values ​​within these ranges.

[0107] The preferred oxidizing acid mixture solution is a mixture of hydrogen peroxide (H2O2) and sulfuric acid (H2SO4). At high temperatures, hydrogen peroxide (H2O2) decomposes to generate hydroxyl radicals (·OH), which, in conjunction with sulfuric acid (H2SO4), oxidize carbon-hydrogen bonds, completely decomposing organic contaminants (such as grease and photoresist residues) into CO2 or H2O, thus eliminating the risk of photoresist detachment. The oxidizing environment causes the silicon substrate to form a dense hydroxyl (-OH) layer, increasing surface energy and providing active sites for subsequent anchoring of silane coupling agents.

[0108] The preferred fluorine-containing solution is hydrofluoric acid (HF). Hydrofluoric acid (HF) selectively etches the silicon native oxide layer (SiO2), avoiding excessive etching of the substrate and exposing a uniform Si-H terminal surface. The Si-H terminals ensure a contact angle >80°, inhibiting developer penetration and reducing serrations at the edges of the photolithographic pattern (edge ​​roughness <10nm).

[0109] Silane coupling agents (hexamethyldisilazane or its derivatives) hydrolyze into trimethylsiloxane (-OSi(CH3)3) in the high-temperature gas phase, forming Si-O-Si covalent bonds with the substrate -OH, achieving monolayer coverage. This solves the problems of insufficient adhesion and interface defects in the photolithography process, and directly ensures the reliability of high-resolution pattern transfer.

[0110] Preferably, the graphical step includes the following steps:

[0111] Coating steps: Photoresist is spin-coated onto the surface of the substrate after surface treatment to form a film of the target thickness, followed by soft baking.

[0112] Exposure steps: Select a deep ultraviolet light source or an electron beam to irradiate the patterned area with energy;

[0113] Development step: Dissolve the photoresist in the exposed or unexposed areas using the appropriate developer;

[0114] The coating, exposure, and development steps work together to achieve high-fidelity pattern transfer, providing a precise mask for etching or ion implantation.

[0115] Preferably, the photoresist film in the coating step comprises: a positive photoresist or a negative photoresist; the positive photoresist is spin-coated at a speed of 3000–5000 rpm to form a film with a thickness of 1–2 μm, and its soft-baking temperature is 90–100°C for 1–2 minutes; the negative photoresist is spin-coated at a speed of 1000–3000 rpm to form a film with a thickness of 5–100 μm, and its soft-baking temperature is 90–100°C for 3–7 minutes; the positive photoresist… The spin coating speed is preferably 3000 rpm, 4000 rpm, or 5000 rpm. For space limitations and for the sake of brevity, this invention will not exhaustively list all specific values ​​within this range. The thickness of the positive photoresist film is preferably 1 μm, 1.5 μm, or 2 μm. For space limitations and for the sake of brevity, this invention will not exhaustively list all specific values ​​within this range. The soft baking temperature of the positive photoresist is preferably 90℃, 95℃, or 100℃. For space limitations and for the sake of brevity, this invention will not exhaustively list all specific values ​​within this range. The invention will not exhaustively list all specific values ​​included in the range; the soft baking time of the positive photoresist is preferably 1 minute, 1.5 minutes, or 2 minutes, but for space limitations and for the sake of brevity, the invention will not exhaustively list all specific values ​​included in the range; the spin coating speed of the negative photoresist is preferably 1000 rpm, 2000 rpm, or 3000 rpm, but for space limitations and for the sake of brevity, the invention will not exhaustively list all specific values ​​included in the range; the film thickness of the negative photoresist is preferably 5 mm. μm, 47μm, or 100μm; for space limitations and for the sake of brevity, this invention will not exhaustively list the specific values ​​included in the range; the soft baking temperature of the negative photoresist is preferably 90℃, 95℃, or 100℃; for space limitations and for the sake of brevity, this invention will not exhaustively list the specific values ​​included in the range; the soft baking time of the negative photoresist is preferably 3 minutes, 5 minutes, or 7 minutes; for space limitations and for the sake of brevity, this invention will not exhaustively list the specific values ​​included in the range.

[0116] The exposure energy of the deep ultraviolet light source or electron beam exposure in the exposure step is 100–300 mJ / cm². 2 The exposure energy of the deep ultraviolet light source or electron beam exposure in the exposure step is preferably 100 mJ / cm². 2 200mJ / cm 2 or 300mJ / cm 2 Due to space limitations and for the sake of brevity, this invention will not exhaustively list all the specific point values ​​included in the range.

[0117] The development step includes: using an alkaline developer for positive photoresist with a concentration of 1-5 wt% and a development time of 60-90 seconds; or using an organic developer for negative photoresist with a development time of 2-5 minutes; the alkaline developer is preferably tetramethylammonium hydroxide (TMAH), with a concentration preferably of 1 wt%, 2.38 wt%, or 5 wt%. For space limitations and for the sake of brevity, the specific values ​​within the range are not exhaustively listed here. The development time is preferably 60 seconds, 75 seconds, or 90 seconds. For space limitations and for the sake of brevity, the specific values ​​within the range are not exhaustively listed here. The organic developer is preferably SU-8 developer, with a development time preferably of 2 minutes, 3.5 minutes, or 5 minutes. For space limitations and for the sake of brevity, the specific values ​​within the range are not exhaustively listed here.

[0118] The three steps of coating, exposure, and development work together to achieve: ① matching the photoresist film thickness with the pattern resolution; ② precisely controlling the latent image quality with exposure energy; ③ ensuring the fidelity of pattern transfer through selective development, supporting the requirements of probe miniaturization and 3D integration.

[0119] Preferably, the probe pre-structure forming step includes the following steps:

[0120] Deep silicon etching step: The silicon substrate is etched using an alternating process of introducing etching gas and passivation gas;

[0121] The deep silicon etching step specifically includes the following steps:

[0122] Alternately introduce fluorine-containing etching gas and carbon fluoride-containing passivation gas;

[0123] An inductively coupled plasma source power of 800–1000W and an radio frequency bias voltage of 10–20W are applied. The inductively coupled plasma source power is preferably 800W, 900W, or 1000W. Due to space limitations and for the sake of brevity, the present invention will not exhaustively list the specific values ​​included in the range. The inductively coupled plasma radio frequency bias voltage is preferably 10W, 15W, or 20W. Due to space limitations and for the sake of brevity, the present invention will not exhaustively list the specific values ​​included in the range.

[0124] The reaction pressure is maintained at 10–20 mTorr, and the temperature is controlled within the range of -200°C to -100°C. The preferred reaction pressure is 10 mTorr, 15 mTorr, or 20 mTorr. Due to space limitations and for the sake of brevity, this invention will not exhaustively list the specific values ​​included in the range. The preferred temperature control is within the range of -200°C, -150°C, or -100°C. Due to space limitations and for the sake of brevity, this invention will not exhaustively list the specific values ​​included in the range.

[0125] The deep silicon etching rate is 4–6 μm / min, the sidewall perpendicularity is 89°–91°, and the surface roughness is ≤100 nm. The preferred deep silicon etching rate is 4 μm / min, 5 μm / min, or 6 μm / min. For space limitations and for the sake of brevity, this invention will not exhaustively list all the specific values ​​included in the range. The preferred sidewall perpendicularity is 89°, 90°, or 91°. For space limitations and for the sake of brevity, this invention will not exhaustively list all the specific values ​​included in the range. The preferred surface roughness is 100 nm, 90 nm, or 80 nm. For space limitations and for the sake of brevity, this invention will not exhaustively list all the specific values ​​included in the range.

[0126] Metal etching step: Selective etching of the metal substrate using wet or dry processes, wherein the wet process includes the following steps:

[0127] Wet etching: Treatment is performed using an alkaline solution at a temperature of 60–100°C. The concentration of the alkaline solution is 20%–40%, and the metal etching rate is 0.5–1 μm / min. The alkaline solution is preferably a KOH solution. Treatment is preferably performed at 60°C, 80°C, or 100°C. For space limitations and for the sake of brevity, this invention will not exhaustively list all the specific values ​​included in the range. The concentration of the alkaline solution is preferably 20%, 30%, or 40%. For space limitations and for the sake of brevity, this invention will not exhaustively list all the specific values ​​included in the range. The metal etching rate is preferably 0.5 μm / min, 0.8 μm / min, or 1 μm / min. For space limitations and for the sake of brevity, this invention will not exhaustively list all the specific values ​​included in the range.

[0128] The dry process includes the following steps:

[0129] Dry etching: A halogen-based reactive gas is used, with an applied power of 50-100W and an applied pressure of 40-60 mTorr. The halogen-based reactive gas is preferably a mixture of Cl2 and O2, with a volume ratio of Cl2 to O2 of 1:1. The applied power is preferably 50W, 75W, or 100W. Due to space limitations and for the sake of brevity, this invention will not exhaustively list the specific values ​​included in the range. The applied pressure is preferably 40mTorr, 50mTorr, or 60mTorr. Due to space limitations and for the sake of brevity, this invention will not exhaustively list the specific values ​​included in the range.

[0130] The two-step process of deep silicon etching and metal etching enables the synchronous formation of a high aspect ratio cavity in the silicon substrate (and the metal functional layer, achieving three-dimensional heterogeneous integration); it also ensures micro-nano scale precision, with sidewall perpendicularity >89° and metal linewidth error <±5%, supporting the stability of the probe's mechanical and electrical properties; at the same time, it suppresses cross-process damage, with low-temperature dry etching avoiding thermal stress and wet etching protecting the brittle silicon microstructure; this process chain enables the probe to have both high mechanical strength (deep silicon framework) and precise electrical signal conduction capability (metal electrode), making it suitable for the manufacture of precision devices such as biomedical microneedles and MEMS probes.

[0131] Preferably, the functional layer processing steps specifically include the following steps:

[0132] A Ti and Au bilayer seed layer is sputtered on the surface of the probe prestructure. The thickness of the Ti layer is 40-60 nm and the thickness of the Au layer is 180-220 nm. The thickness of the Ti layer is preferably 40 nm, 50 nm or 60 nm. Due to space limitations and for the sake of brevity, the present invention will not exhaustively list the specific values ​​included in the range. The thickness of the Au layer is preferably 180 nm, 200 nm or 220 nm. The sputtering power is preferably 100 W and the argon flow rate is preferably 20 sccm.

[0133] A nickel layer is electroplated onto the seed layer using a nickel sulfamate electrolyte at a current density of 2–5 A / dm³. 2 Temperature 45–55℃, nickel layer thickness 5–10 μm, and preferred current density 2 A / dm 2 3A / dm 2 Or 5A / dm 2 For the sake of brevity and space limitations, this invention will not exhaustively list all the specific values ​​included in the range. The preferred temperature is 45°C, 50°C, or 55°C. For the sake of brevity and space limitations, this invention will not exhaustively list all the specific values ​​included in the range. The preferred nickel layer thickness is 5μm, 8μm, or 10μm. For the sake of brevity and space limitations, this invention will not exhaustively list all the specific values ​​included in the range.

[0134] A cobalt-containing gold layer is electroplated onto the nickel layer using a cyanide gold plating solution with a cobalt content of 0.2–0.8 wt% and a current density of 0.8–2.5 A / dm³. 2 The cobalt-containing gold layer has a thickness of 0.5–1 μm, and the cobalt content is preferably 0.2 wt%, 0.3 wt%, 0.5 wt%, and 0.8 wt%. For space limitations and for the sake of brevity, the specific values ​​within these ranges will not be exhaustively listed here. The current density is preferably 0.8 A / dm³. 2 1A / dm 2 2A / dm 2 and 2.5A / dm 2Due to space limitations and for the sake of brevity, this invention will not exhaustively list the specific values ​​included in the range; the preferred thickness of the cobalt-containing gold layer is 0.5μm, 0.8μm and 1μm. Due to space limitations and for the sake of brevity, this invention will not exhaustively list the specific values ​​included in the range.

[0135] A pulsed current is applied during the electroplating process, with a forward current density of 1.0–1.5 A / dm². 2 The reverse duty cycle is 25-35%, and the preferred reverse current density is 1.0 A / dm². 2 1.2A / dm 2 and 1.5A / dm 2 Due to space limitations and for the sake of brevity, this invention will not exhaustively list all the specific point values ​​included in the range; the reverse duty cycle is preferably 25%, 30%, and 35%, which improves the uniformity of the coating.

[0136] As a preferred technical solution, the structure release step includes the following steps:

[0137] Wet stripping: A wet stripping method is used, in which hydrofluoric acid is used to remove the sacrificial layer. The concentration of hydrofluoric acid is preferably 5%.

[0138] Dry stripping: O2 plasma is used for ashing treatment, with a power of 100W and a time of 30 seconds, to remove photoresist residue;

[0139] Mechanical polishing: Flatness is controlled by chemical mechanical polishing process, with an applied pressure range of 5-10 psi; the polishing slurry is a SiO2 suspension to ensure flatness error <1μm.

[0140] Anti-corrosion treatment:

[0141] After electroplating a cobalt-containing gold layer on the nickel layer, heat treatment is performed at 170°C to 190°C for 1 to 3 hours to achieve a contact resistance of <0.5Ω. Preferably, after electroplating a cobalt-containing gold layer on the nickel layer, heat treatment is performed at 180°C for 2 hours to increase the hardness by 15%.

[0142] On the other hand, such as Figure 1 As shown, the present invention also provides a probe, which is processed according to the probe processing method described in any of the preceding claims, wherein the probe 1 comprises:

[0143] The thickness of the cantilever beam body is 20-200 μm, preferably 20 μm, 100 μm or 200 μm. Due to space limitations and for the sake of brevity, the present invention will not exhaustively list the specific point values ​​included in the range.

[0144] A needle-like structure located at the end of a cantilever beam;

[0145] The surface roughness Ra of the probe is less than 0.1 μm.

[0146] The micron-level cantilever beam thickness design enables the probe to combine high flexibility (detection limit down to the pN level) with anti-interference capabilities, optimizing nanomechanical sensing;

[0147] The probe 1 provided in this application can accurately characterize everything from biomacromolecules (such as protein conformational changes) to metal precipitates (<2nm clusters), expanding cross-scale applications.

[0148] Example 1

[0149] This invention provides a method for fabricating a probe, comprising: a probe MEMS fabrication method, the probe MEMS fabrication method comprising the following steps:

[0150] Substrate selection step: Select a silicon substrate and form a sacrificial layer on the substrate surface, wherein the silicon substrate is... <100> A crystal-oriented single-crystal silicon wafer, wherein the thickness of the silicon substrate is 600 μm, and the sacrificial layer is formed by plasma-enhanced chemical vapor deposition of SiO2 thin film, wherein the thickness of the sacrificial layer is 3.5 μm;

[0151] The surface treatment step involves cleaning the substrate at a high temperature of 120°C for 10 minutes using a mixed oxidizing acid solution to remove organic matter. The mixed oxidizing acid solution consists of sulfuric acid and hydrogen peroxide in a volume ratio of 3:1. A diluted hydrofluoric acid solution with a concentration of 5 wt% is then used to remove the oxide layer on the substrate surface. Finally, hexamethyldisilazane is deposited in a vapor phase to enhance the surface activity of the substrate and thus improve the adhesion of the photoresist. The vapor phase deposition temperature is 130°C, and the deposition time is 30 seconds.

[0152] Patterning step: A probe structure pattern is formed on the substrate using photolithography. The patterning step specifically includes the following steps:

[0153] Coating step: Positive photoresist is spin-coated onto the surface of the substrate after surface treatment to form a film of the target thickness, followed by soft baking. The spin-coating speed of the positive photoresist is 4000 rpm, forming a film with a thickness of 1.5 μm. The soft baking temperature is 95℃ and the soft baking time is 1.5 minutes.

[0154] Exposure step: Select a deep ultraviolet light source to irradiate the patterned area, wherein the exposure energy of the deep ultraviolet light source in the exposure step is 180 mJ / cm². 2 ;

[0155] Development step: Dissolve the photoresist in the exposed or unexposed areas using the corresponding developer. For positive photoresist, tetramethylammonium hydroxide (TMAH) is preferred, with a concentration of 2.38 wt% and a development time of 75 seconds.

[0156] The probe pre-structure forming step involves deep silicon etching to fabricate the probe pre-structure. This deep silicon etching is performed using a Bosch etching machine. The specific steps of the probe pre-structure forming step include:

[0157] The etching gas containing fluorine and the passivation gas containing fluoride carbon are alternately introduced. The fluorine-containing etching gas is preferably SF6, and the passivation gas containing fluoride carbon is preferably C4F8.

[0158] An inductively coupled plasma source power of 900W and an RF bias voltage of 15W were applied.

[0159] Maintain the reaction pressure at 15 mTorr and control the temperature within the range of -150℃;

[0160] The deep silicon etching rate is 5 μm / min, the sidewall perpendicularity is 90°, and the surface roughness is 100 nm.

[0161] Functional layer processing steps: A Ti and Au double seed layer is sputtered on the probe prestructure surface. The thickness of the Ti layer is 50 nm and the thickness of the Au layer is 200 nm. The sputtering power is preferably 100 W and the argon flow rate is preferably 20 sccm.

[0162] A nickel layer was electroplated onto the seed layer using a nickel sulfamate electrolyte at a current density of 3 A / dm³. 2 The temperature was 50℃ and the nickel layer thickness was 8μm;

[0163] A cobalt-containing gold layer was electroplated onto the nickel layer using a cyanide gold plating solution with a cobalt content of 0.5 wt% and a current density of 2 A / dm³. 2 The cobalt-containing gold layer has a thickness of 0.8 μm;

[0164] A pulsed current is applied during the electroplating process, with a forward current density of 1.2 A / dm². 2 The reverse duty cycle is 30%, which improves the uniformity of the coating.

[0165] The structure release procedure includes the following steps:

[0166] Wet stripping: A wet stripping method is used, in which hydrofluoric acid is used to remove the sacrificial layer. The concentration of hydrofluoric acid is preferably 5%.

[0167] Dry stripping: O2 plasma is used for ashing treatment, with a power of 100W and a time of 30 seconds, to remove photoresist residue;

[0168] Mechanical polishing: Flatness is controlled by chemical mechanical polishing process, with an applied pressure range of 5-10 psi; the polishing slurry is a SiO2 suspension to ensure flatness error <1μm.

[0169] Corrosion resistance treatment: After electroplating a cobalt-containing gold layer on the nickel layer, heat treatment is carried out at 180°C for 2 hours, which increases the hardness by 15% and reduces the contact resistance to <0.5Ω.

[0170] The present invention also provides a probe, which is processed according to the probe processing method described in any one of the preceding claims, the probe comprising:

[0171] The main body of the cantilever beam has a thickness of 20μm;

[0172] A needle-like structure located at the end of a cantilever beam;

[0173] The surface roughness Ra of the probe is 0.08 μm.

[0174] This embodiment 1 proposes a probe and its processing method, which can achieve stress-free cutting, avoid probe deformation or contamination, produce smooth cutting edges without additional polishing, and generate almost no heat accumulation during processing, thus avoiding material annealing or oxidation, reducing costs. It achieves stress-free, high-precision (error < ±2μm) probe processing with a surface roughness of Ra < 0.1μm, meeting the requirements of micron-level precision and significantly improving the reliability and detection accuracy of the probe.

[0175] Example 2

[0176] This invention provides a method for fabricating a probe, comprising: a probe MEMS fabrication method, the probe MEMS fabrication method comprising the following steps:

[0177] Substrate selection step: Select a metal substrate and form a sacrificial layer on the substrate surface, wherein the metal substrate is a rhenium-tungsten alloy; the rhenium-tungsten alloy is composed of the following components by weight percentage: Re: 3% and W: 97%, the sacrificial layer is formed by plasma-enhanced chemical vapor deposition of SiO2 thin film, and the thickness of the sacrificial layer is 3.5 μm;

[0178] Patterning step: A probe structure pattern is formed on the substrate using photolithography. The patterning step specifically includes the following steps:

[0179] Coating step: After surface treatment, negative photoresist is spin-coated onto the substrate surface to form a film of the target thickness, followed by soft baking. The spin coating speed of the negative photoresist is 2000 rpm, forming a film with a thickness of 47 μm. The soft baking temperature is 95℃ and the soft baking time is 5 minutes.

[0180] Exposure step: Select a deep ultraviolet light source to irradiate the patterned area, wherein the exposure energy of the deep ultraviolet light source in the exposure step is 180 mJ / cm². 2 ;

[0181] Development step: Dissolve the photoresist in the exposed or unexposed areas using the corresponding developer. For negative photoresist, SU-8 developer is preferred, and the development time is 3.5 minutes.

[0182] The probe pre-structure forming step involves metal etching to fabricate the probe pre-structure, specifically including the following steps:

[0183] Wet etching: The metal is etched at 80°C using a KOH solution with a concentration of 30% at a rate of 0.8 μm / min.

[0184] Dry etching: using a halogen-based reactive gas, with an applied power of 75W and an applied pressure of 50mTorr, the halogen-based reactive gas is preferably a mixture of Cl2 and O2, with a volume ratio of Cl2 to O2 of 1:1.

[0185] Functional layer processing steps: A Ti and Au double seed layer is sputtered on the probe prestructure surface. The thickness of the Ti layer is 50 nm and the thickness of the Au layer is 200 nm. The sputtering power is preferably 100 W and the argon flow rate is preferably 20 sccm.

[0186] A nickel layer was electroplated onto the seed layer using a nickel sulfamate electrolyte at a current density of 3 A / dm³. 2 The temperature was 50℃ and the nickel layer thickness was 8μm;

[0187] A cobalt-containing gold layer was electroplated onto the nickel layer using a cyanide gold plating solution with a cobalt content of 0.5 wt% and a current density of 2 A / dm³. 2 The cobalt-containing gold layer has a thickness of 0.8 μm;

[0188] A pulsed current is applied during the electroplating process, with a forward current density of 1.2 A / dm². 2 The reverse duty cycle is 30%, which improves the uniformity of the coating.

[0189] The structure release procedure includes the following steps:

[0190] Wet stripping: A wet stripping method is used, in which hydrofluoric acid is used to remove the sacrificial layer. The concentration of hydrofluoric acid is preferably 5%.

[0191] Dry stripping: O2 plasma is used for ashing treatment, with a power of 100W and a time of 30 seconds, to remove photoresist residue;

[0192] Mechanical polishing: Flatness is controlled by chemical mechanical polishing process, with an applied pressure range of 5-10 psi; the polishing slurry is a SiO2 suspension to ensure flatness error <1μm.

[0193] Corrosion resistance treatment: After electroplating a cobalt-containing gold layer on the nickel layer, heat treatment is carried out at 180°C for 2 hours, which increases the hardness by 15% and reduces the contact resistance to <0.5Ω.

[0194] The present invention also provides a probe, which is processed according to the probe processing method described in any one of the preceding claims, the probe comprising:

[0195] The main body of the cantilever beam has a thickness of 20μm;

[0196] A needle-like structure located at the end of a cantilever beam;

[0197] The surface roughness Ra of the probe is 0.07 μm.

[0198] This embodiment 2 proposes a probe and its processing method, which can achieve stress-free cutting, avoid probe deformation or contamination, produce smooth cutting edges without additional polishing, and generate almost no heat accumulation during processing, thus avoiding material annealing or oxidation, reducing costs. It achieves stress-free, high-precision (error < ±2μm) probe processing with a surface roughness of Ra < 0.1μm, meeting the requirements of micron-level precision and significantly improving the reliability and detection accuracy of the probe.

[0199] Example 3

[0200] Example 3 provides a probe fabrication method, including: a femtosecond laser fabrication method, wherein the femtosecond laser fabrication method includes the following steps:

[0201] A femtosecond laser beam with a pulse width of 90 fs is focused onto the surface of a transparent material;

[0202] Through power density 10 14 W / cm 2 A femtosecond laser beam induces ionization in the material;

[0203] The ionization includes:

[0204] Multiphoton ionization: Transparent materials directly form plasma by simultaneously absorbing multiple photons;

[0205] Glass is the preferred transparent material;

[0206] The heat-affected zone generated by the ionization process has a thickness of 8.2 μm, an aspect ratio >60, and a cutting edge roughness Ra <0.1 μm;

[0207] The material is removed by utilizing the plasma cold ablation effect, forming a cutting path to obtain a probe.

[0208] The present invention also provides a probe, which is processed according to the probe processing method described in any one of the preceding claims, the probe comprising:

[0209] The main body of the cantilever beam has a thickness of 80μm;

[0210] A needle-like structure located at the end of a cantilever beam;

[0211] The surface roughness Ra of the probe is 0.085 μm.

[0212] This embodiment 3 proposes a probe and its processing method, which can achieve stress-free cutting, avoid probe deformation or contamination, produce smooth cutting edges without additional polishing, and generate almost no heat accumulation during processing, thus avoiding material annealing or oxidation, reducing costs. It achieves stress-free, high-precision (error < ±2μm) probe processing with a surface roughness of Ra < 0.1μm, meeting the requirements of micron-level precision and significantly improving the reliability and detection accuracy of the probe.

[0213] Example 4

[0214] Example 4 provides a probe fabrication method, including: a femtosecond laser fabrication method, wherein the femtosecond laser fabrication method includes the following steps:

[0215] A femtosecond laser beam with a pulse width of 93 fs is focused onto the surface of a conductive material;

[0216] Through power density 10 13 W / cm 2 A femtosecond laser beam induces ionization in the material;

[0217] The ionization includes:

[0218] Tunneling ionization: Conductive materials generate a free electron gas through the quantum tunneling effect;

[0219] The roughness of the cut edge Ra is less than 0.1 μm;

[0220] The material is removed by utilizing the plasma cold ablation effect, forming a cutting path to obtain a probe.

[0221] The present invention also provides a probe, which is processed according to the probe processing method described in any one of the preceding claims, the probe comprising:

[0222] The main body of the cantilever beam has a thickness of 85μm;

[0223] Needle-shaped structure at the end of the cantilever beam

[0224] The surface roughness Ra of the probe is 0.09 μm.

[0225] This embodiment 4 proposes a probe and its processing method, which can achieve stress-free cutting, avoid probe deformation or contamination, produce smooth cutting edges without additional polishing, and generate almost no heat accumulation during processing, thus avoiding material annealing or oxidation, reducing costs. It achieves stress-free, high-precision (error < ±2μm) probe processing with a surface roughness of Ra < 0.1μm, meeting the requirements of micron-level precision and significantly improving the reliability and detection accuracy of the probe.

[0226] It is understood that this invention has been described through some embodiments, and those skilled in the art will recognize that various changes or equivalent substitutions can be made to these features and embodiments without departing from the spirit and scope of this invention. Furthermore, under the teachings of this invention, these features and embodiments can be modified to adapt to specific situations and materials without departing from the spirit and scope of this invention. Therefore, this invention is not limited to the specific embodiments disclosed herein, and all embodiments falling within the scope of the claims of this application are protected by this invention. Furthermore, under the teachings of this invention, these features and embodiments can be modified to adapt to specific situations and materials without departing from the spirit and scope of this invention. Therefore, this invention is not limited to the specific embodiments disclosed herein, and all embodiments falling within the scope of the claims of this application are within the scope of protection of this invention.

Claims

1. A method for fabricating a probe, characterized in that, include: The probe MEMS fabrication method includes the following steps: Patterning step: A probe structure pattern is formed on a substrate using a photolithography process; the substrate includes a silicon substrate or a metal substrate, and the surface of the substrate has a sacrificial layer; Probe pre-structure forming steps: Deep silicon etching or metal etching is used to fabricate the probe pre-structure; Functional layer processing steps: A metallic conductive layer is formed using physical vapor deposition and pulsed electroplating; Structure release step: The sacrificial layer is removed by chemical or physical methods to complete the probe release and obtain the probe; The silicon substrate includes: <100> A crystal-oriented single-crystal silicon wafer, wherein the thickness of the silicon substrate is 500–700 μm, and the metal substrate comprises: a rhenium-tungsten alloy or a beryllium-copper alloy; the rhenium-tungsten alloy comprises the following components by weight percentage: Re: 1-5%; W： 95～99%； The sacrificial layer is formed by plasma-enhanced chemical vapor deposition of SiO2 thin film or SiN. X A thin film is formed, wherein the thickness of the sacrificial layer is 2–5 μm; The functional layer processing steps specifically include the following steps: A Ti and Au double seed layer is sputtered on the surface of the probe prestructure, with the Ti layer having a thickness of 40-60 nm and the Au layer having a thickness of 180-220 nm. A nickel layer is electroplated onto the seed layer using a nickel sulfamate electrolyte at a current density of 2–5 A / dm³. 2 Temperature 45–55℃, nickel layer thickness 5–10 μm; A cobalt-containing gold layer is electroplated onto the nickel layer using a cyanide gold plating solution with a cobalt content of 0.2–0.8 wt% and a current density of 0.8–2.5 A / dm³. 2 The cobalt-containing gold layer is 0.5–1 μm thick; A pulsed current is applied during the electroplating process, with a forward current density of 1.0–1.5 A / dm³. 2 The reverse duty cycle is 25-35%.

2. The probe fabrication method according to claim 1, characterized in that, The graphical process includes the following steps: Coating step: Spin-coat photoresist onto the surface of the surface-treated substrate to form a film of the target thickness, followed by soft baking; Exposure steps: Select a deep ultraviolet light source or an electron beam to irradiate the patterned area with energy; Development step: Dissolve the photoresist in the exposed or unexposed areas using the corresponding developer.

3. The probe fabrication method according to claim 2, characterized in that, The coating step involves a photoresist or a negative photoresist. The positive photoresist is spin-coated at 3000–5000 rpm to form a film with a thickness of 1–2 μm, and its soft-baking temperature is 90–100°C for 1–2 minutes. The negative photoresist is spin-coated at 1000–3000 rpm to form a film with a thickness of 5–100 μm, and its soft-baking temperature is 90–100°C for 3–7 minutes. The exposure energy of the deep ultraviolet light source or electron beam exposure in the exposure step is 100-300 mJ / cm². The development step includes: using an alkaline developer with a concentration of 1-5 wt% for positive photoresist and a development time of 60-90 seconds; or using an organic developer for negative photoresist and a development time of 2-5 minutes.

4. The probe fabrication method according to claim 1, characterized in that, The probe pre-structure forming step includes the following steps: Deep silicon etching step: The silicon substrate is etched using an alternating process of introducing etching gas and passivation gas; The deep silicon etching step specifically includes the following steps: Alternately introduce fluorine-containing etching gas and carbon fluoride-containing passivation gas; Apply an inductively coupled plasma source power of 800–1000 W and an RF bias voltage of 10–20 W; Maintain the reaction pressure at 10–20 mTorr and control the temperature within the range of -200℃ to -100℃; Deep silicon etching rate 4–6 μm / min, sidewall perpendicularity 89°–91°, surface roughness ≤100 nm; Metal etching steps: Selective etching of the metal substrate is performed using wet or dry processes. The wet process includes the following steps: Wet etching: The metal is etched at a temperature of 60–100°C using an alkaline solution with a concentration of 20%–40% and an etching rate of 0.5–1 μm / min. The dry process includes the following steps: Dry etching: using halogen-based reactive gases, with an applied power of 50–100 W and an applied pressure of 40–60 mTorr.

5. The probe fabrication method according to claim 1, characterized in that, The structure release step includes the following steps: Wet stripping: A wet stripping method is used, employing hydrofluoric acid treatment to remove the sacrificial layer; Dry stripping: O2 plasma is used for ashing treatment to remove photoresist residue; Mechanical polishing: Flatness is controlled by chemical mechanical polishing process, with an applied pressure range of 5-10 psi; the polishing slurry is a SiO2 suspension to ensure flatness error <1μm. Corrosion resistance treatment: After electroplating a cobalt-containing gold layer on the nickel layer, heat treatment is carried out at 170℃~190℃ for 1~3 hours, and the contact resistance is <0.5Ω.

6. A probe, characterized in that, The probe is fabricated according to the fabrication method of any one of claims 1-5, wherein the probe comprises: The main body of the cantilever beam has a thickness of 20–200 μm; A needle-like structure located at the end of a cantilever beam; The surface roughness Ra of the probe is less than 0.1 μm.

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