Test unit and test method
Patent Information
- Application Number
- CN202410391680.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2024-04-02
- Publication Date
- 2026-08-18
- Estimated Expiration
- 2044-04-02
AI Technical Summary
然而,当平行于沟道方向的栅极层内边与有源层距离较小时,栅极层与有源层之间的电容增大,导致信号传输速度下降
[0015] According to one embodiment of this application, the active component is made of monocrystalline silicon, and the gate imitation component is made of polycrystalline silicon.
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Figure CN120779193B_ABST
Abstract
Description
Technical Field
[0001] This application belongs to the field of semiconductor technology, and in particular relates to a test unit and a test method. Background Technology
[0002] Multi-finger MOS (Multi-finger Metal-Oxide-Semiconductor Field-Effect Transistor), hereinafter referred to as multi-finger MOS transistor, is widely used in integrated circuit layout design. However, when the distance between the inner edge of the gate layer parallel to the channel direction and the active layer is small, the capacitance between the gate layer and the active layer increases, leading to a decrease in signal transmission speed. During manufacturing, alignment errors between photomasks may further reduce the distance between the inner edge of the gate layer and the active layer, increasing leakage current and potentially negatively impacting device power consumption and reliability. Currently, the distance between the inner edge of the gate layer and the active layer is usually selected empirically, which may negatively affect device performance in practical applications due to an inappropriate selection of distance. Summary of the Invention
[0003] This application aims to address at least one of the technical problems existing in the prior art. To this end, this application proposes a test unit and test method, which can reflect the leakage current of a MOSFET device with a corresponding test spacing by detecting the current of the simulated structure, providing a reference for the design of MOSFET devices and facilitating the improvement of MOSFET device performance.
[0004] Firstly, this application provides a test unit, including:
[0005] The replica structure includes an active component and a gate replica component, which are located on different layers. The gate replica component has a first part, and the first orthographic projection of the first part on the plane where the active component is located is spaced apart from the first region where the active component is located. The two sides opposite to the first orthographic projection and the first region are parallel and have a spacing to be measured.
[0006] The first conductive component is connected to the active component;
[0007] The second conductive element is connected to the gate replica element;
[0008] The detection unit is connected to the first conductive element and the second conductive element respectively, and is configured to apply a test voltage to the first conductive element and the second conductive element, and detect the current flowing through the first conductive element and the second conductive element.
[0009] According to the test unit of this application, the distance to be measured between the first orthographic projection and the two opposite sides of the first region simulates the distance between the gate device and the active device in the MOS transistor device. By detecting the current of the simulated structure, the leakage current of the MOS transistor device under the corresponding distance to be measured can be reflected, providing a reference for the design of the MOS transistor device and facilitating the improvement of the performance of the MOS transistor device.
[0010] According to one embodiment of this application, the test unit includes multiple replica structures, wherein the active component in each replica structure is connected to a first conductive component, and the gate replica component in each replica structure is connected to a second conductive component.
[0011] According to one embodiment of this application, multiple replica structures are arranged in an array. The first conductive element includes a first main branch extending along the row direction and multiple first branches extending along the column direction. The first main branch is connected to each of the first branches. The second conductive element includes a second main branch extending along the row direction and multiple second branches extending along the column direction. The second main branch is connected to each of the second branches. The active element in each column of replica structures is connected to the corresponding first branch, and the gate replica element in each column of replica structures is connected to the corresponding second branch.
[0012] According to one embodiment of this application, the test unit includes multiple replica structures, which are divided into multiple test groups. Each test group includes at least one replica structure. The test spacing within each test group is the same, while the test spacing between test groups is different. The number of first conductive elements and second conductive elements is the same as the number of test groups, and each first conductive element and each second conductive element is connected to each corresponding test group.
[0013] According to one embodiment of this application, the gate stencil has a second part, the extension direction of the first part is perpendicular to the extension direction of the second part, the first part is connected to the second part, and the second orthographic projection of the second part on the plane where the active element is located partially overlaps with the first region where the active element is located.
[0014] According to one embodiment of this application, the first conductive element and the second conductive element are made of metal.
[0015] According to one embodiment of this application, the active component is made of monocrystalline silicon, and the gate imitation component is made of polycrystalline silicon.
[0016] Secondly, this application provides a test method applied to the aforementioned test unit, the test method comprising: detecting the leakage current of the replica structure;
[0017] When the leakage current meets the target condition, the spacing to be measured in the imitation structure corresponding to the leakage current is determined as the target spacing.
[0018] According to the test method of this application, the distance to be measured between the first orthographic projection and the two opposite sides of the first region simulates the distance between the gate device and the active device in the MOS transistor device. By detecting the current of the simulated structure, the leakage current of the MOS transistor device under the corresponding distance to be measured can be reflected, providing a reference for the design of the MOS transistor device and facilitating the improvement of the performance of the MOS transistor device.
[0019] According to one embodiment of this application, the test unit includes multiple test groups, and after detecting the leakage current of the simulated structure, it further includes:
[0020] The leakage current values of each test group were compared according to the target order;
[0021] When the target order is sorted in ascending order, the leakage current preceding the sudden change in magnitude is determined to meet the target condition.
[0022] When the target order is sorted from largest to smallest, the leakage current after the change in magnitude is determined to meet the target condition.
[0023] According to one embodiment of this application, after comparing the leakage current values of each test group in the target order, the method further includes:
[0024] When the values of two adjacent leakage currents differ by more than 100 times, a sudden change in the magnitude of the values is determined.
[0025] Additional aspects and advantages of this application will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of this application. Attached Figure Description
[0026] The above and / or additional aspects and advantages of this application will become apparent and readily understood from the description of the embodiments taken in conjunction with the following drawings, in which:
[0027] Figure 1 This is a schematic diagram of the structure of a multi-finger MOSFET in related technologies;
[0028] Figure 2 This is a cross-sectional schematic diagram of a multi-finger MOSFET;
[0029] Figure 3 This is one of the structural schematic diagrams of the test unit provided in the embodiments of this application;
[0030] Figure 4 This is a second schematic diagram of the structure of the test unit provided in the embodiments of this application;
[0031] Figure 5 This is a flowchart of the testing method provided in the embodiments of this application.
[0032] Figure label:
[0033] Source 110, drain 120, gate 130, main body 131, extension 132, active region 140, insulating layer 160, connection 160, imitation structure 210, active element 211, gate imitation element 212, first part 2121, second part 2122, first conductive element 220, first main body 221, first branch 222, second conductive element 230, second main body 231, second branch 232, detection unit 240. Detailed Implementation
[0034] The embodiments of this application are described in detail below. Examples of these embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain this application, and should not be construed as limiting this application.
[0035] In the following description, a "circuit" refers to a conductive loop consisting of at least one element or sub-circuit connected by an electrical or electromagnetic link. When an element or circuit is said to be "coupled to" or "connected to" another element, or when an element / circuit is said to be "coupled at" or "connected at" two nodes, it can be directly coupled to or connected to the other element, or there may be intermediate elements. The connection between elements can be physical, logical, or a combination thereof. Conversely, when an element is said to be "directly coupled to" or "directly connected to" another element, it means that there are no intermediate elements between them.
[0036] In the description, the terms "first," "second," etc., are used to distinguish similar objects, not to describe a specific order or sequence. It should be understood that such numerical descriptors can be interchanged where appropriate so that embodiments of this application can be implemented in orders other than those illustrated or described herein, and the objects distinguished by "first," "second," etc., are generally of the same class, not limited in number; for example, a first object can be one or more. Furthermore, in the specification and claims, "and / or" indicates at least one of the connected objects, and the character " / " generally indicates that the preceding and following objects are in an "or" relationship.
[0037] Furthermore, the use of terms such as "one embodiment," "some embodiments," "illustrative embodiment," "example," "specific example," or "some examples," etc., indicates that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of this application. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples.
[0038] Reference Figure 1 , Figure 1 A multi-finger MOSFET structure is shown, comprising a source 110, a drain 120, and a gate 130. The source 110 and drain 120 are formed on the same layer, and the region containing the source 110 and drain 120 is the active region 140. The gate 130 includes a main body 131 extending along a first direction (X direction) and a plurality of extensions 132 extending along a second direction (Y direction), wherein the extensions 132 are connected to the main body 131, and the first direction is perpendicular to the second direction. The orthographic projection of each extension 132 of the gate 130 within the active region 140 partially overlaps with the active region 140, and the orthographic projection of the main body 131 of the gate within the active region 140 is spaced apart from the active region 140, and the orthographic projection of the main body 131 within the active region 140 is parallel to the two opposite sides of the active region 140. The main body 131 of the gate element 130 and the insulating element 160 are stacked in sequence, wherein the insulating element 160 is formed on the same layer as the source element 110 and the drain element 120.
[0039] Reference Figure 2 , Figure 2 It shows Figure 1 A cross-sectional view along line AA' shows that when the distance between the main body 131 of the gate 130 and the active region 140 is too small, the capacitance between the gate 130 and the source 110 and drain 120 increases, leading to increased leakage current at the connection 160 between the main body 131 of the gate 130 and the insulator 160. In related technologies, when manufacturing multi-finger MOSFETs, the distance between the main body 131 of the gate 130 and the active region 140 is typically selected empirically. If the selected distance is too small, the leakage current at the connection 160 between the main body 131 of the gate 130 and the insulator 160 will be too large, affecting the performance of the multi-finger MOSFET.
[0040] This application proposes a test unit and test method. The test spacing between the two opposite sides of the first orthographic projection and the first region simulates the spacing between the gate device 130 and the active device 211 in the MOS transistor device. By detecting the current of the simulated structure, the leakage current of the MOS transistor device under the corresponding test spacing can be reflected, providing a reference for the design of the MOS transistor device and facilitating the improvement of the performance of the MOS transistor device.
[0041] Reference Figure 3 , Figure 3A test unit is shown. One embodiment of this application proposes a test unit. In this embodiment, the test unit includes: a replica structure 210, a first conductive element 220, a second conductive element 230, and a detection unit 240. The replica structure 210 includes an active element 211 and a gate replica element 212, which are located on different layers. The gate replica element 212 has a first portion 2121, the first orthographic projection of which onto the plane of the active element 211 is spaced apart from the first region of the active element 211. The first orthographic projection and the two opposite sides of the first region are parallel and have a test spacing. The first conductive element 220 is connected to the active element 211. The second conductive element 230 is connected to the gate replica element 212. The detection unit 240 is connected to the first conductive element 220 and the second conductive element 230 respectively, and is configured to apply a test voltage to the first conductive element 220 and the second conductive element 230, and detect the current flowing through the first conductive element 220 and the second conductive element 230.
[0042] The replica structure 210 simulates the structure and positional relationship between the gate and the active region 140 in a MOS transistor device. The active component 211 can be formed by replicating the source component 110 or the drain component 120 in the MOS transistor device described above, and the gate replica component 212 can be formed by replicating the gate component 130 in the MOS transistor device described above.
[0043] The first portion 2121 of the gate simulant 212 can be stacked with an insulating member, which can be formed on the same layer as the active member. The area covered by the active member 211 is the first region, and the area covered by the insulating member is the second region. The first orthographic projection of the first portion 2121 of the gate simulant 212 onto the plane where the active member 211 is located overlaps with the second region and is spaced apart from the first region. The side of the first orthographic projection closest to the first region is parallel to the side of the first region closest to the first orthographic projection and is separated by the measured spacing.
[0044] As an example, the area covered by the active component 211 is rectangular, and the first orthographic projection of the first part 2121 of the gate replica 212 on the plane where the active component 211 is located is also rectangular. The orthographic projection of the sidewall of the active component 211 near the gate replica 212 on the first plane is parallel to the orthographic projection of the sidewall of the first part 2121 of the gate replica 212 near the active component 211 on the first plane. The distance between the orthographic projections of the two sidewalls on the first plane is the spacing to be measured.
[0045] The first end of the first conductive element 220 is connected to the active element 211, the first end of the second conductive element 230 is connected to the gate imitation element 212, and the detection unit 240 is connected to the second end of the first conductive element 220 and the second end of the second conductive element 230 respectively.
[0046] The detection unit 240 is mainly used to apply a test voltage to the first conductive element 220 and the second conductive element 230, so that there is a certain voltage difference between the active element 211 and the gate imitation element 212. At this time, if the first part 2121 of the gate imitation element 212 is close to the active element 211 and the test spacing is small, the capacitance between the gate imitation element 212 and the active element 211 is large, and a leakage current is formed at the connection 160 between the gate imitation element 212 and the insulating element 150. The leakage current is transmitted to the detection unit 240 through the first conductive element 220 and the second conductive element 230, and the detection unit 240 detects the magnitude of the leakage current. The distance between the first part 2121 of the gate imitation element 212 and the active element 211 is selected within a reasonable range at the leakage current location to improve the performance of the device.
[0047] It should be noted that the test voltage can refer to the operating voltage of devices such as MOSFETs, for example, 1.1V. The specific value is not limited here and can be selected according to the actual application scenario.
[0048] In some embodiments, the detection unit 240 is provided with a threshold current value. The detection unit 240 can compare the detected leakage current value with the threshold current. When the leakage current value is greater than or equal to the threshold current value, it indicates that the distance to be measured is too small. When the leakage current value is less than the threshold current value, it indicates that the distance to be measured is reasonable. The reasonableness of the distance to be measured can be determined based on the leakage current value, so as to avoid damage to the device caused by excessive leakage current due to the small distance to be measured in actual applications.
[0049] According to the test unit of this application, the distance to be measured between the first orthographic projection and the two opposite sides of the first region simulates the distance between the gate device 130 and the active device 211 in the MOS transistor device. By detecting the current of the simulated structure, the leakage current of the MOS transistor device under the corresponding distance to be measured can be reflected, providing a reference for the design of the MOS transistor device and facilitating the improvement of the performance of the MOS transistor device.
[0050] In some embodiments, the test unit includes a plurality of replica structures 210, wherein the active element 211 in each replica structure 210 is connected to the first conductive element 220, and the gate replica element 212 in each replica structure 210 is connected to the second conductive element 230.
[0051] The test spacing in each replica structure 210 is the same. The detection unit 240 provides test voltage to the active component 211 and the gate replica component 212 in each replica structure 210 through the first conductive component 220 and the second conductive component 230. After each replica structure 210 is powered on, a leakage current is formed at the connection 160 between the gate replica component 212 and the insulating component 150, which is transmitted to the detection unit 240 through the first conductive component 220 and the second conductive component 230. The detection unit 240 can determine whether the test spacing in the test unit is reasonable by detecting the value of the leakage current.
[0052] When the test unit includes multiple replica structures 210, the current detected by the detection unit 240 is the leakage current flowing through each replica structure 210, which can reduce the error caused by factors such as defects in the manufacturing process of individual replica structures 210 on the test results.
[0053] Reference Figure 4 , Figure 4 A test unit comprising multiple replica structures 210 is shown. In some embodiments, the multiple replica structures 210 are arranged in an array. A first conductive element 220 includes a first main branch 221 extending in a row direction and multiple first branches 222 extending in a column direction. The first main branch 221 is connected to each of the first branches 222. A second conductive element 230 includes a second main branch 231 extending in a row direction and multiple second branches 232 extending in a column direction. The second main branch 231 is connected to each of the second branches 232. An active element 211 in each column of replica structures 210 is connected to a corresponding first branch 222, and a gate replica element 212 in each column of replica structures 210 is connected to a corresponding second branch 232.
[0054] In some embodiments, the orthographic projection of the first main stem 221 onto the plane containing the active component 211 is located below the first row of imitation structures 210, and the first main stem 221 is parallel to the two sides opposite to the first portion 2121 of the gate imitation component 212. Each first branch 222 is sequentially connected to the active component 211 of the first column of imitation structures 210, the second column of imitation structures 210, up to the last column of imitation structures 210, and each first branch 222 is connected to the first main stem 221. The orthographic projection of the second main stem 231 onto the plane containing the active component 211 is located above the last row of imitation structures 210, and the second main stem 231 is parallel to the two sides opposite to the first portion 2121 of the gate imitation component 212. Each second branch 232 is sequentially connected to the gate imitation component 212 of the first column of imitation structures 210, the second column of imitation structures 210, up to the last column of imitation structures 210, and each second branch 232 is connected to the second main stem 231.
[0055] It is understandable that in the array formed by multiple imitation structures 210, along the Y direction, there are sequentially first row imitation structures 210, second row imitation structures 210, and so on until the last row imitation structures 210. Along the X direction, there are sequentially first column imitation structures 210, second column imitation structures 210, and so on until the last column imitation structures 210.
[0056] Multiple replica structures 210 are arranged in an array, and each first branch 222 of the first conductive element 220 is connected to the active element 211 along the column direction and then connected to the first main body 221. Each second branch 232 of the second conductive element 230 is connected to the gate replica element 212 along the column direction and then connected to the second main body 231. This saves layout space, facilitates manufacturing, and avoids short circuits and other faults caused by the overlap of the first conductive element 220 and the second conductive element 230.
[0057] In some embodiments, the test unit includes a plurality of replica structures 210, which are divided into a plurality of test groups. Each test group includes at least one replica structure 210. The test spacing within each test group is the same, while the test spacing between test groups is different. The number of first conductive elements 220 and second conductive elements 230 is the same as the number of test groups, and each first conductive element 220 and each second conductive element 230 is connected to each test group respectively.
[0058] Each test group is equipped with a corresponding first conductive element 220 and a second conductive element 230. Each active element 211 in each test group is connected to the corresponding first conductive element 220, and each gate replica element 212 is connected to the corresponding second conductive element 230.
[0059] The detection unit 240 can be equipped with multiple detection channels, each corresponding to a detection group. The first conductive element 220 and the second conductive element 230 of each detection group are respectively connected to the corresponding detection channel. The test spacing is different in different detection groups. By conducting a single test, the magnitude of the leakage current formed at the connection 160 between the gate imitation 212 and the insulating element 150 under multiple test spacings can be determined. That is, it can be determined whether the multiple test spacings are reasonable. Furthermore, by comparing the leakage current of each test group with the test spacing, the optimal test spacing can be selected.
[0060] As an example, multiple replica structures 210 in the test unit form a four-row, eight-column array. The replica structures 210 in the first and second columns have the same test spacing and are classified as test group A. The replica structures 210 in the third and fourth columns have the same test spacing and are classified as test group B. The replica structures 210 in the fifth and sixth columns have the same test spacing and are classified as test group C. The replica structures 210 in the seventh and eighth columns have the same test spacing and are classified as test group D. The test spacing of the replica structures 210 in the four test groups is different from each other, and the test spacing in test groups A, B, C, and D decreases from large to small. The detection unit 240 applies a test voltage to the first conductive element 220 and the second conductive element 230 in the four test groups through the detection channel, and detects the leakage current flowing through the first conductive element 220 and the second conductive element 230 in the four test groups respectively.
[0061] It is understandable that the larger the test spacing, the smaller the leakage current formed at the connection 160 between the gate replica 212 and the insulating component 150, that is, the smaller the current value detected by the detection unit 240. The current values detected by the detection unit 240 in test group A, test group B, test group C and test group D are from small to large. When the current value in test group C is much larger than the current value in test group B, it indicates that the test spacing in test group C is too small. At this time, the leakage current in test group C will affect the performance of the device in practical applications. The test spacing in test group B is the smallest distance among the four test groups that can be applied to the actual fabrication process of devices such as multi-finger MOS transistors.
[0062] In some embodiments, the gate simulant 212 has a second portion 2122, the extension direction of the first portion 2121 is perpendicular to the extension direction of the second portion 2122, the first portion 2121 is connected to the second portion 2122, and the second orthographic projection of the second portion 2122 onto the plane where the active member 211 is located partially overlaps with the first region where the active member 211 is located.
[0063] The first portion 2121 of the gate simulant 212 can extend along a first direction (X direction), and the second portion 2122 of the gate simulant 212 can extend along a second direction (Y direction). The first portion 2121 and the second portion 2122 are connected to form an "L"-shaped structure. The second orthographic projection of the second portion 2122 onto the plane where the active component 211 is located overlaps with the first region where the active component 211 is located, and partially overlaps with the second region where the insulating component is located, which facilitates the use of existing photomasks for photolithography and other processes during the fabrication process.
[0064] In some embodiments, the first conductive element 220 and the second conductive element 230 are made of metal.
[0065] The first conductive element 220 and the second conductive element 230 can be made of copper or other conductive metals. The first conductive element 220 and the second conductive element 230 can be made of the same conductive metal or different conductive metals. As long as leakage current is generated at the connection 160 between the gate imitation element 212 and the insulating element 150 and transmitted to the detection unit 240, the specific materials of the first conductive element 220 and the second conductive element 230 are not limited here.
[0066] In some embodiments, the active component 211 is made of monocrystalline silicon, and the gate imitation component 212 is made of polycrystalline silicon.
[0067] The active component 211 is formed of monocrystalline silicon, and the gate imitation component 212 is formed of polycrystalline silicon. These are the same materials commonly used in actual product manufacturing processes, which facilitates manufacturing and allows the test results to be better applied to actual production.
[0068] Reference Figure 5 , Figure 5 A flowchart of a testing method is shown. This application provides a testing method applied to the aforementioned test unit, the testing method including steps 10 and 20.
[0069] Step 10: Detect the leakage current of the replica structure 210;
[0070] Step 20: When the leakage current meets the target condition, determine the distance to be measured in the imitation structure 210 corresponding to the leakage current as the target distance.
[0071] The execution entity of the testing method provided in the embodiments of this application can be the detection unit in the aforementioned testing unit, or a functional module or functional entity in the detection unit that can implement the testing method. The specific structure and principle of the testing unit can be referred to the aforementioned embodiments. The testing method provided in the embodiments of this application will be described below using the detection unit as the execution entity as an example.
[0072] The detection unit 240 can obtain the leakage current of the imitation structure 210 by detecting the current flowing through the first conductive element 220 and the second conductive element 230 in the imitation structure 210. The leakage current of the imitation structure 210 is the current flowing through the first conductive element 220 and the second conductive element 230.
[0073] In some embodiments, the test unit may include a plurality of replica structures 210, the plurality of replica structures 210 being divided into one or more test groups, each test group including at least one replica structure 210, the test spacing within the test group being the same, and the test spacing between the test groups being different.
[0074] As an example, when the test unit sets up only one test group for testing, the test spacing of each imitation structure 210 in the test group is the same. The detection unit 240 can set a current threshold. The leakage current meeting the target condition means that the leakage current in the test unit is less than the current threshold. At this time, it can be determined that the test spacing in the imitation structure 210 corresponding to the leakage current is the target spacing.
[0075] In other embodiments, the test unit includes multiple test groups. The leakage current meeting the target condition can refer to comparing the leakage currents of multiple test groups. If the magnitude of the leakage current in a test group meets a preset rule, then the spacing to be tested in the imitation structure 210 corresponding to the leakage current that meets the rule can be determined as the target spacing.
[0076] According to the test method of this application, the distance to be measured between the two opposite sides of the first orthographic projection and the first region simulates the distance between the gate device 130 and the active device 211 in the MOS transistor device. By detecting the current of the simulated structure, the leakage current of the MOS transistor device under the corresponding distance to be measured can be reflected, providing a reference for the design of the MOS transistor device and facilitating the improvement of the performance of the MOS transistor device.
[0077] In some embodiments, the test unit includes multiple test groups. After detecting the leakage current of the replica structure 210, it further includes: comparing the values of the leakage current of each test group according to the target order; when the target order is sorted in ascending order, determining that the leakage current before the change in magnitude satisfies the target condition; when the target order is sorted in descending order, determining that the leakage current after the change in magnitude satisfies the target condition.
[0078] The target order refers to the order of the leakage current magnitudes in each test group. The smaller the test spacing in the test group replica structure 210, the larger the leakage current in the corresponding test group. When sorting the test groups by leakage current from smallest to largest, if the leakage current value of a later test group changes by an order of magnitude compared to the leakage current value of a previous test group, it indicates that the test spacing in the later test group is too small. In this case, the earlier test group with the change in magnitude is the test group that meets the target condition, and the test spacing in that test group is the target spacing. Conversely, when sorting the test groups by leakage current from largest to smallest, if the leakage current value of a later test group changes by an order of magnitude compared to the leakage current value of a previous test group, it indicates that the test spacing in the earlier test group is too small. In this case, the later test group with the change in magnitude is the test group that meets the target condition, and the test spacing in that test group is the target spacing.
[0079] In some embodiments, after comparing the values of leakage current of each test group in the target order, the method further includes: determining a sudden change in the magnitude of the values when the values of two adjacent leakage currents differ by more than 100 times.
[0080] When the target order is sorted from smallest to largest, if the leakage current value in the later test group is more than 100 times the leakage current value in the earlier test group, the leakage current in the earlier test group is determined to meet the target condition, and the test spacing in that test group is the target spacing. When the target order is sorted from largest to smallest, if the leakage current value in the later test group is less than 100 times the leakage current value in the earlier test group, the leakage current in the later test group is determined to meet the target condition, and the test spacing in that test group is the target spacing.
[0081] Although embodiments of this application have been shown and described, those skilled in the art will understand that various changes, modifications, substitutions and alterations can be made to these embodiments without departing from the principles and spirit of this application, the scope of which is defined by the claims and their equivalents.
Claims
1. A test unit, characterized in that, include: The replica structure includes an active component and a gate replica component, the active component and the gate replica component are located on different layers, the gate replica component has a first part, the first orthographic projection of the first part on the plane where the active component is located is spaced apart from the first region where the active component is located, the two opposite sides of the first orthographic projection and the first region are parallel and have a spacing to be measured; The first conductive element is connected to the active element; The second conductive element is connected to the gate replica element; The detection unit is connected to the first conductive element and the second conductive element respectively, and is configured to apply a test voltage to the first conductive element and the second conductive element, and detect the current flowing through the first conductive element and the second conductive element; The test unit includes multiple replica structures, which are divided into multiple test groups. Each test group includes at least one replica structure. The test spacing within each test group is the same, while the test spacing between each test group is different. The number of the first conductive element and the second conductive element is the same as the number of test groups, and each of the first conductive element and each of the second conductive elements is connected to each corresponding test group.
2. The test unit according to claim 1, characterized in that, The test unit includes multiple replica structures, wherein the active component in each replica structure is connected to the first conductive component, and the gate replica component in each replica structure is connected to the second conductive component.
3. The test unit according to claim 2, characterized in that, The multiple replica structures are arranged in an array. The first conductive element includes a first main body extending along the row direction and multiple first branches extending along the column direction. The first main body is connected to each of the first branches. The second conductive element includes a second main body extending along the row direction and multiple second branches extending along the column direction. The second main body is connected to each of the second branches. The active component in each column of the emulation structure is connected to the corresponding first branch, and the gate emulation component in each column of the emulation structure is connected to the corresponding second branch.
4. The test unit according to any one of claims 1-3, characterized in that, The gate replica has a second portion, the extension direction of the first portion is perpendicular to the extension direction of the second portion, the first portion is connected to the second portion, and the second orthographic projection of the second portion on the plane where the active component is located partially overlaps with the first region where the active component is located.
5. The test unit according to any one of claims 1-3, characterized in that, The first conductive element and the second conductive element are made of metal.
6. The test unit according to any one of claims 1-3, characterized in that, The active component is made of monocrystalline silicon, and the gate imitation component is made of polycrystalline silicon.
7. A testing method, characterized in that, The test method, applied to the test unit according to any one of claims 1-6, comprises: Detecting leakage current in the replicated structure; When the leakage current meets the target condition, the spacing to be measured in the imitation structure corresponding to the leakage current is determined to be the target spacing.
8. The test method according to claim 7, characterized in that, The test unit includes multiple test groups, and after detecting the leakage current of the simulated structure, it also includes: The leakage current values of each test group are compared in the order of the objectives. When the target order is sorted in ascending order, the leakage current preceding the one with the sudden change in magnitude is determined to meet the target condition. When the target order is sorted from largest to smallest, the leakage current after the change in magnitude is determined to meet the target condition.
9. The test method according to claim 8, characterized in that, After comparing the leakage current values of each test group according to the target order, the method further includes: When the values of two adjacent leakage currents differ by more than 100 times, a sudden change in the magnitude of the values is determined.
Citation Information
Patent Citations
SPICE (Simulation Program with Integrated Circuit Emphasis) testing structure of MOS (Metal Oxide Semiconductor) device
CN102445644A
Leakage testing structure and leakage testing method
WO2023273343A1