Wafer defect detection preprocessing method and computer program product

Abstract

The application provides a wafer defect detection preprocessing method and a computer program product. The wafer defect detection preprocessing method comprises the following steps: obtaining a metal layer layout of a wafer to be detected, wherein a layout pattern of the metal layer layout comprises a solid area and a gap area; extracting the gap area from the layout pattern as a region to be processed; performing a breaking processing on the boundary of the gap area to generate a plurality of broken edges; generating a corresponding type of rectangular unit for different types of broken edges to split the gap area; and inputting the generated rectangular units of various types into a wafer defect detection database. The wafer defect detection preprocessing method has the advantage that the gap area of the metal layer layout can be subjected to defect detection, thereby avoiding the problem that the chip performance is affected due to the omission of defects in the area.

Description

Technical Field

[0001] This invention relates to the field of wafer defect detection technology, and in particular to a preprocessing method and computer program product for wafer defect detection. Background Technology

[0002] In the modern semiconductor manufacturing field, with the continuous advancement of integrated circuit technology, the integration and complexity of chips are increasing exponentially, and the requirements for chip quality and performance are becoming increasingly stringent. Wafer defect detection, as a crucial step in ensuring chip yield, directly impacts the production efficiency and economic benefits of the semiconductor industry.

[0003] Currently, the industry widely adopts inspection modes such as D2D, C2C, and D2DB. The D2D inspection mode identifies potential defects by comparing images of different dies on the same wafer; the C2C mode focuses on comparing unit circuits and detects anomalies by detecting the consistency of unit circuits; the D2DB mode compares the actual pattern on the wafer with a pre-stored design database to locate defects.

[0004] However, the commonly used detection methods mentioned above mainly focus on the design patterns of the layout itself, checking according to design rules and graphic features, while neglecting the gaps between the layout patterns. These gaps may also have defects such as residual impurities, abnormal protrusions, or depressions due to process errors such as photolithography, etching, and deposition. These undetected defects are very likely to affect the electrical performance, signal transmission, and long-term reliability of the chip, ultimately leading to chip failure or performance degradation. Summary of the Invention

[0005] One object of the present invention is to overcome at least one technical defect in the prior art and to provide a preprocessing method and computer program product for wafer defect detection.

[0006] A further objective of this invention is to perform defect detection on the gap regions of the metal layer layout, so as to avoid affecting chip performance due to the omission of defects in these regions.

[0007] Another further objective of this invention is to improve the processing accuracy and efficiency of the wafer defect detection preprocessing stage.

[0008] Specifically, according to a first aspect of the present invention, the present invention provides a preprocessing method for wafer defect detection, comprising:

[0009] Obtain the metal layer layout of the wafer to be inspected, wherein the layout pattern of the metal layer includes solid regions and void regions;

[0010] The gap region is extracted from the layout graphic and used as the region to be processed;

[0011] The boundary of the void region is broken to generate multiple broken edges;

[0012] Rectangular units of corresponding types are generated for different types of broken edges to divide the gap region;

[0013] The generated rectangular cells are input into the wafer defect detection database.

[0014] Optionally, in the metal layer layout, a portion of the boundary of the void region along the first coordinate direction intersects with a portion of the boundary along the second coordinate direction to form a corner vertex. The corner vertex is divided into an inner concave corner vertex and an outer convex corner vertex according to the concavity and convexity characteristics of the boundary at its location.

[0015] The steps for breaking the boundary of the void region include:

[0016] Identify each concave corner vertex in the gap region, and for each concave corner vertex, project it onto its opposite side along the mutually perpendicular first coordinate direction and second coordinate direction to obtain the projection breakpoint;

[0017] For any two opposite sides of any set of boundaries along the first coordinate direction and any two opposite sides of any set of boundaries along the second coordinate direction in the gap region, multiple pairs of evenly divided breakpoints are configured according to a preset interval distance.

[0018] By passing through each of the concave corner vertices and its corresponding projection breakpoints, and by passing through each pair of equally divided breakpoints, the boundary of the void region is divided into multiple broken edges.

[0019] Optionally, the type of the broken edge includes an evenly divided broken edge, which refers to a broken edge whose two endpoints are both the evenly divided break points;

[0020] The steps for generating corresponding rectangular elements for different types of broken edges include:

[0021] Select two equally divided edges that correspond to each other from the same set of boundaries of the void region;

[0022] The two equally divided broken edges are used as a set of parallel edges, and the line connecting the corresponding endpoints of the two equally divided broken edges is used as another set of parallel edges, thereby generating an equally divided rectangular unit.

[0023] Optionally, the evenly divided edge includes a first directional edge along the first coordinate direction and a second directional edge along the second coordinate direction. The step of generating corresponding rectangular units for different types of edges further includes:

[0024] If the generated evenly divided rectangular unit has two first-direction broken edges, it is classified as a first-direction rectangular unit;

[0025] If the generated equally divided rectangular unit has two second-direction broken edges, it is classified as a second-direction rectangular unit.

[0026] Optionally, the step of generating corresponding types of rectangular units for different types of broken edges further includes:

[0027] If the first directional rectangular unit has only two parallel sides that are in contact with the entity region, and the distance between the two parallel sides is within the first preset distance range, then it is further classified into the first directional height distance cluster group.

[0028] If the first directional rectangular unit has only two parallel sides at the junction with the solid region, and the distance between the two parallel sides is within the second preset distance range, then it is further classified into the first directional low-distance cluster group.

[0029] The maximum value of the second preset range is less than the minimum value of the first preset range.

[0030] Optionally, the step of generating corresponding types of rectangular units for different types of broken edges further includes:

[0031] If the second directional rectangular unit has three sides that connect with the solid region, and the distance between two parallel sides of the three sides is within the third preset distance range, then it is further classified into the second directional wide-spacing cluster group.

[0032] If the second directional rectangular unit has three sides that connect with the solid region, and the distance between two parallel sides of the three sides is within the fourth preset distance range, then it is further classified into the second directional narrow-range cluster group.

[0033] The maximum value of the fourth preset range is less than the minimum value of the third preset range.

[0034] Optionally, the type of the broken edge includes a folded broken edge, which refers to a broken edge with one end being the vertex of the concave corner or the vertex of the convex corner, and the other end being the evenly divided break point;

[0035] The steps for generating corresponding rectangular elements for different types of broken edges include:

[0036] Identify the included angle formed by a pair of broken edges at the same bend in the gap region, wherein the pair of broken edges have a common concave or convex vertex.

[0037] Based on the positional relationship of each included angle, a folded rectangle unit is generated, and the folded rectangle unit completely covers all the included angles at the same fold.

[0038] Optionally, the step of generating corresponding rectangular units for different types of broken edges further includes:

[0039] For each of the folded rectangle units, a square reference rectangle unit with a preset side length is generated, such that one vertex of the reference rectangle unit coincides with the common point of the two folded edges of the folded rectangle unit, and the reference rectangle unit completely covers the folded rectangle unit.

[0040] If the reference rectangular unit overlaps with the entity region, the corner rectangular unit is further classified into a corner dense cluster group.

[0041] If the reference rectangular unit does not overlap with the entity region, the corner rectangular unit is further classified into a corner sparse cluster group.

[0042] Optionally, the type of broken edge includes an end broken edge, which refers to a broken edge where both endpoints are vertices of the outward convex corner;

[0043] The steps for generating corresponding rectangular elements for different types of broken edges include:

[0044] Identify the length of the broken end edge, generate two parallel edges that are parallel to and of equal length to the broken end edge, and make the two generated parallel edges symmetrically distributed about the broken end edge;

[0045] The line connecting the corresponding endpoints of the two generated parallel sides is used as another set of parallel sides, thereby generating the end rectangular unit.

[0046] According to a second aspect of the present invention, the present invention provides a computer program product comprising a computer program, which, when executed by a processor, is used for a preprocessing method for wafer defect detection as described in any one of the above.

[0047] The preprocessing method for wafer defect detection of this invention first extracts the void regions of the metal layer layout as the areas to be processed, specifically targeting parts neglected in traditional detection, expanding the detection range, and avoiding chip performance issues caused by missing defects in these areas. Second, the boundaries of the void regions are broken up to generate broken edges, which decomposes complex and irregular void regions into more easily analyzed units, reducing the difficulty of subsequent processing and improving the operability of detection. Next, corresponding rectangular units are generated for different types of broken edges to further divide the void regions, transforming irregular void regions into regular rectangular units, facilitating subsequent defect analysis using standard algorithms and processes, and improving detection efficiency and accuracy. Finally, the rectangular units are input into a wafer defect detection database, providing structured and standardized data for subsequent defect identification and analysis, enabling the database to store and retrieve data more efficiently, supporting more accurate defect detection and diagnosis, and contributing to improving the overall reliability and effectiveness of wafer defect detection.

[0048] Furthermore, the preprocessing method for wafer defect detection of the present invention, by identifying the vertices of concave corners and projecting them along mutually perpendicular directions to obtain projection breakpoints, can accurately capture the complex geometric features of the boundary of the void region and effectively process corners that are prone to defects and have complex shapes. Breakpoints are evenly distributed at preset intervals along the boundary of the void region. Through standardized segmentation, the boundary is further refined, ensuring the uniformity of the scale of the segmented edges and avoiding areas that are too large or too small to process, thus reducing the complexity of subsequent analysis. Finally, by dividing the boundary into multiple edges through these breakpoints, the originally complex and irregular void region boundary is transformed into easily processed discrete units. The structure composed of these edges is more suitable for analysis and processing using algorithms, which helps to improve the processing accuracy and efficiency of the wafer defect detection preprocessing stage.

[0049] The above and other objects, advantages and features of the present invention will become more apparent to those skilled in the art from the following detailed description of specific embodiments of the invention in conjunction with the accompanying drawings. Attached Figure Description

[0050] Various other advantages and benefits will become apparent to those skilled in the art upon reading the following detailed description of preferred embodiments. The accompanying drawings are for illustrative purposes only and are not intended to limit the invention. Furthermore, the same reference numerals denote the same parts throughout the drawings. In the drawings:

[0051] Figure 1 This is a flowchart of a preprocessing method for wafer defect detection according to an embodiment of the present invention;

[0052] Figure 2This is a schematic structural diagram of the layout pattern of a metal layer layout according to an embodiment of the present invention;

[0053] Figure 3 This is a schematic flowchart illustrating the interruption process of a gap region according to an embodiment of the present invention;

[0054] Figure 4 Is Figure 2 A schematic diagram of the local configuration of projection breakpoints in the layout graphic shown;

[0055] Figure 5 Is Figure 2 A schematic diagram of the local configuration of the layout graphic with evenly distributed breakpoints;

[0056] Figure 6 yes Figure 2 The diagram shown is a partial view of the layout graphic with end rectangular cells generated.

[0057] Figure 7 yes Figure 2 The diagram shown is a partial schematic of the layout graphic in which first-direction rectangular cells are generated;

[0058] Figure 8 yes Figure 2 A partial schematic diagram showing the generation of second-direction rectangular cells in the layout graphic shown;

[0059] Figure 9 yes Figure 2 The diagram shown is a partial illustration of a layout graphic containing angled rectangular cells.

[0060] Figure 10 yes Figure 2 The illustrated map includes a partial schematic diagram of the first-axis high-spacing cluster group;

[0061] Figure 11 yes Figure 2 The diagram shown contains a partial schematic of the first low-range clustering group;

[0062] Figure 12 yes Figure 2 The diagram shown contains a partial schematic of the second-dimensional wide-spacing clusters;

[0063] Figure 13 yes Figure 2 The diagram shown contains a partial schematic of the second-dimensional narrow-range clustering group;

[0064] Figure 14 yes Figure 2 The diagram shown contains a partial schematic of a dense cluster of folded groups.

[0065] Figure 15 yes Figure 2The diagram shown contains a partial schematic of sparse clusters with bends;

[0066] Figure 16 This is a schematic diagram of a computer program product according to an embodiment of the present invention.

[0067] Figure label:

[0068] 10. Metal layer layout; 101. Projected breakpoint; 102. Evenly divided breakpoint; 110. End rectangular cell; 111. End broken edge; 120. First-direction rectangular cell; 121. First-direction broken edge; 130. Second-direction rectangular cell; 131. Second-direction broken edge; 140. Corner rectangular cell; 141. Corner broken edge; 210. First-direction high-spacing cluster group; 220. First-direction low-spacing cluster group; 230. Second-direction wide-spacing cluster group; 240. Second-direction narrow-spacing cluster group; 250. Corner dense cluster group; 260. Corner sparse cluster group; 30. Computer program product; 270. Reference rectangular cell; 31. Machine-executable program. Detailed Implementation

[0069] Reference will now be made in detail to embodiments of the invention, one or more of which are illustrated in the accompanying drawings. The various embodiments provided are intended to explain the invention and not to limit it. In fact, various modifications and variations to the invention will be apparent to those skilled in the art without departing from the scope or spirit of the invention. For example, a feature illustrated or described as part of one embodiment may be used with another embodiment to produce yet another embodiment. Therefore, the invention is intended to cover such modifications and variations within the scope of the appended claims and their equivalents.

[0070] The following reference Figures 1 to 16 This invention describes a preprocessing method and computer program product for wafer defect detection according to embodiments of the present invention. The terms "inner," "outer," "upper," "lower," "top," "bottom," "lateral," and "longitudinal," etc., indicate orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings. They are used only for the convenience of describing the invention and for simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on the invention.

[0071] In the description of this embodiment, it should be understood that the term "multiple" means at least two, such as two, three, etc., unless otherwise explicitly specified. When a feature "includes or contains" one or more of the features it covers, unless otherwise specifically described, this indicates that other features are not excluded and may be further included.

[0072] In the description of this embodiment, the terms "one embodiment," "some embodiments," "some examples," "one example," etc., refer to specific features, structures, materials, or characteristics described in connection with that embodiment or example, which are included in at least one embodiment or example of the present invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples.

[0073] Traditional wafer defect inspection typically focuses on the metal layers. Figure 10 Solid regions (such as conductors and pads) are inspected using optical or electron beam methods to determine whether their shape and size conform to design rules. However, void regions, as the "negative space" of solid regions, may have irregular boundaries and geometrical complexity that could cause edge defects in solid regions (such as over-etching or metal residue) to extend into void regions. Alternatively, in photolithography, pattern deformation in void regions can indirectly reflect graphic distortion in solid regions (such as edge offset caused by optical proximity effects).

[0074] This invention first provides a preprocessing method for wafer defect detection, which aims to systematically process the void regions of the metal layer layout (metal-free material regions that are easily overlooked in traditional detection). Through geometric structure decomposition, regular unit generation, and cluster analysis, the complex and irregular void regions are transformed into standardized and structured data units, providing a high-precision and quantifiable analytical basis for subsequent defect detection, thereby improving the comprehensiveness, efficiency, and reliability of wafer defect detection.

[0075] Figure 1 This is a flowchart of a preprocessing method for wafer defect detection according to an embodiment of the present invention, as follows: Figure 1 As shown, the preprocessing method for wafer defect detection includes at least the following steps S102 to S110.

[0076] Step S102: Obtain the metal layer slab of the wafer to be inspected. Figure 10 Metal layer plate Figure 10 The layout graphic includes solid areas and void areas. Metal layer plate Figure 10 Derived from the design layout, in wafer fabrication, metal layers are used to form the conductive interconnect structures of circuits, and the layout is the design file for the geometry of this layer. Solid regions refer to areas in the layout where metal material actually exists, while void regions refer to areas in the layout where no metal material exists.

[0077] Step S104: Extract the void regions from the layout graphic as the areas to be processed. Specifically, the graphic recognition function of the layout processing software can be used to distinguish between solid areas and void regions by color, layer attributes, or geometric features. The void regions without metallic material are isolated separately for targeted analysis or processing.

[0078] Step S106 involves breaking the boundary of the gap region to generate multiple broken edges. The boundary of the gap region may be an irregular polygon, which is difficult to process directly. By breaking the boundary, the continuous boundary of the gap region is split into multiple broken edges, so that complex shapes can be further decomposed using regular geometric shapes (such as rectangles).

[0079] Step S108: Generate corresponding rectangular elements for different types of broken edges to segment the void region. Complex void regions are segmented into a set of multiple rectangular elements, each of which can be analyzed independently.

[0080] Step S110: Input the generated rectangular cells into the wafer defect detection database. The wafer defect detection database is a dedicated database system used in the semiconductor manufacturing process to store, manage, and analyze wafer inspection data. It is a core hub connecting design data, inspection equipment, and process optimization.

[0081] Using the above preprocessing method, firstly, the metal layer is extracted. Figure 10 The method targets the void region as the area to be processed, focusing on parts often overlooked in traditional inspections, thus expanding the detection range and preventing chip performance issues caused by missing defects in this area. Secondly, by breaking down the boundaries of the void region and generating broken edges, the complex and irregular void region can be decomposed into more easily analyzed units, reducing the difficulty of subsequent processing and improving the operability of the inspection. Next, corresponding rectangular units are generated for different types of broken edges to further divide the void region, transforming irregular void regions into regular rectangular units. This facilitates subsequent defect analysis using standard algorithms and processes, improving detection efficiency and accuracy. Finally, the rectangular units are input into the wafer defect detection database, providing structured and standardized data for subsequent defect identification and analysis. This allows the database to store and retrieve data more efficiently, supporting more accurate defect detection and diagnosis, and contributing to improving the overall reliability and effectiveness of wafer defect detection.

[0082] Figure 2 It is a metal layer plate according to an embodiment of the present invention. Figure 10 A schematic structural diagram of the map, such as Figure 2 As shown, metal layer plate Figure 10It is in GDS (Graphic Data System) format and consists of various design graphics. In the diagram, the shaded areas represent solid areas, and the remaining unshaded blank areas are the gap areas of the layout. The boundary between the gap areas and the solid areas is the dividing line of their geometry, that is, the edge of the metal graphic.

[0083] In the metal layer layout, the partial boundary of the void region along the first coordinate direction intersects with the partial boundary along the second coordinate direction to form a corner vertex. The corner vertex is divided into concave corner vertex and convex corner vertex according to the concavity and convexity of the boundary at its location.

[0084] In this embodiment, the first coordinate direction and the second coordinate direction respectively correspond to Figure 4 The horizontal and vertical directions presented on the paper. For determining the vertex of a fold, there is a method based on the size of the included angle at the boundary:

[0085] When two boundaries meet at a bend vertex, and the angle formed by the two boundaries without passing through the gap region is greater than 180°, the bend vertex is called the convex corner vertex. In this embodiment, the angle formed by the two boundaries connected to the convex corner vertex is 270°.

[0086] Conversely, if two boundaries meet at the vertex of a bend, and the angle formed by them without passing through the interior of the gap region is less than 180°, then the vertex of the bend is a concave corner vertex. In this embodiment, the angle formed by the two boundaries connected to the concave corner vertex is 90°.

[0087] Figure 3 This is a schematic flowchart illustrating the interruption process of a gap region according to an embodiment of the present invention, such as... Figure 3 As shown, breaking the boundary of the void region may include the following steps S302 to S306.

[0088] Step S302: Identify each concave corner vertex in the gap region. For each concave corner vertex, project it onto its opposite side along mutually perpendicular first and second coordinate directions to obtain multiple projection breakpoints 101. The aforementioned concave corner vertices exist at the corners of the gap region, such as L-shaped bends, T-shaped intersections, and cross-shaped intersections. It can be understood that the concave corner vertices of the gap region are the convex corner vertices of the solid region, and the convex corner vertices of the gap region are the concave corner vertices of the solid region. In this invention, since the gap region is considered the region to be processed, the concave and convex corner vertices referred to in this embodiment are specific to the gap region.

[0089] Step S304: For any two opposite edges of a set of boundaries along the first coordinate direction and any two opposite edges of a set of boundaries along the second coordinate direction in the gap region, multiple pairs of evenly divided breakpoints 102 are configured according to a preset interval distance. The purpose of configuring the evenly divided breakpoints 102 in pairs is to ensure that the subsequent dividing lines formed based on the breakpoints are perpendicular to the corresponding boundaries, thereby providing a precise positioning reference for the regular division of the gap region.

[0090] Step S306: Divide the boundary of the void region into multiple broken edges by passing through each concave corner vertex and its corresponding projection breakpoint 101, and through each pair of equally divided breakpoints 102. The endpoints of each broken edge must be predefined key locations, including concave corner vertices, convex corner vertices, projection breakpoints 101, or equally divided breakpoints 102, to ensure that the start and end points of the line segments are located at these key locations. All breakpoints must participate in the boundary segmentation to ensure that the boundary of the void region is completely and without omission decomposed into a set of line segments.

[0091] Using the above method, by identifying the concave corner vertices and projecting them along mutually perpendicular directions to obtain projection breakpoints 101, the complex geometric features of the void region boundary can be accurately captured, effectively handling corners that are prone to defects and have complex shapes. Breakpoints 102 are evenly distributed at preset intervals along the boundary of the void region. Through standardized segmentation, the boundary is further refined, ensuring the uniformity of the scale of the segmented edges and avoiding areas that are too large or too small to handle, thus reducing the complexity of subsequent analysis. Finally, by dividing the boundary into multiple edges using these breakpoints, the originally complex and irregular void region boundary is transformed into easily processed discrete units. The structure composed of these edges is more suitable for analysis and processing using algorithms, helping to improve the processing accuracy and efficiency of the wafer defect detection preprocessing stage.

[0092] Figure 4 Is Figure 2 The diagram shows a partial configuration of projection breakpoint 101 in the layout graphic, as shown below. Figure 4 As shown, point P is the concave corner vertex of the gap region, and point N is the convex corner vertex of the gap region. Taking point P as an example, starting from this point, projections are made along the first coordinate direction (corresponding to the horizontal X-axis in the figure) and the second coordinate direction (corresponding to the vertical Y-axis in the figure) to its opposite side. At the boundaries of the two opposite sides, projection breakpoints 101 will be obtained respectively.

[0093] Among them, the projection breakpoint 101 obtained along the first coordinate direction is denoted as Px, and the projection breakpoint 101 obtained along the second coordinate direction is denoted as Py.

[0094] Figure 5 Is Figure 2 The diagram shows a local area of ​​the layout graphic with evenly distributed breakpoints 102, as shown below. Figure 5 As shown, a uniformly divided edge layer is further generated based on the already generated projected edge layer. Specifically, in the straight line segment of the void region boundary, the boundary can be uniformly divided at a preset interval. The boundary line segment between adjacent uniformly divided breakpoints 102 is also called an edge break. By combining the projected breakpoint 101 and the uniformly divided breakpoint 102, the structured segmentation of the void region boundary is achieved.

[0095] In some optional embodiments, the type of broken edge includes an end broken edge 111, which refers to a broken edge where both endpoints are convex corner vertices. When generating corresponding rectangular units for different types of broken edges, the length of the end broken edge 111 can be identified, and two parallel edges of equal length parallel to the end broken edge 111 can be generated, with the two generated parallel edges symmetrically distributed about the end broken edge 111. Then, the line connecting the corresponding endpoints of the two generated parallel edges is used as another set of parallel edges, thereby generating the end rectangular unit 110.

[0096] Figure 6 yes Figure 2 The diagram shown contains a partial schematic of the layout graphic with end rectangular cells 110 generated, as shown below. Figure 6 As shown, the gray area represents the end rectangular unit 110, and the line segment shown in bold is the end cut-off edge 111. The end cut-off edge 111 has a distinctive feature: both its endpoints are convex corner vertices. The length of the end cut-off edge 111 can be between 0 and C1 nm. The distance between the other two sides parallel to the end cut-off edge 111 and the end cut-off edge 111 is set to C2 nm. Thus, half of the end rectangular unit 110 is located within the void region, and the other half is located within the solid region.

[0097] In some optional embodiments, the type of broken edge includes an evenly divided broken edge, which refers to a broken edge where both endpoints are evenly divided break points 102. When generating corresponding rectangular elements for different types of broken edges, two corresponding evenly divided broken edges can be selected from the same set of boundaries in the gap region, and the two evenly divided broken edges can be used as a set of parallel edges. Then, the line connecting the corresponding endpoints of the two evenly divided broken edges can be used as another set of parallel edges, thereby generating an evenly divided rectangular element.

[0098] Specifically, the evenly divided edge includes a first-direction edge 121 along the first coordinate direction and a second-direction edge 131 along the second coordinate direction. When generating corresponding types of rectangular units for different types of edges, if the generated evenly divided rectangular unit has two first-direction edges 121, it is classified as a first-direction rectangular unit 120; if the generated evenly divided rectangular unit has two second-direction edges 131, it is classified as a second-direction rectangular unit 130.

[0099] Figure 7 yes Figure 2 The layout graphic shown contains a partial schematic diagram of a first-direction rectangular cell 120, as follows: Figure 7 As shown, each gray area is the first rectangular unit 120, and the line segment shown in bold is the first broken edge 121. The first broken edge 121 extends along the first coordinate direction, with a length between 0nm and D1nm, and its two endpoints are both evenly divided breakpoints 102.

[0100] The first rectangular unit 120 generated by the above rules can accurately locate the geometric features of the gap region in the first coordinate direction.

[0101] Figure 8 yes Figure 2 The layout graphic shown includes a partial schematic diagram of a second-direction rectangular cell 130, as follows: Figure 8 As shown, each gray area is the second-direction rectangular unit 130, and the line segment shown in bold is the second-direction broken edge 131. The second-direction broken edge 131 extends along the second coordinate direction, with a length between 0nm and E1nm, and its two endpoints are both evenly divided breakpoints 102.

[0102] The second rectangular unit 130 generated by the above rules can accurately locate the geometric features of the gap region in the second coordinate direction.

[0103] In some optional embodiments, the type of broken edge includes a folded broken edge 141, which refers to a broken edge with one end being a concave corner vertex or a convex corner vertex and the other end being a break point 102. When generating corresponding rectangular units for different types of broken edges, the included angle formed by pairs of folded broken edges 141 at the same corner in the gap region can be identified, wherein the pairs of folded broken edges 141 have a common concave corner vertex or a convex corner vertex. Then, based on the positional relationship of each included angle, a folded rectangular unit 140 is generated, and the folded rectangular unit 140 completely covers all included angles at the same corner.

[0104] Figure 9 yes Figure 2 The diagram shown contains a partial illustration of a bent rectangular cell 140 generated within the layout graphic, as follows: Figure 9As shown, each gray area represents a folded rectangle unit 140, and the line segments shown in bold are the folded edges 141. One endpoint of the folded edge 141 is either a convex or concave corner vertex, and the other endpoint is the dividing point 102. In this embodiment, the length of the folded edge 141 can be between F1nm and F2nm or between F3nm and F4nm, where F3 is greater than F2. Folded edges 141 are usually marked in pairs, with two folded edges 141 sharing a convex or concave corner vertex, forming a 90° folded angle between the two edges. The folded rectangle unit 140 uses each pair of folded edges 141 as adjacent sides, such that one angle of the folded rectangle unit 140 coincides with the angle formed by the two edges. Figure 9 In the embodiment shown, the included angle of the lower left corner of the folded rectangular unit 140 coincides with the included angle formed by the two folded broken sides 141.

[0105] In some optional embodiments, when generating corresponding types of rectangular units for different types of broken edges, if the first rectangular unit 120 has only two parallel edges in contact with the solid region, and the distance between the two parallel edges is within a first preset distance range, it is further classified into the first high-distance cluster group 210. If the first rectangular unit 120 has only two parallel edges in contact with the solid region, and the distance between the two parallel edges is within a second preset distance range, it is further classified into the first low-distance cluster group 220, wherein the maximum value of the second preset range is less than the minimum value of the first preset range.

[0106] Figure 10 yes Figure 2 The illustrated layout includes a partial schematic diagram of the first-axis height-spacing cluster group 210, as shown below. Figure 10 As shown, each gray area is a first rectangular unit 120 in the first high-distance clustering group 210. This type of rectangular unit has only two parallel sides (line segments shown in bold) that come into contact with the solid area, and the distance between the two parallel sides is between G1nm and G2nm, which is the first preset distance range, which meets the classification conditions of the first high-distance clustering group 210.

[0107] Figure 11 yes Figure 2 The layout diagram shown includes a partial schematic of the first low-range cluster group 220, such as... Figure 11 As shown, the gray area is the first rectangular unit 120 in the first low-distance clustering group 220. This type of rectangular unit has only two parallel sides (line segments shown in bold) that come into contact with the solid area, and the distance between the two parallel sides is between H1nm and H2nm, which is the second preset distance range. Furthermore, H2 is less than G1, which meets the classification conditions of the first high-distance clustering group 210.

[0108] In some optional embodiments, when generating corresponding types of rectangular units for different types of broken edges, if the second-direction rectangular unit 130 has three sides that connect with the solid region, and the spacing between two parallel sides of the three sides is within a third preset spacing range, then it is further classified into the second-direction wide-spacing cluster group 230. If the second-direction rectangular unit 130 has three sides that connect with the solid region, and the spacing between two parallel sides of the three sides is within a fourth preset spacing range, then it is further classified into the second-direction narrow-spacing cluster group 240. The maximum value of the fourth preset range is less than the minimum value of the third preset range.

[0109] Figure 12 yes Figure 2 The layout diagram shown includes a partial schematic of the second-direction wide-spacing cluster group 230, as follows: Figure 12 As shown, the gray area is the second rectangular unit 130 in the second-direction wide-spacing cluster group 230. This type of rectangular unit has three sides (line segments shown in bold) that are in contact with the solid area, and the spacing between the two parallel sides is between I1nm and I2nm, which is the third preset spacing range, which meets the classification conditions of the second-direction wide-spacing cluster group 230.

[0110] Figure 13 yes Figure 2 The layout diagram shown includes a partial schematic of the second-direction narrow-range clustering group 240, as follows: Figure 13 As shown, the gray area is the second rectangular unit 130 in the second narrow-gap clustering group 240. This type of rectangular unit has three sides (line segments shown in bold) that are in contact with the solid area, and the distance between the two parallel sides is between J1nm and J2nm, which is the fourth preset distance range. J2 is less than I1, which meets the classification conditions of the second narrow-gap clustering group 240.

[0111] In some optional embodiments, when generating corresponding rectangular units for different types of broken edges, a square reference rectangular unit 270 with a preset side length can be generated for each corner rectangular unit 140, such that one vertex of the reference rectangular unit 270 coincides with the common point of the two corner broken edges 141 of the corner rectangular unit 140, and the reference rectangular unit 270 completely covers the corner rectangular unit 140. If the reference rectangular unit 270 overlaps with the solid region, the corner rectangular unit 140 is further classified into a corner dense cluster group 250. If the reference rectangular unit 270 does not overlap with the solid region, the corner rectangular unit 140 is further classified into a corner sparse cluster group 260.

[0112] Figure 14 yes Figure 2The layout graphic shown includes a partial schematic diagram of the corner-dense cluster group 250, as shown below. Figure 14 As shown, each gray area represents a corner-shaped rectangular unit 140 in the corner-dense clustering group 250, and the dashed box represents a reference rectangular unit 270 with a side length of Knm, where Knm is the preset side length mentioned above. Taking the reference rectangular unit 270 in the upper left corner as an example, it covers the corner-shaped rectangular unit 140, the vertex of the upper left corner coincides with the common point of the two corner breaks 141 of the corner unit, and the lower right corner overlaps with the solid region. If a reference rectangular unit 270 that overlaps with the solid region can be generated at the corner-shaped rectangular unit 140, then the corner-shaped rectangular unit 140 meets the classification conditions of the corner-dense clustering group 250.

[0113] Figure 15 yes Figure 2 The illustrated layout includes a partial schematic diagram of the angular sparse cluster group 260, as shown below. Figure 15 As shown, each gray area represents a corner-shaped rectangular unit 140 in the corner-dense clustering group 250, and the dashed box represents a reference rectangular unit 270 with a side length of Knm, where Knm is the preset side length mentioned above. Taking the reference rectangular unit 270 in the upper right corner as an example, it covers the corner-shaped rectangular unit 140, and the vertex of the upper left corner coincides with the common point of the two corner breaks 141 of the corner unit, and does not overlap with the solid region. If a reference rectangular unit 270 that overlaps with the solid region can be generated at the corner-shaped rectangular unit 140, then the corner-shaped rectangular unit 140 meets the classification conditions of the corner-dense clustering group 250.

[0114] Traditional inspection methods neglect gap areas, which is essentially due to insufficient understanding of these areas. This invention uses a preprocessing approach of geometric segmentation, regularization, and datafication to transform gap areas from blind spots into quantifiable and analyzable objects. This not only completes the inspection process but also lays the foundation for intelligent defect diagnosis through standardized data, enabling refined processing of gap areas.

[0115] Specifically, the present invention achieves the metal layer plate Figure 10 The gap region is aligned and segmented, dividing it into end rectangular units 110, first-direction rectangular units 120, second-direction rectangular units 130, and corner rectangular units 140. Units of the same type share design commonalities, while units of different types exhibit significant geometric differences. This segmentation decomposes complex patterns into smaller, more comparable parts. Based on unit classification, similarity is further explored, grouping rectangular units with similar OPE (Optical Proximity Effect) results into the same cluster. This ensures that the pattern structures within each cluster are similar and that there is sufficient data, providing homogeneous data for subsequent statistical analysis and improving the accuracy and reliability of defect detection.

[0116] Specifically, the technical advantages of the present invention are reflected in the following aspects:

[0117] (1) Expansion of detection range: By clustering rectangular units with similar OPE results, statistical analysis is used to feed back outlier contour images. The detection process does not need to rely on fixed reference patterns, breaking through the limitations of traditional methods on periodic or repetitive pattern regions. It can be widely applied to any region on the wafer, whether it is a regular unit pattern or a complex logic pattern, which significantly expands the scope of detection.

[0118] (2) Automated optimization of the detection process: The introduction of adaptive detection thresholds replaces the manual parameter settings for different pattern types and process conditions in the traditional method, avoiding cumbersome operation procedures and human error settings, improving the efficiency and accuracy of the detection process, and reducing the cost of manual intervention.

[0119] (3) Improved defect detection accuracy: Defect detection is achieved by comparing the similarity of similar patterns, rather than relying on absolute reference images. This can effectively tolerate the impact of manufacturing process fluctuations, reduce false defect alarms caused by process changes, significantly reduce the false alarm rate and improve the accuracy of detection.

[0120] (4) Enhanced detection sensitivity: The complex pattern is divided into smaller basic components (rectangular units) to form multiple comparable target units. Through statistical analysis of the small components, the ability to capture subtle defects is effectively improved, especially in the unit area where smaller abnormal structures can be detected.

[0121] (5) Compatibility of the testing platform: It is not limited to specific types of testing equipment (such as scanning electron microscope SEM or optical imaging equipment), and can be compatible with a variety of testing platforms to meet the diverse testing needs of enterprises and comprehensively improve the flexibility and adaptability of the overall testing capabilities.

[0122] (6) Data-driven process optimization: It can establish a basic pattern component database containing design layout and defect information, providing solid data support for subsequent defect analysis, process improvement and intelligent process control, and promoting the development of the inspection process towards automation and data.

[0123] This invention also provides a computer program product 30. Figure 16 This is a schematic diagram of a computer program product 30 according to an embodiment of the present invention, as shown below. Figure 16 As shown, the computer program product 30 includes a machine-executable program 31, which, when executed by a processor, implements the preprocessing method for wafer defect detection according to any of the above embodiments.

[0124] The machine-executable program 31 used to perform the operations of this invention may be assembly instructions, instruction set architecture (ISA) instructions, machine instructions, machine-related instructions, microcode, firmware instructions, status setting data, integrated circuit configuration data, or source code or object code written in any combination of one or more programming languages ​​and procedural programming languages. The machine-executable program 31 may execute entirely on the user's computer, partially on the user's computer, as a standalone software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server. In the latter case, the remote computer can connect to the user's computer via any type of network, including a Local Area Network (LAN) or a Wide Area Network (WAN), or it can connect to an external computer (e.g., via the Internet using an Internet service provider). In some embodiments, to perform aspects of the invention, electronic circuits, including, for example, programmable logic circuits, field-programmable gate arrays (FPGAs), or programmable logic arrays (PLAs), can execute computer-readable program instructions to personalize the electronic circuits by utilizing state information of computer-readable program instructions.

[0125] For the purposes of this embodiment, computer program product 30 is a related product that includes machine executable program 31.

[0126] Therefore, those skilled in the art should recognize that although numerous exemplary embodiments of the present invention have been shown and described in detail herein, many other variations or modifications conforming to the principles of the present invention can be directly determined or derived from the disclosure of the present invention without departing from the spirit and scope of the invention. Thus, the scope of the present invention should be understood and construed as covering all such other variations or modifications.

Claims

1. A preprocessing method for wafer defect detection, comprising: Obtain the metal layer layout of the wafer to be inspected. The layout pattern of the metal layer layout includes solid regions and void regions. The solid regions are the regions in the metal layer layout where metal material actually exists, and the void regions are the regions in the metal layer layout where no metal material exists. The gap region is extracted from the layout graphic and used as the region to be processed; The boundary of the void region is broken to generate multiple broken edges, which are boundary line segments formed after the breaking process. Rectangular units of corresponding types are generated for different types of broken edges to divide the gap region; The generated rectangular cells are input into the wafer defect detection database; In the metal layer layout, the partial boundary of the void region along the first coordinate direction intersects with the partial boundary along the second coordinate direction to form a corner vertex. The corner vertex is divided into an inner concave corner vertex and an outer convex corner vertex according to the concave and convex characteristics of the boundary at its location. The steps for breaking the boundary of the void region include: Identify each concave corner vertex in the gap region, and for each concave corner vertex, project it onto its opposite side along the mutually perpendicular first coordinate direction and second coordinate direction to obtain the projection breakpoint; For any two opposite sides of any set of boundaries along the first coordinate direction and any two opposite sides of any set of boundaries along the second coordinate direction in the gap region, multiple pairs of evenly divided breakpoints are configured according to a preset interval distance. By passing through each of the concave corner vertices and its corresponding projection breakpoints, and by passing through each pair of equally divided breakpoints, the boundary of the void region is divided into multiple broken edges.

2. The preprocessing method for wafer defect detection according to claim 1, wherein, The types of broken edges include evenly divided broken edges, which refer to broken edges whose two endpoints are both evenly divided broken points; The steps for generating corresponding rectangular elements for different types of broken edges include: Select two equally divided edges that correspond to each other from the same set of boundaries of the void region; The two equally divided broken edges are used as a set of parallel edges, and the line connecting the corresponding endpoints of the two equally divided broken edges is used as another set of parallel edges, thereby generating an equally divided rectangular unit.

3. The preprocessing method for wafer defect detection according to claim 2, wherein, The evenly divided edge includes a first directional edge along the first coordinate direction and a second directional edge along the second coordinate direction. The step of generating corresponding rectangular units for different types of edge further includes: If the generated evenly divided rectangular unit has two first-direction broken edges, it is classified as a first-direction rectangular unit; If the generated equally divided rectangular unit has two second-direction broken edges, it is classified as a second-direction rectangular unit.

4. The preprocessing method for wafer defect detection according to claim 3, wherein, The step of generating corresponding rectangular units for different types of broken edges further includes: If the first directional rectangular unit has only two parallel sides that are in contact with the entity region, and the distance between the two parallel sides is within the first preset distance range, then it is further classified into the first directional height distance cluster group. If the first directional rectangular unit has only two parallel sides at the junction with the solid region, and the distance between the two parallel sides is within the second preset distance range, then it is further classified into the first directional low-distance cluster group. The maximum value of the second preset range is less than the minimum value of the first preset range.

5. The preprocessing method for wafer defect detection according to claim 3, wherein, The step of generating corresponding rectangular units for different types of broken edges further includes: If the second directional rectangular unit has three sides that connect with the solid region, and the distance between two parallel sides of the three sides is within the third preset distance range, then it is further classified into the second directional wide-spacing cluster group. If the second directional rectangular unit has three sides that connect with the solid region, and the distance between two parallel sides of the three sides is within the fourth preset distance range, then it is further classified into the second directional narrow-range cluster group. The maximum value of the fourth preset range is less than the minimum value of the third preset range.

6. The preprocessing method for wafer defect detection according to claim 1, wherein, The types of broken edges include angled broken edges, which refer to broken edges with one endpoint being the vertex of the concave corner or the vertex of the convex corner, and the other endpoint being the evenly divided break point; The steps for generating corresponding rectangular elements for different types of broken edges include: Identify the included angle formed by a pair of broken edges at the same bend in the gap region, wherein the pair of broken edges have a common concave or convex vertex. Based on the positional relationship of each included angle, a folded rectangle unit is generated, and the folded rectangle unit completely covers all the included angles at the same fold.

7. The preprocessing method for wafer defect detection according to claim 6, wherein, The steps for generating corresponding rectangular elements for different types of broken edges also include: For each of the folded rectangle units, a square reference rectangle unit with a preset side length is generated, such that one vertex of the reference rectangle unit coincides with the common point of the two folded edges of the folded rectangle unit, and the reference rectangle unit completely covers the folded rectangle unit. If the reference rectangular unit overlaps with the entity region, the corner rectangular unit is further classified into a corner dense cluster group. If the reference rectangular unit does not overlap with the entity region, the corner rectangular unit is further classified into a corner sparse cluster group.

8. The preprocessing method for wafer defect detection according to claim 1, wherein, The types of broken edges include end broken edges, which refer to broken edges where both endpoints are vertices of the outward convex corner; The steps for generating corresponding rectangular elements for different types of broken edges include: Identify the length of the broken end edge, generate two parallel edges that are parallel to and of equal length to the broken end edge, and make the two generated parallel edges symmetrically distributed about the broken end edge; The line connecting the corresponding endpoints of the two generated parallel sides is used as another set of parallel sides, thereby generating the end rectangular unit.

9. A computer program product comprising a computer program, which, when executed by a processor, is used to implement the preprocessing method for wafer defect detection according to any one of claims 1-8.

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