Digital signal circuit, board, system for hardware-in-the-loop test system

Abstract

The application relates to a digital signal circuit, a board card and a system for a hardware-in-the-loop test system, which integrate an input signal processing module and an output signal processing module on the same printed circuit board, reduce the number of board cards and the connection complexity required by the loop test, and arrange the input signal processing module and the output signal processing module on different layers of the printed circuit board respectively, so that the input signal and the output signal are transmitted through different layers of the printed circuit board respectively, the signal transmission direction does not need to be switched through a code switch, errors and inconvenience caused by manual operation are avoided, the operation process is simplified, and the test efficiency is improved; the above-mentioned digital signal circuit further arranges an electromagnetic shielding layer for connecting a fixed potential between the input signal processing module and the output signal processing module, so as to shield electromagnetic interference between the input signal processing module and the output signal processing module, can reduce interference between the input signal and the output signal, and improve the accuracy and stability of signal transmission.

Description

Technical Field

[0001] This application relates to the field of vehicle signal testing technology, and in particular to a digital signal circuit, board, and system for a hardware-in-the-loop testing system. Background Technology

[0002] Currently, in the field of automotive testing, HIL (Hardware-in-the-loop) testing is a widely used technology. HIL testing typically employs an NI chassis and test boards; the NI chassis simulates automotive equipment or electrical systems and outputs corresponding status signals, while the test boards facilitate the transmission of various signals between the NI chassis and the vehicle's ECU (Hardware-in-the-loop Electronic Control Unit). The NI chassis is manufactured by National Instruments (NI) and is used to integrate and manage various modular instruments and data acquisition devices.

[0003] The interaction between the NI chassis and the ECU involves both digital and analog signal exchanges. For the digital signal exchange, the voltage ranges of the digital signals corresponding to the NI chassis and the ECU are different. This necessitates that the digital processing module in the test board be able to process the digital signals exchanged between the NI chassis and the ECU, ensuring that both the NI chassis and the ECU receive signals within their respective voltage acquisition ranges. However, due to the complex environment of automotive testing, there may be numerous interference factors, potentially causing overvoltage or overcurrent in the circuit, which can severely affect the quality of the digital signals.

[0004] Therefore, how to improve the stability of digital signals during HIL testing is an urgent problem to be solved. Summary of the Invention

[0005] Therefore, it is necessary to provide a digital signal circuit, board, or system for a hardware-in-the-loop test system to address the problems in the prior art.

[0006] In a first aspect, this application provides a digital signal circuit for a hardware-in-the-loop test system, the digital signal circuit comprising:

[0007] An input signal processing module is used to receive an initial input signal from a first target device and process the initial input signal into a target input signal to send to a second target device;

[0008] An output signal processing module is configured to receive the initial output signal of the second target device and process the initial output signal into a target output signal and send it to the first target device.

[0009] The digital signal circuit is integrated on a printed circuit board, which includes a first layer, a second layer, a third layer and a fourth layer stacked in sequence.

[0010] One of the input signal processing module and the output signal processing module is disposed on the first layer, and the other is disposed on the fourth layer; the second layer is connected to a fixed potential and is used to shield the electromagnetic interference between the input signal processing module and the output signal processing module; the third layer is a power supply layer and is used to supply power to the input signal processing module and the output signal processing module respectively.

[0011] In one embodiment, the second layer is a solid metal layer that is grounded.

[0012] In one embodiment, the third layer includes:

[0013] The first power supply module is connected to the input signal processing module and is used to supply power to the input signal processing module.

[0014] The second power supply module is connected to the output signal processing module and is used to supply power to the output signal processing module.

[0015] An isolation module is disposed between the first power supply module and the second power supply module, and the isolation module is used to isolate electromagnetic interference between the first power supply module and the second power supply module.

[0016] In one embodiment, the isolation module includes a magnetic bead or an inductor.

[0017] In one embodiment, the input signal processing module includes:

[0018] A signal buffer circuit, wherein the input terminal of the signal buffer circuit is connected to the first target device, and the output terminal of the signal buffer circuit is connected to the second target device;

[0019] An input protection circuit is connected to the input terminal of the signal buffer circuit. The input protection circuit is used to limit the voltage and current of the initial input signal. The input protection circuit includes a current-limiting resistor and a Zener diode. The current-limiting resistor is located at the input terminal of the signal buffer circuit. The anode of the Zener diode is connected to a fixed potential, and the cathode is connected to the input terminal of the signal buffer circuit.

[0020] In one embodiment, the output signal processing module includes:

[0021] A signal driving circuit, wherein the input terminal of the signal driving circuit is connected to the first target device, and the output terminal of the signal buffer circuit is connected to the second target device;

[0022] An output filtering circuit is connected to the output terminal of the signal driving circuit and is used to filter out high-frequency noise in the target output signal.

[0023] In one embodiment, the input terminal of the signal driving circuit is further connected to a first voltage divider resistor and a second voltage divider resistor.

[0024] In one embodiment, the first target device is an in-vehicle control module; the second target device is a test chassis.

[0025] Secondly, this application provides a hardware-in-the-loop test board, comprising:

[0026] The digital signal circuit for a hardware-in-the-loop test system as described in the first aspect is electrically connected to other functional modules in the test system via board connectors to exchange signals.

[0027] A power supply module, electrically connected to the digital signal circuit, is used to provide operating power to the digital signal circuit.

[0028] The signal interface module is located at the edge of the hardware-in-the-loop test board and is used to connect the first object device and the second object device.

[0029] Thirdly, this application provides a testing system, including a first object device, a second object device, and a hardware-in-the-loop test board as described in the second aspect. One end of the hardware-in-the-loop test board is connected to the first object device, and the other end is connected to the second object device. The first object device and the second object device exchange signals through the hardware-in-the-loop test board.

[0030] The digital signal circuit, board, and system for hardware-in-the-loop testing (HIBT) of this application integrate the input signal processing module and the output signal processing module on the same printed circuit board, reducing the number of boards and connection complexity required for HIBT. Furthermore, the input and output signal processing modules are located on different layers of the printed circuit board, allowing input and output signals to be transmitted across these different layers without the need for DIP switches to switch signal transmission directions. This avoids errors and inconvenience caused by manual operation, simplifies the operation process, and improves testing efficiency. The digital signal circuit also includes a fixed-potential electromagnetic shielding layer between the input and output signal processing modules to shield against electromagnetic interference. This reduces interference between input and output signals, improving the accuracy and stability of signal transmission, thus enhancing testing accuracy and making HIBT more efficient and reliable. Attached Figure Description

[0031] To more clearly illustrate the technical solutions in the embodiments of this application or the conventional technology, the drawings used in the description of the embodiments or the conventional technology will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0032] Figure 1 This is a schematic diagram of a printed circuit board for a hardware-in-the-loop (HIL) test system provided in one embodiment.

[0033] Figure 2 This is a schematic diagram of the first layer of a printed circuit board provided in one embodiment;

[0034] Figure 3 This is a schematic diagram of the second layer of a printed circuit board provided in one embodiment;

[0035] Figure 4 This is a schematic diagram of the third layer of a printed circuit board provided in one embodiment;

[0036] Figure 5 This is a block diagram of the third layer of a printed circuit board provided in one embodiment;

[0037] Figure 6 This is a block diagram of the fourth layer of a printed circuit board provided in one embodiment;

[0038] Figure 7 This is an equivalent circuit diagram of the input signal processing module provided in one embodiment;

[0039] Figure 8 This is an equivalent circuit diagram of the output signal processing module provided in one embodiment. Detailed Implementation

[0040] To facilitate understanding of this application, a more complete description will be provided below with reference to the accompanying drawings, which illustrate preferred embodiments of the application. However, this application may be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided so that the disclosure of this application will be thorough and complete.

[0041] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the application.

[0042] It is understood that the terms "first," "second," etc., used herein may be used to describe various elements, but these elements are not limited by these terms. These terms are only used to distinguish one element from another. For example, without departing from the scope of this application, a first resistor may be referred to as a second resistor, and similarly, a second resistor may be referred to as a first resistor. Both the first resistor and the second resistor are resistors, but they are not the same resistor.

[0043] It is understood that the term "connection" in the following embodiments should be understood as "electrical connection," "communication connection," etc., if the connected circuits, modules, units, etc., have electrical signal or data transmission with each other.

[0044] It is understandable that "at least one" refers to one or more, and "multiple" refers to two or more. "At least a part of an element" refers to part or all of an element.

[0045] When used herein, the singular forms of “a,” “an,” and “ / the” may also include the plural forms unless the context clearly indicates otherwise. It should also be understood that the terms “comprising / including” or “having,” etc., specify the presence of the stated features, wholes, steps, operations, components, parts, or combinations thereof, but do not preclude the possibility of the presence or addition of one or more other features, wholes, steps, operations, components, parts, or combinations thereof. Meanwhile, the term “and / or” as used in this specification includes any and all combinations of the associated listed items.

[0046] In related technologies, during hardware-in-the-loop (HIL) testing, the input and output signals of the NI chassis and the automotive ECU are processed through two independent boards, with the input and output directions changed via DIP switches. However, this design can lead to signal interference, affecting the accuracy of the test. Furthermore, manually switching DIP switches to change the signal direction is cumbersome and error-prone, and the physical characteristics of the DIP switches also limit the speed and flexibility of signal switching.

[0047] According to an exemplary embodiment, this application provides a digital signal circuit for a hardware-in-the-loop (HIL) test system. The digital signal circuit is used to implement bidirectional signal conditioning and isolation between a first object device and a second object device. The digital signal circuit includes an input signal processing module and an output signal processing module. The input signal processing module receives an initial input signal from the first object device and processes the initial input signal into a target input signal, which is then sent to the second object device. The initial input signal is a digital signal input from the first object device to the second object device. The output signal processing module receives an initial output signal from the second object device and processes the initial output signal into a target output signal, which is then sent to the first object device. The initial output signal is a digital signal output from the second object device to the first object device. (Referring to...) Figure 1 As shown, in conjunction with reference Figures 2-6 The digital signal circuitry is integrated on the printed circuit board 10, which includes a first layer 11, a second layer 12, a third layer 13, and a fourth layer 14 stacked sequentially. One of the input signal processing module and the output signal processing module is disposed on the first layer 11, and the other is disposed on the fourth layer 14. The second layer 12 is connected to a fixed potential and is used to shield the electromagnetic interference between the input signal processing module and the output signal processing module. The third layer 13 is a power supply layer, which is used to supply power to the input signal processing module and the output signal processing module respectively.

[0048] The digital signal circuit described above for the hardware-in-the-loop test system integrates the input signal processing module and the output signal processing module on the same printed circuit board 10, reducing the number of boards and connection complexity required for in-the-loop testing. The input and output signal processing modules are respectively located on different layers of the printed circuit board 10, allowing input and output signals to be transmitted across these different layers without the need for DIP switches to switch signal transmission directions. This avoids errors and inconvenience caused by manual operation, simplifies the operation process, and improves testing efficiency. Furthermore, the digital signal circuit includes a fixed-potential electromagnetic shielding layer between the input and output signal processing modules to shield against electromagnetic interference. This reduces interference between input and output signals, improving the accuracy and stability of signal transmission, thus enhancing test accuracy and making in-the-loop testing more efficient and reliable.

[0049] In some embodiments, refer to Figure 3 The second layer, 12, is a full-layer metal layer, which is grounded. For example, the second layer, 12, can be a copper metal layer, and the thickness of the copper metal layer can be 15μm-20μm. For example, the thickness of the copper metal layer can be 15μm, 17μm, 17.5μm, 18μm, 19μm, or 20μm.

[0050] In some embodiments, the area of ​​the second metal layer 12 can be smaller than the areas of the first layer 11 and the fourth layer 14. The second layer 12 only needs to be able to shield the signal interference between the first layer 11 and the fourth layer 14. For example, the area ratio of the second layer 12 to the first layer 11 can be 0.3:1 to 1:1. Specifically, the area ratio of the second layer 12 to the first layer 11 can be 0.3:1, 0.4:1, 0.5:1, 0.6:1, 0.7:1, 0.8:1, 0.9:1, or 1:1.

[0051] In some embodiments, refer to Figure 4 , Figure 5 The third layer 13 includes a first power supply module 131, a second power supply module 132, and an isolation module 133. The first power supply module 131 is connected to the input signal processing module and supplies power to it. The second power supply module 132 is connected to the output signal processing module and supplies power to it. The isolation module 133 is located between the first power supply module 131 and the second power supply module 132 and is used to isolate electromagnetic interference between them. For example, the isolation module 133 may contain a ferrite bead or an inductor.

[0052] In this embodiment of the digital signal circuit, the first power supply module 131 and the second power supply module 132 of the power supply layer are independently set to supply power to the input signal processing module and the output signal processing module, respectively, so as to meet the different voltage requirements of the input signal processing module and the output signal processing module. An isolation module 133 is set between the first power supply module 131 and the second power supply module 132 to reduce noise coupling between the first power supply module 131 and the second power supply module 132, so as to ensure the stability and reliability of the voltage source.

[0053] In some embodiments, the wiring of the input signal processing module is disposed on the first layer 11 of the printed circuit board 10. The signal buffer circuit is connected to the first power supply module 131 of the power supply layer, and the first power supply module 131 supplies power to the signal buffer circuit. The supply voltage of the first power supply module 131 is 4.5V-5.5V. The wiring of the output signal processing module is disposed on the fourth layer 14 of the printed circuit board 10. The signal driving circuit is connected to the second power supply module 132 of the power supply layer, and the second power supply module 132 supplies power to the signal driving circuit. The supply voltage of the first power supply module 131 is 8V-12V.

[0054] In other embodiments, reference is made to Figure 2 , Figure 7 The wiring of the output signal processing module is set on the fourth layer 14 of the printed circuit board 10, and the wiring of the input signal processing module is set on the fourth layer 14 of the printed circuit board 10.

[0055] In some embodiments, the metal layer of the second layer 12 is provided with through-holes, so that the power supply lines of the power supply layer of the third layer 13 can pass through the through-holes of the second layer 12 and connect to the input signal processing module or output signal processing module of the first layer 11 to supply power to it. This simplifies the wiring setup, reduces wiring difficulty, reduces voltage drop and electromagnetic interference (EMI) on the power supply lines, significantly improves the power quality received by the signal processing module of the first layer 11, and ensures the accuracy and stability of signal processing.

[0056] In this embodiment, after the power supply line passes through the through-hole of the second layer 12, the gaps in the through-hole surrounding the power supply line are filled with resin material. The resin material has excellent insulation properties, effectively isolating the power supply line from the surrounding metal layers and preventing short circuits and leakage. The resin material tightly wraps the power supply line, reducing the risk of breakage or deformation due to stress concentration when the printed circuit board 10 is subjected to external stresses such as vibration, impact, or thermal expansion and contraction.

[0057] In some embodiments, refer to Figure 2 , Figure 7The input signal processing module includes a signal buffer circuit and an input protection circuit. The input terminal of the signal buffer circuit is connected to a first target device, and the output terminal is connected to a second target device. The input protection circuit is connected to the input terminal of the signal buffer circuit and is used to limit the voltage and current of the initial input signal. The input protection circuit includes a current-limiting resistor and a Zener diode. The current-limiting resistor is located at the input terminal of the signal buffer circuit, and the anode of the Zener diode is grounded, while the cathode is connected to the input terminal of the signal buffer circuit. The current-limiting resistor limits the current of the initial input signal to prevent overcurrent damage to the signal buffer circuit. The Zener diode clamps the voltage of the initial input signal within a safe range to prevent voltage spikes from damaging the signal buffer circuit. The current-limiting resistor R1 limits the magnitude of the current input to the signal buffer circuit, thus providing overcurrent protection. Furthermore, the Zener diode regulates the voltage of the signal input to the input terminal of the signal buffer circuit, ensuring a stable input signal level. For example, the current-limiting resistor has a resistance range of 3.3kΩ-6.8kΩ; for example, the Zener diode has a clamping voltage of 5.1V±0.2V.

[0058] The signal buffer circuit can be a buffer chip, with the specification SN74LVC1G34DBVR. The buffer chip is used to enhance the driving capability of the input signal and ensure that the input signal can be stably transmitted to the second object device.

[0059] The signal buffer circuit receives the initial input signal from the first target device, buffers and shapes the waveform of the initial input signal, eliminates distortion, and then sends the processed target input signal to the second target device. The buffer chip can adopt a rail-to-rail output architecture and can ensure signal integrity within a power supply voltage range of 4.5V to 5.5V.

[0060] The interaction process of digital signals between the first and second target devices involves the fact that the voltage ranges of the digital signals corresponding to the first and second target devices are different. To enable the interaction signals between the first and second target devices, the digital signals need to be processed accordingly, ensuring that both devices can receive signals within their respective voltage acquisition ranges. In this embodiment, the input signal processing module converts the initial input signal output by the first target device into a target input signal that can be accepted by the second target device.

[0061] In this embodiment, the power supply pin of the buffer chip is connected to the first power supply module 131. The power supply pin of the buffer chip is also grounded through the first filter capacitor C11. The first filter capacitor C11 is a 0.1μF multilayer ceramic capacitor used to suppress high-frequency noise in the power supply line of the first power supply module 131.

[0062] In some embodiments, refer to Figure 6 , Figure 8 The output signal processing module includes a signal driving circuit and an output filtering circuit. The input terminal of the signal driving circuit is connected to the second target device, and the output terminal of the signal buffer circuit is connected to the first target device. The output filtering circuit is connected to the output terminal of the signal driving circuit and is used to filter out high-frequency noise in the target output signal. The output filtering circuit includes a second filtering capacitor, C1, which is a 0.1μF multilayer ceramic capacitor.

[0063] The signal driving circuit can be a driver chip, with the specification being MCP1404T-E / SN. The signal driving circuit receives the initial output signal from the second target device, performs driving processing on the initial output signal to enhance the driving capability of the initial input signal, converts the initial output signal output by the second target device into a target output signal that can be accepted by the first target device, and sends the processed target output signal to the first target device.

[0064] In some embodiments, the input terminal of the signal driving circuit is further connected to a first voltage-dividing resistor R1 and a second voltage-dividing resistor R2. The first voltage-dividing resistor R1 is connected in series between the output terminal of the second target device and the input terminal of the signal driving circuit; one end of the second voltage-dividing resistor R2 is connected to the input terminal of the signal driving circuit, and the other end is grounded. The first voltage-dividing resistor R1 and the second voltage-dividing resistor R2 can achieve voltage division, and the effective voltage division ratio is R1 / (R1+R2). Since the initial high-level voltage of the output signal of the second target device is VCC, the high level input to the signal driving circuit is VCC*R1 / (R1+R2). The first voltage-dividing resistor R1 and the second voltage-dividing resistor R2 achieve the function of voltage division, thereby reducing the voltage input to the signal driving circuit. Therefore, this also reduces the current in the circuit, thus providing overcurrent protection for the output signal processing module.

[0065] In some embodiments, the output terminal of the signal driving circuit is further provided with a pull-up resistor.

[0066] In some embodiments, refer to Figure 6 , Figure 8The driver chip includes two input terminals: a first input terminal INA and a second input terminal INB. The first input terminal INA is grounded through a second pull-down resistor R2, and the second input terminal INB is connected to the power supply of the second power supply module 132 through a pull-up resistor R3 and grounded through a third pull-down resistor R4. The power supply pin of the driver chip is directly connected to the power supply of the second power supply module 132.

[0067] The driver chip includes two output terminals: a first output terminal OUTA and a second output terminal B. The first output terminal OUTA is connected to the switching power supply through a second filter capacitor C1, and the second output terminal OUTB of the driver chip is left floating. Only the first output terminal OUTA is used to drive the first target device.

[0068] In some embodiments, the first object device is an on-board control module (ECU); the second object device is a test chassis (NI).

[0069] Secondly, this application provides a hardware-in-the-loop test board, including a digital signal circuit, a power supply module, and a signal interface module as described in the first aspect for a hardware-in-the-loop test system. The digital signal circuit is electrically connected to other functional modules in the test system via a board connector to exchange signals. The power supply module is electrically connected to the digital signal circuit and provides operating power to the digital signal circuit. The signal interface module is disposed at the edge of the hardware-in-the-loop test board and is used to connect a first target device and a second target device. The signal interface module uses a standardized interface to ensure compatibility with different types of devices. In this embodiment, the interface pins of the signal interface module are gold-plated to improve the reliability of signal transmission and oxidation resistance.

[0070] In this embodiment, the power supply module adopts a switching power supply design with an input voltage range of 9V-36V and two output voltages: 5V±0.1V and 12V±0.2V. These output voltages respectively meet the different power supply requirements of the first power supply module 131 and the second power supply module 132 on the power layer of the printed circuit board 10 in the digital signal circuit. Under full load, the output voltage stability of the power supply module is such that the 5V output voltage fluctuation does not exceed ±0.05V, and the 12V output voltage fluctuation does not exceed ±0.1V. Furthermore, the conversion efficiency of the power supply module is not less than 85% to reduce energy loss and heat generation.

[0071] In some embodiments, the hardware-in-the-loop test board further includes a fixed mounting structure for securing the hardware-in-the-loop test board device in a slot within the HIL test chassis, ensuring the board is firmly installed within the chassis and preventing loosening. For example, the fixed mounting structure may have guide grooves, and the HIL test chassis slot may have guide bars. The guide grooves of the fixed mounting structure cooperate with the guide bars of the test chassis slot to ensure smooth insertion and removal of the board, reducing the risk of damage to the board or slot due to misoperation.

[0072] In some embodiments, the signal interface module also has electrostatic discharge (ESD) protection, with a transient voltage suppressor diode connected in parallel at the interface pin. The transient voltage suppressor diode is used to quickly discharge electrostatic charge and protect the digital signal circuit from ESD damage. For example, the transient voltage suppressor diode has a breakdown voltage of 6V-8V and a clamping voltage of 12V-15V.

[0073] The aforementioned hardware-in-the-loop test board integrates the input signal processing module and the output signal processing module on the same printed circuit board, reducing the number of boards and connection complexity required for in-the-loop testing. Furthermore, by placing the input and output signal processing modules on different layers of the printed circuit board 10, the input and output signals can be transmitted across these different layers without the need for DIP switches to switch the signal transmission direction. This avoids errors and inconvenience caused by manual operation, simplifies the operation process, and improves testing efficiency. The aforementioned digital signal circuit also includes a fixed-potential electromagnetic shielding layer between the input and output signal processing modules to shield against electromagnetic interference. This reduces interference between input and output signals, improving the accuracy and stability of signal transmission, thus enhancing testing accuracy and making in-the-loop testing more efficient and reliable.

[0074] Thirdly, this application provides a testing system, including a first object device, a second object device, and a hardware-in-the-loop test board as described in the second aspect. One end of the hardware-in-the-loop test board is connected to the first object device, and the other end is connected to the second object device. The first object device and the second object device exchange signals through the hardware-in-the-loop test board.

[0075] In the description of this specification, references to terms such as "some embodiments," "other embodiments," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of this application. In this specification, the illustrative descriptions of the above terms do not necessarily refer to the same embodiments or examples.

[0076] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features of the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0077] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the patent application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this patent application should be determined by the appended claims.

Claims

1. A digital signal circuit for a hardware-in-the-loop test system, characterized in that, For vehicle-mounted testing, the digital signal circuit includes: An input signal processing module is used to receive an initial input signal from a first target device and process the initial input signal into a target input signal to send to a second target device; the first target device is an in-vehicle control module and the second target device is a test chassis. An output signal processing module is used to receive an initial output signal from the second target device and process the initial output signal into a target output signal, which is then sent to the first target device. The output signal processing module includes a signal driving circuit and an output filtering circuit. The signal driving circuit has a first input terminal and a second input terminal. The first input terminal is grounded through a second pull-down resistor, and the second input terminal is connected to the power supply of a second power supply module through a pull-up resistor and grounded through a third pull-down resistor. The signal driving circuit also has a first output terminal and a second output terminal. The second output terminal is left floating, and only the first output terminal is connected to the first target device to output the target output signal. The output filtering circuit is connected to the first output terminal of the signal driving circuit and is used to filter out high-frequency noise in the target output signal. The digital signal circuit is integrated on a printed circuit board, which includes a first layer, a second layer, a third layer and a fourth layer stacked in sequence. One of the input signal processing module and the output signal processing module is disposed on the first layer, and the other is disposed on the fourth layer; the second layer is connected to a fixed potential and is used to shield the electromagnetic interference between the input signal processing module and the output signal processing module; the third layer is a power supply layer and is used to supply power to the input signal processing module and the output signal processing module respectively; the second power supply module is disposed on the power supply layer and is used to supply power to the output signal processing module.

2. The digital signal circuit for a hardware-in-the-loop test system according to claim 1, characterized in that, The second layer is a solid metal layer, which is grounded.

3. The digital signal circuit for a hardware-in-the-loop test system according to claim 1, characterized in that, The third layer includes a first power supply module, a second power supply module, and an isolation module; the first power supply module is connected to the input signal processing module and is used to supply power to the input signal processing module; the isolation module is located between the first power supply module and the second power supply module and is used to isolate electromagnetic interference between the first power supply module and the second power supply module.

4. The digital signal circuit for a hardware-in-the-loop test system according to claim 3, characterized in that, The isolation module includes a magnetic bead or an inductor.

5. The digital signal circuit for a hardware-in-the-loop test system according to any one of claims 1-4, characterized in that, The input signal processing module includes: A signal buffer circuit, wherein the input terminal of the signal buffer circuit is connected to the first target device, and the output terminal of the signal buffer circuit is connected to the second target device; An input protection circuit is connected to the input terminal of the signal buffer circuit. The input protection circuit is used to limit the voltage and current of the initial input signal. The input protection circuit includes a current-limiting resistor and a Zener diode. The current-limiting resistor is located at the input terminal of the signal buffer circuit. The anode of the Zener diode is connected to a fixed potential, and the cathode is connected to the input terminal of the signal buffer circuit.

6. A hardware-in-the-loop test board, characterized in that, include: The digital signal circuit for a hardware-in-the-loop test system as described in any one of claims 1-5, wherein the digital signal circuit is electrically connected to other functional modules in the test system via a board connector to exchange signals; A power supply module, electrically connected to the digital signal circuit, is used to provide operating power to the digital signal circuit. The signal interface module is located at the edge of the hardware-in-the-loop test board and is used to connect the first object device and the second object device.

7. A testing system, characterized in that, It includes a first object device, a second object device, and a hardware-in-the-loop test board as described in claim 6. One end of the hardware-in-the-loop test board is connected to the first object device, and the other end is connected to the second object device. The first object device and the second object device exchange signals through the hardware-in-the-loop test board.

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