A back contact cell and photovoltaic module

Abstract

The application discloses a back contact cell and a photovoltaic module, and relates to the technical field of photovoltaic technology, so that a first dielectric passivation layer has higher field passivation and chemical passivation effects on a first doped semiconductor part, and meanwhile, the influence of a second dielectric passivation layer on field passivation of a second doped semiconductor part is reduced. The back contact cell comprises a semiconductor substrate, a first doped semiconductor part, a second doped semiconductor part, a first dielectric passivation layer and a second dielectric passivation layer. The first dielectric passivation layer and the second dielectric passivation layer both comprise a first sub-passivation layer with a field passivation function. The first doped semiconductor part is opposite to the fixed charge conductive type of the first sub-dielectric layer. The first dielectric passivation layer comprises a first sub-passivation layer, and the thickness of the first sub-passivation layer comprised by the second dielectric passivation layer is greater than that of the first sub-passivation layer comprised by the first dielectric passivation layer. The first dielectric passivation layer and the second dielectric passivation layer both further comprise a second sub-passivation layer with a chemical passivation function.

Description

[0001] This application is a divisional application of Chinese Patent Application No. 202411534982.2, filed on October 30, 2024, entitled "A Back Contact Battery and Photovoltaic Module". Furthermore, this application claims priority to Chinese Patent Application No. 202411278194.1, filed on September 12, 2024, entitled "A Back Contact Battery and Photovoltaic Module", the entire contents of which are incorporated herein by reference. Technical Field

[0002] This invention relates to the field of photovoltaic technology, and more particularly to a back-contact battery and a photovoltaic module. Background Technology

[0003] A solar cell is a device that converts sunlight into electrical energy. Specifically, when a solar cell is in operation, sunlight shines on the semiconductor pn junction of the solar cell, forming new electron-hole pairs. Under the influence of the built-in electric field of the pn junction, photogenerated holes flow to the p-region, and photogenerated electrons flow to the n-region. When the circuit is connected, a current is generated. A solar cell where both the positive and negative electrodes are located on the back side of the cell is called a back-contact cell. Compared to double-sided contact solar cells, the front side of a back-contact cell is not obstructed by metal electrodes, resulting in higher light utilization on the light-facing side. Therefore, back-contact cells have higher short-circuit current and photoelectric conversion efficiency, making them one of the current technological directions for achieving high-efficiency crystalline silicon solar cells. Furthermore, the aforementioned back-contact cell may include a surface passivation layer that combines field passivation and chemical passivation functions to improve the passivation effect on the side of the back-contact cell with this surface passivation layer.

[0004] However, existing back-contact batteries, including those with surface passivation layers that combine field passivation and chemical passivation functions, cannot simultaneously meet the passivation requirements of the P-region and the N-region, resulting in poor battery performance. Summary of the Invention

[0005] The purpose of this invention is to provide a back contact battery and a photovoltaic module, which, in view of the difference in conductivity between the first doped semiconductor portion and the second doped semiconductor portion, allows the first dielectric passivation layer to have a high field passivation and chemical passivation effect on the first doped semiconductor portion, while reducing the influence of the second dielectric passivation layer on the field passivation of the second doped semiconductor portion, thereby improving the working efficiency of the back contact battery.

[0006] To achieve the above objectives, in a first aspect, the present invention provides a back-contact battery comprising: a semiconductor substrate, a first doped semiconductor portion, a second doped semiconductor portion, a first dielectric passivation layer, and a second dielectric passivation layer. The first doped semiconductor portion and the second doped semiconductor portion have opposite conductivity types. Both the first dielectric passivation layer and the second dielectric passivation layer include a first sub-passivation layer having a field passivation function. The conductivity type of the first doped semiconductor portion is opposite to the conductivity type of the fixed charge of the first sub-passivation layer. The semiconductor substrate has opposing first and second surfaces. Along a direction parallel to the first surface, the first doped semiconductor portion and the second doped semiconductor portion are alternately distributed on the first surface. The first dielectric passivation layer covers the side of the first doped semiconductor portion facing away from the semiconductor substrate, and the second dielectric passivation layer covers the side of the second doped semiconductor portion facing away from the semiconductor substrate. Both the first dielectric passivation layer and the second dielectric passivation layer further include a second sub-passivation layer having a chemical passivation function. The second sub-passivation layer is disposed on the side of the first sub-passivation layer facing away from the semiconductor substrate. The material of the second sub-passivation layer included in the first dielectric passivation layer is different from the material of the first sub-passivation layer included in the first dielectric passivation layer. The material of the second sub-passivation layer included in the second dielectric passivation layer is different from the material of the first sub-passivation layer included in the second dielectric passivation layer. The ratio of the refractive index of the first dielectric passivation layer to the refractive index of the second dielectric passivation layer is greater than or equal to 0.9 and less than or equal to 1.1; and / or, the refractive indices of the first dielectric passivation layer and / or the second dielectric passivation layer are greater than or equal to 2.0 and less than or equal to 2.2.

[0007] In the above-described technical solution, the conductivity types of the first doped semiconductor portion and the second doped semiconductor portion are opposite. Furthermore, the conductivity type of the first doped semiconductor is opposite to the conductivity type of the fixed charge of the first sub-passivation layer covering the side of the first doped semiconductor portion facing away from the semiconductor substrate, and the first sub-passivation layer covering the side of the second doped semiconductor portion facing away from the semiconductor substrate. Moreover, the first sub-passivation layers included in both the first and second dielectric passivation layers not only have chemical passivation functions but also field passivation functions. Furthermore, the first sub-passivation layer included in the first dielectric passivation layer induces a charge with the opposite conductivity type to that of the first doped semiconductor portion on the side near the first doped semiconductor portion, while the side of the first sub-passivation layer included in the first dielectric passivation layer has a charge with the same conductivity type as that of the first doped semiconductor portion on the side facing away from the first doped semiconductor portion. This creates an electric field at the first sub-passivation layer included in the first dielectric passivation layer. Because the conductivity type of the fixed charge of the first sub-passivation layer included in the first dielectric passivation layer is opposite to the conductivity type of the dopant in the first doped semiconductor portion, this electric field can shield minority carriers, enhancing the carrier collection and separation capabilities of the first doped semiconductor portion. Secondly, the presence of both the first sub-passivation layer and the second sub-passivation layer in the second dielectric passivation layer can chemically passivate the surface of the second doped semiconductor portion, reducing surface defects of the second doped semiconductor portion. This is beneficial for the portion corresponding to the first doped semiconductor portion and the portion corresponding to the second doped semiconductor portion on the back side of the back contact battery to have a lower carrier recombination rate and a higher carrier separation capability, thereby improving the working performance of the back contact battery.

[0008] Furthermore, when the ratio of the refractive index of the first dielectric passivation layer to that of the second dielectric passivation layer is greater than or equal to 0.9 and less than or equal to 1.1, the refractive indices of the first and second dielectric passivation layers are approximately the same. This is beneficial because the portions corresponding to the first and second dielectric passivation layers on the back side of the battery have approximately the same light refraction, which facilitates uniform light absorption and helps maintain the balance of electrons and holes. In addition, when the refractive indices of the first and / or second dielectric passivation layers are within the aforementioned range, their refractive indices have a higher refractive effect on light, which allows more light to pass through the refractive indices of the first and / or second dielectric passivation layers into the semiconductor substrate, improving the bifaciality of the battery.

[0009] As one possible implementation, the thickness of the first sub-passivation layer included in the first dielectric passivation layer is greater than the thickness of the first sub-passivation layer included in the second dielectric passivation layer.

[0010] When the above technical solution is adopted, the electric field formed within the first sub-passivation layer of the second dielectric passivation layer will form a reverse field at the second doped semiconductor portion, which has the same type of conductivity as its own fixed charge. At this time, the field passivation function of the second dielectric passivation layer weakens the electric field of the second doped semiconductor portion, affecting the carrier collection capability of the second doped semiconductor portion. Furthermore, the field passivation effect of the first sub-passivation layer is proportional to its thickness. Based on this, when the thickness of the first sub-passivation layer included in the first dielectric passivation layer is greater than the thickness of the first sub-passivation layer included in the second dielectric passivation layer, the thickness of the first sub-passivation layer disposed on the side of the second doped semiconductor portion away from the semiconductor substrate is smaller. At this time, the first sub-passivation layer included in the second dielectric passivation layer with a smaller thickness can weaken its own effect on the reverse field of the second doped semiconductor portion, which is beneficial to enable the second doped semiconductor portion to have a higher carrier collection efficiency. At the same time, the presence of the first sub-passivation layer and the second sub-passivation layer included in the second dielectric passivation layer can chemically passivate the surface of the second doped semiconductor portion, reducing the surface defects of the second doped semiconductor portion. In addition, when the thickness of the first sub-passivation layer disposed on the side of the first doped semiconductor portion away from the semiconductor substrate is larger, the first sub-passivation layer with a larger thickness has a higher field passivation effect on the first doped semiconductor portion with the same field, which enhances the carrier collection capability of the first doped semiconductor portion and reduces the surface defects of the first doped semiconductor portion. As can be seen, in the back contact battery provided by the present invention, for the different conductivity types of the first doped semiconductor portion and the second doped semiconductor portion, the first dielectric passivation layer has a high field passivation and chemical passivation effect on the first doped semiconductor portion, while reducing the influence of the second dielectric passivation layer on the field passivation of the second doped semiconductor portion. At the same time, it meets the passivation requirements of two doped semiconductor portions with different conductivity types, thereby enabling both the portion corresponding to the first doped semiconductor portion and the portion corresponding to the second doped semiconductor portion on the back side of the back contact battery to have a lower carrier recombination rate and a higher carrier separation capability, thus improving the working performance of the back contact battery.

[0011] As one possible implementation, under the same test conditions, on the back side of the back contact battery, the PL brightness value corresponding to the portion corresponding to the second doped semiconductor portion is greater than the PL brightness value corresponding to the portion corresponding to the first doped semiconductor portion.

[0012] When using the above technical solution, the PL brightness value refers to the light emitted by the battery under illumination. The magnitude of this PL brightness value is related to the passivation performance of the tested portion, representing the comprehensive passivation effect of all film layers at the location corresponding to the first doped semiconductor portion or the location corresponding to the second doped semiconductor portion. This includes, for example, the comprehensive passivation effect of the tunneling passivation layer, the doped semiconductor portion, and the dielectric passivation layer. Specifically, under the same test conditions, a larger PL brightness value indicates higher passivation performance for that portion, and a smaller PL brightness value indicates lower passivation performance for that portion. Therefore, when the PL brightness value corresponding to the second doped semiconductor portion on the back-light side of the back contact battery is greater than the PL brightness value corresponding to the first doped semiconductor portion, it represents the comprehensive passivation effect of all film layers at the location corresponding to the first doped semiconductor portion or the location corresponding to the second doped semiconductor portion, including, for example, the comprehensive passivation effect of the tunneling passivation layer, the doped semiconductor portion, and the dielectric passivation layer. In the back-light side of the back contact battery provided by this invention, the passivation performance of the portion corresponding to the second doped semiconductor portion is higher than that of the portion corresponding to the first doped semiconductor portion. Meanwhile, the PL brightness values ​​of the two regions can also indirectly reflect the chemical passivation effect. That is, the chemical passivation effect of the second dielectric passivation layer is greater than that of the first dielectric passivation layer. By using chemical passivation to enhance the overall passivation effect of the corresponding second doped semiconductor part, the difference in passivation effect between the part corresponding to the first doped semiconductor part and the part corresponding to the second doped semiconductor part on the back side of the back contact battery is reduced. At the same time, the passivation requirements of two doped semiconductor parts with different conductivity types are met. This helps to ensure that the part corresponding to the first doped semiconductor part and the part corresponding to the second doped semiconductor part on the back side of the back contact battery both have a lower carrier recombination rate and a higher carrier separation capability, thereby improving the working performance of the back contact battery.

[0013] As one possible implementation, the thickness of the first sub-passivation layer is greater than or equal to 2 nm and less than or equal to 15 nm. In this case, the thickness of the first sub-passivation layer within this range prevents a low passivation effect due to excessive thickness, ensuring a low carrier recombination rate on the side of the first and second doped semiconductor sections facing away from the semiconductor substrate. Furthermore, it prevents a significant impact on the carrier collection efficiency of the second doped semiconductor section due to excessive thickness, ensuring a high conversion efficiency for the back-contact battery.

[0014] As one possible implementation, the thickness of the first sub-passivation layer included in the first dielectric passivation layer is greater than or equal to 4 nm and less than or equal to 15 nm. In this case, the relatively large thickness of the first sub-passivation layer included in the first dielectric passivation layer can further enhance the field passivation effect of the first sub-passivation layer included in the first dielectric passivation layer on the first doped semiconductor portion. This is beneficial for further reducing the difference in passivation effect between the portion corresponding to the first doped semiconductor portion and the portion corresponding to the second doped semiconductor portion on the back surface side of the back contact battery, thereby further improving the working performance of the back contact battery.

[0015] As one possible implementation, the thickness of the first sub-passivation layer included in the second dielectric passivation layer is greater than or equal to 2 nm and less than or equal to 8 nm.

[0016] When the above technical solution is adopted, the thickness of the first sub-passivation layer included in the second dielectric passivation layer is within the above range. This helps to prevent the overall passivation effect of the first sub-passivation layer included in the second dielectric passivation layer from being low due to its small thickness, and ensures that the second doped semiconductor portion has fewer surface defects on the side away from the semiconductor substrate. In addition, it also helps to prevent the field passivation effect of the first sub-passivation layer included in the second dielectric passivation layer from being high due to its large thickness, and ensures that the second doped semiconductor portion has a high carrier collection efficiency.

[0017] As one possible implementation, the thickness of the second sub-passivation layer included in the first dielectric passivation layer is less than the thickness of the second sub-passivation layer included in the second dielectric passivation layer.

[0018] When the above technical solution is adopted, the second sub-passivation layer, which has a larger thickness (relative to the second sub-passivation layer included in the first dielectric passivation layer), is disposed in the first sub-passivation layer, which has a smaller thickness (relative to the first sub-passivation layer included in the first dielectric passivation layer). This is beneficial because the second sub-passivation layer, which has a larger thickness, can compensate for the weakening of the field passivation effect of the first sub-passivation layer included in the second dielectric passivation layer on the side of the second doped semiconductor portion away from the semiconductor substrate. This further reduces the number of surface defects on the side of the second doped semiconductor portion away from the semiconductor substrate, and helps to reduce the difference in passivation effect between the portion corresponding to the first doped semiconductor portion and the portion corresponding to the second doped semiconductor portion on the back surface side of the back contact battery, thereby improving the working performance of the back contact battery.

[0019] As one possible implementation, the difference between the thickness of the second sub-passivation layer included in the second dielectric passivation layer and the thickness of the second sub-passivation layer included in the first dielectric passivation layer is greater than or equal to 0.5 nm and less than or equal to 5 nm.

[0020] When the above technical solution is adopted, the difference between the thickness of the second sub-passivation layer included in the second dielectric passivation layer and the thickness of the second sub-passivation layer included in the first dielectric passivation layer is within the aforementioned range. This prevents the chemical passivation effects of the second sub-passivation layer included in the second dielectric passivation layer and the second sub-passivation layer included in the first dielectric passivation layer from being approximately the same due to a small difference. This ensures that the difference in chemical passivation effects between the portions corresponding to the first doped semiconductor portion and the second doped semiconductor portion on the backlight side can be compensated by the second sub-passivation layer included in the second dielectric passivation layer. It also prevents the passivation effect of the second sub-passivation layer included in the first dielectric passivation layer from being too small due to a large difference, or from being too large due to a large difference, resulting in a high amount of consumables used, which helps control the manufacturing cost of the battery.

[0021] As one possible implementation, the thickness of the second sub-passivation layer is greater than or equal to 50 nm and less than or equal to 160 nm. In this case, the thickness of the second sub-passivation layer within this range helps prevent a weak passivation effect due to a smaller thickness, ensuring a lower carrier recombination rate on the back-side of the back contact battery and improving its performance. Furthermore, it also prevents excessive material consumption due to a larger thickness of the second sub-passivation layer, thus helping to control the manufacturing cost of the back contact battery.

[0022] As one possible implementation, the thickness of the first dielectric passivation layer is less than the thickness of the second dielectric passivation layer. In this case, since the thickness of the first sub-passivation layer included in the first dielectric passivation layer is greater than the thickness of the second sub-passivation layer included in the second dielectric passivation layer, it is advantageous for the thickness of the second sub-passivation layer included in the first dielectric passivation layer to be less than the thickness of the second sub-passivation layer included in the second dielectric passivation layer when the thickness of the first dielectric passivation layer is less than the thickness of the second sub-passivation layer included in the second dielectric passivation layer. Based on this, the application principle of the beneficial effect of the thickness of the first dielectric passivation layer being less than the thickness of the second dielectric passivation layer can refer to the application principle of the beneficial effect of the thickness of the second sub-passivation layer included in the first dielectric passivation layer being less than the thickness of the second sub-passivation layer included in the second dielectric passivation layer described above, and will not be repeated here.

[0023] As one possible implementation, the ratio of the thickness of the first dielectric passivation layer to the thickness of the second dielectric passivation layer is greater than or equal to 0.9 and less than or equal to 1.1.

[0024] When the ratio of the thickness of the first dielectric passivation layer to the thickness of the second dielectric passivation layer is greater than or equal to 0.9 and less than or equal to 1.1, the thickness of the first dielectric passivation layer disposed on the side of the first doped semiconductor portion away from the semiconductor substrate is approximately the same as the thickness of the second dielectric passivation layer disposed on the side of the second doped semiconductor portion away from the semiconductor substrate. This is beneficial to ensure that the first dielectric passivation layer and the second dielectric passivation layer have approximately the same overall passivation effect, thereby further reducing the difference in passivation effect between the portion corresponding to the first doped semiconductor portion and the portion corresponding to the second doped semiconductor portion on the back light side of the back contact battery.

[0025] As one possible implementation, the thickness of the first dielectric passivation layer and / or the second dielectric passivation layer is greater than or equal to 52 nm and less than or equal to 175 nm.

[0026] When the thickness of the first dielectric passivation layer and / or the second dielectric passivation layer is within the above-mentioned range, the appropriate thickness of the first dielectric passivation layer and / or the second dielectric passivation layer prevents the passivation effect of the first dielectric passivation layer and / or the second dielectric passivation layer from being too weak due to a small thickness value. It can also prevent the distribution density of microstructures in the first dielectric passivation layer and / or the second dielectric passivation layer from being too large or the consumption of consumables from being too high. This ensures that the back contact battery has high working efficiency while helping to control the manufacturing cost of the battery.

[0027] As one possible implementation, the first sub-passivation layer included in the first dielectric passivation layer is an aluminum oxide layer, and under the test conditions of an exposure time of 0.2s and a light intensity of 1sun, the PL brightness value corresponding to the side of the first sub-passivation layer of the first dielectric passivation layer away from the semiconductor substrate is greater than or equal to 5000, and / or, the PL brightness value corresponding to the side of the first sub-passivation layer of the second dielectric passivation layer away from the semiconductor substrate is greater than or equal to 16500.

[0028] With the above technical solution, the alumina layer contains a large number of oxygen negative ions, which can form a high-density fixed negative charge at the interface between itself and the first doped semiconductor, forming a built-in electric field that shields minority carriers, thereby improving the carrier collection efficiency and carrier separation capability of the first doped semiconductor. Secondly, under test conditions of 0.2s exposure time and 1s light intensity, when the PL brightness value corresponding to the side of the first sub-passivation layer of the first dielectric passivation layer facing away from the semiconductor substrate is greater than or equal to 5000, the presence of the first sub-passivation layer in the thicker first dielectric passivation layer improves the field passivation effect on the first doped semiconductor, which is beneficial for further reducing the difference in passivation effect between the portion corresponding to the first doped semiconductor and the portion corresponding to the second doped semiconductor on the back side of the back contact battery. Furthermore, if the PL brightness value corresponding to the side of the first sub-passivation layer of the second dielectric passivation layer away from the semiconductor substrate is within the aforementioned range, the second doped semiconductor portion can be chemically passivated and / or field passivated by the first sub-passivation layer of the second dielectric passivation layer. This can minimize the impact of its own field passivation function on the carrier collection efficiency of the second doped semiconductor portion, ensuring that the second doped semiconductor portion has a high carrier separation capability. This is beneficial for further reducing the difference in passivation effect between the portion corresponding to the first doped semiconductor portion and the portion corresponding to the second doped semiconductor portion on the back light side of the back contact battery.

[0029] As one possible implementation, when both the first dielectric passivation layer and the first dielectric passivation layer include aluminum oxide layers, the ratio between the PL brightness value corresponding to the side of the first sub-passivation layer of the second dielectric passivation layer away from the semiconductor substrate and the PL brightness value corresponding to the side of the first sub-passivation layer of the first dielectric passivation layer away from the semiconductor substrate is greater than or equal to 2.5 and less than or equal to 3.4. In this case, compared to the ratio between the PL brightness value corresponding to the side of the second doped semiconductor portion away from the semiconductor substrate and the PL brightness value corresponding to the side of the first doped semiconductor portion away from the semiconductor substrate (approximately greater than or equal to 3 and less than or equal to 4), when the ratio between the PL brightness value corresponding to the side of the first sub-passivation layer included in the second dielectric passivation layer away from the semiconductor substrate and the PL brightness value corresponding to the side of the first sub-passivation layer included in the first dielectric passivation layer away from the semiconductor substrate is greater than or equal to 2.5 and less than or equal to 3.4, the ratio between the aforementioned PL brightness values ​​is smaller. That is, the presence of the first sub-passivation layer included in the first dielectric passivation layer and the second dielectric passivation layer helps to reduce the difference in passivation effect between the portion corresponding to the first doped semiconductor portion and the portion corresponding to the second doped semiconductor portion on the back side of the back contact battery, while simultaneously fulfilling the passivation requirements of two doped semiconductor portions with different conductivity types.

[0030] As one possible implementation, the surface reflectivity of the first doped semiconductor portion on the side away from the semiconductor substrate is greater than the surface reflectivity of the second doped semiconductor portion on the side away from the semiconductor substrate.

[0031] With the above technical solution, it can be understood that surface reflectivity is inversely proportional to specific surface area; the larger the specific surface area, the higher the light-trapping effect and the lower the surface reflectivity. Secondly, specific surface area is directly proportional to surface roughness; the larger the specific surface area, the higher the surface roughness. Based on this, when the surface reflectivity of the first doped semiconductor portion on the side facing away from the semiconductor substrate is greater than the surface reflectivity of the second doped semiconductor portion on the side facing away from the semiconductor substrate, the surface roughness of the first doped semiconductor portion on the side facing away from the semiconductor substrate is smaller, and the surface roughness of the second doped semiconductor portion on the side facing away from the semiconductor substrate is larger. Under the same conditions, the deposition thickness of the first sub-passivation layer, which includes the first dielectric passivation layer and the second dielectric passivation layer, is inversely proportional to the roughness of the surface to which it is deposited. Therefore, when the surface roughness of the side of the first doped semiconductor portion away from the semiconductor substrate is small, it is advantageous to form a relatively thick first sub-passivation layer on the side of the first doped semiconductor portion away from the semiconductor substrate under the same process conditions. This improves the field passivation effect of the first sub-passivation layer. On the other hand, a relatively thin first sub-passivation layer is formed on the side of the second doped semiconductor portion away from the semiconductor substrate. This reduces the field passivation effect of the first sub-passivation layer, reduces the ratio of the PL brightness values ​​of the portion corresponding to the first doped semiconductor portion and the portion corresponding to the second doped semiconductor portion on the back surface of the battery, and reduces the degree of passivation differentiation. Furthermore, when the surface roughness of the second doped semiconductor portion on the side away from the semiconductor substrate is large, it is beneficial to form a first sub-passivation layer, which is a relatively thin second dielectric passivation layer, on the side away from the semiconductor substrate, thereby reducing the field passivation effect of the first sub-passivation layer on the second doped semiconductor portion on the carrier collection efficiency of the second doped semiconductor portion.

[0032] As one possible implementation, when the surface reflectivity of the first doped semiconductor portion on the side facing away from the semiconductor substrate is greater than that of the second doped semiconductor portion on the side facing away from the semiconductor substrate, the surface of the first doped semiconductor portion facing away from the semiconductor substrate has a first texture structure, and the surface of the second doped semiconductor portion facing away from the semiconductor substrate has a second texture structure. The one-dimensional dimensions of the first texture structure and the second texture structure are different.

[0033] By adopting the above technical solution, the one-dimensional dimensions of the first texture structure and the second texture structure can be adjusted to make the reflectivity of the surface of the first doped semiconductor part facing away from the semiconductor substrate greater and its surface roughness lower. This facilitates the formation of a first sub-passivation layer, which is part of a first dielectric passivation layer with a relatively large thickness, on the side of the first doped semiconductor part facing away from the semiconductor substrate, thereby improving the field passivation effect of the first sub-passivation layer. Conversely, a first sub-passivation layer, which is part of a second dielectric passivation layer with a relatively small thickness, is formed on the side of the second doped semiconductor part facing away from the semiconductor substrate, thereby reducing the field passivation effect of the first sub-passivation layer. This reduces the ratio of the PL brightness values ​​of the portion corresponding to the first doped semiconductor part and the portion corresponding to the second doped semiconductor part on the back surface of the battery, thus reducing the degree of passivation differentiation. Furthermore, the surface of the second doped semiconductor portion with the second texture structure facing away from the semiconductor substrate has a lower reflectivity and a higher surface roughness, which is beneficial for forming a first sub-passivation layer of the second dielectric passivation layer with a relatively small thickness on the side of the second doped semiconductor portion facing away from the semiconductor substrate, thereby reducing the impact of the field passivation effect of the first sub-passivation layer of the second dielectric passivation layer on the carrier collection efficiency of the second doped semiconductor portion.

[0034] As one possible implementation, when the first doped semiconductor section is a P-type doped semiconductor section and the second doped semiconductor section is an N-type doped semiconductor section, the doping concentration of the dopant in the first doped semiconductor section is less than the doping concentration of the dopant in the second doped semiconductor section, and / or the thickness of the first doped semiconductor section is greater than the thickness of the second doped semiconductor section.

[0035] As described above, the first sub-passivation layer included in the first dielectric passivation layer can form a superimposed field at the first doped semiconductor portion, improving the carrier collection efficiency of the first doped semiconductor portion. However, the first sub-passivation layer included in the second dielectric passivation layer forms a reverse field at the second doped semiconductor portion, affecting its carrier collection efficiency. Therefore, when the doping concentration of the dopant in the second doped semiconductor portion is high, the electric field strength generated by the second doped semiconductor portion itself is greater. This can compensate for the difference in carrier collection capability between the second and first doped semiconductor portions caused by the suppression effect of the reverse field formed by the field passivation function of the first sub-passivation layer included in the second dielectric passivation layer, thus facilitating the uniform collection of carriers of different conductivity types.

[0036] As one possible implementation, when the first doped semiconductor portion is a P-type doped semiconductor portion and the second doped semiconductor portion is an N-type doped semiconductor portion, the thickness of the first doped semiconductor portion is greater than the thickness of the second doped semiconductor portion. In this case, it is beneficial to increase the field passivation effect of the first doped semiconductor portion on the corresponding area surface of the semiconductor substrate, which can further reduce the ratio of the PL brightness value of the portion corresponding to the first doped semiconductor portion and the portion corresponding to the second doped semiconductor portion on the backlight side of the battery, thereby reducing the degree of difference in passivation.

[0037] As one possible implementation, the first sub-passivation layer of the first dielectric passivation layer includes a hydrogen-containing passivation layer, and a local region of the hydrogen-containing passivation layer has a microstructure.

[0038] With the above technical solution, the presence of the microstructure indicates that the hydrogen ion content in the hydrogen-containing passivation layer is sufficient, resulting in a higher hydrogen passivation effect on the corresponding doped semiconductor portion and further reducing surface defects of the corresponding doped semiconductor portion. Specifically, at least one microstructure can be a bulge structure along the direction away from the semiconductor substrate. In this case, there is a bulge-enclosed space between the hydrogen-containing passivation layer with the microstructure and the corresponding doped semiconductor portion. The bulge-enclosed space contains hydrogen gas that generates the bulge structure, further reducing surface defects of the corresponding doped semiconductor portion. Furthermore, the hydrogen gas within the bulge structure can continuously provide hydrogen ions during subsequent manufacturing processes or battery operation, achieving continuous hydrogen passivation of the corresponding doped semiconductor portion, which is beneficial for improving battery yield and extending battery life.

[0039] Furthermore, at least one microstructure can also be a centrally recessed or bulging microstructure with cyclone-like edges (in which case the microstructure exhibits a morphology resembling a fluid rotating around a straight or curved axis in a certain direction). This indicates a higher hydrogen content within the hydrogen-containing passivation layer, resulting in a sufficient amount of hydrogen ions that are not used for hydrogen passivation. These ions then escape from the hydrogen-containing passivation layer, causing the microstructure to burst. Based on this, when the hydrogen-containing passivation layer includes this type of microstructure, it has a higher hydrogen passivation effect on the corresponding doped semiconductor portion. Moreover, after bursting, an uneven microstructure can be formed on the side of the hydrogen-containing passivation layer facing away from the semiconductor substrate, which helps reduce the reflectivity of this side and improves its light-trapping effect.

[0040] As one possible implementation, when both the first sub-passivation layer included in the first dielectric passivation layer and the first sub-passivation layer included in the second dielectric passivation layer include hydrogen-containing passivation layers, the distribution density of the microstructure in the first sub-passivation layer included in the first dielectric passivation layer is greater than the distribution density of the microstructure in the first sub-passivation layer included in the second dielectric passivation layer.

[0041] With the above technical solution, it is understood that the greater the thickness and / or the higher the density of the hydrogen-containing passivation layer, the higher its hydrogen content, and the easier it is for hydrogen to escape and form the aforementioned microstructure after heating. Based on this, when the distribution density of the microstructure within the first sub-passivation layer included in the first dielectric passivation layer is greater than the distribution density of the microstructure within the first sub-passivation layer included in the second dielectric passivation layer, it is advantageous to have a greater thickness and / or higher film density (compared to the first sub-passivation layer included in the second dielectric passivation layer), ensuring that the first sub-passivation layer includes the first dielectric passivation layer has a higher field passivation effect on the first doped semiconductor portion. Simultaneously, it is advantageous to have a smaller thickness and / or lower film density in the first sub-passivation layer included in the second dielectric passivation layer, reducing the impact of the field passivation function of the first sub-passivation layer included in the second dielectric passivation layer on the carrier collection efficiency of the second doped semiconductor portion, ensuring that the back contact battery has a higher operating efficiency.

[0042] As one possible implementation, at least one microstructure has a size greater than or equal to 10 μm and less than or equal to 20 μm.

[0043] When the above technical solution is adopted, as mentioned above, the presence of the aforementioned microstructure within the hydrogen-containing passivation layer indicates sufficient hydrogen ion content, resulting in a high chemical passivation effect on the corresponding doped semiconductor portion. However, the presence of this microstructure also prevents at least a portion of the hydrogen-containing passivation layer from contacting the corresponding doped semiconductor portion, meaning that at least a portion of the hydrogen-containing passivation layer at the microstructure cannot passivate the corresponding doped semiconductor portion. Therefore, when the size of the microstructure is within the aforementioned range, it prevents the hydrogen content within the hydrogen-containing passivation layer itself from being too small; secondly, it also prevents the effective contact area between the hydrogen-containing passivation layer and the corresponding doped semiconductor portion from being too large, ensuring a high passivation effect of the hydrogen-containing passivation layer on the corresponding doped semiconductor portion. Furthermore, it also prevents the thickness of the first sub-passivation layer included in the second dielectric passivation layer from being too large, which would negatively impact the carrier collection efficiency of the second doped semiconductor portion.

[0044] As one possible implementation, at least one microstructure has a height greater than or equal to 0.1 μm and less than or equal to 0.5 μm. The application principle of the beneficial effects in this case is similar to that of the beneficial effects of microstructures with dimensions greater than or equal to 10 μm and less than or equal to 20 μm as described above, and will not be repeated here.

[0045] As one possible implementation, the first doped semiconductor portion and / or the second doped semiconductor portion have an uneven anti-reflection structure formed at a position corresponding to the microstructure. In this case, reducing the reflectivity of the side of the first doped semiconductor portion and / or the second doped semiconductor portion away from the semiconductor substrate facilitates the refraction of more light into the semiconductor substrate through the first doped semiconductor portion and / or the second doped semiconductor portion, thereby improving the bifaciality of the battery.

[0046] As one possible implementation, the aforementioned back contact battery further includes a third passivation layer disposed on the second surface, the thickness of which is greater than the thickness of the portion of the first sub-passivation layer included in the first dielectric passivation layer. In this case, the second surface of the semiconductor substrate is effectively chemically passivated by the thicker third passivation layer, reducing the number of surface defects and carrier recombination rate on the second surface.

[0047] As one possible implementation, the first sub-passivation layer included in the first dielectric passivation layer and the first sub-passivation layer included in the second dielectric passivation layer are made of the same material. In this case, it is beneficial to reduce the types of materials used to manufacture different structures of the back contact battery, improve the compatibility between different structures, and improve the yield of the back contact battery.

[0048] As one possible implementation, the first sub-passivation layer included in the first dielectric passivation layer and the first sub-passivation layer included in the second dielectric passivation layer are integrally continuous. In this case, the first sub-passivation layer included in the first dielectric passivation layer and the first sub-passivation layer included in the second dielectric passivation layer can be formed simultaneously using the same material and in the same step, which improves the manufacturing efficiency of the back contact battery while reducing the manufacturing cost of the back contact battery.

[0049] As one possible implementation, under the same test conditions, the ratio of the PL brightness value of the first sub-passivation layer included in the second dielectric passivation layer on the side facing away from the semiconductor substrate to the PL brightness value of the first sub-passivation layer included in the first dielectric passivation layer on the side facing away from the semiconductor substrate is PL1. Furthermore, under the same test conditions, the ratio of the PL brightness value of the second sub-passivation layer included in the second dielectric passivation layer on the side facing away from the semiconductor substrate to the PL brightness value of the second sub-passivation layer included in the first dielectric passivation layer on the side facing away from the semiconductor substrate is PL2, where PL2 is less than PL1. In this case, by providing second sub-passivation layers of different thicknesses in the first dielectric passivation layer and second sub-passivation layers included in the second dielectric passivation layer, the difference in passivation effect between the portion corresponding to the first doped semiconductor portion and the portion corresponding to the second doped semiconductor portion on the back-light side of the back contact battery can be further reduced.

[0050] As one possible implementation, when the second sub-passivation layer is a silicon nitride layer, PL2 is greater than or equal to 1.62 and less than or equal to 1.9. In this case, with the second sub-passivation layer formed, the ratio of the PL brightness value of the portion corresponding to the first doped semiconductor portion and the portion corresponding to the second doped semiconductor portion on the backlight side of the battery can be further reduced, thereby reducing the degree of passivation differentiation.

[0051] As one possible implementation, the difference between the refractive index of the second sub-passivation layer included in the second dielectric passivation layer and the refractive index of the second sub-passivation layer included in the first dielectric passivation layer is greater than or equal to 0.01 and less than or equal to 0.1.

[0052] As one possible implementation, the material of the second sub-passivation layer included in the first dielectric passivation layer is the same as the material of the second sub-passivation layer included in the second dielectric passivation layer. In this case, it is beneficial to reduce the types of materials used to manufacture different structures of the back contact battery, improve the compatibility between different structures, and improve the yield of the back contact battery.

[0053] As one possible implementation, the second sub-passivation layer included in the first dielectric passivation layer and the second sub-passivation layer included in the second dielectric passivation layer are integrally continuous. In this case, the second sub-passivation layer included in the first dielectric passivation layer and the second sub-passivation layer included in the second dielectric passivation layer can be formed simultaneously based on the same material and in the same step, which improves the manufacturing efficiency of the back contact battery while helping to reduce the manufacturing cost of the back contact battery.

[0054] As one possible implementation, the surface of the first doped semiconductor part facing away from the semiconductor substrate has a first tower-like texture structure, and the surface of the second doped semiconductor part facing away from the semiconductor substrate has a second tower-like texture structure. The one-dimensional dimensions of the first tower-like texture structure and the one-dimensional dimensions of the second tower-like texture structure are different.

[0055] As one possible implementation, the side length of the first tower-based texture structure is greater than the side length of the second tower-based texture structure.

[0056] As one possible implementation, the height of the first tower-based texture structure is less than the height of the second tower-based texture structure.

[0057] In a second aspect, the present invention provides a photovoltaic module comprising a back contact battery provided in the first aspect and various implementations thereof.

[0058] The beneficial effects of the second aspect and its various implementations in this invention can be found in the analysis of the beneficial effects of the first aspect and its various implementations, and will not be repeated here. Attached Figure Description

[0059] The accompanying drawings, which are included to provide a further understanding of the invention and form part of this invention, illustrate exemplary embodiments of the invention and are used to explain the invention, but do not constitute an undue limitation of the invention. In the drawings:

[0060] Figure 1 A longitudinal sectional view of the back contact battery provided in an embodiment of the present invention. Figure 1 ;

[0061] Figure 2 A longitudinal sectional view of the back contact battery provided in an embodiment of the present invention. Figure 2 ;

[0062] Figure 3 A longitudinal sectional view of the back contact battery provided in an embodiment of the present invention. Figure 3 ;

[0063] Figure 4 A longitudinal sectional view of the back contact battery provided in an embodiment of the present invention. Figure 4 ;

[0064] Figure 5 A longitudinal sectional view of the back contact battery provided in an embodiment of the present invention. Figure 5 ;

[0065] Figure 6 3D model of a local area on the back surface side of a back contact battery provided in an embodiment of the present invention. Figure 1 ;

[0066] Figure 7 3D model of a local area on the back surface side of a back contact battery provided in an embodiment of the present invention. Figure 2 ;

[0067] Figure 8 SEM of a local area on the back surface side of the back contact battery provided in an embodiment of the present invention. Figure 1 ;

[0068] Figure 9 SEM of a local area on the back surface side of the back contact battery provided in an embodiment of the present invention. Figure 2 ;

[0069] Figure 10 A 3D scan image of a partial area on the backlight side of a back-contact battery provided in an embodiment of the present invention;

[0070] Figure 11 SEM image of a local area of ​​the first doped semiconductor portion away from the semiconductor substrate in a back contact battery provided in an embodiment of the present invention;

[0071] Figure 12A longitudinal sectional view of the back contact battery provided in an embodiment of the present invention. Figure 6 ;

[0072] Figure 13 A test diagram of the PL brightness value on the back side of the finished structure of the back contact battery provided in an embodiment of the present invention;

[0073] Figure 14 This is a schematic diagram of the connection relationship of a photovoltaic module provided in an embodiment of the present invention.

[0074] Reference numerals: 11 is a semiconductor substrate, 12 is a first doped semiconductor section, 13 is a second doped semiconductor section, 14 is a first dielectric passivation layer, 15 is a second dielectric passivation layer, 16 is a first texture structure, 17 is a second texture structure, 18 is a microstructure, 19 is an anti-reflection structure, 20 is a third passivation layer, 21 is a first sub-passivation layer, 22 is a second sub-passivation layer, and 23 is an interface passivation layer. Detailed Implementation

[0075] Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings. However, it should be understood that these descriptions are merely exemplary and not intended to limit the scope of the invention. Furthermore, descriptions of well-known structures and techniques are omitted in the following description to avoid unnecessarily obscuring the concept of the invention.

[0076] The accompanying drawings illustrate various structural schematic diagrams according to embodiments of the present invention. These drawings are not to scale, and some details have been enlarged for clarity, and some details may have been omitted. The shapes of the various regions and layers shown in the drawings, as well as their relative sizes and positional relationships, are merely exemplary and may deviate from reality due to manufacturing tolerances or technical limitations. Furthermore, those skilled in the art can design regions / layers with different shapes, sizes, and relative positions as needed.

[0077] In the context of this invention, when a layer / element is referred to as being "on" another layer / element, the layer / element may be directly on the other layer / element, or there may be an intermediate layer / element between them. Furthermore, if a layer / element is "on" another layer / element in one orientation, then when the orientation is reversed, the layer / element may be "below" the other layer / element. To make the technical problems, technical solutions, and beneficial effects of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.

[0078] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this invention, "a plurality of" means two or more, unless otherwise explicitly specified. "Several" means one or more, unless otherwise explicitly specified.

[0079] In the description of this invention, it should be noted that, unless otherwise explicitly specified and limited, the terms "installation," "connection," and "linking" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components. Those skilled in the art can understand the specific meaning of the above terms in this invention according to the specific circumstances.

[0080] A solar cell is a device that converts sunlight into electrical energy. Specifically, when a solar cell is in operation, sunlight shines on the semiconductor pn junction of the solar cell, forming new electron-hole pairs. Under the influence of the built-in electric field of the pn junction, photogenerated holes flow to the p-region, and photogenerated electrons flow to the n-region. When the circuit is connected, a current is generated. A solar cell where both the positive and negative electrodes are located on the back side of the cell is called a back-contact cell. Compared to double-sided contact solar cells, the front side of a back-contact cell is not obstructed by metal electrodes, resulting in higher light utilization on the light-facing side. Therefore, back-contact cells have higher short-circuit current and photoelectric conversion efficiency, making them one of the current technological directions for achieving high-efficiency crystalline silicon solar cells. Furthermore, the aforementioned back-contact cell may include a surface passivation layer that combines field passivation and chemical passivation functions to improve the passivation effect on the side of the back-contact cell with this surface passivation layer.

[0081] However, existing back-contact batteries, including those with surface passivation layers that combine field and chemical passivation functions, cannot simultaneously meet the passivation requirements of both the P-region and the N-region, resulting in poor battery performance. Specifically, these back-contact batteries typically include a semiconductor substrate, a first doped semiconductor portion, a second doped semiconductor portion, and a surface passivation layer. The first and second doped semiconductor portions are alternately distributed on the same side of the semiconductor substrate, and their conductivity types are opposite. The surface passivation layer covers the side of the first and second doped semiconductor portions that faces away from the semiconductor substrate. Furthermore, the surface passivation layer (such as an aluminum oxide layer and / or a silicon nitride layer) not only has a chemical passivation function, enabling chemical passivation of the side of the first doped semiconductor portion and the second doped semiconductor portion away from the semiconductor substrate; but also, the surface passivation layer has a fixed charge conductivity type opposite to that of the first doped semiconductor portion, which makes the surface passivation layer also have a field passivation function, enabling field passivation of the first doped semiconductor portion, that is, strengthening the electric field of the first doped semiconductor portion, and shielding minority carriers through the electric field formed by the surface passivation layer, thereby accelerating the collection of majority carriers.

[0082] However, the field passivation function of the aforementioned surface passivation layer weakens the electric field of the second doped semiconductor, affecting its ability to collect charge carriers. In this situation, existing back-contact batteries including the aforementioned surface passivation layer do not employ differentiated passivation designs for the different conductivity types of the first and second doped semiconductors. This results in either a large thickness of the surface passivation layer on both the first and second doped semiconductors leading to poor carrier collection capability in the second doped semiconductor, or a small thickness of the surface passivation layer on both the first and second doped semiconductors resulting in poor passivation of the first doped semiconductor. This is detrimental to improving the operating efficiency of the back-contact battery.

[0083] To address the aforementioned technical problems, in a first aspect, embodiments of the present invention provide a back-contact battery. For example... Figure 1As shown, the back contact battery includes: a semiconductor substrate 11, a first doped semiconductor portion 12, a second doped semiconductor portion 13, a first dielectric passivation layer 14, and a second dielectric passivation layer 15. The first doped semiconductor portion 12 and the second doped semiconductor portion 13 have opposite conductivity types. Both the first dielectric passivation layer 14 and the second dielectric passivation layer 15 include a first sub-passivation layer 21 having field passivation and chemical passivation functions. The conductivity type of the first doped semiconductor portion 12 is opposite to the conductivity type of the first sub-passivation layer 21 with fixed charge. The semiconductor substrate 11 has opposing first and second surfaces. Along a direction parallel to the first surface, the first doped semiconductor portion 12 and the second doped semiconductor portion 13 are alternately distributed on the first surface. The first dielectric passivation layer 14 covers the side of the first doped semiconductor portion 12 facing away from the semiconductor substrate 11, and the second dielectric passivation layer 15 covers the side of the second doped semiconductor portion 13 facing away from the semiconductor substrate 11. The thickness of the first sub-passivation layer 21 included in the first dielectric passivation layer 14 is greater than the thickness of the first sub-passivation layer 21 included in the second dielectric passivation layer 15. Figure 1 As shown, the first dielectric passivation layer 14 and the second dielectric passivation layer may further include a second sub-passivation layer 22 with chemical passivation function. The second sub-passivation layer 22 is disposed on the side of the first sub-passivation layer 21 facing away from the semiconductor substrate 11. The material of the second sub-passivation layer 22 included in the first dielectric passivation layer 14 is different from the material of the first sub-passivation layer 21 included in the first dielectric passivation layer 14. The material of the second sub-passivation layer 22 included in the second dielectric passivation layer 15 is different from the material of the first sub-passivation layer 21 included in the second dielectric passivation layer 15.

[0084] In the above-described technical solution, the conductivity types of the first doped semiconductor portion and the second doped semiconductor portion are opposite. Furthermore, the conductivity type of the first doped semiconductor is opposite to the conductivity type of the fixed charge of the first sub-passivation layer included in the first dielectric passivation layer covering the side of the first doped semiconductor portion away from the semiconductor substrate, and the first sub-passivation layer included in the second dielectric passivation layer covering the side of the second doped semiconductor portion away from the semiconductor substrate. Moreover, the first sub-passivation layer included in the first dielectric passivation layer induces a charge with the opposite conductivity type to that of the first doped semiconductor portion on the side near the first doped semiconductor portion, while the side of the first sub-passivation layer included in the first dielectric passivation layer away from the first doped semiconductor portion has a charge with the same conductivity type as that of the first doped semiconductor portion. This creates an electric field at the first sub-passivation layer included in the first dielectric passivation layer. Because the conductivity type of the fixed charge of the first sub-passivation layer included in the first dielectric passivation layer is opposite to the conductivity type of the dopant in the first doped semiconductor portion, this electric field can shield minority carriers, enhancing the carrier collection and separation capabilities of the first doped semiconductor portion. Conversely, the electric field formed within the first sub-passivation layer, which is part of the second dielectric passivation layer, will create a reverse field at the second doped semiconductor portion, which has the same type of conductivity as its own fixed charge. In this case, the field passivation function of the first sub-passivation layer within the second dielectric passivation layer weakens the electric field of the second doped semiconductor portion, affecting its carrier collection capability. Furthermore, within a certain range, the field passivation effect of the first sub-passivation layer within both the first and second dielectric passivation layers is proportional to its thickness. Based on this, as... Figure 1As shown, when the thickness of the first sub-passivation layer 21 included in the first dielectric passivation layer 14 is greater than the thickness of the first sub-passivation layer 21 included in the second dielectric passivation layer 15, the thickness of the first sub-passivation layer 21 included in the second dielectric passivation layer 15 disposed on the side of the second doped semiconductor portion 13 away from the semiconductor substrate 11 is smaller. At this time, the first sub-passivation layer 21 included in the second dielectric passivation layer 15 with a smaller thickness can weaken its own effect on the reverse field of the second doped semiconductor portion 13, which is beneficial to make the second doped semiconductor portion 13 have a higher carrier collection efficiency. At the same time, the first sub-passivation layer 21 included in the second dielectric passivation layer 15 The presence of layer 21 and the second sub-passivation layer 22 can both chemically passivate the surface of the second doped semiconductor portion 13, reducing surface defects of the second doped semiconductor portion 13. In addition, the first sub-passivation layer 21 included in the first dielectric passivation layer 14 disposed on the side of the first doped semiconductor portion 12 away from the semiconductor substrate 11 has a larger thickness. At this time, the first sub-passivation layer 21 included in the first dielectric passivation layer 14 with a larger thickness has a higher field passivation effect on the first doped semiconductor portion 12 in the same direction, which enhances the carrier collection capability of the first doped semiconductor portion 12 and reduces surface defects of the first doped semiconductor portion 12. As can be seen, in the back contact battery provided by the embodiments of the present invention, for the different conductivity types of the first doped semiconductor portion 12 and the second doped semiconductor portion 13, the first dielectric passivation layer 14 has a high field passivation and chemical passivation effect on the first doped semiconductor portion 12, while reducing the weakening effect of the second dielectric passivation layer 15 on the field passivation of the second doped semiconductor portion 13. This simultaneously meets the passivation requirements of the two doped semiconductor portions with different conductivity types, thereby enabling both the portion corresponding to the first doped semiconductor portion 12 and the portion corresponding to the second doped semiconductor portion 13 on the back surface side of the back contact battery to have a low carrier recombination rate and a high carrier separation capability, thus improving the working performance of the back contact battery. 。

[0085] In practical applications, the embodiments of the present invention do not specifically limit the material and conductivity type of the semiconductor substrate. For example, the semiconductor substrate can be a silicon substrate. Alternatively, the semiconductor substrate can be a germanium-silicon substrate, a germanium substrate, or a gallium arsenide substrate, or any other semiconductor material. Furthermore, the semiconductor substrate can be an N-type semiconductor substrate or a P-type semiconductor substrate.

[0086] Secondly, the aforementioned semiconductor substrate includes a first surface and a second surface opposite to each other. The first surface of the semiconductor substrate corresponds to the back-lighting surface of the back contact battery, and the second surface of the semiconductor substrate corresponds to the light-facing surface of the back contact battery. Wherein, as... Figure 1 and Figure 2 As shown, the second surface of the semiconductor substrate 11 can be either flat or textured. When the second surface of the semiconductor substrate 11 is textured, it helps to improve the light trapping effect of the second surface and improve the light utilization rate of the back contact battery.

[0087] Regarding the surface morphology of the first surface of the semiconductor substrate, the first doped semiconductor portion and the second doped semiconductor portion are alternately distributed on the first surface of the semiconductor substrate. Furthermore, the surface morphology of the first doped semiconductor portion and the second doped semiconductor portion on the side facing away from the semiconductor substrate is affected by the surface morphology of the corresponding regions of the semiconductor substrate where the two doped semiconductor portions are formed. The surface morphology of the first doped semiconductor portion and the second doped semiconductor portion on the side facing away from the semiconductor substrate affects their own surface roughness, thereby affecting the thickness of the first sub-passivation layer and the first sub-passivation layer included in the first dielectric passivation layer formed on the side facing away from the semiconductor substrate, respectively. Based on this, the surface morphology of different regions in the semiconductor substrate can be determined according to the thickness requirements of the first sub-passivation layer and the first sub-passivation layer included in the first dielectric passivation layer in the actual application scenario.

[0088] For example, the first surface of the semiconductor substrate can be a polished surface or a textured structure can be further formed on the polished surface. Furthermore, in the first surface, the side length of the tower-like textured structure formed on the surface of the region corresponding to the first doped semiconductor portion can be greater than the side length of the tower-like textured structure formed on the surface of the region corresponding to the second doped semiconductor portion; and / or, in the first surface, the height of the tower-like textured structure formed on the surface of the region corresponding to the first doped semiconductor portion can be less than the height of the tower-like textured structure formed on the surface of the region corresponding to the second doped semiconductor portion.

[0089] For example, the first surface of the semiconductor substrate can be textured. Furthermore, on the first surface, the base side length (or diagonal length) of the pyramid-shaped textured structure formed on the surface of the region corresponding to the first doped semiconductor portion can be smaller than the base side length (or diagonal length) of the pyramid-shaped textured structure formed on the surface of the region corresponding to the second doped semiconductor portion; and / or, on the first surface, the height of the pyramid-shaped textured structure formed on the surface of the region corresponding to the first doped semiconductor portion can be smaller than the height of the pyramid-shaped textured structure formed on the surface of the region corresponding to the second doped semiconductor portion.

[0090] For example, in the first surface, the surface of the region corresponding to the first doped semiconductor portion can be a polished surface or a textured structure can be further formed on the polished surface, and the surface of the region corresponding to the second doped semiconductor portion can be a textured surface.

[0091] It should be noted that the surface morphology of each region on the first side of the semiconductor substrate can also be the same. In this case, by adjusting the formation parameters of the first sub-passivation layer and the first sub-passivation layer included in the first dielectric passivation layer, the first sub-passivation layer and the first sub-passivation layer included in the second dielectric passivation layer can be obtained with different thicknesses.

[0092] Regarding the first doped semiconductor portion and the second doped semiconductor portion, from the perspective of conductivity type, the embodiments of the present invention do not specifically limit the conductivity type of the first doped semiconductor portion and the second doped semiconductor portion, as long as the conductivity types of the first doped semiconductor portion and the second doped semiconductor portion are opposite, and the conductivity type of the first doped semiconductor portion is opposite to the conductivity type of the fixed charge of the first sub-passivation layer. Specifically, the conductivity type of the first doped semiconductor portion can be N-type, in which case the conductivity type of the second doped semiconductor portion is P-type, and both the first sub-passivation layer included in the first dielectric passivation layer and the first sub-passivation layer included in the second dielectric passivation layer have fixed negative charges; or, the conductivity type of the first doped semiconductor portion can also be P-type, in which case the conductivity type of the second doped semiconductor portion is N-type, and both the first sub-passivation layer included in the first dielectric passivation layer and the first sub-passivation layer included in the second dielectric passivation layer have fixed positive charges.

[0093] In terms of distribution, such as Figure 1 As shown, the first doped semiconductor portion 12 can be disposed in a local area of ​​the first surface of the semiconductor substrate 11. Alternatively, as... Figure 3 As shown, the first doped semiconductor portion 12 may also be disposed on a local area of ​​the first surface of the semiconductor substrate 11.

[0094] As for the second doped semiconductor section, such as Figure 2 As shown, the second doped semiconductor portion 13 can be disposed in a local area of ​​the first surface of the semiconductor substrate 11. Alternatively, as... Figure 3 As shown, the second doped semiconductor portion 13 may also be disposed at least in a local area of ​​the first surface of the semiconductor substrate 11.

[0095] Where both the first doped semiconductor portion and the second doped semiconductor portion are doped semiconductor layers disposed on the first surface, such as Figure 1 and Figure 2 As shown, the first doped semiconductor portion 12 and the second doped semiconductor portion 13 can be alternately distributed on one side of the first surface of the semiconductor substrate 11. Alternatively, as... Figure 3 As shown, the second doped semiconductor portion 13 may also cover a portion of the first doped semiconductor portion 12, and the second doped semiconductor portion 13 and the first doped semiconductor portion 12 are spaced apart at least along the thickness direction of the semiconductor substrate 11 to prevent short circuits.

[0096] From a material perspective, when at least one of the first doped semiconductor portion and the second doped semiconductor portion is a doped semiconductor layer disposed on the first surface, the material of the doped semiconductor layer can include any semiconductor material such as silicon, germanium silicon, germanium, or gallium arsenide. From the perspective of the arrangement of matter, the crystal phase of the doped semiconductor layer can be amorphous, microcrystalline, nanocrystalline, single crystal, or polycrystalline. Specifically, when both the first doped semiconductor portion and the second doped semiconductor portion are doped semiconductor layers disposed on the first surface, the materials of the first doped semiconductor portion and the second doped semiconductor portion can be the same or different. For example, the materials of the first doped semiconductor portion and the second doped semiconductor portion can both be doped polycrystalline silicon. Another example is that the materials of the first doped semiconductor portion and the second doped semiconductor portion can both include at least one of doped amorphous silicon, doped microcrystalline silicon, and doped nanocrystalline silicon. Yet another example is that the material of the first doped semiconductor portion can be doped polycrystalline silicon, and the material of the second doped semiconductor portion can include at least one of doped amorphous silicon, doped microcrystalline silicon, and doped nanocrystalline silicon.

[0097] Secondly, such as Figure 1 and Figure 2 As shown, when at least one of the first doped semiconductor portion 12 and the second doped semiconductor portion 13 is a doped semiconductor layer disposed on the first surface, the doped semiconductor layer can be directly disposed on the semiconductor substrate 11. Alternatively, as... Figure 3 and Figure 5 As shown, the back contact cell may further include an interface passivation layer 23, which is at least disposed between the doped semiconductor layer and the semiconductor substrate 11. In this case, the passivated contact structure composed of the interface passivation layer 23 and the doped semiconductor layer has excellent interface passivation effect and can achieve selective collection of charge carriers, reduce the carrier recombination rate on the corresponding region surface of the first surface of the semiconductor substrate 11, and further improve the photoelectric conversion efficiency of the back contact cell. The material and thickness of the interface passivation layer 23 can be set according to the material of the doped semiconductor layer and actual needs, and are not specifically limited here. For example, when the material of the doped semiconductor layer is doped polycrystalline silicon, the interface passivation layer is a tunneling passivation layer. As another example, when the material of the doped semiconductor layer includes at least one of doped amorphous silicon, doped microcrystalline silicon, and doped nanocrystalline silicon, the interface passivation layer is an intrinsic amorphous silicon layer, an intrinsic microcrystalline silicon layer, an intrinsic nanocrystalline silicon layer, or a mixture of the above three layers.

[0098] Where both the first doped semiconductor portion and the second doped semiconductor portion are doped semiconductor layers disposed on the first surface, an interface passivation layer may be disposed only between the first doped semiconductor portion and the semiconductor substrate. Alternatively, as... Figure 3 As shown, an interface passivation layer 23 may also be provided only between the second doped semiconductor portion 13 and the semiconductor substrate 11. Alternatively, as... Figure 5As shown, an interface passivation layer 23 may be provided between the first doped semiconductor portion 12 and the semiconductor substrate 11, and between the second doped semiconductor portion 13 and the semiconductor substrate 11. In this case, the type of the first selective contact structure formed by the first doped semiconductor portion 12 and the interface passivation layer 23 may be the same as or different from the type of the second selective contact structure formed by the second doped semiconductor portion 13 and the interface passivation layer 23.

[0099] Optionally, both the first selective contact structure and the second selective contact structure can be tunneling passivation contact structures.

[0100] From a surface morphology perspective, the surface morphology of the first doped semiconductor portion on the side facing away from the semiconductor substrate and the second doped semiconductor portion on the side facing away from the semiconductor substrate both affect their surface reflectivity on the side facing away from the semiconductor substrate. Surface reflectivity is inversely proportional to specific surface area; a larger specific surface area results in a higher light-trapping effect and a lower surface reflectivity. Secondly, specific surface area is directly proportional to surface roughness; a larger specific surface area results in higher surface roughness. Furthermore, under the same conditions, the deposition thickness of the first sub-passivation layer included in the first dielectric passivation layer and the first sub-passivation layer included in the second dielectric passivation layer is inversely proportional to the roughness of the deposited surface. Based on this, the surface morphology and surface reflectivity of the first doped semiconductor portion on the side facing away from the semiconductor substrate, as well as the surface morphology and surface reflectivity of the second doped semiconductor portion on the side facing away from the semiconductor substrate, can be determined according to the thickness requirements of the first sub-passivation layer included in the first dielectric passivation layer and the first sub-passivation layer included in the second dielectric passivation layer in the actual application scenario, and the actual manufacturing process of the back contact battery.

[0101] Specifically, the surface reflectivity of the first doped semiconductor portion on the side away from the semiconductor substrate can be equal to the surface reflectivity of the second doped semiconductor portion on the side away from the semiconductor substrate. At this time, different film thicknesses can be obtained by adjusting the condition parameters when manufacturing the first sub-passivation layer included in the first dielectric passivation layer and the first sub-passivation layer included in the second dielectric passivation layer.

[0102] Alternatively, the surface reflectivity of the first doped semiconductor portion on the side facing away from the semiconductor substrate may be greater than that of the second doped semiconductor portion on the side facing away from the semiconductor substrate. In this case, the surface roughness of the first doped semiconductor portion on the side facing away from the semiconductor substrate is smaller, and the surface roughness of the second doped semiconductor portion on the side facing away from the semiconductor substrate is larger. As mentioned above, under the same conditions, the film deposition thickness of the first sub-passivation layer included in the first dielectric passivation layer and the first sub-passivation layer included in the second dielectric passivation layer is inversely proportional to the roughness of the surface to which it is deposited. Therefore, when the surface roughness of the side of the first doped semiconductor portion away from the semiconductor substrate is small, it is advantageous to form the first sub-passivation layer included in the first dielectric passivation layer and the first sub-passivation layer included in the second dielectric passivation layer under the same process conditions. This results in the formation of a relatively thick first sub-passivation layer included in the first dielectric passivation layer on the side of the first doped semiconductor portion away from the semiconductor substrate, thereby improving the field passivation effect of the first sub-passivation layer included in the first dielectric passivation layer. On the side of the second doped semiconductor portion away from the semiconductor substrate, a relatively thin first sub-passivation layer included in the second dielectric passivation layer is formed, thereby reducing the field passivation effect of the first sub-passivation layer included in the second dielectric passivation layer. This reduces the difference in overall passivation effect between the portion of the battery backlight side corresponding to the first doped semiconductor portion and the portion corresponding to the second doped semiconductor portion. Furthermore, when the surface roughness of the second doped semiconductor portion on the side facing away from the semiconductor substrate is relatively large, it is beneficial to form a relatively thin first sub-passivation layer included in the second dielectric passivation layer on the side of the second doped semiconductor portion facing away from the semiconductor substrate, thereby reducing the impact of the field passivation effect of the first sub-passivation layer included in the second dielectric passivation layer on the carrier collection efficiency of the second doped semiconductor portion. As for the difference in surface reflectivity of the first doped semiconductor portion and the second doped semiconductor portion on the side facing away from the semiconductor substrate, it can be determined based on the difference in thickness of the first sub-passivation layer included in the first dielectric passivation layer and the first sub-passivation layer included in the second dielectric passivation layer, and no specific limitation is made here.

[0103] Secondly, the surface morphology of the first doped semiconductor portion on the side away from the semiconductor substrate can be the same as the surface morphology of the second doped semiconductor portion on the side away from the semiconductor substrate. In this case, different film thicknesses can be obtained by adjusting the condition parameters when manufacturing the first sub-passivation layer included in the first dielectric passivation layer and the first sub-passivation layer included in the second dielectric passivation layer.

[0104] Alternatively, the surface morphology of the first doped semiconductor portion on the side facing away from the semiconductor substrate can also be different from the surface morphology of the second doped semiconductor portion on the side facing away from the semiconductor substrate. Based on this, such as Figure 6 and Figure 7As shown, the surface of the first doped semiconductor portion 12 facing away from the semiconductor substrate may have a first texture structure 16, and the surface of the second doped semiconductor portion 13 facing away from the semiconductor substrate may have a second texture structure 17. The one-dimensional dimensions of the first texture structure 16 and the second texture structure 17 are different, and / or the types of the first texture structure 16 and the second texture structure 17 are different. The types of the first texture structure 16 and the second texture structure 17 can be set according to actual needs. For example, the first texture structure and the second texture structure can be a pyramid-shaped texture structure. The bottom surface of this pyramid-shaped texture structure can be a regular or irregular polygon, a bottom surface with an arc-shaped contour, etc. The specific meaning of the one-dimensional dimension can be determined according to the type of the first texture structure and the second texture structure. For example, when the first texture structure and / or the second texture structure is a pyramid-shaped texture structure, the one-dimensional dimension can be the height, side length, diagonal length, or perimeter of the pyramid-shaped texture structure.

[0105] The following are three examples of surface morphology of the first doped semiconductor portion and the second doped semiconductor portion on the side away from the semiconductor substrate. However, these three examples are only used to explain the present invention and are not intended to limit the present invention.

[0106] For example, such as Figure 6 and Figure 7As shown, the surface of the first doped semiconductor portion 12 facing away from the semiconductor substrate may have a first tower-like texture structure, and the surface of the second doped semiconductor portion 13 facing away from the semiconductor substrate may have a second tower-like texture structure. The side length of the first tower-like texture structure may be greater than the side length of the second tower-like texture structure, and / or the height of the first tower-like texture structure may be less than the height of the second tower-like texture structure. In this case, when the side length of the first tower-shaped texture structure is greater than the side length of the second tower-shaped texture structure, and when the height of the first tower-shaped texture structure is less than the height of the second tower-shaped texture structure, the surface of the first doped semiconductor portion 12 with the first tower-shaped texture structure facing away from the semiconductor substrate 11 has a higher reflectivity and a lower surface roughness. This facilitates the formation of a first sub-passivation layer 21, which is part of a first dielectric passivation layer with a relatively large thickness, on the side of the first doped semiconductor portion 12 facing away from the semiconductor substrate, thereby improving the field passivation effect of the first sub-passivation layer 21. On the side of the second doped semiconductor portion 13 facing away from the semiconductor substrate, a first sub-passivation layer 21, which is part of a second dielectric passivation layer 15 with a relatively small thickness, is formed, thereby reducing the field passivation effect of the first sub-passivation layer 21, and narrowing the difference in overall passivation effect between the portion of the battery backlight side corresponding to the first doped semiconductor portion 12 and the portion corresponding to the second doped semiconductor portion 13. Furthermore, the surface of the second doped semiconductor portion 13, which has a smaller side length and / or a larger height, facing away from the semiconductor substrate has lower reflectivity and higher surface roughness. This facilitates the formation of a relatively thin first sub-passivation layer 21 within the second dielectric passivation layer 15 on the side of the second doped semiconductor portion 13 facing away from the semiconductor substrate, thereby reducing the impact of the field passivation effect of the first sub-passivation layer 21 within the second dielectric passivation layer 15 on the carrier collection efficiency of the second doped semiconductor portion 13. The side length and height of the first and second tower-like textured structures can be determined based on the difference in thickness between the first sub-passivation layer 21 within the first dielectric passivation layer and the first sub-passivation layer 21 within the second dielectric passivation layer 15; no specific limitation is made here.

[0107] For example, the surface of the first doped semiconductor portion facing away from the semiconductor substrate may have a pyramidal textured structure, and the surface of the second doped semiconductor portion facing away from the semiconductor substrate may have a pyramidal velvet structure.

[0108] For example, the surface of the first doped semiconductor portion facing away from the semiconductor substrate may have a first pyramidal textured structure, and the surface of the second doped semiconductor portion facing away from the semiconductor substrate may have a second pyramidal textured structure. The side length of the first pyramidal textured structure may be less than the side length of the second pyramidal textured structure, and / or the height of the first pyramidal textured structure may be less than the height of the second pyramidal textured structure.

[0109] The doping concentration and thickness of the dopant in the first and second doped semiconductor sections can be set according to actual needs. As mentioned earlier, the first sub-passivation layer included in the first dielectric passivation layer can form a superimposed field at the first doped semiconductor section, improving the carrier collection efficiency of the first doped semiconductor section. The first sub-passivation layer included in the second dielectric passivation layer will form a reverse field at the second doped semiconductor section, affecting the carrier collection efficiency of the second doped semiconductor section. Furthermore, the doping concentration and thickness of the dopant in the first and second doped semiconductor sections will affect the degree of their field passivation effect. Therefore, the doping concentration and thickness of the dopant in the first and second doped semiconductor sections can be determined according to the requirements for the field passivation effect of the first and second doped semiconductor sections in the actual application scenario.

[0110] For example, the doping concentration of the dopant in the first doped semiconductor section can be less than or equal to the doping concentration of the dopant in the second doped semiconductor section. When the doping concentration of the dopant in the second doped semiconductor section is higher, the electric field strength generated by the second doped semiconductor section itself is greater. This can compensate for the difference in carrier collection capability between the second and first doped semiconductor sections caused by the suppression effect of the reverse field formed by the field passivation function of the first sub-passivation layer included in the second dielectric passivation layer, thus facilitating the uniform collection of carriers of different conductivity types.

[0111] For example, the doping concentration of the dopant in the first doped semiconductor portion can be 6E19cm⁻¹. -3 Up to 7E19cm -3 ; and / or, the doping concentration of the dopant in the second doped semiconductor portion can be 5E20cm⁻¹. -3 Up to 6E20cm -3 .

[0112] For example, such as Figure 4As shown, the thickness of the first doped semiconductor portion 12 can be greater than or equal to the thickness of the second doped semiconductor portion 13. When the thickness of the first doped semiconductor portion 12 is greater than the thickness of the second doped semiconductor portion 13, it is beneficial to increase the field passivation effect of the first doped semiconductor portion 12 on the corresponding area surface of the semiconductor substrate 11. This can further reduce the ratio of the PL brightness value of the portion corresponding to the first doped semiconductor portion 12 and the portion corresponding to the second doped semiconductor portion 13 on the backlight side of the battery, thus reducing the degree of difference in passivation.

[0113] For example, the thickness of the first doped semiconductor portion can be from 200 nm to 400 nm; and / or, the thickness of the second doped semiconductor portion can be from 100 nm to 300 nm.

[0114] Regarding the aforementioned first dielectric passivation layer and second dielectric passivation layer, from a material perspective, the materials of the first sub-passivation layer included in the first dielectric passivation layer and the first sub-passivation layer included in the second dielectric passivation layer can be determined based on the conductivity type of the fixed charge they possess. As long as the conductivity type of the first doped semiconductor portion is opposite to the conductivity type of the fixed charge in the first sub-passivation layer included in the first dielectric passivation layer and the first sub-passivation layer included in the second dielectric passivation layer, the first sub-passivation layer at least has a field passivation function. The materials of the first sub-passivation layer included in the first dielectric passivation layer and the first sub-passivation layer included in the second dielectric passivation layer can include single-layer materials or stacked materials, as long as at least one layer has the same fixed charge type, to ensure that the fixed charge types of the first sub-passivation layer included in the first dielectric passivation layer and the first sub-passivation layer included in the second dielectric passivation layer are the same.

[0115] For example, the material of the first sub-passivation layer or the second sub-passivation layer may include at least one of the following materials: aluminum oxide, silicon nitride, silicon oxide, and silicon oxynitride.

[0116] For example, the first sub-passivation layer included in the first dielectric passivation layer or the second dielectric passivation layer may include: a negatively charged dielectric passivation layer such as aluminum oxide, and the second sub-passivation layer includes one or more stacked combinations of materials such as silicon nitride, silicon oxide, and silicon oxynitride, as long as the first dielectric passivation layer and the second dielectric passivation layer simultaneously have chemical passivation and field passivation functions. Specifically, the first sub-passivation layer included in the first dielectric passivation layer and / or the first sub-passivation layer included in the second passivation layer may also be a stacked structure composed of multiple passivation layers. A certain passivation layer in the stacked structure may simultaneously have chemical passivation and field passivation functions, or some passivation layers in the stacked structure may only have chemical passivation functions or only have field passivation functions. Taking the first sub-passivation layer included in the first dielectric passivation layer as an example: When the first doped semiconductor portion is a P-type doped semiconductor portion, the first sub-passivation layer included in the first dielectric passivation layer may include an aluminum oxide layer, and the second sub-passivation layer includes silicon nitride disposed on the side of the aluminum oxide layer facing away from the semiconductor substrate; As another example: When the first doped semiconductor portion is a P-type doped semiconductor portion, the first sub-passivation layer included in the first dielectric passivation layer may include an aluminum oxide layer, and the second sub-passivation layer includes silicon oxynitride disposed on the side of the aluminum oxide layer facing away from the semiconductor substrate. As yet another example: When the first doped semiconductor portion is a P-type doped semiconductor portion, the first sub-passivation layer included in the first dielectric passivation layer may include an aluminum oxide layer, and the second sub-passivation layer may include a silicon nitride layer, a silicon oxynitride layer, and a silicon oxide layer sequentially stacked along the battery thickness direction. As yet another example: When the first doped semiconductor portion is a P-type doped semiconductor portion, the first sub-passivation layer included in the first dielectric passivation layer may include a silicon oxide layer and an aluminum oxide layer sequentially stacked along the battery thickness direction, and the second sub-passivation layer may include a silicon nitride layer sequentially stacked along the battery thickness direction.

[0117] Furthermore, the materials of the first sub-passivation layer included in the first dielectric passivation layer and the first sub-passivation layer included in the second dielectric passivation layer can be the same or different, and can be selected differently depending on the conductivity type of the first doped semiconductor portion. Specifically, when the materials of the first sub-passivation layer included in the first dielectric passivation layer and the first sub-passivation layer included in the second dielectric passivation layer are the same, the materials of these two first sub-passivation layers can both include materials with negative fixed charge such as alumina, or they can both include at least one of materials with positive fixed charge such as silicon oxide, silicon nitride, and silicon oxynitride. Secondly, when the materials of the first sub-passivation layer included in the first dielectric passivation layer and the first sub-passivation layer included in the second dielectric passivation layer are different, if the conductivity type of the first doped semiconductor is P-type, then the two first sub-passivation layers can be different types of materials and both have negative fixed charges. In this case, the material of the second sub-passivation layer can be selected from at least one of materials with positive fixed charges, such as silicon oxide, silicon nitride, and silicon oxynitride. The second sub-passivation layer can compensate for the weakening effect of the negative fixed charge material on the field passivation effect of the second doped semiconductor, and can also provide better chemical passivation for the first and second doped semiconductors. If the conductivity type of the first doped semiconductor is N-type, then the two first sub-passivation layers can be different types of materials and both have positive fixed charges. In addition to providing field passivation, they can also provide better chemical passivation for the first and second doped semiconductors. In this case, the material of the second sub-passivation layer can be selected from materials with negative fixed charges, such as aluminum oxide. In this case, the second sub-passivation layer can compensate for the weakening effect of the positive fixed charge material on the field passivation effect of the second doped semiconductor.

[0118] When the materials of the first sub-passivation layer included in the first dielectric passivation layer and the first sub-passivation layer included in the second dielectric passivation layer are the same, it is beneficial to reduce the types of materials used to manufacture different structures of the back contact battery, improve the compatibility between different structures, and improve the yield of the back contact battery.

[0119] Secondly, such as Figure 5As shown, the first sub-passivation layer 21 included in the first dielectric passivation layer 14 and the first sub-passivation layer 21 included in the second dielectric passivation layer 15 can also be integrally continuous. In this case, the first sub-passivation layer 21 included in the first dielectric passivation layer 14 and the first sub-passivation layer 21 included in the second dielectric passivation layer 15 can be formed simultaneously in the same step based on the same material, which improves the manufacturing efficiency of the back contact battery and helps to reduce the manufacturing cost of the back contact battery. Of course, the first sub-passivation layer 21 included in the first dielectric passivation layer 14 and the first sub-passivation layer 21 included in the second dielectric passivation layer 15 can also be manufactured separately in different operation steps, as long as the conductivity type of the first doped semiconductor portion 12 is opposite to the conductivity type of the fixed charge of the first sub-passivation layer 21 included in the first dielectric passivation layer 14 and the first sub-passivation layer 21 included in the second dielectric passivation layer 15, and the thickness of the first sub-passivation layer 21 included in the first dielectric passivation layer 14 is greater than the thickness of the first sub-passivation layer 21 included in the second dielectric passivation layer 15.

[0120] For example, the first sub-passivation layer included in the first dielectric passivation layer and / or the first sub-passivation layer included in the second dielectric passivation layer may include a hydrogen-containing passivation layer to achieve chemical passivation of the corresponding doped semiconductor portion by means of hydrogen passivation, thereby reducing the number of defects on the side of the corresponding doped semiconductor portion away from the semiconductor substrate. For example, the first sub-passivation layer included in the first dielectric passivation layer and / or the first sub-passivation layer included in the second dielectric passivation layer may include at least one of the following films: an aluminum oxide layer, a silicon oxide layer, a silicon nitride layer, and a silicon oxynitride layer.

[0121] Specifically, in the first dielectric passivation layer and the second dielectric passivation layer, only the first sub-passivation layer included in the first dielectric passivation layer may be a hydrogen-containing passivation layer, or only the first sub-passivation layer included in the second dielectric passivation layer may be a hydrogen-containing passivation layer, or both the first and second dielectric passivation layers may be hydrogen-containing passivation layers.

[0122] For example, local regions of the aforementioned hydrogen-containing passivation layer may have microstructures. Wherein, such as Figure 8 and Figure 9 As shown, at least one microstructure 18 may be a bulge structure along a direction away from the semiconductor substrate 11; and / or, as Figure 10As shown, at least one microstructure 18 can be a centrally recessed or bulging microstructure with cyclone-shaped edges. In this case, when at least one microstructure 18 is a bulging structure along the direction away from the semiconductor substrate 11, there is a bulging-enclosed accommodating space between the hydrogen-containing passivation layer with microstructure 18 and the corresponding doped semiconductor portion. Hydrogen gas that generates the bulging structure exists within this accommodating space. This indicates that the hydrogen ion content in the hydrogen-containing passivation layer is sufficient, resulting in a higher hydrogen passivation effect on the corresponding doped semiconductor portion and further reducing surface defects in the corresponding doped semiconductor portion. Furthermore, the hydrogen gas within the bulging structure can continuously provide hydrogen ions during subsequent manufacturing processes or battery operation, achieving continuous hydrogen passivation of the corresponding doped semiconductor portion, which is beneficial for improving battery yield and extending battery life. Furthermore, when at least one microstructure 18 is a centrally recessed or bulging microstructure 18 with cyclone-like edges, it indicates a higher hydrogen content within the hydrogen-containing passivation layer. This results in a sufficient content of hydrogen ions not used for hydrogen passivation, which, upon escaping from the hydrogen-containing passivation layer, cause the microstructure 18 to burst. Based on this, when the hydrogen-containing passivation layer includes this type of microstructure 18, the hydrogen-containing passivation layer has a higher hydrogen passivation effect on the corresponding doped semiconductor portion. Moreover, after the bursting occurs, an uneven microstructure 18 can be formed on the side of the hydrogen-containing passivation layer facing away from the semiconductor substrate 11, which helps to reduce the reflectivity of the hydrogen-containing passivation layer on the side facing away from the semiconductor substrate 11 and improve its light-trapping effect.

[0123] Specifically, when only the first sub-passivation layer of the first dielectric passivation layer includes a hydrogen-containing passivation layer, a local region of the first sub-passivation layer may or may not have the aforementioned microstructure. Similarly, when only the first sub-passivation layer of the second dielectric passivation layer includes a hydrogen-containing passivation layer, a local region of the first sub-passivation layer may or may not have the aforementioned microstructure. Furthermore, when both the first and second dielectric passivation layers include hydrogen-containing passivation layers, only the first sub-passivation layer of the first dielectric passivation layer may have the aforementioned microstructure, only the first sub-passivation layer of the second dielectric passivation layer may have the aforementioned microstructure, both the first and second dielectric passivation layers may have the aforementioned microstructure, or neither the first nor the first sub-passivation layer may have the aforementioned microstructure.

[0124] For example, when both the first dielectric passivation layer and the second dielectric passivation layer include a hydrogen-containing passivation layer as the first sub-passivation layer, in order to meet the passivation requirements of the two doped regions, the thickness of the first sub-passivation layer included in the first dielectric passivation layer is thicker than the thickness of the first sub-passivation layer included in the second dielectric passivation layer. In this case, a local region of the first sub-passivation layer included in the first dielectric passivation layer has the aforementioned microstructure. The first sub-passivation layer included in the second dielectric passivation layer may or may not have the aforementioned microstructure.

[0125] It is understood that the greater the thickness and / or the higher the density of the hydrogen-containing passivation layer, the higher its hydrogen content, and the easier it is for hydrogen to escape and form the aforementioned microstructure after being heated. Therefore, the distribution density of the internal microstructure can be determined based on whether the first sub-passivation layer included in the first dielectric passivation layer and the second dielectric passivation layer includes a hydrogen-containing passivation layer, as well as the thickness and density of both, without making specific limitations here.

[0126] For example, such as Figure 6 and Figure 7 As shown, in the case where at least a local region of the first sub-passivation layer 21 included in the first dielectric passivation layer 14 has microstructures 18, the distribution density of the microstructures 18 in the first sub-passivation layer 21 included in the first dielectric passivation layer 14 can be greater than the distribution density of the microstructures 18 in the first sub-passivation layer 21 included in the second dielectric passivation layer 15. In this case, it is advantageous to make the first sub-passivation layer 21 included in the first dielectric passivation layer 14 have a larger thickness and / or higher film density (compared to the first sub-passivation layer 21 included in the second dielectric passivation layer 15), thereby ensuring that the first sub-passivation layer 21 included in the first dielectric passivation layer 14 has a higher field passivation effect on the first doped semiconductor portion. At the same time, it is beneficial to make the first sub-passivation layer 21 included in the second dielectric passivation layer 15 have a smaller thickness and / or lower film density, so as to reduce the impact of the field passivation function of the first sub-passivation layer 21 included in the second dielectric passivation layer 15 on the carrier collection efficiency of the second doped semiconductor section, and ensure that the back contact cell has a higher operating efficiency.

[0127] Regarding the size and height of the microstructure, the presence of such a microstructure within the hydrogen-containing passivation layer indicates a sufficient hydrogen ion content, resulting in a high degree of chemical passivation for the corresponding doped semiconductor portion. Furthermore, the presence of this microstructure also prevents at least a portion of the hydrogen-containing passivation layer at the microstructure from contacting the corresponding doped semiconductor portion; that is, at least a portion of the hydrogen-containing passivation layer at the microstructure cannot passivate the corresponding doped semiconductor portion. Therefore, the size and height can be determined based on the passivation effect requirements, thickness, and density of the hydrogen-containing passivation layer in the actual application scenario, and are not specifically limited here.

[0128] For example, the size of at least one microstructure can be greater than or equal to 10 μm and less than or equal to 20 μm. For instance, the size of the microstructure can be 10 μm, 11 μm, 12 μm, 14 μm, 16 μm, 18 μm, or 20 μm, etc. In this case, as mentioned above, based on this, when the size of the microstructure is within the above range, it can prevent the hydrogen content within the hydrogen-containing passivation layer itself from being too small; secondly, it can also prevent the effective contact area between the hydrogen-containing passivation layer and the corresponding doped semiconductor from being too large, ensuring that the hydrogen-containing passivation layer has a high passivation effect on the corresponding doped semiconductor. Furthermore, it can also prevent the thickness of the first sub-passivation layer included in the second dielectric passivation layer from being too large, thus affecting the carrier collection efficiency of the second doped semiconductor, because the first sub-passivation layer included in the second dielectric passivation layer includes a hydrogen-containing passivation layer, and the size of the microstructure within the first sub-passivation layer included in the second dielectric passivation layer is too large.

[0129] For example, the height of at least one microstructure can be greater than or equal to 0.1 μm and less than or equal to 0.5 μm. For instance, the height of at least one microstructure can be 0.1 μm, 0.15 μm, 0.2 μm, 0.25 μm, 0.3 μm, 0.4 μm, or 0.5 μm, etc. The application principle of the beneficial effects in this case is similar to the application principle of the beneficial effects of microstructures with dimensions greater than or equal to 10 μm and less than or equal to 20 μm as described above, and will not be repeated here.

[0130] For example, such as Figure 11As shown, in the first doped semiconductor portion 12 and / or the second doped semiconductor portion 13, an uneven anti-reflection structure 19 is formed at the position corresponding to the microstructure 18 (as shown in the slightly brighter area in the figure). Specifically, when the microstructure 18 is present in a local area of ​​the first doped semiconductor portion 12, an anti-reflection structure 19 can be formed at the position corresponding to the microstructure 18 in the first doped semiconductor portion 12. And / or, when the microstructure 18 is present in a local area of ​​the second doped semiconductor portion 13, an anti-reflection structure 19 can be formed at the position corresponding to the microstructure 18 in the second doped semiconductor portion 13. The aforementioned anti-reflection structure 19 may affect the surface morphology of the portion of the first doped semiconductor portion 12 and / or the second doped semiconductor portion 13 corresponding to the microstructure 18 under the compression of hydrogen gas when hydrogen escapes from the corresponding passivation layer containing the microstructure 18. In this case, reducing the reflectivity of the side of the first doped semiconductor portion 12 and / or the second doped semiconductor portion 13 facing away from the semiconductor substrate 11 facilitates the refraction of more light into the semiconductor substrate 11 through the first doped semiconductor portion 12 and / or the second doped semiconductor portion 13, thereby improving the bifaciality of the battery. The specific morphology of the antireflection structure 19 can be determined based on the actual manufacturing process and is not specifically limited here. For example, the antireflection structure 19 can be a pit structure with its surface recessed into the corresponding doped semiconductor portion, etc.

[0131] The specific thicknesses of the first sub-passivation layer included in the first dielectric passivation layer and the first sub-passivation layer included in the second dielectric passivation layer can be determined based on the material types of both, the requirements for field passivation and chemical passivation of the first dielectric passivation layer in the actual application scenario, and the requirements for chemical passivation of the second dielectric passivation layer. No specific limitations are imposed here. Optionally, the thicknesses of the first sub-passivation layer included in the first dielectric passivation layer and the first sub-passivation layer included in the second dielectric passivation layer can be selected within the range of greater than or equal to 2 nm and less than or equal to 15 nm. Secondly, the first sub-passivation layer can be an aluminum oxide layer. In this case, the aluminum oxide layer formed by atomic layer deposition is usually relatively uniform in thickness. However, since there may be aluminum oxide material around the edge of the battery, one or two points can be selected in the middle region of the battery, corresponding to the positions of the first doped semiconductor part and the second doped semiconductor part, for testing to compare the thicknesses of the aluminum oxide layers formed on the two first doped semiconductor parts and the second doped semiconductor part.

[0132] For example, the thickness of the first sub-passivation layer included in the first dielectric passivation layer can be greater than or equal to 4 nm and less than or equal to 15 nm. For instance, the thickness of the first sub-passivation layer included in the first dielectric passivation layer can be 4 nm, 5 nm, 6 nm, 6.2 nm, 6.5 nm, 6.8 nm, 7 nm, 7.2 nm, 7.5 nm, 7.8 nm, 8 nm, 10 nm, 12 nm, or 15 nm, etc. In this case, the relatively large thickness of the first sub-passivation layer included in the first dielectric passivation layer can further enhance the field passivation effect of the first sub-passivation layer on the first doped semiconductor portion, which is beneficial to further reduce the difference in passivation effect between the portion corresponding to the first doped semiconductor portion and the portion corresponding to the second doped semiconductor portion on the back surface side of the back contact battery, thereby further improving the working performance of the back contact battery.

[0133] For example, the thickness of the first sub-passivation layer included in the second dielectric passivation layer can be greater than or equal to 2 nm and less than or equal to 8 nm. For instance, the thickness of the first sub-passivation layer included in the second dielectric passivation layer can be 2 nm, 4 nm, 4.2 nm, 4.5 nm, 4.8 nm, 5 nm, 5.2 nm, 5.5 nm, 5.8 nm, 6 nm, 7 nm, or 8 nm, etc. In this case, the thickness of the first sub-passivation layer included in the second dielectric passivation layer is within the above range, which helps to prevent a lower overall passivation effect on the second doped semiconductor portion due to a smaller thickness of the first sub-passivation layer, ensuring that the second doped semiconductor portion has fewer surface defects on the side facing away from the semiconductor substrate. Furthermore, it also helps to prevent a higher degree of field passivation effect of the first sub-passivation layer included in the second dielectric passivation layer on the electric field weakening of the second doped semiconductor portion due to a larger thickness, ensuring that the second doped semiconductor portion has a higher carrier collection efficiency.

[0134] Regarding the second sub-passivation layer included in the first dielectric passivation layer and the second dielectric passivation layer, from a material perspective, the material of the second sub-passivation layer included in the first dielectric passivation layer can be any passivation material different from that of the first sub-passivation layer included in the first dielectric passivation layer. The second sub-passivation layer included in the first dielectric passivation layer can be a passivation layer with only chemical passivation function, or it can be a passivation layer with both chemical passivation and field passivation functions. Furthermore, the material of the second sub-passivation layer included in the second dielectric passivation layer can be any passivation material different from that of the first sub-passivation layer included in the second dielectric passivation layer. The first sub-passivation layer included in the second dielectric passivation layer can be a passivation layer with only chemical passivation function, or it can be a passivation layer with both chemical passivation and field passivation functions.

[0135] Furthermore, the materials of the second sub-passivation layer included in the first dielectric passivation layer and the second sub-passivation layer included in the second dielectric passivation layer can be the same or different. When the materials of the second sub-passivation layer included in the first dielectric passivation layer and the second sub-passivation layer included in the second dielectric passivation layer are the same, it is beneficial to reduce the types of materials used in manufacturing different structures of the back contact battery, improve the compatibility between different structures, and improve the yield of the back contact battery. Alternatively, the material of the second sub-passivation layer included in the first dielectric passivation layer can also be different from the material of the second sub-passivation layer included in the second dielectric passivation layer.

[0136] Secondly, such as Figure 5 As shown, the second sub-passivation layer 22 included in the first dielectric passivation layer 14 and the second sub-passivation layer 22 included in the second dielectric passivation layer 15 can also be integrally continuous. In this case, the second sub-passivation layer 22 included in the first dielectric passivation layer 14 and the second sub-passivation layer 22 included in the second dielectric passivation layer 15 can be formed simultaneously based on the same material and in the same step, which improves the manufacturing efficiency of the back contact battery and helps to reduce the manufacturing cost of the back contact battery.

[0137] In terms of thickness, the thickness of the second sub-passivation layer included in the first dielectric passivation layer and the thickness of the second sub-passivation layer included in the second dielectric passivation layer can be determined according to their respective material types and the passivation effect requirements of different second sub-passivation layers in actual application scenarios, and no specific limitation is made here.

[0138] For example, the thickness of the second sub-passivation layer included in the first dielectric passivation layer can be equal to the thickness of the second sub-passivation layer included in the second dielectric passivation layer. Alternatively, as... Figure 4 As shown, the thickness of the second sub-passivation layer 22 included in the first dielectric passivation layer 14 can also be less than the thickness of the second sub-passivation layer 22 included in the second dielectric passivation layer 15. In this case, the second sub-passivation layer 22 included in the second dielectric passivation layer 15, which has a larger thickness (relative to the second sub-passivation layer 22 included in the first dielectric passivation layer 14), is disposed in the first sub-passivation layer 21 included in the second dielectric passivation layer 15, which has a smaller thickness (relative to the first sub-passivation layer 21 included in the first dielectric passivation layer 14). This is beneficial because the larger thickness of the second sub-passivation layer 22 included in the second dielectric passivation layer 15 compensates for the weakening of the field passivation effect of the first sub-passivation layer 21 included in the second dielectric passivation layer 15 on the side of the second doped semiconductor portion 13 away from the semiconductor substrate 11, further reducing the number of surface defects on the side of the second doped semiconductor portion 13 away from the semiconductor substrate 11. This is beneficial for reducing the difference in passivation effect between the portion corresponding to the first doped semiconductor portion 12 and the portion corresponding to the second doped semiconductor portion 13 on the back surface side of the back contact battery, thereby improving the working performance of the back contact battery.

[0139] In the actual manufacturing process, such as Figure 5 As shown, when the thickness of the second sub-passivation layer 22 included in the first dielectric passivation layer 14 is less than the thickness of the second sub-passivation layer 22 included in the second dielectric passivation layer 15, and the second sub-passivation layer 22 included in the first dielectric passivation layer 14 and the second sub-passivation layer 22 included in the second dielectric passivation layer 15 are integrally continuous, the deposition thickness of the second sub-passivation layer 22 included in the first dielectric passivation layer 14 and the second sub-passivation layer 22 included in the second dielectric passivation layer 15 can be different according to the different doping concentrations of the dopant in the first doped semiconductor portion 12 and the second doped semiconductor portion 13. For example, taking the case where both the second sub-passivation layer 22 included in the first dielectric passivation layer 14 and the second sub-passivation layer 22 included in the second dielectric passivation layer 15 are silicon nitride layers: when the doping concentration of the dopant in the first doped semiconductor portion 12 is less than the doping concentration of the dopant in the second doped semiconductor portion 13, when using processes such as plasma chemical vapor deposition, based on the same material and in the same step, the second sub-passivation layer 22 included in the first dielectric passivation layer 14 and the second sub-passivation layer 22 included in the second dielectric passivation layer 15 are formed simultaneously, because of the difference in the electric field strength corresponding to the first doped semiconductor portion 12 and the second doped semiconductor portion 13, the thickness of the second sub-passivation layer 22 included in the first dielectric passivation layer 14 is smaller, and the thickness of the second sub-passivation layer 22 included in the second dielectric passivation layer 15 is larger.

[0140] Of course, the second sub-passivation layer included in the first dielectric passivation layer and the second sub-passivation layer included in the second dielectric passivation layer can also be manufactured in different operating steps by adjusting different manufacturing parameters, as long as the thickness of the second sub-passivation layer included in the first dielectric passivation layer is less than the thickness of the second sub-passivation layer included in the second dielectric passivation layer.

[0141] As for the specific thickness and thickness difference of the second sub-passivation layer included in the first dielectric passivation layer and the second sub-passivation layer included in the second dielectric passivation layer, it can be determined according to the requirements of the PL brightness value of the portion corresponding to the first doped semiconductor portion and the second doped semiconductor portion on the back light side of the back contact battery in the actual application scenario, and no specific limitation is made here.

[0142] For example, the difference between the thickness of the second sub-passivation layer included in the second dielectric passivation layer and the thickness of the second sub-passivation layer included in the first dielectric passivation layer can be greater than or equal to 0.5 nm and less than or equal to 5 nm. For example, the difference between the thickness of the second sub-passivation layer included in the second dielectric passivation layer and the thickness of the second sub-passivation layer included in the first dielectric passivation layer can be 0.5 nm, 0.7 nm, 0.9 nm, 1 nm, 2 nm, 3 nm, 4 nm, or 5 nm, etc. In this case, the difference between the thickness of the second sub-passivation layer included in the second dielectric passivation layer and the thickness of the second sub-passivation layer included in the first dielectric passivation layer is within the above range. This prevents the chemical passivation effect of the second sub-passivation layer included in the first dielectric passivation layer and the second sub-passivation layer included in the second dielectric passivation layer from being approximately the same due to the small difference. This ensures that the difference in field passivation effect between the portions corresponding to the first doped semiconductor portion and the second doped semiconductor portion on the backlight side can be compensated by the second sub-passivation layer included in the second dielectric passivation layer. It can also prevent the passivation effect of the second sub-passivation layer included in the first dielectric passivation layer from being too small due to the large difference, or the thickness of the second sub-passivation layer included in the second dielectric passivation layer from being too large, resulting in a high amount of consumables used, which is beneficial to control the manufacturing cost of the battery.

[0143] For example, the thickness of the second sub-passivation layer can be greater than or equal to 50 nm and less than or equal to 160 nm. For instance, the thickness of the second sub-passivation layer can be 50 nm, 55 nm, 60 nm, 65 nm, 67 nm, 70 nm, 71 nm, 73 nm, 80 nm, 90 nm, 100 nm, 110 nm, 120 nm, 130 nm, 135 nm, 136 nm, 142 nm, 145 nm, 146 nm, 148 nm, 150 nm, 152 nm, 156 nm, 158 nm, or 160 nm, etc. In this case, the thickness of the second sub-passivation layer within the above range helps to prevent a weak passivation effect due to a small thickness, ensuring a low carrier recombination rate on the back contact side of the battery and improving the working performance of the battery. Furthermore, it also prevents a large amount of consumables from being used due to a large thickness of the second sub-passivation layer, thus helping to control the manufacturing cost of the battery. Wherein, when the thickness of the second sub-passivation layer included in the first dielectric passivation layer is less than the thickness of the second sub-passivation layer of the second dielectric passivation layer, the specific value of the thickness of the second sub-passivation layer corresponding to the two doped semiconductor parts can be set according to actual needs and the description method above.

[0144] For example, the thickness of the first sub-passivation layer can be greater than or equal to 2 nm and less than or equal to 15 nm; meanwhile, the thickness of the second sub-passivation layer can be greater than or equal to 50 nm and less than or equal to 160 nm. In this case, the first and second sub-passivation layers are used in combination within the above-mentioned thickness range, so that the second sub-passivation layer can better match the difference in field passivation effect between the two doped semiconductor sections caused by the first sub-passivation layer, thereby reducing the difference in passivation effect between the two doped semiconductor sections.

[0145] For example, the ratio of the thickness of the first dielectric passivation layer to the thickness of the second dielectric passivation layer can be greater than or equal to 0.9 and less than or equal to 1.1; and / or, the thickness of the first dielectric passivation layer and / or the second dielectric passivation layer can be greater than or equal to 52 nm and less than or equal to 175 nm.

[0146] For example, the ratio of the thickness of the first dielectric passivation layer to the thickness of the second dielectric passivation layer can be 0.9, 0.92, 0.95, 0.96, 1, 1.02, 1.05, 1.08 or 1.1, etc.

[0147] For example, the thickness of the first dielectric passivation layer and / or the second dielectric passivation layer can be 52nm, 55nm, 60nm, 70nm, 75nm, 80nm, 90nm, 100nm, 110nm, 120nm, 130nm, 140nm, 150nm, 160nm, 165nm, 170nm or 175nm, etc.

[0148] When the ratio of the thickness of the first dielectric passivation layer to the thickness of the second dielectric passivation layer is greater than or equal to 0.9 and less than or equal to 1.1, the thickness of the first dielectric passivation layer disposed on the side of the first doped semiconductor portion away from the semiconductor substrate is approximately the same as the thickness of the second dielectric passivation layer disposed on the side of the second doped semiconductor portion away from the semiconductor substrate. This is beneficial to ensure that the first dielectric passivation layer and the second dielectric passivation layer have approximately the same overall passivation effect, thereby further reducing the difference in passivation effect between the portion corresponding to the first doped semiconductor portion and the portion corresponding to the second doped semiconductor portion on the back light side of the back contact battery. In addition, when the thickness of the first dielectric passivation layer and / or the second dielectric passivation layer is within the above-mentioned range, the appropriate thickness of the first dielectric passivation layer and / or the second dielectric passivation layer prevents the passivation effect of the first dielectric passivation layer and / or the second dielectric passivation layer from being too weak due to a small thickness value. It can also prevent the distribution density of the microstructure in the first dielectric passivation layer and / or the second dielectric passivation layer from being too large or the consumption of consumables from being too high. This ensures that the back contact battery has high working efficiency while helping to control the manufacturing cost of the battery.

[0149] Regarding the thicknesses of the first and second dielectric passivation layers, the thickness of the first dielectric passivation layer can be equal to the thickness of the second dielectric passivation layer. Alternatively, the thickness of the first dielectric passivation layer can be less than the thickness of the second dielectric passivation layer. Since the thickness of the first sub-passivation layer included in the first dielectric passivation layer is greater than the thickness of the second sub-passivation layer included in the second dielectric passivation layer, when the thickness of the first dielectric passivation layer is less than the thickness of the second dielectric passivation layer, it is advantageous to ensure that the thickness of the second sub-passivation layer included in the first dielectric passivation layer is less than the thickness of the second sub-passivation layer included in the second dielectric passivation layer. Based on this, the application principle of the beneficial effect of the thickness of the first dielectric passivation layer being less than the thickness of the second dielectric passivation layer can refer to the application principle of the beneficial effect of the thickness of the second sub-passivation layer included in the first dielectric passivation layer being less than the thickness of the second sub-passivation layer included in the second dielectric passivation layer, as described above, and will not be repeated here. Furthermore, the difference in thickness between the first and second dielectric passivation layers can be determined based on the difference in thickness between the first and second sub-passivation layers they comprise, and no specific limitation is made here.

[0150] Furthermore, when the thickness of the second sub-passivation layer included in the second dielectric passivation layer is greater than the thickness of the second sub-passivation layer included in the first dielectric passivation layer, it is advantageous to make the thicknesses of the first dielectric passivation layer and the second dielectric passivation layer approximately the same. This also facilitates making the refractive indices of the portions corresponding to the first doped semiconductor portion and the second doped semiconductor portion in the backlight surface of the back contact battery approximately the same, thus promoting uniform light absorption. Based on this, the thicknesses of the first dielectric passivation layer and the second dielectric passivation layer can be determined according to the refractive index requirements of different regions on one side of the backlight surface in actual application scenarios. As for the refractive indices of the portions corresponding to the first doped semiconductor portion and the second doped semiconductor portion in the backlight surface of the back contact battery, these can be determined based on actual needs and the material types of the first dielectric passivation layer and the second dielectric passivation layer.

[0151] For example, the ratio of the refractive index of the first dielectric passivation layer to the refractive index of the second dielectric passivation layer may be greater than or equal to 0.9 and less than or equal to 1.1; and / or, the refractive indices of the first dielectric passivation layer and / or the second dielectric passivation layer may be greater than or equal to 2.0 and less than or equal to 2.2.

[0152] For example, the ratio of the refractive index of the first dielectric passivation layer to the refractive index of the second dielectric passivation layer can be 0.9, 0.92, 0.95, 0.96, 1, 1.02, 1.05, 1.08, or 1.1, etc.

[0153] For example, the refractive index of the first dielectric passivation layer and / or the second dielectric passivation layer can be 2.0, 2.01, 2.02, 2.03, 2.05, 2.08, 2.1, 2.12, 2.15, 2.18 or 2.2, etc.

[0154] When the ratio of the refractive index of the first dielectric passivation layer to the refractive index of the second dielectric passivation layer is greater than or equal to 0.9 and less than or equal to 1.1, the refractive indices of the first and second dielectric passivation layers are approximately the same. This is beneficial because the portions corresponding to the first and second dielectric passivation layers on the back side of the battery have approximately the same light refraction, which facilitates uniform light absorption and helps maintain the balance of electrons and holes. Furthermore, when the refractive indices of the first and / or second dielectric passivation layers are within the aforementioned range, their refractive indices have a higher refractive effect on light, allowing more light to pass through the refractive indices of the first and / or second dielectric passivation layers into the semiconductor substrate, thereby improving the bifaciality of the battery.

[0155] For example, the difference between the refractive index of the second sub-passivation layer included in the second dielectric passivation layer and the refractive index of the second sub-passivation layer included in the first dielectric passivation layer can be greater than or equal to 0.01 and less than or equal to 0.1. For instance, the difference between the refractive index of the second sub-passivation layer included in the second dielectric passivation layer and the refractive index of the second sub-passivation layer included in the first dielectric passivation layer can be 0.01, 0.02, 0.03, 0.05, 0.06, 0.08, or 0.1, etc. The application principle of the beneficial effect in this case can refer to the application principle of the beneficial effect of the first dielectric passivation layer and the second dielectric passivation layer having approximately the same refractive index, as described above, and will not be repeated here.

[0156] In practical applications, the PL (Light Permeability) value refers to the brightness emitted by the battery under illumination. This PL value is related to the passivation performance of the tested portion, representing the overall passivation effect of all film layers at the location corresponding to the first or second doped semiconductor portion. This includes the combined passivation effect of the tunneling passivation layer, the doped semiconductor portion, and the dielectric passivation layer. Specifically, under the same test conditions, a higher PL value indicates higher passivation performance, while a lower PL value indicates lower passivation performance. Therefore, based on the requirements for the passivation effect of the first and second dielectric passivation layers in the actual application scenario, the PL values ​​corresponding to the second doped semiconductor portion and the first doped semiconductor portion on the back side of the battery, under the same test conditions, can be determined without specific limitations.

[0157] For example, under the same test conditions, the PL brightness value corresponding to the portion of the backlight side of the back contact battery corresponding to the second doped semiconductor portion 13 can be greater than the PL brightness value corresponding to the portion of the first doped semiconductor portion 12.

[0158] It should be noted that the embodiments of the present invention do not specifically limit the conditions for testing the PL brightness value. The testing location for the PL brightness value can be on the finished battery. Specifically, the test is performed on the outermost film layer surrounding the corresponding interconnect portion (such as the main gate or pad point) above the first doped semiconductor portion and the second doped semiconductor portion in the finished battery. (For example, when the first dielectric passivation layer and the second dielectric passivation layer in the back contact battery are the outermost film layers on one side of the first surface, the area adjacent to the corresponding interconnect portion on the side of the first dielectric passivation layer and the second dielectric passivation layer away from the semiconductor substrate needs to be tested.) Alternatively, the PL brightness value can be tested on the outermost film layer after removing the conductive electrodes from the finished battery. Alternatively, the PL brightness value can be tested using a special sample preparation method with symmetrical sample preparation on both sides of the battery, such as symmetrically setting the entire first doped semiconductor portion and the first dielectric passivation layer on both sides of the battery, or setting the entire second doped semiconductor portion and the second dielectric passivation layer, and then performing the PL test.

[0159] When the above technical solution is adopted, when the PL brightness value corresponding to the portion corresponding to the second doped semiconductor portion is greater than the PL brightness value corresponding to the portion corresponding to the first doped semiconductor portion on the back light side of the back contact battery, the passivation performance of the portion corresponding to the second doped semiconductor portion on the back light side of the back contact battery provided in this embodiment of the invention is higher than the passivation performance of the portion corresponding to the first doped semiconductor portion. In the above scenario, the PL brightness values ​​of both regions reflect the combined effect of field passivation and chemical passivation. They can also indirectly reflect the passivation effects of other films besides the first sub-passivation layer. Specifically, the passivation effects of the second dielectric passivation layer are greater than those of the first dielectric passivation layer. By enhancing the overall passivation effect of the corresponding second-doped semiconductor portion through the passivation of other films, the difference in passivation effect between the portion corresponding to the first-doped semiconductor portion and the portion corresponding to the second-doped semiconductor portion on the back-side of the back contact battery is reduced. Simultaneously, the passivation requirements of two doped semiconductor portions with different conductivity types are met. This results in both the portion corresponding to the first-doped semiconductor portion and the portion corresponding to the second-doped semiconductor portion on the back-side of the back contact battery having lower carrier recombination rates and higher carrier separation capabilities, thereby improving the operating performance of the back contact battery. See also... Figure 13 The figure shows the PL brightness test diagram of the finished structure of the back contact battery provided in the embodiment of the present invention. The bold solid line and dashed line respectively outline the regions corresponding to the first doped semiconductor portion and the second doped semiconductor portion. As can be seen from the figure, the PL brightness values ​​of these two regions on the back side of the finished battery are approximately the same, indicating that the passivation effect of these two regions on the back side of the finished battery is also approximately the same.

[0160] Furthermore, it is understood that when the structure and material of the first sub-passivation layer included in the first dielectric passivation layer and the first sub-passivation layer included in the second dielectric passivation layer are different, the passivation effect of the first sub-passivation layer included in the first dielectric passivation layer and the first sub-passivation layer included in the second dielectric passivation layer may be different. Consequently, under the same test conditions, the PL brightness value corresponding to the portion of the second doped semiconductor portion and the PL brightness value corresponding to the portion of the first doped semiconductor portion on the back light side of the back contact battery may also be different. Therefore, the PL brightness values ​​corresponding to the above two portions in the back light side can be determined according to the materials of the first sub-passivation layer included in the first dielectric passivation layer and the first sub-passivation layer included in the second dielectric passivation layer, as well as the structure of the back contact battery. No specific limitation is made here.

[0161] For example, the first sub-passivation layer included in the first dielectric passivation layer is an aluminum oxide layer. Under test conditions of an exposure time of 0.2 s and a light intensity of 1 sun, the PL brightness value corresponding to the side of the first sub-passivation layer of the first dielectric passivation layer away from the semiconductor substrate can be greater than or equal to 5000. For example, when the first sub-passivation layer included in the first dielectric passivation layer is an aluminum oxide layer, and under test conditions of an exposure time of 0.2 s and a light intensity of 1 sun, the PL brightness value corresponding to the side of the first sub-passivation layer of the first dielectric passivation layer away from the semiconductor substrate can be 5000, 5500, 5800, 6000, 6500, 7000, 7500, 8000, or 9000, etc. In this case, the aluminum oxide layer contains a large number of oxygen negative ions, which can form a high-density fixed negative charge at the interface between itself and the first doped semiconductor part, forming a built-in electric field that shields minority carriers, improving the carrier collection efficiency of the first doped semiconductor part and enhancing the carrier separation capability of the first doped semiconductor part. Secondly, under the test conditions of an exposure time of 0.2s and a light intensity of 1sun, when the PL brightness value corresponding to the side of the first sub-passivation layer of the first dielectric passivation layer away from the semiconductor substrate is greater than or equal to 5000, the presence of the first sub-passivation layer of the thicker first dielectric passivation layer improves the field passivation effect on the first doped semiconductor part, which is beneficial to further reduce the difference in passivation effect between the part corresponding to the first doped semiconductor part and the part corresponding to the second doped semiconductor part on the back light side of the back contact battery.

[0162] For example, the first sub-passivation layer included in the second dielectric passivation layer is an aluminum oxide layer. Under test conditions of an exposure time of 0.2 s and a light intensity of 1 sun, the PL brightness value corresponding to the side of the first sub-passivation layer of the second dielectric passivation layer that is away from the semiconductor substrate can be greater than or equal to 16500. For example, if the first sub-passivation layer included in the second dielectric passivation layer is an aluminum oxide layer, under test conditions of an exposure time of 0.2 s and a light intensity of 1 sun, the PL brightness value corresponding to the side of the first sub-passivation layer of the second dielectric passivation layer that is away from the semiconductor substrate can be 16500, 16800, 17000, 18000, 20000, 22000, 24000, 28000, or 30000, etc. In this case, chemical passivation through the first sub-passivation layer included in the second dielectric passivation layer can minimize the impact of its own field passivation function on the carrier collection efficiency of the second doped semiconductor section, ensuring that the second doped semiconductor section has a high carrier separation capability. This is beneficial to further reduce the difference in passivation effect between the portion corresponding to the first doped semiconductor section and the portion corresponding to the second doped semiconductor section on the back side of the back contact battery.

[0163] For example, when both the first sub-passivation layer included in the first dielectric passivation layer and the first sub-passivation layer included in the second dielectric passivation layer are aluminum oxide layers (under the same test conditions), the ratio between the PL brightness value corresponding to the side of the first sub-passivation layer included in the second dielectric passivation layer that faces away from the semiconductor substrate and the PL brightness value corresponding to the side of the first sub-passivation layer included in the first dielectric passivation layer that faces away from the semiconductor substrate can be greater than or equal to 2.5 and less than or equal to 3.4. For example, the above ratio can be 2.5, 2.6, 2.7, 2.8, 2.9, 3.0, 3.1, 3.2, 3.3, or 3.4, etc. In this case, compared to the ratio between the PL brightness value corresponding to the side of the second doped semiconductor portion away from the semiconductor substrate and the PL brightness value corresponding to the side of the first doped semiconductor portion away from the semiconductor substrate (approximately greater than or equal to 3 and less than or equal to 4), when the ratio between the PL brightness value corresponding to the side of the first sub-passivation layer included in the second dielectric passivation layer away from the semiconductor substrate and the PL brightness value corresponding to the side of the first sub-passivation layer included in the first dielectric passivation layer away from the semiconductor substrate is greater than or equal to 2.5 and less than or equal to 3.4, the ratio between the aforementioned PL brightness values ​​is smaller. That is, the presence of the first sub-passivation layer included in the first dielectric passivation layer and the first sub-passivation layer included in the second dielectric passivation layer helps to reduce the difference in passivation effect between the portion corresponding to the first doped semiconductor portion and the portion corresponding to the second doped semiconductor portion on the back light side of the back contact battery, which is beneficial to achieving uniform passivation.

[0164] Furthermore, under the same test conditions, the ratio of the PL brightness value corresponding to the side of the second dielectric passivation layer facing away from the semiconductor substrate to the PL brightness value corresponding to the side of the first dielectric passivation layer facing away from the semiconductor substrate is defined as PL1. And under the same test conditions, the ratio of the PL brightness value of the side of the fifth passivation layer facing away from the semiconductor substrate to the PL brightness value of the side of the fourth passivation layer facing away from the semiconductor substrate is defined as PL2, and PL2 is less than PL1. In this case, by providing fourth and fifth passivation layers with different thicknesses, the difference in passivation effect between the portion corresponding to the first doped semiconductor portion and the portion corresponding to the second doped semiconductor portion on the back-light side of the back contact battery is further reduced.

[0165] It is understandable that when the structure and material of the second sub-passivation layer included in the first dielectric passivation layer and the second sub-passivation layer included in the second dielectric passivation layer are different, the passivation effect of the second sub-passivation layer included in the first dielectric passivation layer and the second sub-passivation layer included in the second dielectric passivation layer may be different. Consequently, under the same test conditions, the PL brightness value corresponding to the portion of the second doped semiconductor portion and the PL brightness value corresponding to the portion of the first doped semiconductor portion on the back light side of the back contact battery may also be different. Therefore, the PL brightness values ​​corresponding to the above two portions in the back light side can be determined according to the materials of the second sub-passivation layer included in the first dielectric passivation layer and the second sub-passivation layer included in the second dielectric passivation layer, as well as the structure of the back contact battery. No specific limitation is made here.

[0166] For example, when both the second sub-passivation layer included in the first dielectric passivation layer and the second sub-passivation layer included in the second dielectric passivation layer are silicon nitride layers, PL2 can be greater than or equal to 1.62 and less than or equal to 1.9. For example, PL2 can be 1.62, 1.65, 1.7, 1.75, 1.8, 1.85, or 1.9, etc. In this case, with the formation of the second sub-passivation layer included in the first dielectric passivation layer and the second sub-passivation layer included in the second dielectric passivation layer, the ratio of the PL brightness value of the portion corresponding to the first doped semiconductor portion and the portion corresponding to the second doped semiconductor portion on the backlight side of the battery can be further reduced, thereby reducing the degree of passivation differentiation.

[0167] Optionally, under test conditions of an exposure time of 0.2s and a light intensity of 1sun, the PL brightness value corresponding to the portion of the back-light side of the back contact battery corresponding to the first doped semiconductor portion can be greater than or equal to 8000 and less than or equal to 25000.

[0168] Optionally, under test conditions of an exposure time of 0.2s and a light intensity of 1sun, the PL brightness value corresponding to the portion of the back-light side of the back contact battery corresponding to the first doped semiconductor portion can be greater than or equal to 20000 and less than or equal to 45000.

[0169] As one possible implementation scheme, such as Figure 12 As shown, the aforementioned back contact battery may further include a third passivation layer 20 disposed on the second surface, the thickness of which is greater than the thickness of a portion of the first sub-passivation layer 21 included in the first dielectric passivation layer 14. In this case, the second surface of the semiconductor substrate 11 is effectively chemically passivated by the thicker third passivation layer 20, thereby reducing the number of surface defects and the carrier recombination rate on the second surface.

[0170] In this embodiment of the invention, the material and thickness of the third passivation layer are not specifically limited, as long as the thickness of the third passivation layer is greater than the thickness of the first dielectric passivation layer. For example, the material of the third passivation layer may include at least one of aluminum oxide, silicon oxide, silicon nitride, and aluminum nitride.

[0171] Secondly, such as Figure 14 As shown, an embodiment of the present invention provides a photovoltaic module, which includes a back contact battery provided by a first aspect and various implementations thereof.

[0172] Specifically, since the photovoltaic module provided in this embodiment of the invention includes back-contact cells, the positive and negative connectors used to interconnect different cells in the photovoltaic module are all located on the back side of the cells. Additionally, the photovoltaic module may include, in sequence, a transparent cover plate, a first encapsulating film, a back-contact cell layer, a circuit interconnection layer, a second encapsulating film, and a backplate.

[0173] The transparent cover can be made of at least one of tempered glass, high-transparency plastic, and silicone rubber. The first and second encapsulating films can be made of POE, EVA, PVB, or other materials. The back contact cell layer can include multiple back contact cells arranged in an array, connected by a circuit interconnect layer. This circuit interconnect layer can be used to electrically connect different back contact cells via in-string interconnects such as solder ribbons, or it can be a conductive backsheet. This conductive backsheet includes a conductive circuit layer and an insulating material layer between the conductive circuit layer and the back contact cell layer. Conductive windows are provided within the insulating material layer, and the interconnection structure of the back contact cells is interconnected with the patterned conductive circuit layer through these windows. The backsheet can be made of TPC, PET, TPT, CPC, or other materials to prevent the circuit interconnect layer from reacting in the external environment and extend the lifespan of the photovoltaic module.

[0174] The beneficial effects of the second aspect and its various implementations in the embodiments of the present invention can be referred to the analysis of the beneficial effects of the first aspect and its various implementations, and will not be repeated here.

[0175] The above description does not provide detailed explanations of the technical aspects of each layer's patterning, etching, etc. However, those skilled in the art should understand that various technical means can be used to form layers and regions of the desired shape. Furthermore, to form the same structure, those skilled in the art can also design methods that are not entirely identical to those described above. Additionally, although various embodiments have been described above, this does not mean that the measures in the various embodiments cannot be used advantageously in combination.

[0176] The embodiments of the present invention have been described above. However, these embodiments are merely for clarity and are not intended to limit the scope of the invention. The scope of the invention is defined by the appended claims and their equivalents. Various substitutions and modifications can be made by those skilled in the art without departing from the scope of the invention, and all such substitutions and modifications should fall within the scope of the invention.

Claims

1. A back-contact battery, characterized in that, include: Semiconductor substrate, first doped semiconductor portion, second doped semiconductor portion, first dielectric passivation layer and second dielectric passivation layer; The first doped semiconductor portion and the second doped semiconductor portion have opposite conductivity types; Both the first dielectric passivation layer and the second dielectric passivation layer include a first sub-passivation layer with field passivation function; the conductivity type of the first doped semiconductor portion is opposite to the conductivity type of the fixed charge of the first sub-passivation layer; The semiconductor substrate has a first surface and a second surface opposite to each other; along a direction parallel to the first surface, the first doped semiconductor portion and the second doped semiconductor portion are alternately distributed on the first surface; The first dielectric passivation layer covers the side of the first doped semiconductor portion away from the semiconductor substrate, and the second dielectric passivation layer covers the side of the second doped semiconductor portion away from the semiconductor substrate. Both the first dielectric passivation layer and the second dielectric passivation layer further include a second sub-passivation layer with chemical passivation function; the second sub-passivation layer is disposed on the side of the first sub-passivation layer away from the semiconductor substrate; the material of the second sub-passivation layer included in the first dielectric passivation layer is different from the material of the first sub-passivation layer included in the first dielectric passivation layer; the material of the second sub-passivation layer included in the second dielectric passivation layer is different from the material of the first sub-passivation layer included in the second dielectric passivation layer; The ratio of the refractive index of the first dielectric passivation layer to the refractive index of the second dielectric passivation layer is greater than or equal to 0.9 and less than or equal to 1.1; and / or, the refractive indices of the first dielectric passivation layer and / or the second dielectric passivation layer are greater than or equal to 2.0 and less than or equal to 2.

2.

2. The back contact battery according to claim 1, characterized in that, The difference between the refractive index of the second sub-passivation layer included in the second dielectric passivation layer and the refractive index of the second sub-passivation layer included in the first dielectric passivation layer is greater than or equal to 0.01 and less than or equal to 0.

1.

3. The back contact battery according to claim 1, characterized in that, Under the same test conditions, on the back surface side of the back contact battery, the PL brightness value corresponding to the portion corresponding to the second doped semiconductor portion is greater than the PL brightness value corresponding to the portion corresponding to the first doped semiconductor portion.

4. The back contact battery according to claim 1, characterized in that, The thickness of the first sub-passivation layer included in the first dielectric passivation layer is greater than the thickness of the first sub-passivation layer included in the second dielectric passivation layer; And / or, the thickness of the first sub-passivation layer is greater than or equal to 2 nm and less than or equal to 15 nm.

5. The back contact battery according to claim 1, characterized in that, The thickness of the second sub-passivation layer included in the first dielectric passivation layer is less than the thickness of the second sub-passivation layer included in the second dielectric passivation layer; And / or, the difference between the thickness of the second sub-passivation layer included in the second dielectric passivation layer and the thickness of the second sub-passivation layer included in the first dielectric passivation layer is greater than or equal to 0.5 nm and less than or equal to 5 nm; And / or, according to claim 1, the back contact battery is characterized in that the thickness of the second sub-passivation layer is greater than or equal to 50 nm and less than or equal to 160 nm.

6. The back contact battery according to claim 1, characterized in that, The thickness of the first dielectric passivation layer is less than the thickness of the second dielectric passivation layer; And / or, the thickness of the first dielectric passivation layer and / or the second dielectric passivation layer is greater than or equal to 52 nm and less than or equal to 175 nm.

7. The back contact battery according to claim 1, characterized in that, The first doped semiconductor portion has a first tower-like texture structure on the side of its surface facing away from the semiconductor substrate, and the second doped semiconductor portion has a second tower-like texture structure on the side of its surface facing away from the semiconductor substrate. The one-dimensional dimensions of the first tower-like texture structure and the one-dimensional dimensions of the second tower-like texture structure are different.

8. The back contact battery according to claim 7, characterized in that, The side length of the first tower-based texture structure is greater than the side length of the second tower-based texture structure; And / or, the height of the first tower-based texture structure is less than the height of the second tower-based texture structure.

9. The back contact battery according to any one of claims 1 to 8, characterized in that, The first sub-passivation layer included in the first dielectric passivation layer and the first sub-passivation layer included in the second dielectric passivation layer are made of the same material; And / or, the first sub-passivation layer included in the first dielectric passivation layer and the first sub-passivation layer included in the second dielectric passivation layer are integrally continuous.

10. The back contact battery according to any one of claims 1 to 8, characterized in that, The material of the second sub-passivation layer included in the first dielectric passivation layer is the same as the material of the second sub-passivation layer included in the second dielectric passivation layer; And / or, the second sub-passivation layer included in the first dielectric passivation layer and the second sub-passivation layer included in the second dielectric passivation layer are integrally continuous.

11. The back contact battery according to claim 1, characterized in that, The first dielectric passivation layer includes a first sub-passivation layer comprising a hydrogen-containing passivation layer, wherein a local region of the hydrogen-containing passivation layer has a microstructure; In the first doped semiconductor portion and / or the second doped semiconductor portion, an uneven anti-reflection structure is formed at a position corresponding to the microstructure.

12. A photovoltaic module, characterized in that, Including the back contact battery as described in any one of claims 1 to 11.

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