A transient electromagnetic receiving system and control method for shallow exploration

CN120847884BActive Publication Date: 2026-08-21CENT SOUTH UNIV
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Patent Information

Application Number
CN202510974080.9
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2025-07-15
Publication Date
2026-08-21
Estimated Expiration
2045-07-15

AI Technical Summary

Technical Problem

[0006]本申请提供了一种用于浅层勘探的瞬变电磁接收系统及控制方法,可以解决瞬变电磁信号的采集工作效率低的问题

Benefits of technology

在本申请的一些实施例中,用于浅层勘探的瞬变电磁接收系统包括接收线圈、信号采集板、嵌入式控制板和上位机;接收线圈与信号采集板的第一信号输入端相连接,信号采集板的信号输出端与嵌入式控制板的第一信号输入端相连接,信号采集板的第二信号输入端与嵌入式控制板的第一信号输出端相连接,嵌入式控制板的第二信号输入端与上位机的信号输出端相连接,嵌入式控制板的第二信号输出端与上位机的信号输入端相连接。其中,根据上位机的采集控制指令对负增益早期信号采集模块和高增益晚期信号采集模块进行配置,实现对负增益早期信号采集模块和高增益晚期信号采集模块的采集控制,使得能够根据不同的地质目标下发不同的采集控制指令,控制强瞬变和微弱瞬变的瞬变电磁信号的采集增益,通过两个通道分别对强瞬变的瞬变电磁信号和微弱瞬变的瞬变电磁信号进行采集,有效提高瞬变电磁接收系统的工作效率。

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Abstract

The application relates to the technical field of shallow exploration, and provides a transient electromagnetic receiving system and a control method for shallow exploration, the transient electromagnetic receiving system comprising a receiving coil, a signal collection board, an embedded control board and an upper computer; the receiving coil is connected with a first signal input end of the signal collection board; a signal output end of the signal collection board is connected with a first signal input end of the embedded control board; a second signal input end of the signal collection board is connected with a first signal output end of the embedded control board; a second signal input end of the embedded control board is connected with a signal output end of the upper computer; and a second signal output end of the embedded control board is connected with a signal input end of the upper computer. The system can improve the working efficiency of transient electromagnetic signal collection.
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Description

Technical Field

[0001] This application relates to the field of shallow exploration technology, and in particular to a transient electromagnetic receiving system and control method for shallow exploration. Background Technology

[0002] Shallow underground space generally refers to the area 0-50m below the surface, and is the main place where people carry out production and living activities. Common tunnel projects, urban pipelines, subway lines, and water conservancy projects all fall within the scope of shallow underground space. In recent years, with the development of the national social economy and the improvement of people's living standards, the construction of basic infrastructure projects such as urban construction, reservoir and dam construction, and transportation network construction has also developed rapidly. The scale of infrastructure construction located in shallow underground space has grown rapidly, and the corresponding engineering construction difficulty has also increased day by day due to natural or human factors. At the same time, due to the influence of time factors, basic engineering facilities inevitably gradually suffer internal damage, and the importance of hidden danger investigation and maintenance of such projects has been increasing year by year. Therefore, it is clear that solving shallow geological problems is of great significance, and obtaining information on shallow underground space is a direct solution to solving shallow geological problems. The complexity, concealment, destructiveness, and time-sensitive nature of shallow geological problems force people to pursue more efficient and more accurate exploration theories and equipment.

[0003] There are generally two approaches to solving shallow geological problems: manual drilling and geophysical exploration. Drilling directly observes the target subsurface space by excavating boreholes. This method offers the highest reliability and most direct results, but it is costly, inefficient, and destructive, making it impractical for most applications. Geophysical exploration, on the other hand, offers advantages such as high efficiency, low cost, and non-destructive nature, and is currently the primary method for solving shallow geological problems. Compared to other geophysical methods, transient electromagnetic geophysical exploration offers advantages such as high efficiency, wide detection range, non-destructive testing, high lateral resolution, strong high-resistivity penetration capability, sensitivity to low-resistivity conditions, and low cost. In recent years, transient electromagnetic methods have developed rapidly, especially in the field of shallow exploration, where their application is becoming increasingly widespread.

[0004] With the deepening of theoretical research on transient electromagnetic methods, the continuous development of electronic information technology, and the continuous improvement of the performance of electronic components, transient electromagnetic instruments have made rapid progress in terms of measurement accuracy, anti-interference capability, and noise suppression capability. Based on the characteristics of rapid attenuation and wide bandwidth of transient secondary fields, transient electromagnetic receivers require high-precision, large dynamic range acquisition capabilities. When the dynamic range of the acquisition device is constant, common techniques for expanding the dynamic range involve indirectly expanding it through multiple acquisitions with different gains, but this reduces working efficiency.

[0005] It is evident that current transient electromagnetic receiving systems suffer from low efficiency in acquiring transient electromagnetic signals. Summary of the Invention

[0006] This application provides a transient electromagnetic receiving system and control method for shallow exploration, which can solve the problem of low efficiency in the acquisition of transient electromagnetic signals.

[0007] In a first aspect, embodiments of this application provide a transient electromagnetic receiving system for shallow exploration, the transient electromagnetic receiving system including a receiving coil, a signal acquisition board, an embedded control board, and a host computer; The receiving coil is connected to the first signal input terminal of the signal acquisition board, the signal output terminal of the signal acquisition board is connected to the first signal input terminal of the embedded control board, the second signal input terminal of the signal acquisition board is connected to the first signal output terminal of the embedded control board, the second signal input terminal of the embedded control board is connected to the signal output terminal of the host computer, and the second signal output terminal of the embedded control board is connected to the signal input terminal of the host computer. When the host computer sends an acquisition control command carrying general configuration information and late signal acquisition configuration information to the processing module in the embedded control board, the processing module sends the acquisition control command to the control module in the signal acquisition board. The control module parses the acquisition control command and sends the parsed general configuration information to the negative gain early signal acquisition module in the signal acquisition board, and sends the parsed general configuration information and late signal acquisition configuration information to the high gain late signal acquisition module in the signal acquisition board. The negative gain early signal acquisition module configures its own acquisition channel according to the general configuration information and acquires strong transient electromagnetic signals in the signal sent by the receiving coil. The high gain late signal acquisition module configures its own acquisition channel according to the general configuration information and late signal acquisition configuration information and acquires weak transient electromagnetic signals in the signal sent by the receiving coil. The amplitude of the strong transient electromagnetic signal is greater than or equal to the amplitude threshold, and the amplitude of the weak transient electromagnetic signal is less than the amplitude threshold. The general configuration information includes the ADC sampling rate and the number of sampling points of the acquisition channel, and the late signal acquisition configuration information includes the amplification factor of the acquisition channel of the high gain late signal acquisition module.

[0008] Secondly, embodiments of this application provide a control method for a transient electromagnetic receiving system, applied to the aforementioned transient electromagnetic receiving system. The control method includes: When the host computer sends an acquisition control command carrying general configuration information and late signal acquisition configuration information to the processing module, the processing module sends the acquisition control command to the control module. The system parses the acquisition control commands received by the control module and sends the parsed general configuration information to the negative gain early signal acquisition module in the signal acquisition board. It also sends the parsed general configuration information and late signal acquisition configuration information to the high gain late signal acquisition module in the signal acquisition board. Configure the acquisition channels of the negative gain early signal acquisition module according to the general configuration information, and configure the acquisition channels of the high gain late signal acquisition module according to the general configuration information and the late signal acquisition configuration information. The configured negative gain early signal acquisition module is used to acquire strong transient electromagnetic signals in the signal transmitted by the receiving coil, and the high gain late signal acquisition module is used to acquire weak transient electromagnetic signals in the signal transmitted by the receiving coil. The acquired strong transient electromagnetic signals and weak transient electromagnetic signals are sent to the host computer through the control module and processing module.

[0009] Optionally, the late signal acquisition configuration information may also include the activation time information of the high-gain late signal acquisition module; The high-gain late-stage signal acquisition module is used to acquire weak transient electromagnetic signals from the signal transmitted by the receiving coil, including: The high-gain late signal acquisition module's start-up time information is sent to the channel switching module. The channel switching module then controls the high-gain late signal acquisition module to begin acquiring weak transient electromagnetic signals from the signal transmitted by the receiving coil at the time described in the high-gain late signal acquisition module's start-up time information. The high-gain late signal acquisition module starts acquiring signals later than the negative-gain early signal acquisition module.

[0010] Optionally, the acquired strong transient electromagnetic signals and weak transient electromagnetic signals are sent to the host computer through the control module and processing module, including: The acquired strong transient electromagnetic signals and weak transient electromagnetic signals are buffered and superimposed using the RAM superposition unit in the control module to obtain the acquired data. The acquired data is then sent to the host computer through the processing module.

[0011] The above-mentioned solution in this application has the following beneficial effects: In some embodiments of this application, a transient electromagnetic receiving system for shallow exploration includes a receiving coil, a signal acquisition board, an embedded control board, and a host computer. The receiving coil is connected to a first signal input terminal of the signal acquisition board, the signal output terminal of the signal acquisition board is connected to a first signal input terminal of the embedded control board, a second signal input terminal of the signal acquisition board is connected to a first signal output terminal of the embedded control board, a second signal input terminal of the embedded control board is connected to a signal output terminal of the host computer, and a second signal output terminal of the embedded control board is connected to a signal input terminal of the host computer. The system configures a negative gain early signal acquisition module and a high gain late signal acquisition module according to acquisition control instructions from the host computer, enabling acquisition control of these modules. This allows for the issuance of different acquisition control instructions based on different geological targets, controlling the acquisition gain of strong and weak transient electromagnetic signals. Strong and weak transient electromagnetic signals are acquired through two channels respectively, effectively improving the working efficiency of the transient electromagnetic receiving system.

[0012] Other beneficial effects of this application will be described in detail in the following detailed description section. Attached Figure Description

[0013] To more clearly illustrate the technical solutions in the embodiments of this application, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0014] Figure 1 A schematic diagram of a transient electromagnetic receiving system for shallow exploration provided in an embodiment of this application; Figure 2 This is a schematic diagram of the structure of an FPGA controller provided in an embodiment of this application; Figure 3 This is a schematic diagram of the structure of a damping matching module provided in one embodiment of this application; Figure 4 This is a schematic diagram of the structure of a pre-protection module provided in an embodiment of this application; Figure 5 This is a schematic diagram of the structure of a channel switching module provided in an embodiment of this application; Figure 6 This is a schematic diagram of the structure of a negative gain early signal acquisition module and a high gain late signal acquisition module provided in an embodiment of this application; Figure 7 A circuit diagram of a 5x gain circuit provided in an embodiment of this application; Figure 8 A schematic diagram of data transmission of an embedded control board provided in an embodiment of this application; Figure 9 A flowchart of a control method for a transient electromagnetic receiving system provided in an embodiment of this application; Figure 10 A schematic diagram of the working process of a transient electromagnetic receiving system provided in an embodiment of this application; Figure 11 This is a system short-circuit noise test diagram provided in an embodiment of this application; Figure 12 This application provides voltage test graphs acquired at different amplification factors according to an embodiment of the present application. Figure 13 This is a measured induced voltage attenuation curve provided in an embodiment of this application; Figure 14 This is a schematic diagram of the structure of a data acquisition control command provided in an embodiment of this application; Figure 15 This is a flowchart illustrating the parsing and acquisition control instructions provided in one embodiment of this application. Detailed Implementation

[0015] In the following description, specific details such as particular system architectures and techniques are set forth for illustrative purposes and not for limitation, in order to provide a thorough understanding of the embodiments of this application. However, those skilled in the art will understand that this application may also be implemented in other embodiments without these specific details. In other instances, detailed descriptions of well-known systems, apparatuses, circuits, and methods have been omitted so as not to obscure the description of this application with unnecessary detail.

[0016] It should be understood that, when used in this application specification and the appended claims, the term "comprising" indicates the presence of the described features, integrals, steps, operations, elements and / or components, but does not exclude the presence or addition of one or more other features, integrals, steps, operations, elements, components and / or a collection thereof.

[0017] It should also be understood that the term “and / or” as used in this application specification and the appended claims means any combination of one or more of the associated listed items and all possible combinations, and includes such combinations.

[0018] As used in this application specification and the appended claims, the term "if" may be interpreted, depending on the context, as "when," "once," "in response to determination," or "in response to detection." Similarly, the phrase "if determined" or "if detected [the described condition or event]" may be interpreted, depending on the context, as meaning "once determined," "in response to determination," "once detected [the described condition or event]," or "in response to detection [the described condition or event]."

[0019] Furthermore, in the description of this application and the appended claims, the terms "first," "second," "third," etc., are used only to distinguish descriptions and should not be construed as indicating or implying relative importance.

[0020] References to "one embodiment" or "some embodiments" as described in this specification mean that one or more embodiments of this application include a specific feature, structure, or characteristic described in connection with that embodiment. Therefore, the phrases "in one embodiment," "in some embodiments," "in other embodiments," "in still other embodiments," etc., appearing in different parts of this specification do not necessarily refer to the same embodiment, but rather mean "one or more, but not all, embodiments," unless otherwise specifically emphasized. The terms "comprising," "including," "having," and variations thereof mean "including but not limited to," unless otherwise specifically emphasized.

[0021] To address the low efficiency of existing transient electromagnetic signal acquisition methods, this application provides a transient electromagnetic receiving system for shallow exploration. The system configures a negative gain early signal acquisition module and a high gain late signal acquisition module according to acquisition control instructions from a host computer. This enables acquisition control of the negative gain early signal acquisition module and the high gain late signal acquisition module, allowing different acquisition control instructions to be issued based on different geological targets. The system controls the acquisition gain of strong and weak transient electromagnetic signals, acquiring them through two separate channels, effectively improving the efficiency of the transient electromagnetic receiving system.

[0022] The transient electromagnetic receiving system for shallow exploration provided in this application will now be described by way of example.

[0023] like Figure 1 As shown, the transient electromagnetic receiving system for shallow exploration provided in this application includes a receiving coil, a signal acquisition board, an embedded control board, and a host computer.

[0024] The receiving coil is connected to the first signal input terminal of the signal acquisition board, the signal output terminal of the signal acquisition board is connected to the first signal input terminal of the embedded control board, the second signal input terminal of the signal acquisition board is connected to the first signal output terminal of the embedded control board, the second signal input terminal of the embedded control board is connected to the signal output terminal of the host computer, and the second signal output terminal of the embedded control board is connected to the signal input terminal of the host computer.

[0025] When the host computer sends data to the processing module in the embedded control board ( Figure 1When the 32-bit microcontroller (STM32 processor) sends acquisition control commands carrying general configuration information and late signal acquisition configuration information, the processing module sends the acquisition control commands to the control module in the signal acquisition board. Figure 1 The FPGA controller in the signal acquisition board parses the acquisition control commands and sends the parsed general configuration information to the negative gain early signal acquisition module. It also sends the parsed general configuration information and late signal acquisition configuration information to the high gain late signal acquisition module. The negative gain early signal acquisition module configures its acquisition channel according to the general configuration information and acquires strong transient electromagnetic signals. The high gain late signal acquisition module configures its acquisition channel according to the general configuration information and acquires weak transient electromagnetic signals. The amplitude of strong transient electromagnetic signals is greater than or equal to the amplitude threshold, while the amplitude of weak transient electromagnetic signals is less than the amplitude threshold. The general configuration information includes the ADC sampling rate and number of sampling points of the acquisition channel, and the late signal acquisition configuration information includes the amplification factor of the acquisition channel of the high gain late signal acquisition module.

[0026] A transient electromagnetic field is emitted underground by a ground-based excitation signal source (such as a transmitting coil). The electromagnetic signal reflected from the shallow underground space is received by a receiving coil and sent to a negative gain early signal acquisition module and a high gain late signal acquisition module. When the amplitude of the transient electromagnetic signal is large, only the negative gain early signal acquisition module is used to acquire it. As time goes by, the amplitude of the transient electromagnetic signal decreases, and the accuracy of the signal acquired by the negative gain early signal acquisition module decreases. At this time, the high gain late signal acquisition module is turned on to acquire the weak transient electromagnetic signal. Because the high gain late signal acquisition module has independent parameter configuration (such as amplification factor) for the acquisition of weak transient electromagnetic signals, the accuracy of the weak transient electromagnetic signals acquired by the high gain late signal acquisition module is improved.

[0027] The signal acquisition board also includes a damping matching module, a pre-protection module, a channel switching module, a digital isolation module, and a GPS module.

[0028] The input terminal of the damping matching module is the signal input terminal of the signal acquisition board, and the first output terminal of the control module is the signal output terminal of the signal acquisition board.

[0029] The output of the damping matching module is connected to the input of the pre-protection module. The output of the pre-protection module is connected to the first input of the channel switching module. The first output of the channel switching module is connected to the first input of the negative gain early signal acquisition module. The second output of the channel switching module is connected to the first input of the high gain late signal acquisition module. The output of the negative gain early signal acquisition module is connected to the first input of the control module. The output of the high gain late signal acquisition module is connected to the second input of the control module. The third input of the control module is connected to the output of the GPS module. The second output of the control module is connected to the second input of the negative gain early signal acquisition module. The third output of the control module is connected to the second input of the high gain late signal acquisition module. The fourth output of the control module is connected to the input of the digital isolation module. The first output of the digital isolation module is connected to the second input of the channel switching module. The second output of the digital isolation module is connected to the third input of the high gain late signal acquisition module. The negative gain early signal acquisition module is used to acquire strong transient electromagnetic signals, and the high gain late signal acquisition module is used to acquire weak transient electromagnetic signals.

[0030] It should be noted that the control module, i.e., the FPGA controller, is used to receive and buffer the acquisition data (i.e., the acquired transient electromagnetic signals) output by the negative gain early signal acquisition module and the high gain late signal acquisition module. The negative gain early signal acquisition module is used to acquire weak transient electromagnetic signals, and the high gain late signal acquisition module is used to acquire strong transient electromagnetic signals. It then integrates the acquired data and sends it to the STM32 processor (processing module) in the embedded control board. It is also used to receive command data (i.e., acquisition control instructions) sent by the STM32 processor and parse them. Furthermore, it is used to generate sampling rate control signals to the negative gain early signal acquisition module based on the parsed commands. The system includes an early gain signal acquisition module and a high gain late gain signal acquisition module, which control the sampling rate. It also generates gain control signals based on the parsed command data and outputs them to the high gain late gain signal acquisition module to control its circuit gain. Furthermore, it generates superposition count control signals based on the parsed command data, controlling the FPGA controller's internal superposition program to complete a specified number of data superpositions and buffering the superposition data in an internally allocated FIFO buffer space for transmission to the STM32 processor. Finally, it receives information such as the 1PPS synchronization pulse signal, synchronization time, GPS lock identifier, and geographic coordinates output by the GPS receiver.

[0031] The damping matching module is used to improve the overall system of receiver circuit and receiving coil to be in a critical damping state when turned off, ensuring that the acquisition system can respond quickly and acquire transient electromagnetic signals stably. In order to enhance the anti-interference capability of the signal, the acquired transient electromagnetic signal enters the damping matching circuit in a differential form. The damping resistor, which is sufficient to make the circuit work in a critical damping state, is divided into two parts with equal resistance. The two ends of the two damping resistors are used as the positive input terminal and the negative input terminal of the differential input, respectively. The series node of the two damping circuits is used as the ground terminal of the differential input.

[0032] The pre-protection module is used to improve the overall system of receiver circuit and receiving coil when it is turned off, so as to ensure that the acquisition system can respond quickly and acquire transient electromagnetic signals stably.

[0033] The channel switching module is used to control the late-stage high-gain channels to be flexibly turned on and off according to actual needs.

[0034] The digital isolation module is used to isolate the analog switch-on signal SW and the gain control signal of the high-gain late-stage signal acquisition module output by the FPGA. The gain control signal is used to control the circuit gain of the high-gain late-stage signal acquisition module. It can be a digital isolator.

[0035] The GPS module is used to receive electromagnetic waves sent by the Global Positioning System (GPS), analyze the electromagnetic waves, and then convert the analyzed information into a synchronization pulse of 1PPS, as well as a message containing information such as synchronization time, GPS lock identifier, and geographic coordinates. The synchronization pulse of 1PPS is output through a pin, and the message is periodically output to the control module every second via the UART protocol.

[0036] The control module parses the acquisition control commands and sends the parsed general configuration information to the negative gain early signal acquisition module in the signal acquisition board. It also sends the parsed general configuration information and late signal acquisition configuration information to the high gain late signal acquisition module in the signal acquisition board. The negative gain early signal acquisition module configures its acquisition channel according to the general configuration information and acquires strong transient electromagnetic signals. The high gain late signal acquisition module configures its acquisition channel according to the general configuration information and late signal acquisition configuration information and acquires weak transient electromagnetic signals.

[0037] The embedded control board also includes a storage module ( Figure 1 The Secure Digital (SD) card storage module, Bluetooth module, and wireless transmission module are included. Figure 1The wireless network communication (Wi-Fi, Wireless Fidelity) module in the system.

[0038] The first input terminal of the processing module is the first signal input terminal of the embedded control board, the output terminal of the Bluetooth module is the second signal input terminal of the embedded control board, and the output terminal of the wireless transmission module is the signal output terminal of the embedded control board.

[0039] The second input terminal of the processing module is connected to the output terminal of the storage module, the third input terminal of the processing module is connected to the output terminal of the Bluetooth module, the first output terminal of the processing module is connected to the input terminal of the storage module, and the second output terminal of the processing module is connected to the input terminal of the wireless transmission module.

[0040] The processing module, which can be an STM32 processor, is used to receive the acquired data and GPS information output by the FPGA controller and store the acquired data and GPS information in the SD card storage module; it is also used to read the acquired data and GPS information in the SD card storage module and upload the acquired data and GPS information to the host computer through the control wireless transmission module; it is also used to receive command data (i.e., acquisition control commands) issued by the host computer through the control Bluetooth module, parse the command data, and send the parsed command data to the FPGA controller.

[0041] The Bluetooth module is used to receive command data from the host computer and send it to the STM32 processor. The command data is output via the UART protocol. It can be Bluetooth.

[0042] The wireless transmission module is used to send the acquired data from the STM32 processor to the host computer. The acquired data is output via the SPI protocol.

[0043] The SD card storage module is used to store the acquired data and GPS information received by the STM32 processor.

[0044] The control module is a field-programmable gate array (FPGA) controller.

[0045] like Figure 2As shown, the FPGA controller includes a Universal Asynchronous Receiver / Transmitter (UART) serial port unit, a core unit, a data transceiver unit, a register configuration unit, an adaptive late channel control unit, a First In, First Out (FIFO) unit, a Random Access Memory (RAM) stacking unit, and an Analog-to-Digital Converter (ADC) data reading unit.

[0046] The first signal input terminal of the ADC data reading unit is the first input terminal of the FPGA controller, the second signal input terminal of the ADC data reading unit is the second input terminal of the FPGA controller, the GPS signal input terminal of the UART serial port unit is the third input terminal of the FPGA controller, the third data receiving terminal of the data transceiver unit is the fourth input terminal of the FPGA controller, the first data transmitting terminal of the data transceiver unit is the first output terminal of the FPGA controller, the first sampling rate control signal output terminal of the register configuration module is the second output terminal of the FPGA controller, the second sampling rate control signal output terminal of the register configuration module is the third output terminal of the FPGA controller, and the channel control signal output terminal of the adaptive late channel control unit is the fourth output terminal of the FPGA controller.

[0047] The GPS signal output terminal of the UART serial port unit is connected to the first signal input terminal of the kernel unit; the signal input terminal of the register configuration module is connected to the first signal output terminal of the kernel unit; the signal input terminal of the adaptive late channel control module is connected to the second signal output terminal of the kernel unit; the signal output terminal of the ADC data reading unit is connected to the first signal input terminal of the RAM overlay unit; the first signal output terminal of the RAM overlay unit is connected to the second signal input terminal of the kernel unit; the second signal output terminal of the RAM overlay unit is connected to the signal input terminal of the FIFO unit; the signal output terminal of the FIFO unit is connected to the first data receiving terminal of the data transceiver unit; the second data receiving terminal of the data transceiver unit is connected to the third signal output terminal of the kernel unit; and the second data sending terminal of the data transceiver unit is connected to the third signal input terminal of the kernel unit.

[0048] The FPGA controller's data transceiver unit receives command data sent by the STM32 processor and outputs it to the core unit. It also receives GPS information from the core unit and outputs it to the STM32 processor, as well as acquisition data from the FIFO unit and outputs it to the STM32 processor. The core unit receives command data from the data transceiver module, parses it, classifies and packages the parsed commands, and outputs it to the RAM stacking unit, adaptive late channel control unit, and register configuration unit. It also controls the UART serial port unit to receive messages from the GPS module and outputs the GPS information from those messages to the data transceiver unit. The UART serial port unit receives messages from the GPS module and outputs the GPS information from those messages to the core unit. The register configuration unit receives register values ​​and sampling rate configuration data (i.e., general configuration information) from the core unit and outputs this data to the ADCs in the negative gain early signal acquisition module and the high gain late signal acquisition module to configure the ADC's sampling rate and internal signal amplification. The adaptive late channel control unit... The high-gain late-signal acquisition module is adaptively controlled. Based on the acquisition data output by the RAM overlay unit, the module's turn-on time and channel gain are adaptively adjusted by analyzing the acquisition voltage amplitude. This generates a corresponding turn-on time signal (i.e., analog switch turn-on signal SW) and channel amplification factor control signal for the high-gain late-signal acquisition module. These signals are then output to the channel switching module and the high-gain late-signal acquisition module via a digital isolation module. This ensures that the high-gain late-signal acquisition channel turns on as early as possible and has the highest possible gain, thereby maximizing acquisition performance. The ADC data reading unit reads the acquisition data output by the negative-gain early-signal acquisition module and the high-gain late-signal acquisition module and outputs the acquired data to the RAM overlay unit. The RAM overlay unit receives the RAM overlay count information output by the kernel unit and stores the acquisition data from the ADC data reading unit. Based on the RAM overlay count information output by the kernel unit, the unit performs a certain number of data overlays on the acquired data and outputs the overlaid data to the FIFO unit. The FIFO unit buffers the data output by the RAM overlay unit, providing a buffer space between the acquired data and the data transceiver unit.

[0049] A damping matching module can be a damping matching circuit. For example... Figure 3 As shown, the damping matching circuit includes a first damping resistor ( Figure 3 R in d1 ) and second damping resistor ( Figure 3 R in d2 ).

[0050] The first end of the first damping resistor ( Figure 3 V in in_p ) is connected to the first end of the receiving coil, the first end of the gas discharge tube in the pre-protection module, and the first end of the second current-limiting resistor in the pre-protection module, and the second end of the second damping resistor ( Figure 3 V in in_n It is connected to the second end of the receiving coil, the second end of the gas discharge tube, and the first end of the first current-limiting resistor in the pre-protection module. For example... Figure 3 As shown, the first and second damping resistors, connected in series, are connected across the two sides of the receiving coil.

[0051] The second end of the first damping resistor and the first end of the second damping resistor are both connected to ground. Figure 3 (IGND in the circuit). The first and second damping resistors are used to control or suppress oscillations, reduce voltage fluctuations, and stabilize circuit performance.

[0052] The pre-protection module is a pre-protection circuit. In the pre-protection circuit, the second terminal of the third current-limiting resistor, the first terminal of the second switching diode, the second terminal of the fourth current-limiting resistor, and the first terminal of the first switching diode are all connected to the first input terminal of the channel switching module.

[0053] like Figure 4 As shown, the pre-protection circuit, in addition to the gas discharge tube ( Figure 4 D1 in the middle), the first switching diode ( Figure 4 D4 in the middle), the second switching diode ( Figure 4 D5 in the middle), the first current-limiting resistor ( Figure 4 R1 in the middle), the second current-limiting resistor ( Figure 4 R2 in the middle), the third current-limiting resistor ( Figure 4 R3) and the fourth current-limiting resistor ( Figure 4 R4 in the diagram also includes a first transient suppression diode (R4). Figure 4 D2), the second transient suppression diode ( Figure 4 D3 in ).

[0054] Figure 4 V near gas discharge tube D1 in-p and Figure 3 V in the damping matching circuit shown in_p connect, Figure 4 V near gas discharge tube D1 in-n and Figure 3 V in the damping matching circuit shown in_n connect. Figure 4 V near D4 in-p Connect the positive input terminal of the voltage in the channel switching module. Figure 4 V near D5 in-nConnect the inverting input terminal of the voltage in the channel switching module.

[0055] The grounding terminal of the gas discharge tube is connected to ground. The second terminal of the second current-limiting resistor and the first terminal of the fourth current-limiting resistor are both connected to the input terminal of the first transient suppression diode. The second terminal of the first current-limiting resistor and the first terminal of the third current-limiting resistor are both connected to the input terminal of the second transient suppression diode. The grounding terminals of the first and second transient suppression diodes are both connected to ground. The second terminal of the first switching diode ( Figure 4 The V+ terminal of D4 and the third terminal of the first switching diode ( Figure 4 Both the V+ terminals of diode D5 are connected to the positive power supply voltage, and the third terminal of the first switching diode ( Figure 4 The V- of D4 and the second terminal of the first switching diode ( Figure 4 The V- of D5 is connected to a negative power supply voltage.

[0056] The first and second switching diodes mentioned above are both composed of two diodes connected in sequence, such as... Figure 4 As shown, for D4, the anode of the first diode is connected to a forward voltage, and the cathode of the second diode is connected to a reverse voltage. For D5, the anode of the first diode is connected to a reverse voltage, and the cathode of the second diode is connected to a forward voltage.

[0057] In the pre-protection circuit, the gas discharge tube is used to discharge low-frequency, high-energy pulses, preventing large voltages from being connected incorrectly at the input terminal; the transient suppression diode is used for electrostatic discharge protection and voltage clamping; the current-limiting resistor, together with the transient suppression diode, further enhances the circuit's voltage regulation capability; the switching diode has voltage clamping, signal shaping, and electrostatic discharge (ESD) protection functions. The diode selected here has an extremely short reverse recovery time (6ns), which can effectively absorb high-frequency pulses in the circuit and clamp the input voltage to the preset voltage range.

[0058] For example, the damping matching module consists of two damping resistors connected in series: the damping resistors have completely identical parameters, and the two are connected in series and then bridging the two ends of the receiving coil. The resistance value of the damping resistors is obtained by a combination of actual measurement, simulation and theoretical calculation. The steps for accurately determining the power resistor value are as follows: First, accurately measure the equivalent resistance R, equivalent inductance L, and equivalent capacitance C of the receiving coil using an LCR bridge; then, based on the connection method between the receiving coil and the LCR bridge, and the LCR model of the transmitting coil, obtain the freewheeling circuit; based on the freewheeling circuit, and using Kirchhoff's constant voltage and current laws, the following non-homogeneous differential equations can be obtained. ,in R is the induced electromotive force of the receiving coil, L is the equivalent resistance of the receiving coil, L is the equivalent inductance of the receiving coil, and C is the equivalent capacitance of the receiving coil. This is the overall damping resistance value. To receive the output signal from the receiving coil, this non-homogeneous differential equation can be transformed into a homogeneous form for solution: The characteristic equation of this homogeneous differential equation is: The characteristic roots are Generally, the damping coefficient is set to... ,in Then the eigenvalues ​​can be simplified to: When the damping coefficient K=1, the system is in a critically damped state. At this state, the system responds fastest without oscillations. Generally, the system is operated in the critically damped state to obtain the optimal signal response. Under critical damping conditions, the overall damping resistance satisfies... The ideal value of the overall damping resistance can be obtained based on the parameters of the receiving coil. The actual resistance of a single damping resistor is half of the ideal value of the overall damping resistance.

[0059] like Figure 5 As shown, the channel switching module includes a first analog switch and a second analog switch, and the first input terminal of the channel switching module (such as...) Figure 5 V in in-p and V in-n The first analog switch and the second analog switch are directly connected to the first output terminal, which is connected to the first input terminal of the negative gain early signal acquisition module. Both the first and second analog switches are analog switches used to generate the input voltage for controlling the high gain late signal acquisition module (e.g., ...). Figure 5 (dg649 in the middle), analog switch +V s The pin is connected to the positive power supply voltage, -V s The IN pin is connected to the negative power supply voltage. It receives the analog switch on signal SW from the digital isolation module, which controls the analog switch to turn on or off. The NC pin is connected to ground, and the NO pin is connected to the input voltage. For the first analog switch, its NO pin is connected to the positive voltage V input to the first input terminal. in-p For the second analog switch, its NO pin is connected to the reverse voltage V input at the first input terminal. in-n The COM pins of the two analog switches serve as the second output terminal, providing a positive voltage V to the high-gain late-stage signal acquisition module. out-p and reverse voltage V out-n It controls the opening and closing of the high-gain late-stage signal acquisition module. When the analog switch open signal SW controls the two analog switches to open, the two analog switches output voltage signals to the high-gain late-stage signal acquisition module.

[0060] Negative gain early signal acquisition module and high gain late signal acquisition module, such as Figure 6As shown, the negative gain early signal acquisition module includes a 1 / 8 attenuation circuit that attenuates the amplitude of the input signal to 1 / 8 of its original value, an anti-aliasing filter circuit, and a single-channel analog-to-digital converter chip AD7760 connected in sequence. The input terminal of the 1 / 8 attenuation circuit is the first input terminal of the negative gain early signal acquisition module, and the input data is the early channel input. The signal input terminal of AD7760 is the second input terminal of the negative gain early signal acquisition module, and the signal output terminal of AD7760 is the output terminal of the negative gain early signal acquisition module. The high gain late signal acquisition module includes multiple 5x gain circuits connected in sequence. The anti-aliasing filter circuit and AD7760 also include a buffer for data buffering connected to each 5x gain circuit. The input of the first 5x gain circuit is the first input of the high-gain late signal acquisition module, and the input data is the late channel input. The input of the buffer is the second input of the high-gain late signal acquisition module, and the signal input of AD7760 is the third input of the high-gain late signal acquisition module. The signal output of AD7760 is the output of the high-gain late signal acquisition module. The buffer is used to send the gain control signal from the FPGA to each 5x gain circuit. When the amplitude of the transient electromagnetic signal is large, only the negative gain early signal acquisition module is used to acquire it. As time goes by, the amplitude of the transient electromagnetic signal decreases, and the accuracy of the signal acquired by the negative gain early signal acquisition module decreases. At this time, the high-gain late signal acquisition module is turned on to acquire the weak transient electromagnetic signal.

[0061] The circuit diagram of the above 5x gain circuit is as follows: Figure 7 As shown, it includes an operational amplifier ADA4898-2, a first resistor, a second resistor, a third resistor, a first switch, and a second switch (i.e., Figure 7The SPST (SPST) in the circuit has two input terminals: the first and second switches are signal input terminals of the 5x gain circuit, used to receive gain control signals from the FPGA transmitted through the digital isolation module; the VIN1+ and VIN2+ pins of the operational amplifier are input terminals of the 5x gain circuit, connected to the positive input voltage Vin_P and the inverted input voltage Vin_N, respectively; the VOUT1 and VOUT2 pins of the operational amplifier are output terminals of the 5x gain circuit, outputting the positive output voltage VOUT_P and the inverted output voltage VOUT_N, respectively; the first terminal of the first switch is connected to the first terminal of the first resistor, the first terminal of the second resistor, and the VIN- pin of the operational amplifier; the second terminal of the first switch is connected to the second terminal of the second resistor and the VOUT1 pin of the operational amplifier; the first terminal of the second switch is connected to the second terminal of the first resistor, the first terminal of the third resistor, and the VIN2- pin of the operational amplifier; the second terminal of the second switch is connected to the second terminal of the third resistor and the VOUT2 pin of the operational amplifier; the +Vs pin of the operational amplifier is connected to the positive power supply voltage V+, and the -Vs pin is connected to the negative power supply voltage V-. The gain circuit uses the ADA4898-2 operational amplifier as its core. This chip operates from ±5 V to ±16 V, has a slew rate of 55 V / μs, a gain-bandwidth product of 65 MHz, an offset voltage of 20 μV, a bias current of 0.1 μA, and an input noise density of [missing information]. The ADA4898-2's ultra-low noise, large gain-bandwidth product, and ultra-low distortion effectively improve the performance of gain circuits. Its monolithic integration of two operational amplifiers facilitates differential signal amplification. According to the differential amplifier circuit gain calculation formula, we can obtain: Different resistance values ​​can be set to achieve different gain requirements for early and late channels. The gain circuit of each stage is turned on and off by a relay switch SIL03-1A72-71D. The SIL03-1A72-71D has a closing voltage of 2.1V, an opening voltage of 0.45V, and an operating current of 6mA. A digital isolation module is used between the relay and the FPGA pins to avoid signal interference.

[0062] Data transmission of the embedded control board, such as Figure 8 As shown, the STM32 processor sends commands to the FPGA controller and receives data from the FPGA controller. Data is transferred between the FPGA controller and the SD card storage module. The STM32 processor sends data to the host computer control APP via the Wi-Fi module, and the host computer control APP sends commands to the STM32 processor via the Bluetooth module.

[0063] The control method of the transient electromagnetic receiving system provided in this application will be described exemplarily below.

[0064] like Figure 9As shown, the control method for the transient electromagnetic receiving system provided in this application includes the following steps: Step 91: When the host computer sends an acquisition control command carrying general configuration information and late signal acquisition configuration information to the processing module, the processing module sends the acquisition control command to the control module.

[0065] Step 92: Parse the acquisition control command received by the control module, and send the parsed general configuration information to the negative gain early signal acquisition module in the signal acquisition board, and send the parsed general configuration information and late signal acquisition configuration information to the high gain late signal acquisition module in the signal acquisition board.

[0066] Step 93: Configure the acquisition channel of the negative gain early signal acquisition module according to the general configuration information, and configure the acquisition channel of the high gain late signal acquisition module according to the general configuration information and the late signal acquisition configuration information.

[0067] Specifically, the ADC sampling rate and number of sampling points of the sampling channel of the negative gain early signal acquisition module are configured according to the ADC sampling rate and number of sampling points in the general configuration information. The ADC sampling rate and number of sampling points of the sampling channel of the high gain late signal acquisition module are configured according to the ADC sampling rate and number of sampling points in the general configuration information. The amplification factor of its own sampling channel is configured according to the acquisition channel amplification factor in the late signal acquisition configuration information.

[0068] Step 94: Use the configured negative gain early signal acquisition module to acquire the strong transient electromagnetic signal in the signal sent by the receiving coil, and use the high gain late signal acquisition module to acquire the weak transient electromagnetic signal in the signal sent by the receiving coil.

[0069] The aforementioned late-signal acquisition configuration information also includes the activation time information for the high-gain late-signal acquisition module.

[0070] The high-gain late signal acquisition module's start-up time information is sent to the channel switching module. The channel switching module then controls the high-gain late signal acquisition module to begin acquiring weak transient electromagnetic signals from the signal transmitted by the receiving coil at the time described in the high-gain late signal acquisition module's start-up time information. The high-gain late signal acquisition module starts acquiring signals later than the negative-gain early signal acquisition module.

[0071] Step 95: The acquired strong transient electromagnetic signals and weak transient electromagnetic signals are sent to the host computer through the control module and processing module.

[0072] Specifically, the acquired strong transient electromagnetic signals and weak transient electromagnetic signals are cached and superimposed using the RAM superposition unit in the control module to obtain the acquired data, which is then sent to the host computer through the processing module.

[0073] It should be noted that buffer overlay refers to the process of superimposing multiple signals together for accumulation, merging, or weighted processing. After buffer overlay, the strong transient electromagnetic signals and weak transient electromagnetic signals acquired multiple times are superimposed into a single signal and sent to the host computer. During the acquisition of transient electromagnetic signals, information such as synchronization time, GPS lock identifier, and geographic coordinates acquired by the GPS module are sent to the processing module through the control module, stored in the SD card storage module by the processing module, and then sent to the host computer. During the acquisition of transient electromagnetic signals, the adaptive late channel control unit in the control module generates the activation time signal and channel amplification factor control signal of the high-gain late signal acquisition module in real time based on the acquisition data output by the RAM overlay unit, realizing real-time control of the activation time and channel amplification factor of the high-gain late signal acquisition module.

[0074] It is worth mentioning that the negative gain early signal acquisition module and the high gain late signal acquisition module are configured according to the acquisition control instructions of the host computer, so as to realize the acquisition control of the negative gain early signal acquisition module and the high gain late signal acquisition module. This enables different acquisition control instructions to be issued according to different geological targets, and to control the acquisition gain of strong transient and weak transient electromagnetic signals, effectively improving the working efficiency of the transient electromagnetic receiving system.

[0075] The following example illustrates the workflow of the transient electromagnetic receiving system for shallow exploration described in this application.

[0076] The working process of the above transient electromagnetic receiving system is as follows: Figure 10 As shown.

[0077] Step 1: Connect the receiving coil, signal acquisition board, and embedded control board via cables and power on to start.

[0078] Step 2: Initialize the signal acquisition board and embedded control board. Initializing the embedded control board involves resetting the STM32 processor and some control pins. Initializing the signal acquisition board includes setting default configurations for the sampling rate, amplification factor, late channel open time, and RAM stacking count for the negative gain early signal acquisition module and the high gain late signal acquisition module, and resetting the FPGA controller. After initialization, proceed to Step 3.

[0079] Step 3: Determine if the host computer has sent command data to the STM32 processor. If the host computer has sent command data, proceed to step 5; otherwise, proceed to step 4.

[0080] The command data carries control instructions, which are used to control the operation of the transient electromagnetic receiving system. These instructions can include general configuration instructions for the signal acquisition board (used to configure parameters of the signal acquisition board), late acquisition module configuration instructions (used to configure parameters of the high-gain late signal acquisition module), start acquisition instructions (used to instruct the transient electromagnetic receiving system to start data acquisition), acquisition end instructions (used to instruct the transient electromagnetic receiving system to end data acquisition), and stop working instructions (used to instruct the transient electromagnetic receiving system to stop working).

[0081] Step 4: Maintain the current state. The signal acquisition board and embedded control board are in standby mode, and all registers and control parameters remain unchanged.

[0082] Step 5: The STM32 processor performs preliminary parsing of the command data and sends it to the FPGA controller. Specifically, the command data sent from the host computer is parsed into hexadecimal data, frame header and frame trailer information is added, and then it is sent to the FPGA controller. After the sending is completed, proceed to step 6.

[0083] Step 6: The FPGA controller performs secondary parsing on the issued command data to obtain the instructions carried within.

[0084] Step 7: Determine whether the instruction received by the FPGA controller is a general configuration instruction for the signal acquisition board. This instruction includes the ADC sampling rate, RAM stacking count, and ADC sampling point count. If it is a general configuration instruction for the signal acquisition board, proceed to step 8; otherwise, proceed to step 9.

[0085] Step 8: Generate configuration signals corresponding to the acquisition requirements. Based on the general configuration instructions of the signal acquisition board, generate external configuration instructions to configure the ADC sampling rate and number of sampling points of the negative gain early signal acquisition module and the high gain late signal acquisition module, and generate internal control instructions to control the number of times the RAM overlay unit is overlaid. After completing the general configuration of the signal acquisition board, proceed to step 9.

[0086] Step 9: Determine if it is a configuration instruction for a high-gain late-stage signal acquisition module. This instruction includes the late-stage channel activation time and the late-stage channel amplification factor. If it is a configuration instruction for a high-gain late-stage signal acquisition module, proceed to step 10; otherwise, proceed to step 11.

[0087] Step 10: Generate late-gain signal acquisition module configuration signals. Based on the late-gain signal acquisition module configuration instructions, generate control signals for the gain control circuit relay group to set the amplification factor of the late-gain acquisition channel; generate control signals for the channel switching circuit to set the activation time of the late-gain acquisition channel. After completing the high-gain late-gain signal acquisition module configuration, proceed to step 11.

[0088] Step 11: Turn on the corresponding transmitter to transmit current to the transmitting coil and start the signal acquisition process. Determine if a start acquisition command has been received. If the STM32 processor in the embedded control board receives a start acquisition command from the host computer, proceed to step 12; otherwise, return to step 11 and wait for a start acquisition command to be received.

[0089] Step 12: Read and superimpose ADC sampled data. First, activate the negative gain early signal acquisition module. Then, according to the late channel activation time specified in the general configuration instructions, activate the high gain late signal acquisition module. Both acquisition modules acquire the induced voltage of the receiving coil at the sampling rate and number of sampling points determined in the general configuration instructions, and transmit the acquired data to the FPGA controller. The FPGA controller's internal RAM superposition unit superimposes the acquired data according to the superposition count specified in the general configuration instructions. After completing this step, proceed to step 13.

[0090] Step 13: Based on the characteristics of the acquired data output from the RAM overlay module, adaptively adjust the on-time and channel gain of the high-gain late-stage signal acquisition channel, generating new on-time and gain control configuration commands. After completing the adaptive adjustment of the high-gain late-stage signal acquisition channel, proceed to step 14.

[0091] Step 14: Determine if the receiver has received a start acquisition command. If the receiver has received the start acquisition command, proceed to step 12; otherwise, proceed to step 15.

[0092] Step 15: Determine if the STM32 processor in the embedded control board has received a data acquisition termination command from the host computer. If the embedded control board receives the data acquisition termination command, the FPGA controller generates a stop acquisition signal, controlling the negative gain early signal acquisition module and the high gain late signal acquisition module to stop acquisition, and controlling the RAM overlay module to stop overlaying, then proceed to step 16; otherwise, return to step 15 and wait for the data acquisition termination command.

[0093] Step 16: After buffering and overlaying the acquired data, send it to the host computer. The FPGA buffers the data from the RAM overlay unit into the FIFO unit, and then transmits the acquired data to the host computer through the data transceiver unit using the set transmission protocol. After completing this step, proceed to step 17.

[0094] Step 17: Determine if a stop command has been received. If a stop command has been received, stop the operation and proceed to step 18; otherwise, return to step 11.

[0095] Step 18, Return. Return to step 3 and wait for instructions from the host computer again.

[0096] The transient electromagnetic receiving system of this application will be illustrated below with a specific example.

[0097] The system short-circuit noise test diagram of the transient electromagnetic receiving system of this application is shown below. Figure 11 As shown, the horizontal axis represents Time, in milliseconds (ms), and the vertical axis represents Voltage, in volts (V). Figure 11 'a' represents the first channel (i.e., the negative gain early signal acquisition module) with 150 instances of short-circuit noise superimposed on it. Figure 11 b represents the second channel (high-gain late-stage signal acquisition module) with 150 superimposed short-circuit noise. The peak-to-peak short-circuit noise of the negative-gain early-stage signal acquisition module is approximately 50 μV, with an equivalent peak-to-peak input noise of 400 μV. The short-circuit noise of the high-gain late-stage signal acquisition module is approximately 1.5 μV, with an equivalent input noise of 0.06 μV. The maximum detectable voltage of the acquisition channel is the product of the attenuation factor and the ADC range. This system attenuates strong signals by 8 times, has an ADC range of 5V, and a maximum detectable voltage of 40V. The minimum detectable voltage of the acquisition channel is the floor noise, which is 0.06 μV in this system. Therefore, the dynamic range of this instrument is approximately 178 dB. This system basically meets the design specifications of large dynamic range and high precision.

[0098] Voltage test graphs at different amplification factors are shown below. Figure 12 As shown, the horizontal axis represents time in seconds (s), and the vertical axis represents voltage in volts (V). Figure 12 'a' represents a sine wave acquired from the first channel, amplified by 1 / 8, with a frequency of 1kHz and a peak value of 30mV. Figure 12 b is a sine wave amplified 25 times by the second channel, with a frequency of 1kHz and a peak value of 30mV. Figure 12 c represents a sine wave amplified 125 times by the second channel, with a frequency of 1kHz and a peak value of 30mV. Figure 12 d represents the sine wave amplified 625 times by the second channel, with a frequency of 1kHz and a peak value of 10mV. The test results show that each channel can stably acquire the input sine wave at the set amplification factor.

[0099] The measured induced voltage attenuation curve is shown below. Figure 13 As shown, the horizontal axis represents time, in seconds (s). Figure 13'a' represents the raw data for the first and second high-current channels. The vertical axis represents the normalized current, in V / A*m^2. Figure 13 b represents the raw data for the first and second low-current channels. The vertical axis represents the normalized current, with units of V / A*m^2. Figure 13 The two curves in curve c represent the high-current dual-channel fusion extraction curve and the low-current dual-channel fusion extraction curve, respectively. The vertical axis represents the electromotive force (EMF), with units of volts (V). Figure 13 The two curves are the high-current dual-channel fusion and channel-stripping normalization curve and the low-current dual-channel fusion and channel-stripping normalization curve, respectively. The vertical axis represents the normalized current, with units of V / A*m^2.

[0100] In summary, the transient electromagnetic receiving system for shallow exploration provided in this application is based on an automatically adjustable dual-channel acquisition system design. By selecting more advanced operational amplifiers and ADCs, it enables the acquisition of transient signals with an ultra-wide dynamic range without loss of gain, thus improving exploration accuracy. A hierarchical control system based on an FPGA-STM32 microcontroller and host computer is designed to achieve a user-friendly, convenient, and efficient instrument operation. When exploring geological targets with low underground resistivity, the activation time of the high-gain late-stage signal acquisition module can be delayed, and the gain can be appropriately reduced. When exploring geological targets with high underground resistivity, the activation time of the high-gain late-stage signal acquisition module can be advanced, and the gain can be appropriately increased. To reduce the pressure on later data transmission and improve work efficiency, this system incorporates an FPGA-based overlay system, leveraging the powerful data parallel mathematical capabilities of the FPGA to perform data overlay. To accommodate different acquisition accuracy requirements, the system can be set to two sampling rates: 2.5 Msps and 1.25 Msps.

[0101] For example, the process of parsing acquisition control commands is explained below. Figure 14 The acquisition control command is 64-bit serial data, where: (1) [63:60] bits: frame header, specifying the command object. 4'b0000 is the transmitter command, 4'b1000 is the receiver general command, 4'b1001 is the receiver second channel command, 4'b0101 is the whole machine start command, and 4'b0110 is the whole machine stop command. (2) Receiver general instructions: [59:56] bits are for ADC sampling mode selection, 4'b0000 is 2.5M sampling rate, full filtering mode; [55:52] bits and [47:16] bits are idle bits; [51:48] bits are for the number of times the receiver collects data superimposed, 4'b0000 no superposition, 4'b0001 superposition 50 times, 4'b0010 superposition 100 times, 4'b0011 superposition 150 times, 4'b0100 superposition 200 times, 4'b0101 superposition 300 times; [15:0] bits are for the number of receiver sampling points.

[0102] (3) Receiver second channel instruction:

[59] bit is the second channel enable instruction, 1'b0 indicates disable, 1'b1 indicates enable; [58:57] bits are the second channel amplification factor, 2'b00 is 25 times, 2'b01 is 125 times, 2'b10 is 625 times; [56:20] bits are idle bits; [19:0] bits are the second channel open time.

[0103] The flowchart for parsing the acquisition control instructions is as follows: Figure 15 When command reception completion is detected, the FPGA controller internally matches the first four bits of the command data, sequentially checking whether it is a general configuration command, a second channel configuration command, a start acquisition command, or a stop acquisition command. If it is a general configuration command, the FPGA controller parses the sampling mode, number of stacking times, and number of sampling points command information, and finally pulls the configuration flag signal config_flag high and returns to the initial state. If it is a second channel configuration command, the FPGA controller parses the second channel start time and second channel amplification factor, and then returns to the idle state. If it is a start acquisition command, the start acquisition flag signal is pulled high, and the FPGA controller directly jumps to the idle state. If it is a stop acquisition flag, the start acquisition flag signal is pulled low, and the FPGA controller directly jumps to the idle state. If no command reception completion signal is detected, the FPGA controller will continue to determine whether stacking is complete in the idle state; if stacking is complete, the start acquisition flag signal is pulled low; if stacking is not complete, the state machine remains in the idle state.

[0104] The above description is the preferred embodiment of this application. It should be noted that for those skilled in the art, several improvements and modifications can be made without departing from the principles described in this application, and these improvements and modifications should also be considered within the scope of protection of this application.

Claims

1. A transient electromagnetic receiving system for shallow exploration, characterized in that, The transient electromagnetic receiving system includes a receiving coil, a signal acquisition board, an embedded control board, and a host computer; The receiving coil is connected to the first signal input terminal of the signal acquisition board, the signal output terminal of the signal acquisition board is connected to the first signal input terminal of the embedded control board, the second signal input terminal of the signal acquisition board is connected to the first signal output terminal of the embedded control board, the second signal input terminal of the embedded control board is connected to the signal output terminal of the host computer, and the second signal output terminal of the embedded control board is connected to the signal input terminal of the host computer. When the host computer sends an acquisition control command carrying general configuration information and late signal acquisition configuration information to the processing module in the embedded control board, the processing module sends the acquisition control command to the control module in the signal acquisition board. The control module parses the acquisition control command and sends the parsed general configuration information to the negative gain early signal acquisition module in the signal acquisition board, and sends the parsed general configuration information and late signal acquisition configuration information to the high gain late signal acquisition module in the signal acquisition board. The negative gain early signal acquisition module adjusts its acquisition channel according to the general configuration information. The system is configured to acquire strong transient electromagnetic signals from the signal transmitted by the receiving coil. The high-gain late-signal acquisition module configures its acquisition channel according to the general configuration information and the late-signal acquisition configuration information, and acquires weak transient electromagnetic signals from the signal transmitted by the receiving coil. The amplitude of the strong transient electromagnetic signal is greater than or equal to the amplitude threshold, and the amplitude of the weak transient electromagnetic signal is less than the amplitude threshold. The general configuration information includes the ADC sampling rate and the number of sampling points of the acquisition channel, and the late-signal acquisition configuration information includes the amplification factor of the acquisition channel of the high-gain late-signal acquisition module.

2. The transient electromagnetic receiving system according to claim 1, characterized in that, The signal acquisition board also includes a damping matching module, a pre-protection module, a channel switching module, a digital isolation module, and a GPS module; The input terminal of the damping matching module is the first signal input terminal of the signal acquisition board, the fourth input terminal of the control module is the second signal input terminal of the signal acquisition board, and the first output terminal of the control module is the signal output terminal of the signal acquisition board. The output of the damping matching module is connected to the input of the pre-protection module. The output of the pre-protection module is connected to the first input of the channel switching module. The first output of the channel switching module is connected to the first input of the negative gain early signal acquisition module. The second output of the channel switching module is connected to the first input of the high gain late signal acquisition module. The output of the negative gain early signal acquisition module is connected to the first input of the control module. The output of the high gain late signal acquisition module is connected to the second input of the control module. The third input of the control module is connected to the output of the GPS module. The second output terminal of the control module is connected to the second input terminal of the negative gain early signal acquisition module, the third output terminal of the control module is connected to the second input terminal of the high gain late signal acquisition module, the fourth output terminal of the control module is connected to the input terminal of the digital isolation module, the first output terminal of the digital isolation module is connected to the second input terminal of the channel switching module, and the second output terminal of the digital isolation module is connected to the third input terminal of the high gain late signal acquisition module. The negative gain early signal acquisition module is used to acquire strong transient electromagnetic signals, and the high gain late signal acquisition module is used to acquire weak transient electromagnetic signals.

3. The transient electromagnetic receiving system according to claim 1, characterized in that, The embedded control board also includes a storage module, a Bluetooth module, and a wireless transmission module; The first input terminal of the processing module is the first signal input terminal of the embedded control board, the output terminal of the Bluetooth module is the second signal input terminal of the embedded control board, and the output terminal of the wireless transmission module is the signal output terminal of the embedded control board. The second input terminal of the processing module is connected to the output terminal of the storage module, the third input terminal of the processing module is connected to the output terminal of the Bluetooth module, the first output terminal of the processing module is connected to the input terminal of the storage module, and the second output terminal of the processing module is connected to the input terminal of the wireless transmission module.

4. The transient electromagnetic receiving system according to claim 3, characterized in that, The control module is an FPGA controller, which includes a UART serial port unit, a kernel unit, a data transceiver unit, a register configuration unit, an adaptive late channel control unit, a FIFO unit, a RAM overlay unit, and an ADC data reading unit. The first signal input terminal of the ADC data reading unit is the first input terminal of the FPGA controller; the second signal input terminal of the ADC data reading unit is the second input terminal of the FPGA controller; the GPS signal input terminal of the UART serial port unit is the third input terminal of the FPGA controller; the third data receiving terminal of the data transceiver unit is the fourth input terminal of the FPGA controller; the first data transmitting terminal of the data transceiver unit is the first output terminal of the FPGA controller; the first sampling rate control signal output terminal of the register configuration module is the second output terminal of the FPGA controller; the second sampling rate control signal output terminal of the register configuration module is the third output terminal of the FPGA controller; and the channel control signal output terminal of the adaptive late channel control unit is the fourth output terminal of the FPGA controller. The GPS signal output terminal of the UART serial port unit is connected to the first signal input terminal of the kernel unit; the signal input terminal of the register configuration module is connected to the first signal output terminal of the kernel unit; the signal input terminal of the adaptive late channel control module is connected to the second signal output terminal of the kernel unit; the signal output terminal of the ADC data reading unit is connected to the first signal input terminal of the RAM overlay unit; the first signal output terminal of the RAM overlay unit is connected to the second signal input terminal of the kernel unit; the second signal output terminal of the RAM overlay unit is connected to the signal input terminal of the FIFO unit; the signal output terminal of the FIFO unit is connected to the first data receiving terminal of the data transceiver unit; the second data receiving terminal of the data transceiver unit is connected to the third signal output terminal of the kernel unit; and the second data sending terminal of the data transceiver unit is connected to the third signal input terminal of the kernel unit.

5. The transient electromagnetic receiving system according to claim 2, characterized in that, The damping matching module is a damping matching circuit, which includes a first damping resistor and a second damping resistor. The first end of the first damping resistor is connected to the first end of the receiving coil, the first end of the gas discharge tube in the pre-protection module, and the first end of the second current-limiting resistor in the pre-protection module. The second end of the second damping resistor is connected to the second end of the receiving coil, the second end of the gas discharge tube, and the first end of the first current-limiting resistor in the pre-protection module. The second end of the first damping resistor and the first end of the second damping resistor are both connected to ground.

6. The transient electromagnetic receiving system according to claim 5, characterized in that, The pre-protection module is a pre-protection circuit; In the pre-protection circuit, the second end of the third current-limiting resistor, the first end of the second switching diode, the second end of the fourth current-limiting resistor, and the first end of the first switching diode are all connected to the first input terminal of the channel switching module.

7. The transient electromagnetic receiving system according to claim 6, characterized in that, The pre-protection circuit also includes a first transient suppression diode and a second transient suppression diode; The grounding terminal of the gas discharge tube is connected to ground. The second terminal of the second current-limiting resistor and the first terminal of the fourth current-limiting resistor are both connected to the input terminal of the first transient suppression diode. The second terminal of the first current-limiting resistor and the first terminal of the third current-limiting resistor are both connected to the input terminal of the second transient suppression diode. The grounding terminals of the first transient suppression diode and the second transient suppression diode are both connected to ground. The second terminal of the first switching diode and the third terminal of the first switching diode are both connected to a positive power supply voltage. The third terminal of the first switching diode and the second terminal of the first switching diode are both connected to a negative power supply voltage.

8. A control method for a transient electromagnetic receiving system, characterized in that, The control method, applied to the transient electromagnetic receiving system as described in any one of claims 1 to 7, comprises: When the host computer sends an acquisition control command carrying general configuration information and late signal acquisition configuration information to the processing module, the processing module sends the acquisition control command to the control module. The control module parses the acquisition control commands received by the control module and sends the parsed general configuration information to the negative gain early signal acquisition module in the signal acquisition board. It also sends the parsed general configuration information and late signal acquisition configuration information to the high gain late signal acquisition module in the signal acquisition board. Configure the acquisition channels of the negative gain early signal acquisition module according to the general configuration information, and configure the acquisition channels of the high gain late signal acquisition module according to the general configuration information and the late signal acquisition configuration information. The configured negative gain early signal acquisition module is used to acquire strong transient electromagnetic signals in the signal transmitted by the receiving coil, and the high gain late signal acquisition module is used to acquire weak transient electromagnetic signals in the signal transmitted by the receiving coil. The acquired strong transient electromagnetic signals and weak transient electromagnetic signals are sent to the host computer through the control module and the processing module.

9. The control method according to claim 8, characterized in that, The late signal acquisition configuration information also includes the activation time information of the high-gain late signal acquisition module; The method of acquiring weak transient electromagnetic signals from the signal transmitted by the receiving coil using a high-gain late-stage signal acquisition module includes: The high-gain late signal acquisition module start-up time information is sent to the channel switching module in the signal acquisition board. The channel switching module controls the high-gain late signal acquisition module to start acquiring weak transient electromagnetic signals in the signal sent by the receiving coil at the time described by the high-gain late signal acquisition module start-up time information. The high-gain late signal acquisition module starts acquiring signals later than the negative-gain early signal acquisition module starts acquiring signals.

10. The control method according to claim 9, characterized in that, The step of sending the acquired strong transient electromagnetic signals and weak transient electromagnetic signals to the host computer through the control module and the processing module includes: The acquired strong transient electromagnetic signals and weak transient electromagnetic signals are cached and superimposed using the RAM superposition unit in the control module to obtain acquired data, which is then sent to the host computer through the processing module.